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Use stdint.h fixed-size types.

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This commit is contained in:
Ralf Corsepius
2007-03-31 01:14:39 +00:00
parent f2a6ee017c
commit 18a3bbeb0d
8 changed files with 60 additions and 52 deletions
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25
c/src/lib/libbsp/powerpc/shared/bootloader/bootldr.h
View File

@@ -19,6 +19,7 @@
#define _PPC_BOOTLDR_H #define _PPC_BOOTLDR_H
#ifndef ASM #ifndef ASM
#include <stdint.h>
#include <bsp/residual.h> #include <bsp/residual.h>
#include <bsp/consoleIo.h> #include <bsp/consoleIo.h>
#include "pci.h" #include "pci.h"
@@ -78,77 +79,77 @@ register boot_data *bd __asm__("r13");
extern inline int extern inline int
pcibios_read_config_byte(u_char bus, u_char dev_fn, pcibios_read_config_byte(u_char bus, u_char dev_fn,
u_char where, u_char * val) { u_char where, uint8_t *val) {
return bd->pci_functions->read_config_byte(bus, dev_fn, where, val); return bd->pci_functions->read_config_byte(bus, dev_fn, where, val);
} }
extern inline int extern inline int
pcibios_read_config_word(u_char bus, u_char dev_fn, pcibios_read_config_word(u_char bus, u_char dev_fn,
u_char where, u_short * val) { u_char where, uint16_t *val) {
return bd->pci_functions->read_config_word(bus, dev_fn, where, val); return bd->pci_functions->read_config_word(bus, dev_fn, where, val);
} }
extern inline int extern inline int
pcibios_read_config_dword(u_char bus, u_char dev_fn, pcibios_read_config_dword(u_char bus, u_char dev_fn,
u_char where, u_int * val) { u_char where, uint32_t *val) {
return bd->pci_functions->read_config_dword(bus, dev_fn, where, val); return bd->pci_functions->read_config_dword(bus, dev_fn, where, val);
} }
extern inline int extern inline int
pcibios_write_config_byte(u_char bus, u_char dev_fn, pcibios_write_config_byte(u_char bus, u_char dev_fn,
u_char where, u_char val) { u_char where, uint8_t val) {
return bd->pci_functions->write_config_byte(bus, dev_fn, where, val); return bd->pci_functions->write_config_byte(bus, dev_fn, where, val);
} }
extern inline int extern inline int
pcibios_write_config_word(u_char bus, u_char dev_fn, pcibios_write_config_word(u_char bus, u_char dev_fn,
u_char where, u_short val) { u_char where, uint16_t val) {
return bd->pci_functions->write_config_word(bus, dev_fn, where, val); return bd->pci_functions->write_config_word(bus, dev_fn, where, val);
} }
extern inline int extern inline int
pcibios_write_config_dword(u_char bus, u_char dev_fn, pcibios_write_config_dword(u_char bus, u_char dev_fn,
u_char where, u_int val) { u_char where, uint32_t val) {
return bd->pci_functions->write_config_dword(bus, dev_fn, where, val); return bd->pci_functions->write_config_dword(bus, dev_fn, where, val);
} }
extern inline int extern inline int
pci_bootloader_read_config_byte(struct pci_dev *dev, u_char where, u_char * val) { pci_bootloader_read_config_byte(struct pci_dev *dev, u_char where, uint8_t *val) {
return bd->pci_functions->read_config_byte(dev->bus->number, return bd->pci_functions->read_config_byte(dev->bus->number,
dev->devfn, dev->devfn,
where, val); where, val);
} }
extern inline int extern inline int
pci_bootloader_read_config_word(struct pci_dev *dev, u_char where, u_short * val) { pci_bootloader_read_config_word(struct pci_dev *dev, u_char where, uint16_t *val) {
return bd->pci_functions->read_config_word(dev->bus->number, return bd->pci_functions->read_config_word(dev->bus->number,
dev->devfn, dev->devfn,
where, val); where, val);
} }
extern inline int extern inline int
pci_bootloader_read_config_dword(struct pci_dev *dev, u_char where, u_int * val) { pci_bootloader_read_config_dword(struct pci_dev *dev, u_char where, uint32_t *val) {
return bd->pci_functions->read_config_dword(dev->bus->number, return bd->pci_functions->read_config_dword(dev->bus->number,
dev->devfn, dev->devfn,
where, val); where, val);
} }
extern inline int extern inline int
pci_bootloader_write_config_byte(struct pci_dev *dev, u_char where, u_char val) { pci_bootloader_write_config_byte(struct pci_dev *dev, u_char where, uint8_t val) {
return bd->pci_functions->write_config_byte(dev->bus->number, return bd->pci_functions->write_config_byte(dev->bus->number,
dev->devfn, dev->devfn,
where, val); where, val);
} }
extern inline int extern inline int
pci_bootloader_write_config_word(struct pci_dev *dev, u_char where, u_short val) { pci_bootloader_write_config_word(struct pci_dev *dev, u_char where, uint16_t val) {
return bd->pci_functions->write_config_word(dev->bus->number, return bd->pci_functions->write_config_word(dev->bus->number,
dev->devfn, dev->devfn,
where, val); where, val);
} }
extern inline int extern inline int
pci_bootloader_write_config_dword(struct pci_dev *dev, u_char where, u_int val) { pci_bootloader_write_config_dword(struct pci_dev *dev, u_char where, uint32_t val) {
return bd->pci_functions->write_config_dword(dev->bus->number, return bd->pci_functions->write_config_dword(dev->bus->number,
dev->devfn, dev->devfn,
where, val); where, val);

7
c/src/lib/libbsp/powerpc/shared/bootloader/em86.c
View File

@@ -45,8 +45,8 @@ typedef union _reg_type1 {
} reg_type1; } reg_type1;
typedef union _reg_type2 { typedef union _reg_type2 {
unsigned e; uint32_t e;
unsigned short x; uint16_t x;
} reg_type2; } reg_type2;
typedef struct _x86 { typedef struct _x86 {
@@ -492,7 +492,8 @@ void em86_main(struct pci_dev *dev){
u_short signature; u_short signature;
u_char length; u_char length;
volatile u_int *src; volatile u_int *src;
u_int *dst, left, saved_rom; u_int *dst, left;
uint32_t saved_rom;
#if defined(MONITOR_IO) && !defined(__BOOT__) #if defined(MONITOR_IO) && !defined(__BOOT__)
#define IOMASK 0xff #define IOMASK 0xff
#else #else

32
c/src/lib/libbsp/powerpc/shared/bootloader/pci.c
View File

@@ -542,7 +542,7 @@ static void reconfigure_pci(void) {
static int static int
indirect_pci_read_config_byte(unsigned char bus, unsigned char dev_fn, indirect_pci_read_config_byte(unsigned char bus, unsigned char dev_fn,
unsigned char offset, unsigned char *val) { unsigned char offset, uint8_t *val) {
out_be32(pci->config_addr, out_be32(pci->config_addr,
0x80|(bus<<8)|(dev_fn<<16)|((offset&~3)<<24)); 0x80|(bus<<8)|(dev_fn<<16)|((offset&~3)<<24));
*val=in_8(pci->config_data + (offset&3)); *val=in_8(pci->config_data + (offset&3));
@@ -551,7 +551,7 @@ indirect_pci_read_config_byte(unsigned char bus, unsigned char dev_fn,
static int static int
indirect_pci_read_config_word(unsigned char bus, unsigned char dev_fn, indirect_pci_read_config_word(unsigned char bus, unsigned char dev_fn,
unsigned char offset, unsigned short *val) { unsigned char offset, uint16_t *val) {
*val = 0xffff; *val = 0xffff;
if (offset&1) return PCIBIOS_BAD_REGISTER_NUMBER; if (offset&1) return PCIBIOS_BAD_REGISTER_NUMBER;
out_be32(pci->config_addr, out_be32(pci->config_addr,
@@ -562,7 +562,7 @@ indirect_pci_read_config_word(unsigned char bus, unsigned char dev_fn,
static int static int
indirect_pci_read_config_dword(unsigned char bus, unsigned char dev_fn, indirect_pci_read_config_dword(unsigned char bus, unsigned char dev_fn,
unsigned char offset, unsigned int *val) { unsigned char offset, uint32_t *val) {
*val = 0xffffffff; *val = 0xffffffff;
if (offset&3) return PCIBIOS_BAD_REGISTER_NUMBER; if (offset&3) return PCIBIOS_BAD_REGISTER_NUMBER;
out_be32(pci->config_addr, out_be32(pci->config_addr,
@@ -573,7 +573,7 @@ indirect_pci_read_config_dword(unsigned char bus, unsigned char dev_fn,
static int static int
indirect_pci_write_config_byte(unsigned char bus, unsigned char dev_fn, indirect_pci_write_config_byte(unsigned char bus, unsigned char dev_fn,
unsigned char offset, unsigned char val) { unsigned char offset, uint8_t val) {
out_be32(pci->config_addr, out_be32(pci->config_addr,
0x80|(bus<<8)|(dev_fn<<16)|((offset&~3)<<24)); 0x80|(bus<<8)|(dev_fn<<16)|((offset&~3)<<24));
out_8(pci->config_data + (offset&3), val); out_8(pci->config_data + (offset&3), val);
@@ -582,7 +582,7 @@ indirect_pci_write_config_byte(unsigned char bus, unsigned char dev_fn,
static int static int
indirect_pci_write_config_word(unsigned char bus, unsigned char dev_fn, indirect_pci_write_config_word(unsigned char bus, unsigned char dev_fn,
unsigned char offset, unsigned short val) { unsigned char offset, uint16_t val) {
if (offset&1) return PCIBIOS_BAD_REGISTER_NUMBER; if (offset&1) return PCIBIOS_BAD_REGISTER_NUMBER;
out_be32(pci->config_addr, out_be32(pci->config_addr,
0x80|(bus<<8)|(dev_fn<<16)|((offset&~3)<<24)); 0x80|(bus<<8)|(dev_fn<<16)|((offset&~3)<<24));
@@ -592,7 +592,7 @@ indirect_pci_write_config_word(unsigned char bus, unsigned char dev_fn,
static int static int
indirect_pci_write_config_dword(unsigned char bus, unsigned char dev_fn, indirect_pci_write_config_dword(unsigned char bus, unsigned char dev_fn,
unsigned char offset, unsigned int val) { unsigned char offset, uint32_t val) {
if (offset&3) return PCIBIOS_BAD_REGISTER_NUMBER; if (offset&3) return PCIBIOS_BAD_REGISTER_NUMBER;
out_be32(pci->config_addr, out_be32(pci->config_addr,
0x80|(bus<<8)|(dev_fn<<16)|(offset<<24)); 0x80|(bus<<8)|(dev_fn<<16)|(offset<<24));
@@ -611,7 +611,7 @@ static const struct pci_bootloader_config_access_functions indirect_functions =
static int static int
direct_pci_read_config_byte(unsigned char bus, unsigned char dev_fn, direct_pci_read_config_byte(unsigned char bus, unsigned char dev_fn,
unsigned char offset, unsigned char *val) { unsigned char offset, uint8_t *val) {
if (bus != 0 || (1<<PCI_SLOT(dev_fn) & 0xff8007fe)) { if (bus != 0 || (1<<PCI_SLOT(dev_fn) & 0xff8007fe)) {
*val=0xff; *val=0xff;
return PCIBIOS_DEVICE_NOT_FOUND; return PCIBIOS_DEVICE_NOT_FOUND;
@@ -623,7 +623,7 @@ direct_pci_read_config_byte(unsigned char bus, unsigned char dev_fn,
static int static int
direct_pci_read_config_word(unsigned char bus, unsigned char dev_fn, direct_pci_read_config_word(unsigned char bus, unsigned char dev_fn,
unsigned char offset, unsigned short *val) { unsigned char offset, uint16_t *val) {
*val = 0xffff; *val = 0xffff;
if (offset&1) return PCIBIOS_BAD_REGISTER_NUMBER; if (offset&1) return PCIBIOS_BAD_REGISTER_NUMBER;
if (bus != 0 || (1<<PCI_SLOT(dev_fn) & 0xff8007fe)) { if (bus != 0 || (1<<PCI_SLOT(dev_fn) & 0xff8007fe)) {
@@ -637,7 +637,7 @@ direct_pci_read_config_word(unsigned char bus, unsigned char dev_fn,
static int static int
direct_pci_read_config_dword(unsigned char bus, unsigned char dev_fn, direct_pci_read_config_dword(unsigned char bus, unsigned char dev_fn,
unsigned char offset, unsigned int *val) { unsigned char offset, uint32_t *val) {
*val = 0xffffffff; *val = 0xffffffff;
if (offset&3) return PCIBIOS_BAD_REGISTER_NUMBER; if (offset&3) return PCIBIOS_BAD_REGISTER_NUMBER;
if (bus != 0 || (1<<PCI_SLOT(dev_fn) & 0xff8007fe)) { if (bus != 0 || (1<<PCI_SLOT(dev_fn) & 0xff8007fe)) {
@@ -651,7 +651,7 @@ direct_pci_read_config_dword(unsigned char bus, unsigned char dev_fn,
static int static int
direct_pci_write_config_byte(unsigned char bus, unsigned char dev_fn, direct_pci_write_config_byte(unsigned char bus, unsigned char dev_fn,
unsigned char offset, unsigned char val) { unsigned char offset, uint8_t val) {
if (bus != 0 || (1<<PCI_SLOT(dev_fn) & 0xff8007fe)) { if (bus != 0 || (1<<PCI_SLOT(dev_fn) & 0xff8007fe)) {
return PCIBIOS_DEVICE_NOT_FOUND; return PCIBIOS_DEVICE_NOT_FOUND;
} }
@@ -663,7 +663,7 @@ direct_pci_write_config_byte(unsigned char bus, unsigned char dev_fn,
static int static int
direct_pci_write_config_word(unsigned char bus, unsigned char dev_fn, direct_pci_write_config_word(unsigned char bus, unsigned char dev_fn,
unsigned char offset, unsigned short val) { unsigned char offset, uint16_t val) {
if (offset&1) return PCIBIOS_BAD_REGISTER_NUMBER; if (offset&1) return PCIBIOS_BAD_REGISTER_NUMBER;
if (bus != 0 || (1<<PCI_SLOT(dev_fn) & 0xff8007fe)) { if (bus != 0 || (1<<PCI_SLOT(dev_fn) & 0xff8007fe)) {
return PCIBIOS_DEVICE_NOT_FOUND; return PCIBIOS_DEVICE_NOT_FOUND;
@@ -677,7 +677,7 @@ direct_pci_write_config_word(unsigned char bus, unsigned char dev_fn,
static int static int
direct_pci_write_config_dword(unsigned char bus, unsigned char dev_fn, direct_pci_write_config_dword(unsigned char bus, unsigned char dev_fn,
unsigned char offset, unsigned int val) { unsigned char offset, uint32_t val) {
if (offset&3) return PCIBIOS_BAD_REGISTER_NUMBER; if (offset&3) return PCIBIOS_BAD_REGISTER_NUMBER;
if (bus != 0 || (1<<PCI_SLOT(dev_fn) & 0xff8007fe)) { if (bus != 0 || (1<<PCI_SLOT(dev_fn) & 0xff8007fe)) {
return PCIBIOS_DEVICE_NOT_FOUND; return PCIBIOS_DEVICE_NOT_FOUND;
@@ -785,7 +785,9 @@ void pci_read_bases(struct pci_dev *dev, unsigned int howmany)
u_int pci_scan_bus(struct pci_bus *bus) u_int pci_scan_bus(struct pci_bus *bus)
{ {
unsigned int devfn, l, max, class; unsigned int devfn, max;
uint32_t class;
uint32_t l;
unsigned char irq, hdr_type, is_multi = 0; unsigned char irq, hdr_type, is_multi = 0;
struct pci_dev *dev, **bus_last; struct pci_dev *dev, **bus_last;
struct pci_bus *child; struct pci_bus *child;
@@ -891,7 +893,7 @@ u_int pci_scan_bus(struct pci_bus *bus)
* If it's a bridge, scan the bus behind it. * If it's a bridge, scan the bus behind it.
*/ */
if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) { if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {
unsigned int buses; uint32_t buses;
unsigned int devfn = dev->devfn; unsigned int devfn = dev->devfn;
unsigned short cr; unsigned short cr;
@@ -1321,7 +1323,7 @@ void pci_init(void)
} }
} else { } else {
/* Let us try by experimentation at our own risk! */ /* Let us try by experimentation at our own risk! */
u_int id0; uint32_t id0;
bd->pci_functions = &direct_functions; bd->pci_functions = &direct_functions;
/* On all direct bridges I know the host bridge itself /* On all direct bridges I know the host bridge itself
* appears as device 0 function 0. * appears as device 0 function 0.

12
c/src/lib/libbsp/powerpc/shared/bootloader/pci.h
View File

@@ -23,17 +23,17 @@
/* Functions used to access pci configuration space */ /* Functions used to access pci configuration space */
struct pci_bootloader_config_access_functions { struct pci_bootloader_config_access_functions {
int (*read_config_byte)(unsigned char, unsigned char, int (*read_config_byte)(unsigned char, unsigned char,
unsigned char, unsigned char *); unsigned char, uint8_t *);
int (*read_config_word)(unsigned char, unsigned char, int (*read_config_word)(unsigned char, unsigned char,
unsigned char, unsigned short *); unsigned char, uint16_t *);
int (*read_config_dword)(unsigned char, unsigned char, int (*read_config_dword)(unsigned char, unsigned char,
unsigned char, unsigned int *); unsigned char, uint32_t *);
int (*write_config_byte)(unsigned char, unsigned char, int (*write_config_byte)(unsigned char, unsigned char,
unsigned char, unsigned char); unsigned char, uint8_t);
int (*write_config_word)(unsigned char, unsigned char, int (*write_config_word)(unsigned char, unsigned char,
unsigned char, unsigned short); unsigned char, uint16_t);
int (*write_config_dword)(unsigned char, unsigned char, int (*write_config_dword)(unsigned char, unsigned char,
unsigned char, unsigned int); unsigned char, uint32_t);
}; };
/* /*

2
c/src/lib/libbsp/powerpc/shared/irq/irq_init.c
View File

@@ -149,7 +149,7 @@ static unsigned char mcp750_openpic_initsenses[] = {
void VIA_isa_bridge_interrupts_setup(void) void VIA_isa_bridge_interrupts_setup(void)
{ {
pci_isa_bridge_device pci_dev; pci_isa_bridge_device pci_dev;
unsigned int temp; uint32_t temp;
unsigned char tmp; unsigned char tmp;
unsigned char maxBus; unsigned char maxBus;
unsigned found = 0; unsigned found = 0;

4
c/src/lib/libbsp/powerpc/shared/pci/detect_raven_bridge.c
View File

@@ -149,8 +149,8 @@ unsigned merst;
void detect_host_bridge() void detect_host_bridge()
{ {
PPC_DEVICE *hostbridge; PPC_DEVICE *hostbridge;
unsigned int id0; uint32_t id0;
unsigned int tmp; uint32_t tmp;
/* /*
* This code assumes that the host bridge is located at * This code assumes that the host bridge is located at

11
c/src/lib/libbsp/powerpc/shared/pci/pci.c
View File

@@ -83,7 +83,7 @@ indirect_pci_read_config_dword(
unsigned char slot, unsigned char slot,
unsigned char function, unsigned char function,
unsigned char offset, unsigned char offset,
unsigned int *val uint32_t *val
) { ) {
*val = 0xffffffff; *val = 0xffffffff;
if (offset&3) if (offset&3)
@@ -132,7 +132,7 @@ indirect_pci_write_config_dword(
unsigned char slot, unsigned char slot,
unsigned char function, unsigned char function,
unsigned char offset, unsigned char offset,
unsigned int val uint32_t val
) { ) {
if (offset&3) if (offset&3)
return PCIBIOS_BAD_REGISTER_NUMBER; return PCIBIOS_BAD_REGISTER_NUMBER;
@@ -200,7 +200,7 @@ direct_pci_read_config_dword(
unsigned char slot, unsigned char slot,
unsigned char function, unsigned char function,
unsigned char offset, unsigned char offset,
unsigned int *val uint32_t *val
) { ) {
*val = 0xffffffff; *val = 0xffffffff;
if (offset&3) if (offset&3)
@@ -257,7 +257,7 @@ direct_pci_write_config_dword(
unsigned char slot, unsigned char slot,
unsigned char function, unsigned char function,
unsigned char offset, unsigned char offset,
unsigned int val uint32_t val
) { ) {
if (offset&3) if (offset&3)
return PCIBIOS_BAD_REGISTER_NUMBER; return PCIBIOS_BAD_REGISTER_NUMBER;
@@ -581,7 +581,8 @@ int pci_initialize()
unsigned char ucSlotNumber, ucFnNumber, ucNumFuncs; unsigned char ucSlotNumber, ucFnNumber, ucNumFuncs;
unsigned char ucHeader; unsigned char ucHeader;
unsigned char ucMaxSubordinate; unsigned char ucMaxSubordinate;
unsigned int ulClass, ulDeviceID; uint32_t ulClass;
uint32_t ulDeviceID;
detect_host_bridge(); detect_host_bridge();

19
c/src/lib/libbsp/powerpc/shared/pci/pcifinddevice.c
View File

@@ -52,6 +52,7 @@
#define PCI_INVALID_VENDORDEVICEID 0xffffffff #define PCI_INVALID_VENDORDEVICEID 0xffffffff
#define PCI_MULTI_FUNCTION 0x80 #define PCI_MULTI_FUNCTION 0x80
#include <inttypes.h>
#include <bsp/pci.h> #include <bsp/pci.h>
#include <rtems/bspIo.h> #include <rtems/bspIo.h>
#include <stdio.h> #include <stdio.h>
@@ -127,12 +128,13 @@ dump_dev_cb(
int dev, int dev,
int fun, int fun,
void *uarg void *uarg
) { )
unsigned short vi,di; {
unsigned short cd,st; uint16_t vi,di;
unsigned int b1,b2; uint16_t cd,st;
unsigned char il,ip; uint32_t b1,b2;
FILE *f = uarg; uint8_t il,ip;
FILE *f = uarg;
pci_read_config_word (bus, dev, fun, PCI_VENDOR_ID, &vi); pci_read_config_word (bus, dev, fun, PCI_VENDOR_ID, &vi);
pci_read_config_word (bus, dev, fun, PCI_DEVICE_ID, &di); pci_read_config_word (bus, dev, fun, PCI_DEVICE_ID, &di);
@@ -143,7 +145,8 @@ FILE *f = uarg;
pci_read_config_byte (bus, dev, fun, PCI_INTERRUPT_LINE, &il); pci_read_config_byte (bus, dev, fun, PCI_INTERRUPT_LINE, &il);
pci_read_config_byte (bus, dev, fun, PCI_INTERRUPT_PIN, &ip); pci_read_config_byte (bus, dev, fun, PCI_INTERRUPT_PIN, &ip);
fprintf(f,"%3d:0x%02x:%d 0x%04x-0x%04x: 0x%04x 0x%04x 0x%08x 0x%08x %d -> %3d (=0x%02x)\n", /* fprintf(f,"%3d:0x%02x:%d 0x%04x-0x%04x: 0x%04x 0x%04x 0x%08x 0x%08x %d -> %3d (=0x%02x)\n", */
fprintf(f,"%3d:0x%02x:%d 0x%04x-0x%04x: 0x%04x 0x%04x 0x%08" PRIx32 " 0x%08" PRIx32 " %d -> %3d (=0x%02x)\n",
bus, dev, fun, vi, di, cd, st, b1, b2, ip, il, il); bus, dev, fun, vi, di, cd, st, b1, b2, ip, il, il);
return 0; return 0;
} }
@@ -164,7 +167,7 @@ BSP_pciScan(
void *uarg void *uarg
) { ) {
unsigned int d; uint32_t d;
unsigned char bus,dev,fun,hd; unsigned char bus,dev,fun,hd;
bus = PCIB_DEVSIG_BUS( (unsigned long)handle ); bus = PCIB_DEVSIG_BUS( (unsigned long)handle );