forked from Imagelibrary/rtems
2007-11-26 Joel Sherrill <joel.sherrill@oarcorp.com>
* startup/bspstart.c: Eliminate the interrupt_vector_table field in the m68k CPU Table since it is never read.
This commit is contained in:
@@ -1,3 +1,8 @@
|
|||||||
|
2007-11-26 Joel Sherrill <joel.sherrill@oarcorp.com>
|
||||||
|
|
||||||
|
* startup/bspstart.c: Eliminate the interrupt_vector_table field in the
|
||||||
|
m68k CPU Table since it is never read.
|
||||||
|
|
||||||
2007-05-03 Joel Sherrill <joel@OARcorp.com>
|
2007-05-03 Joel Sherrill <joel@OARcorp.com>
|
||||||
|
|
||||||
* startup/linkcmds: Handle .data.* sections
|
* startup/linkcmds: Handle .data.* sections
|
||||||
|
|||||||
@@ -192,33 +192,31 @@ void bsp_start( void )
|
|||||||
Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */
|
Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */
|
||||||
Cpu_table.postdriver_hook = bsp_postdriver_hook;
|
Cpu_table.postdriver_hook = bsp_postdriver_hook;
|
||||||
Cpu_table.interrupt_stack_size = 4096;
|
Cpu_table.interrupt_stack_size = 4096;
|
||||||
Cpu_table.interrupt_vector_table = (m68k_isr *)0; /* vectors at start of RAM */
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Invalidate the cache and disable it
|
* Invalidate the cache and disable it
|
||||||
*/
|
*/
|
||||||
m68k_set_acr0(0);
|
m68k_set_acr0(0);
|
||||||
m68k_set_acr1(0);
|
m68k_set_acr1(0);
|
||||||
m68k_set_cacr(MCF5XXX_CACR_CINV);
|
m68k_set_cacr(MCF5XXX_CACR_CINV);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Cache SDRAM and FLASH
|
* Cache SDRAM and FLASH
|
||||||
*/
|
*/
|
||||||
m68k_set_acr0(MCF5XXX_ACR_AB(SDRAM_BASE) |
|
m68k_set_acr0(MCF5XXX_ACR_AB(SDRAM_BASE) |
|
||||||
MCF5XXX_ACR_AM(SDRAM_SIZE-1) |
|
MCF5XXX_ACR_AM(SDRAM_SIZE-1) |
|
||||||
MCF5XXX_ACR_EN |
|
MCF5XXX_ACR_EN |
|
||||||
MCF5XXX_ACR_BWE |
|
MCF5XXX_ACR_BWE |
|
||||||
MCF5XXX_ACR_SM_IGNORE);
|
MCF5XXX_ACR_SM_IGNORE);
|
||||||
|
|
||||||
/*
|
|
||||||
* Enable the cache
|
|
||||||
*/
|
|
||||||
m68k_set_cacr(cacr_mode);
|
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Enable the cache
|
||||||
|
*/
|
||||||
|
m68k_set_cacr(cacr_mode);
|
||||||
}
|
}
|
||||||
|
|
||||||
uint32_t get_CPU_clock_speed(void)
|
uint32_t get_CPU_clock_speed(void)
|
||||||
{
|
{
|
||||||
extern char _CPUClockSpeed[];
|
extern char _CPUClockSpeed[];
|
||||||
return( (uint32_t)_CPUClockSpeed);
|
return( (uint32_t)_CPUClockSpeed);
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -1,3 +1,8 @@
|
|||||||
|
2007-11-26 Joel Sherrill <joel.sherrill@oarcorp.com>
|
||||||
|
|
||||||
|
* startup/bspstart.c: Eliminate the interrupt_vector_table field in the
|
||||||
|
m68k CPU Table since it is never read.
|
||||||
|
|
||||||
2007-05-03 Joel Sherrill <joel@OARcorp.com>
|
2007-05-03 Joel Sherrill <joel@OARcorp.com>
|
||||||
|
|
||||||
* startup/linkcmds: Handle .data.* sections
|
* startup/linkcmds: Handle .data.* sections
|
||||||
|
|||||||
@@ -79,5 +79,4 @@ void bsp_start( void )
|
|||||||
Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */
|
Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */
|
||||||
Cpu_table.postdriver_hook = bsp_postdriver_hook;
|
Cpu_table.postdriver_hook = bsp_postdriver_hook;
|
||||||
Cpu_table.interrupt_stack_size = 4096;
|
Cpu_table.interrupt_stack_size = 4096;
|
||||||
Cpu_table.interrupt_vector_table = (m68k_isr *)0; /* vectors at start of RAM */
|
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -1,3 +1,8 @@
|
|||||||
|
2007-11-26 Joel Sherrill <joel.sherrill@oarcorp.com>
|
||||||
|
|
||||||
|
* startup/bspstart.c: Eliminate the interrupt_vector_table field in the
|
||||||
|
m68k CPU Table since it is never read.
|
||||||
|
|
||||||
2007-05-03 Joel Sherrill <joel@OARcorp.com>
|
2007-05-03 Joel Sherrill <joel@OARcorp.com>
|
||||||
|
|
||||||
* startup/linkcmds: Handle .data.* sections
|
* startup/linkcmds: Handle .data.* sections
|
||||||
|
|||||||
@@ -62,9 +62,6 @@ void bsp_start( void )
|
|||||||
* typically done by stock BSPs) by subtracting the required amount
|
* typically done by stock BSPs) by subtracting the required amount
|
||||||
* of work space from the last physical address on the CPU board.
|
* of work space from the last physical address on the CPU board.
|
||||||
*/
|
*/
|
||||||
#if 0
|
|
||||||
Cpu_table.interrupt_vector_table = (mc68000_isr *) 0/*&M68Kvec*/;
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Need to "allocate" the memory for the RTEMS Workspace and
|
* Need to "allocate" the memory for the RTEMS Workspace and
|
||||||
|
|||||||
@@ -1,3 +1,8 @@
|
|||||||
|
2007-11-26 Joel Sherrill <joel.sherrill@oarcorp.com>
|
||||||
|
|
||||||
|
* startup/bspstart.c: Eliminate the interrupt_vector_table field in the
|
||||||
|
m68k CPU Table since it is never read.
|
||||||
|
|
||||||
2007-05-03 Joel Sherrill <joel@OARcorp.com>
|
2007-05-03 Joel Sherrill <joel@OARcorp.com>
|
||||||
|
|
||||||
* startup/linkcmds: Handle .data.* sections
|
* startup/linkcmds: Handle .data.* sections
|
||||||
|
|||||||
@@ -65,9 +65,6 @@ void bsp_start( void )
|
|||||||
* typically done by stock BSPs) by subtracting the required amount
|
* typically done by stock BSPs) by subtracting the required amount
|
||||||
* of work space from the last physical address on the CPU board.
|
* of work space from the last physical address on the CPU board.
|
||||||
*/
|
*/
|
||||||
#if 0
|
|
||||||
Cpu_table.interrupt_vector_table = (mc68000_isr *) 0/*&M68Kvec*/;
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Need to "allocate" the memory for the RTEMS Workspace and
|
* Need to "allocate" the memory for the RTEMS Workspace and
|
||||||
|
|||||||
@@ -1,3 +1,8 @@
|
|||||||
|
2007-11-26 Joel Sherrill <joel.sherrill@oarcorp.com>
|
||||||
|
|
||||||
|
* startup/bspstart.c: Eliminate the interrupt_vector_table field in the
|
||||||
|
m68k CPU Table since it is never read.
|
||||||
|
|
||||||
2007-06-22 Joel Sherrill <joel.sherrill@OARcorp.com>
|
2007-06-22 Joel Sherrill <joel.sherrill@OARcorp.com>
|
||||||
|
|
||||||
* console/leds.c, console/mc68ec.c: Rename delay to rtems_bsp_delay to
|
* console/leds.c, console/mc68ec.c: Rename delay to rtems_bsp_delay to
|
||||||
|
|||||||
@@ -97,7 +97,6 @@ void bsp_start( void )
|
|||||||
|
|
||||||
Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */
|
Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */
|
||||||
Cpu_table.postdriver_hook = bsp_postdriver_hook;
|
Cpu_table.postdriver_hook = bsp_postdriver_hook;
|
||||||
Cpu_table.interrupt_vector_table = (m68k_isr_entry *) &M68Kvec;
|
|
||||||
Cpu_table.interrupt_stack_size = CONFIGURE_INTERRUPT_STACK_MEMORY;
|
Cpu_table.interrupt_stack_size = CONFIGURE_INTERRUPT_STACK_MEMORY;
|
||||||
|
|
||||||
BSP_Configuration.work_space_start = (void *) &_WorkspaceBase;
|
BSP_Configuration.work_space_start = (void *) &_WorkspaceBase;
|
||||||
|
|||||||
@@ -1,3 +1,8 @@
|
|||||||
|
2007-11-26 Joel Sherrill <joel.sherrill@oarcorp.com>
|
||||||
|
|
||||||
|
* startup/bspstart.c: Eliminate the interrupt_vector_table field in the
|
||||||
|
m68k CPU Table since it is never read.
|
||||||
|
|
||||||
2007-05-03 Joel Sherrill <joel@OARcorp.com>
|
2007-05-03 Joel Sherrill <joel@OARcorp.com>
|
||||||
|
|
||||||
* startup/linkcmds: Handle .data.* sections
|
* startup/linkcmds: Handle .data.* sections
|
||||||
|
|||||||
@@ -59,21 +59,20 @@ void bsp_pretasking_hook(void); /* m68k version */
|
|||||||
*/
|
*/
|
||||||
void bsp_start( void )
|
void bsp_start( void )
|
||||||
{
|
{
|
||||||
extern void *_WorkspaceBase;
|
extern void *_WorkspaceBase;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Need to "allocate" the memory for the RTEMS Workspace and
|
* Need to "allocate" the memory for the RTEMS Workspace and
|
||||||
* tell the RTEMS configuration where it is. This memory is
|
* tell the RTEMS configuration where it is. This memory is
|
||||||
* not malloc'ed. It is just "pulled from the air".
|
* not malloc'ed. It is just "pulled from the air".
|
||||||
*/
|
*/
|
||||||
|
|
||||||
BSP_Configuration.work_space_start = (void *)&_WorkspaceBase;
|
BSP_Configuration.work_space_start = (void *)&_WorkspaceBase;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* initialize the CPU table for this BSP
|
* initialize the CPU table for this BSP
|
||||||
*/
|
*/
|
||||||
Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */
|
Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */
|
||||||
Cpu_table.postdriver_hook = bsp_postdriver_hook;
|
Cpu_table.postdriver_hook = bsp_postdriver_hook;
|
||||||
Cpu_table.interrupt_stack_size = 4096;
|
Cpu_table.interrupt_stack_size = 4096;
|
||||||
Cpu_table.interrupt_vector_table = (m68k_isr *)0; /* vectors at start of RAM */
|
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -1,3 +1,8 @@
|
|||||||
|
2007-11-26 Joel Sherrill <joel.sherrill@oarcorp.com>
|
||||||
|
|
||||||
|
* startup/bspstart.c: Eliminate the interrupt_vector_table field in the
|
||||||
|
m68k CPU Table since it is never read.
|
||||||
|
|
||||||
2007-05-03 Joel Sherrill <joel@OARcorp.com>
|
2007-05-03 Joel Sherrill <joel@OARcorp.com>
|
||||||
|
|
||||||
* startup/linkcmds: Handle .data.* sections
|
* startup/linkcmds: Handle .data.* sections
|
||||||
|
|||||||
@@ -185,33 +185,31 @@ void bsp_start( void )
|
|||||||
Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */
|
Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */
|
||||||
Cpu_table.postdriver_hook = bsp_postdriver_hook;
|
Cpu_table.postdriver_hook = bsp_postdriver_hook;
|
||||||
Cpu_table.interrupt_stack_size = 4096;
|
Cpu_table.interrupt_stack_size = 4096;
|
||||||
Cpu_table.interrupt_vector_table = (m68k_isr *)0; /* vectors at start of RAM */
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Invalidate the cache and disable it
|
* Invalidate the cache and disable it
|
||||||
*/
|
*/
|
||||||
m68k_set_acr0(0);
|
m68k_set_acr0(0);
|
||||||
m68k_set_acr1(0);
|
m68k_set_acr1(0);
|
||||||
m68k_set_cacr(MCF5XXX_CACR_CINV);
|
m68k_set_cacr(MCF5XXX_CACR_CINV);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Cache SDRAM
|
* Cache SDRAM
|
||||||
*/
|
*/
|
||||||
m68k_set_acr0(MCF5XXX_ACR_AB(SDRAM_BASE) |
|
m68k_set_acr0(MCF5XXX_ACR_AB(SDRAM_BASE) |
|
||||||
MCF5XXX_ACR_AM(SDRAM_SIZE-1) |
|
MCF5XXX_ACR_AM(SDRAM_SIZE-1) |
|
||||||
MCF5XXX_ACR_EN |
|
MCF5XXX_ACR_EN |
|
||||||
MCF5XXX_ACR_BWE |
|
MCF5XXX_ACR_BWE |
|
||||||
MCF5XXX_ACR_SM_IGNORE);
|
MCF5XXX_ACR_SM_IGNORE);
|
||||||
|
|
||||||
/*
|
|
||||||
* Enable the cache
|
|
||||||
*/
|
|
||||||
m68k_set_cacr(cacr_mode);
|
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Enable the cache
|
||||||
|
*/
|
||||||
|
m68k_set_cacr(cacr_mode);
|
||||||
}
|
}
|
||||||
|
|
||||||
uint32_t get_CPU_clock_speed(void)
|
uint32_t get_CPU_clock_speed(void)
|
||||||
{
|
{
|
||||||
extern char _CPUClockSpeed[];
|
extern char _CPUClockSpeed[];
|
||||||
return( (uint32_t)_CPUClockSpeed);
|
return( (uint32_t)_CPUClockSpeed);
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -1,3 +1,8 @@
|
|||||||
|
2007-11-26 Joel Sherrill <joel.sherrill@oarcorp.com>
|
||||||
|
|
||||||
|
* startup/bspstart.c: Eliminate the interrupt_vector_table field in the
|
||||||
|
m68k CPU Table since it is never read.
|
||||||
|
|
||||||
2007-05-03 Joel Sherrill <joel@OARcorp.com>
|
2007-05-03 Joel Sherrill <joel@OARcorp.com>
|
||||||
|
|
||||||
* startup/linkcmds: Handle .data.* sections
|
* startup/linkcmds: Handle .data.* sections
|
||||||
|
|||||||
@@ -74,7 +74,6 @@ void bsp_start( void )
|
|||||||
Cpu_table.postdriver_hook = bsp_postdriver_hook;
|
Cpu_table.postdriver_hook = bsp_postdriver_hook;
|
||||||
|
|
||||||
m68k_get_vbr( vbr );
|
m68k_get_vbr( vbr );
|
||||||
Cpu_table.interrupt_vector_table = vbr;
|
|
||||||
|
|
||||||
BSP_Configuration.work_space_start = (void *) &_WorkspaceBase;
|
BSP_Configuration.work_space_start = (void *) &_WorkspaceBase;
|
||||||
|
|
||||||
|
|||||||
@@ -1,3 +1,8 @@
|
|||||||
|
2007-11-26 Joel Sherrill <joel.sherrill@oarcorp.com>
|
||||||
|
|
||||||
|
* startup/bspstart.c: Eliminate the interrupt_vector_table field in the
|
||||||
|
m68k CPU Table since it is never read.
|
||||||
|
|
||||||
2007-05-03 Joel Sherrill <joel@OARcorp.com>
|
2007-05-03 Joel Sherrill <joel@OARcorp.com>
|
||||||
|
|
||||||
* startup/linkcmds: Handle .data.* sections
|
* startup/linkcmds: Handle .data.* sections
|
||||||
|
|||||||
@@ -80,7 +80,6 @@ void bsp_start( void )
|
|||||||
|
|
||||||
Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */
|
Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */
|
||||||
Cpu_table.postdriver_hook = bsp_postdriver_hook;
|
Cpu_table.postdriver_hook = bsp_postdriver_hook;
|
||||||
Cpu_table.interrupt_vector_table = (m68k_isr_entry *) &M68Kvec;
|
|
||||||
Cpu_table.interrupt_stack_size = CONFIGURE_INTERRUPT_STACK_MEMORY;
|
Cpu_table.interrupt_stack_size = CONFIGURE_INTERRUPT_STACK_MEMORY;
|
||||||
|
|
||||||
BSP_Configuration.work_space_start = (void *) &_WorkspaceBase;
|
BSP_Configuration.work_space_start = (void *) &_WorkspaceBase;
|
||||||
|
|||||||
@@ -1,3 +1,8 @@
|
|||||||
|
2007-11-26 Joel Sherrill <joel.sherrill@oarcorp.com>
|
||||||
|
|
||||||
|
* startup/bspstart.c: Eliminate the interrupt_vector_table field in the
|
||||||
|
m68k CPU Table since it is never read.
|
||||||
|
|
||||||
2007-05-03 Joel Sherrill <joel@OARcorp.com>
|
2007-05-03 Joel Sherrill <joel@OARcorp.com>
|
||||||
|
|
||||||
* startup/linkcmds: Handle .data.* sections
|
* startup/linkcmds: Handle .data.* sections
|
||||||
|
|||||||
@@ -87,7 +87,6 @@ void bsp_start( void )
|
|||||||
|
|
||||||
Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */
|
Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */
|
||||||
Cpu_table.postdriver_hook = bsp_postdriver_hook;
|
Cpu_table.postdriver_hook = bsp_postdriver_hook;
|
||||||
Cpu_table.interrupt_vector_table = (m68k_isr_entry *) &M68Kvec;
|
|
||||||
Cpu_table.interrupt_stack_size = CONFIGURE_INTERRUPT_STACK_MEMORY;
|
Cpu_table.interrupt_stack_size = CONFIGURE_INTERRUPT_STACK_MEMORY;
|
||||||
|
|
||||||
BSP_Configuration.work_space_start = (void *) &_WorkspaceBase;
|
BSP_Configuration.work_space_start = (void *) &_WorkspaceBase;
|
||||||
|
|||||||
@@ -1,3 +1,8 @@
|
|||||||
|
2007-11-26 Joel Sherrill <joel.sherrill@oarcorp.com>
|
||||||
|
|
||||||
|
* startup/bspstart.c: Eliminate the interrupt_vector_table field in the
|
||||||
|
m68k CPU Table since it is never read.
|
||||||
|
|
||||||
2007-05-03 Joel Sherrill <joel@OARcorp.com>
|
2007-05-03 Joel Sherrill <joel@OARcorp.com>
|
||||||
|
|
||||||
* startup/linkcmds: Handle .data.* sections
|
* startup/linkcmds: Handle .data.* sections
|
||||||
|
|||||||
@@ -146,7 +146,6 @@ void bsp_start( void )
|
|||||||
|
|
||||||
Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */
|
Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */
|
||||||
Cpu_table.postdriver_hook = bsp_postdriver_hook;
|
Cpu_table.postdriver_hook = bsp_postdriver_hook;
|
||||||
Cpu_table.interrupt_vector_table = (m68k_isr_entry *) &M68Kvec;
|
|
||||||
Cpu_table.interrupt_stack_size = CONFIGURE_INTERRUPT_STACK_MEMORY;
|
Cpu_table.interrupt_stack_size = CONFIGURE_INTERRUPT_STACK_MEMORY;
|
||||||
|
|
||||||
BSP_Configuration.work_space_start = (void *) &_WorkspaceBase;
|
BSP_Configuration.work_space_start = (void *) &_WorkspaceBase;
|
||||||
|
|||||||
@@ -1,3 +1,8 @@
|
|||||||
|
2007-11-26 Joel Sherrill <joel.sherrill@oarcorp.com>
|
||||||
|
|
||||||
|
* startup/bspstart.c: Eliminate the interrupt_vector_table field in the
|
||||||
|
m68k CPU Table since it is never read.
|
||||||
|
|
||||||
2007-05-03 Joel Sherrill <joel@OARcorp.com>
|
2007-05-03 Joel Sherrill <joel@OARcorp.com>
|
||||||
|
|
||||||
* startup/linkcmds: Handle .data.* sections
|
* startup/linkcmds: Handle .data.* sections
|
||||||
|
|||||||
@@ -62,7 +62,7 @@ void bsp_start( void )
|
|||||||
extern void *_RamSize;
|
extern void *_RamSize;
|
||||||
extern unsigned long _M68k_Ramsize;
|
extern unsigned long _M68k_Ramsize;
|
||||||
|
|
||||||
_M68k_Ramsize = (unsigned long)&_RamSize; /* RAM size set in linker script */
|
_M68k_Ramsize = (unsigned long)&_RamSize; /* RAM size set in linker script */
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* 162Bug Vectors are at 0xFFE00000
|
* 162Bug Vectors are at 0xFFE00000
|
||||||
@@ -104,7 +104,6 @@ void bsp_start( void )
|
|||||||
|
|
||||||
Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */
|
Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */
|
||||||
Cpu_table.postdriver_hook = bsp_postdriver_hook;
|
Cpu_table.postdriver_hook = bsp_postdriver_hook;
|
||||||
Cpu_table.interrupt_vector_table = (m68k_isr_entry *) &M68Kvec;
|
|
||||||
Cpu_table.interrupt_stack_size = CONFIGURE_INTERRUPT_STACK_MEMORY;
|
Cpu_table.interrupt_stack_size = CONFIGURE_INTERRUPT_STACK_MEMORY;
|
||||||
|
|
||||||
BSP_Configuration.work_space_start = (void *) &_WorkspaceBase;
|
BSP_Configuration.work_space_start = (void *) &_WorkspaceBase;
|
||||||
|
|||||||
@@ -1,3 +1,8 @@
|
|||||||
|
2007-11-26 Joel Sherrill <joel.sherrill@oarcorp.com>
|
||||||
|
|
||||||
|
* startup/bspstart.c: Eliminate the interrupt_vector_table field in the
|
||||||
|
m68k CPU Table since it is never read.
|
||||||
|
|
||||||
2007-05-03 Joel Sherrill <joel@OARcorp.com>
|
2007-05-03 Joel Sherrill <joel@OARcorp.com>
|
||||||
|
|
||||||
* startup/linkcmds: Handle .data.* sections
|
* startup/linkcmds: Handle .data.* sections
|
||||||
|
|||||||
@@ -127,7 +127,6 @@ void bsp_start( void )
|
|||||||
/* We only use a hook to get the C library initialized. */
|
/* We only use a hook to get the C library initialized. */
|
||||||
Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */
|
Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */
|
||||||
Cpu_table.postdriver_hook = bsp_postdriver_hook;
|
Cpu_table.postdriver_hook = bsp_postdriver_hook;
|
||||||
Cpu_table.interrupt_vector_table = (m68k_isr_entry *) &M68Kvec;
|
|
||||||
/* Must match value in start.s */
|
/* Must match value in start.s */
|
||||||
Cpu_table.interrupt_stack_size = CONFIGURE_INTERRUPT_STACK_MEMORY;
|
Cpu_table.interrupt_stack_size = CONFIGURE_INTERRUPT_STACK_MEMORY;
|
||||||
|
|
||||||
|
|||||||
@@ -1,3 +1,8 @@
|
|||||||
|
2007-11-26 Joel Sherrill <joel.sherrill@oarcorp.com>
|
||||||
|
|
||||||
|
* startup/bspstart.c: Eliminate the interrupt_vector_table field in the
|
||||||
|
m68k CPU Table since it is never read.
|
||||||
|
|
||||||
2007-05-03 Joel Sherrill <joel@OARcorp.com>
|
2007-05-03 Joel Sherrill <joel@OARcorp.com>
|
||||||
|
|
||||||
* startup/linkcmds: Handle .data.* sections
|
* startup/linkcmds: Handle .data.* sections
|
||||||
|
|||||||
@@ -53,11 +53,7 @@ void bsp_start( void )
|
|||||||
extern void *_RamSize;
|
extern void *_RamSize;
|
||||||
extern unsigned long _M68k_Ramsize;
|
extern unsigned long _M68k_Ramsize;
|
||||||
|
|
||||||
_M68k_Ramsize = (unsigned long)&_RamSize; /* RAM size set in linker script */
|
_M68k_Ramsize = (unsigned long)&_RamSize; /* RAM size set in linker script */
|
||||||
|
|
||||||
#if 0
|
|
||||||
Cpu_table.interrupt_vector_table = (mc68000_isr *) 0/*&M68Kvec*/;
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Need to "allocate" the memory for the RTEMS Workspace and
|
* Need to "allocate" the memory for the RTEMS Workspace and
|
||||||
|
|||||||
@@ -1,3 +1,8 @@
|
|||||||
|
2007-11-26 Joel Sherrill <joel.sherrill@oarcorp.com>
|
||||||
|
|
||||||
|
* startup/bspstart.c: Eliminate the interrupt_vector_table field in the
|
||||||
|
m68k CPU Table since it is never read.
|
||||||
|
|
||||||
2007-11-26 Eric Norum <norume@aps.anl.gov>
|
2007-11-26 Eric Norum <norume@aps.anl.gov>
|
||||||
|
|
||||||
* network/network.c: Fix LED configuration to match uCDIMM.
|
* network/network.c: Fix LED configuration to match uCDIMM.
|
||||||
|
|||||||
@@ -276,57 +276,56 @@ void bsp_start( void )
|
|||||||
extern void _BSP_Thread_Idle_body(void);
|
extern void _BSP_Thread_Idle_body(void);
|
||||||
Cpu_table.idle_task = _BSP_Thread_Idle_body;
|
Cpu_table.idle_task = _BSP_Thread_Idle_body;
|
||||||
}
|
}
|
||||||
Cpu_table.interrupt_vector_table = (m68k_isr *)0; /* vectors at start of RAM */
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Invalidate the cache and disable it
|
* Invalidate the cache and disable it
|
||||||
*/
|
*/
|
||||||
m68k_set_acr0(mcf5282_acr0_mode);
|
m68k_set_acr0(mcf5282_acr0_mode);
|
||||||
m68k_set_acr1(mcf5282_acr1_mode);
|
m68k_set_acr1(mcf5282_acr1_mode);
|
||||||
m68k_set_cacr_nop(MCF5XXX_CACR_CINV);
|
m68k_set_cacr_nop(MCF5XXX_CACR_CINV);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Cache SDRAM
|
* Cache SDRAM
|
||||||
*/
|
*/
|
||||||
mcf5282_acr0_mode = MCF5XXX_ACR_AB((uint32_t)_RamBase) |
|
mcf5282_acr0_mode = MCF5XXX_ACR_AB((uint32_t)_RamBase) |
|
||||||
MCF5XXX_ACR_AM((uint32_t)_RamSize-1) |
|
MCF5XXX_ACR_AM((uint32_t)_RamSize-1) |
|
||||||
MCF5XXX_ACR_EN |
|
MCF5XXX_ACR_EN |
|
||||||
MCF5XXX_ACR_BWE |
|
MCF5XXX_ACR_BWE |
|
||||||
MCF5XXX_ACR_SM_IGNORE;
|
MCF5XXX_ACR_SM_IGNORE;
|
||||||
m68k_set_acr0(mcf5282_acr0_mode);
|
m68k_set_acr0(mcf5282_acr0_mode);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Enable the cache
|
* Enable the cache
|
||||||
*/
|
*/
|
||||||
m68k_set_cacr(mcf5282_cacr_mode);
|
m68k_set_cacr(mcf5282_cacr_mode);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Set up CS* space (fake 'VME')
|
* Set up CS* space (fake 'VME')
|
||||||
* Two A24/D16 spaces, supervisor data acces
|
* Two A24/D16 spaces, supervisor data acces
|
||||||
*/
|
*/
|
||||||
MCF5282_CS1_CSAR = MCF5282_CS_CSAR_BA(VME_ONE_BASE);
|
MCF5282_CS1_CSAR = MCF5282_CS_CSAR_BA(VME_ONE_BASE);
|
||||||
MCF5282_CS1_CSMR = MCF5282_CS_CSMR_BAM_16M |
|
MCF5282_CS1_CSMR = MCF5282_CS_CSMR_BAM_16M |
|
||||||
MCF5282_CS_CSMR_CI |
|
MCF5282_CS_CSMR_CI |
|
||||||
MCF5282_CS_CSMR_SC |
|
MCF5282_CS_CSMR_SC |
|
||||||
MCF5282_CS_CSMR_UC |
|
MCF5282_CS_CSMR_UC |
|
||||||
MCF5282_CS_CSMR_UD |
|
MCF5282_CS_CSMR_UD |
|
||||||
MCF5282_CS_CSMR_V;
|
MCF5282_CS_CSMR_V;
|
||||||
MCF5282_CS1_CSCR = MCF5282_CS_CSCR_PS_16;
|
MCF5282_CS1_CSCR = MCF5282_CS_CSCR_PS_16;
|
||||||
MCF5282_CS2_CSAR = MCF5282_CS_CSAR_BA(VME_TWO_BASE);
|
MCF5282_CS2_CSAR = MCF5282_CS_CSAR_BA(VME_TWO_BASE);
|
||||||
MCF5282_CS2_CSMR = MCF5282_CS_CSMR_BAM_16M |
|
MCF5282_CS2_CSMR = MCF5282_CS_CSMR_BAM_16M |
|
||||||
MCF5282_CS_CSMR_CI |
|
MCF5282_CS_CSMR_CI |
|
||||||
MCF5282_CS_CSMR_SC |
|
MCF5282_CS_CSMR_SC |
|
||||||
MCF5282_CS_CSMR_UC |
|
MCF5282_CS_CSMR_UC |
|
||||||
MCF5282_CS_CSMR_UD |
|
MCF5282_CS_CSMR_UD |
|
||||||
MCF5282_CS_CSMR_V;
|
MCF5282_CS_CSMR_V;
|
||||||
MCF5282_CS2_CSCR = MCF5282_CS_CSCR_PS_16;
|
MCF5282_CS2_CSCR = MCF5282_CS_CSCR_PS_16;
|
||||||
MCF5282_GPIO_PJPAR |= 0x06;
|
MCF5282_GPIO_PJPAR |= 0x06;
|
||||||
}
|
}
|
||||||
|
|
||||||
uint32_t bsp_get_CPU_clock_speed(void)
|
uint32_t bsp_get_CPU_clock_speed(void)
|
||||||
{
|
{
|
||||||
extern char _CPUClockSpeed[];
|
extern char _CPUClockSpeed[];
|
||||||
return( (uint32_t)_CPUClockSpeed);
|
return( (uint32_t)_CPUClockSpeed);
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
@@ -335,19 +334,19 @@ uint32_t bsp_get_CPU_clock_speed(void)
|
|||||||
rtems_status_code
|
rtems_status_code
|
||||||
bsp_allocate_interrupt(int level, int priority)
|
bsp_allocate_interrupt(int level, int priority)
|
||||||
{
|
{
|
||||||
static char used[7];
|
static char used[7];
|
||||||
rtems_interrupt_level l;
|
rtems_interrupt_level l;
|
||||||
rtems_status_code ret = RTEMS_RESOURCE_IN_USE;
|
rtems_status_code ret = RTEMS_RESOURCE_IN_USE;
|
||||||
|
|
||||||
if ((level < 1) || (level > 7) || (priority < 0) || (priority > 7))
|
if ((level < 1) || (level > 7) || (priority < 0) || (priority > 7))
|
||||||
return RTEMS_INVALID_NUMBER;
|
return RTEMS_INVALID_NUMBER;
|
||||||
rtems_interrupt_disable(l);
|
rtems_interrupt_disable(l);
|
||||||
if ((used[level-1] & (1 << priority)) == 0) {
|
if ((used[level-1] & (1 << priority)) == 0) {
|
||||||
used[level-1] |= (1 << priority);
|
used[level-1] |= (1 << priority);
|
||||||
ret = RTEMS_SUCCESSFUL;
|
ret = RTEMS_SUCCESSFUL;
|
||||||
}
|
}
|
||||||
rtems_interrupt_enable(l);
|
rtems_interrupt_enable(l);
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
@@ -361,6 +360,7 @@ do { \
|
|||||||
} \
|
} \
|
||||||
return (type)(ret); \
|
return (type)(ret); \
|
||||||
} while (0)
|
} while (0)
|
||||||
|
|
||||||
#define syscall_1(type,name,d1type,d1) \
|
#define syscall_1(type,name,d1type,d1) \
|
||||||
type bsp_##name(d1type d1) \
|
type bsp_##name(d1type d1) \
|
||||||
{ \
|
{ \
|
||||||
@@ -374,6 +374,7 @@ type bsp_##name(d1type d1) \
|
|||||||
: "d0" ); \
|
: "d0" ); \
|
||||||
syscall_return(type,ret); \
|
syscall_return(type,ret); \
|
||||||
}
|
}
|
||||||
|
|
||||||
#define syscall_2(type,name,d1type,d1,d2type,d2) \
|
#define syscall_2(type,name,d1type,d1,d2type,d2) \
|
||||||
type bsp_##name(d1type d1, d2type d2) \
|
type bsp_##name(d1type d1, d2type d2) \
|
||||||
{ \
|
{ \
|
||||||
@@ -389,6 +390,7 @@ type bsp_##name(d1type d1, d2type d2) \
|
|||||||
: "d0" ); \
|
: "d0" ); \
|
||||||
syscall_return(type,ret); \
|
syscall_return(type,ret); \
|
||||||
}
|
}
|
||||||
|
|
||||||
#define syscall_3(type,name,d1type,d1,d2type,d2,d3type,d3) \
|
#define syscall_3(type,name,d1type,d1,d2type,d2,d3type,d3) \
|
||||||
type bsp_##name(d1type d1, d2type d2, d3type d3) \
|
type bsp_##name(d1type d1, d2type d2, d3type d3) \
|
||||||
{ \
|
{ \
|
||||||
@@ -406,6 +408,7 @@ type bsp_##name(d1type d1, d2type d2, d3type d3) \
|
|||||||
: "d0" ); \
|
: "d0" ); \
|
||||||
syscall_return(type,ret); \
|
syscall_return(type,ret); \
|
||||||
}
|
}
|
||||||
|
|
||||||
#define SysCode_reset 0 /* reset */
|
#define SysCode_reset 0 /* reset */
|
||||||
#define SysCode_program 5 /* program flash memory */
|
#define SysCode_program 5 /* program flash memory */
|
||||||
#define SysCode_gethwaddr 12 /* get hardware address */
|
#define SysCode_gethwaddr 12 /* get hardware address */
|
||||||
@@ -449,54 +452,54 @@ int BSP_disableVME_int_lvl(unsigned int level) { return 0; }
|
|||||||
#define FPGA_IRQ_INFO *((vuint16 *)(0x31000000 + 0xfffffe))
|
#define FPGA_IRQ_INFO *((vuint16 *)(0x31000000 + 0xfffffe))
|
||||||
|
|
||||||
static struct handlerTab {
|
static struct handlerTab {
|
||||||
BSP_VME_ISR_t func;
|
BSP_VME_ISR_t func;
|
||||||
void *arg;
|
void *arg;
|
||||||
} handlerTab[NVECTOR];
|
} handlerTab[NVECTOR];
|
||||||
|
|
||||||
BSP_VME_ISR_t
|
BSP_VME_ISR_t
|
||||||
BSP_getVME_isr(unsigned long vector, void **pusrArg)
|
BSP_getVME_isr(unsigned long vector, void **pusrArg)
|
||||||
{
|
{
|
||||||
if (vector >= NVECTOR)
|
if (vector >= NVECTOR)
|
||||||
return (BSP_VME_ISR_t)NULL;
|
return (BSP_VME_ISR_t)NULL;
|
||||||
if (pusrArg)
|
if (pusrArg)
|
||||||
*pusrArg = handlerTab[vector].arg;
|
*pusrArg = handlerTab[vector].arg;
|
||||||
return handlerTab[vector].func;
|
return handlerTab[vector].func;
|
||||||
}
|
}
|
||||||
|
|
||||||
static rtems_isr
|
static rtems_isr
|
||||||
fpga_trampoline (rtems_vector_number v)
|
fpga_trampoline (rtems_vector_number v)
|
||||||
{
|
{
|
||||||
/*
|
/*
|
||||||
* Handle FPGA interrupts until all have been consumed
|
* Handle FPGA interrupts until all have been consumed
|
||||||
*/
|
*/
|
||||||
int loopcount = 0;
|
int loopcount = 0;
|
||||||
while (((v = FPGA_IRQ_INFO) & 0x80) != 0) {
|
while (((v = FPGA_IRQ_INFO) & 0x80) != 0) {
|
||||||
v = 192 + (v & 0x3f);
|
v = 192 + (v & 0x3f);
|
||||||
if (++loopcount >= 50) {
|
if (++loopcount >= 50) {
|
||||||
rtems_interrupt_level level;
|
rtems_interrupt_level level;
|
||||||
rtems_interrupt_disable(level);
|
rtems_interrupt_disable(level);
|
||||||
printk("\nTOO MANY FPGA INTERRUPTS (LAST WAS 0x%x) -- DISABLING ALL FPGA INTERRUPTS.\n", v & 0x3f);
|
printk("\nTOO MANY FPGA INTERRUPTS (LAST WAS 0x%x) -- DISABLING ALL FPGA INTERRUPTS.\n", v & 0x3f);
|
||||||
MCF5282_INTC0_IMRL |= MCF5282_INTC_IMRL_INT1;
|
MCF5282_INTC0_IMRL |= MCF5282_INTC_IMRL_INT1;
|
||||||
rtems_interrupt_enable(level);
|
rtems_interrupt_enable(level);
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
if (handlerTab[v].func) {
|
if (handlerTab[v].func) {
|
||||||
(*handlerTab[v].func)(handlerTab[v].arg, (unsigned long)v);
|
(*handlerTab[v].func)(handlerTab[v].arg, (unsigned long)v);
|
||||||
}
|
}
|
||||||
else {
|
else {
|
||||||
rtems_interrupt_level level;
|
rtems_interrupt_level level;
|
||||||
rtems_vector_number nv;
|
rtems_vector_number nv;
|
||||||
rtems_interrupt_disable(level);
|
rtems_interrupt_disable(level);
|
||||||
printk("\nSPURIOUS FPGA INTERRUPT (0x%x).\n", v & 0x3f);
|
printk("\nSPURIOUS FPGA INTERRUPT (0x%x).\n", v & 0x3f);
|
||||||
if ((((nv = FPGA_IRQ_INFO) & 0x80) != 0)
|
if ((((nv = FPGA_IRQ_INFO) & 0x80) != 0)
|
||||||
&& ((nv & 0x3f) == (v & 0x3f))) {
|
&& ((nv & 0x3f) == (v & 0x3f))) {
|
||||||
printk("DISABLING ALL FPGA INTERRUPTS.\n");
|
printk("DISABLING ALL FPGA INTERRUPTS.\n");
|
||||||
MCF5282_INTC0_IMRL |= MCF5282_INTC_IMRL_INT1;
|
MCF5282_INTC0_IMRL |= MCF5282_INTC_IMRL_INT1;
|
||||||
}
|
}
|
||||||
rtems_interrupt_enable(level);
|
rtems_interrupt_enable(level);
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static rtems_isr
|
static rtems_isr
|
||||||
@@ -510,13 +513,13 @@ static void
|
|||||||
enable_irq(unsigned source)
|
enable_irq(unsigned source)
|
||||||
{
|
{
|
||||||
rtems_interrupt_level level;
|
rtems_interrupt_level level;
|
||||||
rtems_interrupt_disable(level);
|
rtems_interrupt_disable(level);
|
||||||
if (source >= 32)
|
if (source >= 32)
|
||||||
MCF5282_INTC0_IMRH &= ~(1 << (source - 32));
|
MCF5282_INTC0_IMRH &= ~(1 << (source - 32));
|
||||||
else
|
else
|
||||||
MCF5282_INTC0_IMRL &= ~((1 << source) |
|
MCF5282_INTC0_IMRL &= ~((1 << source) |
|
||||||
MCF5282_INTC_IMRL_MASKALL);
|
MCF5282_INTC_IMRL_MASKALL);
|
||||||
rtems_interrupt_enable(level);
|
rtems_interrupt_enable(level);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void
|
static void
|
||||||
@@ -524,12 +527,12 @@ disable_irq(unsigned source)
|
|||||||
{
|
{
|
||||||
rtems_interrupt_level level;
|
rtems_interrupt_level level;
|
||||||
|
|
||||||
rtems_interrupt_disable(level);
|
rtems_interrupt_disable(level);
|
||||||
if (source >= 32)
|
if (source >= 32)
|
||||||
MCF5282_INTC0_IMRH |= (1 << (source - 32));
|
MCF5282_INTC0_IMRH |= (1 << (source - 32));
|
||||||
else
|
else
|
||||||
MCF5282_INTC0_IMRL |= (1 << source);
|
MCF5282_INTC0_IMRL |= (1 << source);
|
||||||
rtems_interrupt_enable(level);
|
rtems_interrupt_enable(level);
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
void
|
||||||
@@ -537,9 +540,9 @@ BSP_enable_irq_at_pic(rtems_vector_number v)
|
|||||||
{
|
{
|
||||||
int source = v - 64;
|
int source = v - 64;
|
||||||
|
|
||||||
if ( source > 0 && source < 64 ) {
|
if ( source > 0 && source < 64 ) {
|
||||||
enable_irq(source);
|
enable_irq(source);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
void
|
||||||
@@ -547,9 +550,9 @@ BSP_disable_irq_at_pic(rtems_vector_number v)
|
|||||||
{
|
{
|
||||||
int source = v - 64;
|
int source = v - 64;
|
||||||
|
|
||||||
if ( source > 0 && source < 64 ) {
|
if ( source > 0 && source < 64 ) {
|
||||||
disable_irq(source);
|
disable_irq(source);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
int
|
int
|
||||||
@@ -557,12 +560,12 @@ BSP_irq_is_enabled_at_pic(rtems_vector_number v)
|
|||||||
{
|
{
|
||||||
int source = v - 64;
|
int source = v - 64;
|
||||||
|
|
||||||
if ( source > 0 && source < 64 ) {
|
if ( source > 0 && source < 64 ) {
|
||||||
return ! ((source >= 32) ?
|
return ! ((source >= 32) ?
|
||||||
MCF5282_INTC0_IMRH & (1 << (source - 32)) :
|
MCF5282_INTC0_IMRH & (1 << (source - 32)) :
|
||||||
MCF5282_INTC0_IMRL & (1 << source));
|
MCF5282_INTC0_IMRL & (1 << source));
|
||||||
}
|
}
|
||||||
return -1;
|
return -1;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@@ -597,123 +600,123 @@ rtems_interrupt_level level;
|
|||||||
*(&MCF5282_INTC0_ICR1 + (source - 1)) =
|
*(&MCF5282_INTC0_ICR1 + (source - 1)) =
|
||||||
MCF5282_INTC_ICR_IL(l) |
|
MCF5282_INTC_ICR_IL(l) |
|
||||||
MCF5282_INTC_ICR_IP(p);
|
MCF5282_INTC_ICR_IP(p);
|
||||||
enable_irq(source);
|
enable_irq(source);
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
return -1;
|
return -1;
|
||||||
}
|
}
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
int
|
int
|
||||||
BSP_installVME_isr(unsigned long vector, BSP_VME_ISR_t handler, void *usrArg)
|
BSP_installVME_isr(unsigned long vector, BSP_VME_ISR_t handler, void *usrArg)
|
||||||
{
|
{
|
||||||
rtems_isr_entry old_handler;
|
rtems_isr_entry old_handler;
|
||||||
rtems_interrupt_level level;
|
rtems_interrupt_level level;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Register the handler information
|
* Register the handler information
|
||||||
*/
|
*/
|
||||||
if (vector >= NVECTOR)
|
if (vector >= NVECTOR)
|
||||||
return -1;
|
return -1;
|
||||||
handlerTab[vector].func = handler;
|
handlerTab[vector].func = handler;
|
||||||
handlerTab[vector].arg = usrArg;
|
handlerTab[vector].arg = usrArg;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* If this is an external FPGA ('VME') vector set up the real IRQ.
|
* If this is an external FPGA ('VME') vector set up the real IRQ.
|
||||||
*/
|
*/
|
||||||
if ((vector >= 192) && (vector <= 255)) {
|
if ((vector >= 192) && (vector <= 255)) {
|
||||||
int i;
|
int i;
|
||||||
static volatile int setupDone;
|
static volatile int setupDone;
|
||||||
rtems_interrupt_disable(level);
|
rtems_interrupt_disable(level);
|
||||||
if (setupDone) {
|
if (setupDone) {
|
||||||
rtems_interrupt_enable(level);
|
rtems_interrupt_enable(level);
|
||||||
return 0;
|
return 0;
|
||||||
}
|
|
||||||
MCF5282_EPORT_EPPAR &= ~FPGA_EPPAR;
|
|
||||||
MCF5282_EPORT_EPDDR &= ~FPGA_EPDDR;
|
|
||||||
MCF5282_EPORT_EPIER |= FPGA_EPIER;
|
|
||||||
MCF5282_INTC0_IMRL &= ~(MCF5282_INTC_IMRL_INT1 |
|
|
||||||
MCF5282_INTC_IMRL_MASKALL);
|
|
||||||
setupDone = 1;
|
|
||||||
handlerTab[vector].func = NULL;
|
|
||||||
handlerTab[vector].arg = NULL;
|
|
||||||
rtems_interrupt_catch(fpga_trampoline, FPGA_VECTOR, &old_handler);
|
|
||||||
i = init_intc0_bit(FPGA_VECTOR);
|
|
||||||
rtems_interrupt_enable(level);
|
|
||||||
return i;
|
|
||||||
}
|
}
|
||||||
|
MCF5282_EPORT_EPPAR &= ~FPGA_EPPAR;
|
||||||
|
MCF5282_EPORT_EPDDR &= ~FPGA_EPDDR;
|
||||||
|
MCF5282_EPORT_EPIER |= FPGA_EPIER;
|
||||||
|
MCF5282_INTC0_IMRL &= ~(MCF5282_INTC_IMRL_INT1 |
|
||||||
|
MCF5282_INTC_IMRL_MASKALL);
|
||||||
|
setupDone = 1;
|
||||||
|
handlerTab[vector].func = NULL;
|
||||||
|
handlerTab[vector].arg = NULL;
|
||||||
|
rtems_interrupt_catch(fpga_trampoline, FPGA_VECTOR, &old_handler);
|
||||||
|
i = init_intc0_bit(FPGA_VECTOR);
|
||||||
|
rtems_interrupt_enable(level);
|
||||||
|
return i;
|
||||||
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Make the connection between the interrupt and the local handler
|
* Make the connection between the interrupt and the local handler
|
||||||
*/
|
*/
|
||||||
rtems_interrupt_catch(trampoline, vector, &old_handler);
|
rtems_interrupt_catch(trampoline, vector, &old_handler);
|
||||||
|
|
||||||
return init_intc0_bit(vector);
|
return init_intc0_bit(vector);
|
||||||
}
|
}
|
||||||
|
|
||||||
int
|
int
|
||||||
BSP_removeVME_isr(unsigned long vector, BSP_VME_ISR_t handler, void *usrArg)
|
BSP_removeVME_isr(unsigned long vector, BSP_VME_ISR_t handler, void *usrArg)
|
||||||
{
|
{
|
||||||
if (vector >= NVECTOR)
|
if (vector >= NVECTOR)
|
||||||
return -1;
|
return -1;
|
||||||
if ((handlerTab[vector].func != handler)
|
if ((handlerTab[vector].func != handler)
|
||||||
|| (handlerTab[vector].arg != usrArg))
|
|| (handlerTab[vector].arg != usrArg))
|
||||||
return -1;
|
return -1;
|
||||||
handlerTab[vector].func = (BSP_VME_ISR_t)NULL;
|
handlerTab[vector].func = (BSP_VME_ISR_t)NULL;
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
int
|
int
|
||||||
BSP_vme2local_adrs(unsigned am, unsigned long vmeaddr, unsigned long *plocaladdr)
|
BSP_vme2local_adrs(unsigned am, unsigned long vmeaddr, unsigned long *plocaladdr)
|
||||||
{
|
{
|
||||||
unsigned long offset;
|
unsigned long offset;
|
||||||
|
|
||||||
switch (am) {
|
switch (am) {
|
||||||
default: return -1;
|
default: return -1;
|
||||||
case VME_AM_SUP_SHORT_IO: offset = 0x31FF0000; break; /* A16/D16 */
|
case VME_AM_SUP_SHORT_IO: offset = 0x31FF0000; break; /* A16/D16 */
|
||||||
case VME_AM_STD_SUP_DATA: offset = 0x30000000; break; /* A24/D16 */
|
case VME_AM_STD_SUP_DATA: offset = 0x30000000; break; /* A24/D16 */
|
||||||
case VME_AM_EXT_SUP_DATA: offset = 0x31000000; break; /* A32/D32 */
|
case VME_AM_EXT_SUP_DATA: offset = 0x31000000; break; /* A32/D32 */
|
||||||
}
|
}
|
||||||
*plocaladdr = vmeaddr + offset;
|
*plocaladdr = vmeaddr + offset;
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
void
|
||||||
rtems_bsp_reset_cause(char *buf, size_t capacity)
|
rtems_bsp_reset_cause(char *buf, size_t capacity)
|
||||||
{
|
{
|
||||||
int bit, rsr;
|
int bit, rsr;
|
||||||
size_t i;
|
size_t i;
|
||||||
const char *cp;
|
const char *cp;
|
||||||
|
|
||||||
if (buf == NULL)
|
if (buf == NULL)
|
||||||
return;
|
return;
|
||||||
if (capacity)
|
if (capacity)
|
||||||
buf[0] = '\0';
|
buf[0] = '\0';
|
||||||
rsr = MCF5282_RESET_RSR;
|
rsr = MCF5282_RESET_RSR;
|
||||||
for (i = 0, bit = 0x80 ; bit != 0 ; bit >>= 1) {
|
for (i = 0, bit = 0x80 ; bit != 0 ; bit >>= 1) {
|
||||||
if (rsr & bit) {
|
if (rsr & bit) {
|
||||||
switch (bit) {
|
switch (bit) {
|
||||||
case MCF5282_RESET_RSR_LVD: cp = "Low voltage"; break;
|
case MCF5282_RESET_RSR_LVD: cp = "Low voltage"; break;
|
||||||
case MCF5282_RESET_RSR_SOFT: cp = "Software reset"; break;
|
case MCF5282_RESET_RSR_SOFT: cp = "Software reset"; break;
|
||||||
case MCF5282_RESET_RSR_WDR: cp = "Watchdog reset"; break;
|
case MCF5282_RESET_RSR_WDR: cp = "Watchdog reset"; break;
|
||||||
case MCF5282_RESET_RSR_POR: cp = "Power-on reset"; break;
|
case MCF5282_RESET_RSR_POR: cp = "Power-on reset"; break;
|
||||||
case MCF5282_RESET_RSR_EXT: cp = "External reset"; break;
|
case MCF5282_RESET_RSR_EXT: cp = "External reset"; break;
|
||||||
case MCF5282_RESET_RSR_LOC: cp = "Loss of clock"; break;
|
case MCF5282_RESET_RSR_LOC: cp = "Loss of clock"; break;
|
||||||
case MCF5282_RESET_RSR_LOL: cp = "Loss of lock"; break;
|
case MCF5282_RESET_RSR_LOL: cp = "Loss of lock"; break;
|
||||||
default: cp = "??"; break;
|
default: cp = "??"; break;
|
||||||
}
|
}
|
||||||
i += snprintf(buf+i, capacity-i, cp);
|
i += snprintf(buf+i, capacity-i, cp);
|
||||||
if (i >= capacity)
|
if (i >= capacity)
|
||||||
break;
|
break;
|
||||||
rsr &= ~bit;
|
rsr &= ~bit;
|
||||||
if (rsr == 0)
|
if (rsr == 0)
|
||||||
break;
|
break;
|
||||||
i += snprintf(buf+i, capacity-i, ", ");
|
i += snprintf(buf+i, capacity-i, ", ");
|
||||||
if (i >= capacity)
|
if (i >= capacity)
|
||||||
break;
|
break;
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
Reference in New Issue
Block a user