forked from Imagelibrary/rtems
2004-03-31 Ralf Corsepius <ralf_corsepius@rtems.org>
* clock/ckinit.c, include/bsp.h, shmsupp/getcfg.c, shmsupp/lock.c, shmsupp/mpisr.c, startup/bspstart.c, timer/timer.c: Convert to using c99 fixed size types.
This commit is contained in:
@@ -1,3 +1,9 @@
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2004-03-31 Ralf Corsepius <ralf_corsepius@rtems.org>
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* clock/ckinit.c, include/bsp.h, shmsupp/getcfg.c, shmsupp/lock.c,
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shmsupp/mpisr.c, startup/bspstart.c, timer/timer.c: Convert to using
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c99 fixed size types.
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2004-02-19 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
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* Makefile.am: Reflect changes to bsp.am.
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@@ -38,9 +38,9 @@
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#define CLOCK_VECTOR 66
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rtems_unsigned32 Clock_isrs; /* ISRs until next tick */
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uint32_t Clock_isrs; /* ISRs until next tick */
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volatile rtems_unsigned32 Clock_driver_ticks; /* ticks since initialization */
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volatile uint32_t Clock_driver_ticks; /* ticks since initialization */
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rtems_isr_entry Old_ticker;
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@@ -86,7 +86,7 @@ void Install_clock(
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timer->MASTER_INTR = MICRVAL;
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timer->CT1_MODE_SPEC = T1MSRVAL;
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*((rtems_unsigned16 *)0xfffb0016) = MS_COUNT; /* write countdown value */
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*((uint16_t*)0xfffb0016) = MS_COUNT; /* write countdown value */
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/*
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* timer->CT1_TIME_CONST_MSB = (MS_COUNT >> 8);
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@@ -99,7 +99,7 @@ void Install_clock(
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/*
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* Enable interrupt via VME interrupt mask register
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*/
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(*(rtems_unsigned8 *)0xfffb0038) &= 0xfd;
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(*(uint8_t*)0xfffb0038) &= 0xfd;
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atexit( Clock_exit );
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}
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@@ -140,7 +140,7 @@ rtems_device_driver Clock_control(
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void *pargp
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)
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{
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rtems_unsigned32 isrlevel;
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uint32_t isrlevel;
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rtems_libio_ioctl_args_t *args = pargp;
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if (args == 0)
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@@ -56,9 +56,9 @@ extern "C" {
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#define Install_tm27_vector( handler ) set_vector( (handler), 75, 1 )
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#define Cause_tm27_intr() (*(volatile rtems_unsigned8 *)0xfffb006b) = 0x80
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#define Cause_tm27_intr() (*(volatile uint8_t*)0xfffb006b) = 0x80
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#define Clear_tm27_intr() (*(volatile rtems_unsigned8 *)0xfffb006b) = 0x00
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#define Clear_tm27_intr() (*(volatile uint8_t*)0xfffb006b) = 0x00
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#define Lower_tm27_intr()
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@@ -68,8 +68,8 @@ extern "C" {
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*/
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#define rtems_bsp_delay( microseconds ) \
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{ register rtems_unsigned32 _delay=(microseconds); \
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register rtems_unsigned32 _tmp=123; \
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{ register uint32_t _delay=(microseconds); \
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register uint32_t _tmp=123; \
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asm volatile( "0: \
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nbcd %0 ; \
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nbcd %0 ; \
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@@ -40,22 +40,22 @@
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shm_config_table BSP_shm_cfgtbl;
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rtems_unsigned32 *BSP_int_address()
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uint32_t *BSP_int_address()
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{
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rtems_unsigned32 id, offset;
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uint32_t id, offset;
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id = (rtems_unsigned32) *(rtems_unsigned8 *)0xfffb0061;
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id = (uint32_t) *(uint8_t*)0xfffb0061;
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offset = ((id & 0x1f) << 5) | ((id & 0xe0) << 8);
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offset |= 0xffff000b;
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return( (rtems_unsigned32 * ) offset );
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return( (uint32_t * ) offset );
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}
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void Shm_Get_configuration(
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rtems_unsigned32 localnode,
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uint32_t localnode,
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shm_config_table **shmcfg
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)
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{
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BSP_shm_cfgtbl.base = (rtems_unsigned32 *)0x20000000;
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BSP_shm_cfgtbl.base = (uint32_t*)0x20000000;
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BSP_shm_cfgtbl.length = 1 * MEGABYTE;
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BSP_shm_cfgtbl.format = SHM_BIG;
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@@ -44,8 +44,8 @@ void Shm_Lock(
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Shm_Locked_queue_Control *lq_cb
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)
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{
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rtems_unsigned32 isr_level;
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rtems_unsigned32 *lockptr = (rtems_unsigned32 *)&lq_cb->lock;
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uint32_t isr_level;
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uint32_t *lockptr = (uint32_t*)&lq_cb->lock;
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rtems_interrupt_disable( isr_level );
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Shm_isrstat = isr_level;
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@@ -65,7 +65,7 @@ void Shm_Unlock(
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Shm_Locked_queue_Control *lq_cb
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)
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{
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rtems_unsigned32 isr_level;
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uint32_t isr_level;
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lq_cb->lock = SHM_UNLOCK_VALUE;
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isr_level = Shm_isrstat;
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@@ -21,7 +21,7 @@ rtems_isr Shm_isr_mvme136()
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{
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Shm_Interrupt_count += 1;
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rtems_multiprocessing_announce();
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(*(volatile rtems_unsigned8 *)0xfffb006b) = 0; /* clear MPCSR intr */
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(*(volatile uint8_t*)0xfffb006b) = 0; /* clear MPCSR intr */
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}
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/* void _Shm_setvec( )
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@@ -38,7 +38,7 @@ char *rtems_progname;
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*/
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void bsp_postdriver_hook(void);
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void bsp_libc_init( void *, unsigned32, int );
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void bsp_libc_init( void *, uint32_t, int );
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void bsp_pretasking_hook(void); /* m68k version */
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/*
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@@ -70,7 +70,7 @@ void bsp_start( void )
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m68k_set_vbr( &M68Kvec );
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(*(rtems_unsigned8 *)0xfffb0067) = 0x7f; /* make VME access round-robin */
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(*(uint8_t*)0xfffb0067) = 0x7f; /* make VME access round-robin */
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rtems_cache_enable_instruction();
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@@ -47,7 +47,7 @@ void Timer_initialize()
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Z8x36_WRITE( TIMER, CT1_MODE_SPEC, 0x80 ); /* T1 continuous, and */
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/* cycle/pulse output */
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*((rtems_unsigned16 *)0xfffb0016) = 0x0000; /* write countdown value */
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*((uint16_t*)0xfffb0016) = 0x0000; /* write countdown value */
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/*
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Z8x36_WRITE( TIMER, CT1_TIME_CONST_MSB, 0x00 );
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Z8x36_WRITE( TIMER, CT1_TIME_CONST_LSB, 0x00 );
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@@ -58,7 +58,7 @@ void Timer_initialize()
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/* trigger command */
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/* (TCB) and gate */
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/* command (GCB) bits */
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*((rtems_unsigned8 *)0xfffb0038) &= 0xfd; /* enable timer INTR on */
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*((uint8_t*)0xfffb0038) &= 0xfd; /* enable timer INTR on */
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/* VME controller */
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}
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@@ -69,12 +69,12 @@ void Timer_initialize()
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int Read_timer()
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{
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/*
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rtems_unsigned8 msb, lsb;
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uint8_t msb, lsb;
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*/
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rtems_unsigned32 remaining, total;
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uint32_t remaining, total;
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Z8x36_WRITE( TIMER, CT1_CMD_STATUS, 0xce ); /* read the counter value */
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remaining = 0xffff - *((rtems_unsigned16 *) 0xfffb0010);
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remaining = 0xffff - *((uint16_t*) 0xfffb0010);
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/*
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Z8x36_READ( TIMER, CT1_CUR_CNT_MSB, msb );
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Z8x36_READ( TIMER, CT1_CUR_CNT_LSB, lsb );
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