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2004-03-31 Ralf Corsepius <ralf_corsepius@rtems.org>

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* clock/ckinit.c, include/bsp.h, shmsupp/getcfg.c, shmsupp/lock.c,
	shmsupp/mpisr.c, startup/bspstart.c, timer/timer.c: Convert to using
	c99 fixed size types.
This commit is contained in:
Ralf Corsepius
2004-03-31 04:42:37 +00:00
parent 3e1fc109ae
commit 162ffb4885
8 changed files with 32 additions and 26 deletions
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6
c/src/lib/libbsp/m68k/mvme136/ChangeLog
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@@ -1,3 +1,9 @@
2004-03-31 Ralf Corsepius <ralf_corsepius@rtems.org>
* clock/ckinit.c, include/bsp.h, shmsupp/getcfg.c, shmsupp/lock.c,
shmsupp/mpisr.c, startup/bspstart.c, timer/timer.c: Convert to using
c99 fixed size types.
2004-02-19 Ralf Corsepius <corsepiu@faw.uni-ulm.de> 2004-02-19 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* Makefile.am: Reflect changes to bsp.am. * Makefile.am: Reflect changes to bsp.am.

10
c/src/lib/libbsp/m68k/mvme136/clock/ckinit.c
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@@ -38,9 +38,9 @@
#define CLOCK_VECTOR 66 #define CLOCK_VECTOR 66
rtems_unsigned32 Clock_isrs; /* ISRs until next tick */ uint32_t Clock_isrs; /* ISRs until next tick */
volatile rtems_unsigned32 Clock_driver_ticks; /* ticks since initialization */ volatile uint32_t Clock_driver_ticks; /* ticks since initialization */
rtems_isr_entry Old_ticker; rtems_isr_entry Old_ticker;
@@ -86,7 +86,7 @@ void Install_clock(
timer->MASTER_INTR = MICRVAL; timer->MASTER_INTR = MICRVAL;
timer->CT1_MODE_SPEC = T1MSRVAL; timer->CT1_MODE_SPEC = T1MSRVAL;
*((rtems_unsigned16 *)0xfffb0016) = MS_COUNT; /* write countdown value */ *((uint16_t*)0xfffb0016) = MS_COUNT; /* write countdown value */
/* /*
* timer->CT1_TIME_CONST_MSB = (MS_COUNT >> 8); * timer->CT1_TIME_CONST_MSB = (MS_COUNT >> 8);
@@ -99,7 +99,7 @@ void Install_clock(
/* /*
* Enable interrupt via VME interrupt mask register * Enable interrupt via VME interrupt mask register
*/ */
(*(rtems_unsigned8 *)0xfffb0038) &= 0xfd; (*(uint8_t*)0xfffb0038) &= 0xfd;
atexit( Clock_exit ); atexit( Clock_exit );
} }
@@ -140,7 +140,7 @@ rtems_device_driver Clock_control(
void *pargp void *pargp
) )
{ {
rtems_unsigned32 isrlevel; uint32_t isrlevel;
rtems_libio_ioctl_args_t *args = pargp; rtems_libio_ioctl_args_t *args = pargp;
if (args == 0) if (args == 0)

8
c/src/lib/libbsp/m68k/mvme136/include/bsp.h
View File

@@ -56,9 +56,9 @@ extern "C" {
#define Install_tm27_vector( handler ) set_vector( (handler), 75, 1 ) #define Install_tm27_vector( handler ) set_vector( (handler), 75, 1 )
#define Cause_tm27_intr() (*(volatile rtems_unsigned8 *)0xfffb006b) = 0x80 #define Cause_tm27_intr() (*(volatile uint8_t*)0xfffb006b) = 0x80
#define Clear_tm27_intr() (*(volatile rtems_unsigned8 *)0xfffb006b) = 0x00 #define Clear_tm27_intr() (*(volatile uint8_t*)0xfffb006b) = 0x00
#define Lower_tm27_intr() #define Lower_tm27_intr()
@@ -68,8 +68,8 @@ extern "C" {
*/ */
#define rtems_bsp_delay( microseconds ) \ #define rtems_bsp_delay( microseconds ) \
{ register rtems_unsigned32 _delay=(microseconds); \ { register uint32_t _delay=(microseconds); \
register rtems_unsigned32 _tmp=123; \ register uint32_t _tmp=123; \
asm volatile( "0: \ asm volatile( "0: \
nbcd %0 ; \ nbcd %0 ; \
nbcd %0 ; \ nbcd %0 ; \

12
c/src/lib/libbsp/m68k/mvme136/shmsupp/getcfg.c
View File

@@ -40,22 +40,22 @@
shm_config_table BSP_shm_cfgtbl; shm_config_table BSP_shm_cfgtbl;
rtems_unsigned32 *BSP_int_address() uint32_t *BSP_int_address()
{ {
rtems_unsigned32 id, offset; uint32_t id, offset;
id = (rtems_unsigned32) *(rtems_unsigned8 *)0xfffb0061; id = (uint32_t) *(uint8_t*)0xfffb0061;
offset = ((id & 0x1f) << 5) | ((id & 0xe0) << 8); offset = ((id & 0x1f) << 5) | ((id & 0xe0) << 8);
offset |= 0xffff000b; offset |= 0xffff000b;
return( (rtems_unsigned32 * ) offset ); return( (uint32_t * ) offset );
} }
void Shm_Get_configuration( void Shm_Get_configuration(
rtems_unsigned32 localnode, uint32_t localnode,
shm_config_table **shmcfg shm_config_table **shmcfg
) )
{ {
BSP_shm_cfgtbl.base = (rtems_unsigned32 *)0x20000000; BSP_shm_cfgtbl.base = (uint32_t*)0x20000000;
BSP_shm_cfgtbl.length = 1 * MEGABYTE; BSP_shm_cfgtbl.length = 1 * MEGABYTE;
BSP_shm_cfgtbl.format = SHM_BIG; BSP_shm_cfgtbl.format = SHM_BIG;

6
c/src/lib/libbsp/m68k/mvme136/shmsupp/lock.c
View File

@@ -44,8 +44,8 @@ void Shm_Lock(
Shm_Locked_queue_Control *lq_cb Shm_Locked_queue_Control *lq_cb
) )
{ {
rtems_unsigned32 isr_level; uint32_t isr_level;
rtems_unsigned32 *lockptr = (rtems_unsigned32 *)&lq_cb->lock; uint32_t *lockptr = (uint32_t*)&lq_cb->lock;
rtems_interrupt_disable( isr_level ); rtems_interrupt_disable( isr_level );
Shm_isrstat = isr_level; Shm_isrstat = isr_level;
@@ -65,7 +65,7 @@ void Shm_Unlock(
Shm_Locked_queue_Control *lq_cb Shm_Locked_queue_Control *lq_cb
) )
{ {
rtems_unsigned32 isr_level; uint32_t isr_level;
lq_cb->lock = SHM_UNLOCK_VALUE; lq_cb->lock = SHM_UNLOCK_VALUE;
isr_level = Shm_isrstat; isr_level = Shm_isrstat;

2
c/src/lib/libbsp/m68k/mvme136/shmsupp/mpisr.c
View File

@@ -21,7 +21,7 @@ rtems_isr Shm_isr_mvme136()
{ {
Shm_Interrupt_count += 1; Shm_Interrupt_count += 1;
rtems_multiprocessing_announce(); rtems_multiprocessing_announce();
(*(volatile rtems_unsigned8 *)0xfffb006b) = 0; /* clear MPCSR intr */ (*(volatile uint8_t*)0xfffb006b) = 0; /* clear MPCSR intr */
} }
/* void _Shm_setvec( ) /* void _Shm_setvec( )

4
c/src/lib/libbsp/m68k/mvme136/startup/bspstart.c
View File

@@ -38,7 +38,7 @@ char *rtems_progname;
*/ */
void bsp_postdriver_hook(void); void bsp_postdriver_hook(void);
void bsp_libc_init( void *, unsigned32, int ); void bsp_libc_init( void *, uint32_t, int );
void bsp_pretasking_hook(void); /* m68k version */ void bsp_pretasking_hook(void); /* m68k version */
/* /*
@@ -70,7 +70,7 @@ void bsp_start( void )
m68k_set_vbr( &M68Kvec ); m68k_set_vbr( &M68Kvec );
(*(rtems_unsigned8 *)0xfffb0067) = 0x7f; /* make VME access round-robin */ (*(uint8_t*)0xfffb0067) = 0x7f; /* make VME access round-robin */
rtems_cache_enable_instruction(); rtems_cache_enable_instruction();

10
c/src/lib/libbsp/m68k/mvme136/timer/timer.c
View File

@@ -47,7 +47,7 @@ void Timer_initialize()
Z8x36_WRITE( TIMER, CT1_MODE_SPEC, 0x80 ); /* T1 continuous, and */ Z8x36_WRITE( TIMER, CT1_MODE_SPEC, 0x80 ); /* T1 continuous, and */
/* cycle/pulse output */ /* cycle/pulse output */
*((rtems_unsigned16 *)0xfffb0016) = 0x0000; /* write countdown value */ *((uint16_t*)0xfffb0016) = 0x0000; /* write countdown value */
/* /*
Z8x36_WRITE( TIMER, CT1_TIME_CONST_MSB, 0x00 ); Z8x36_WRITE( TIMER, CT1_TIME_CONST_MSB, 0x00 );
Z8x36_WRITE( TIMER, CT1_TIME_CONST_LSB, 0x00 ); Z8x36_WRITE( TIMER, CT1_TIME_CONST_LSB, 0x00 );
@@ -58,7 +58,7 @@ void Timer_initialize()
/* trigger command */ /* trigger command */
/* (TCB) and gate */ /* (TCB) and gate */
/* command (GCB) bits */ /* command (GCB) bits */
*((rtems_unsigned8 *)0xfffb0038) &= 0xfd; /* enable timer INTR on */ *((uint8_t*)0xfffb0038) &= 0xfd; /* enable timer INTR on */
/* VME controller */ /* VME controller */
} }
@@ -69,12 +69,12 @@ void Timer_initialize()
int Read_timer() int Read_timer()
{ {
/* /*
rtems_unsigned8 msb, lsb; uint8_t msb, lsb;
*/ */
rtems_unsigned32 remaining, total; uint32_t remaining, total;
Z8x36_WRITE( TIMER, CT1_CMD_STATUS, 0xce ); /* read the counter value */ Z8x36_WRITE( TIMER, CT1_CMD_STATUS, 0xce ); /* read the counter value */
remaining = 0xffff - *((rtems_unsigned16 *) 0xfffb0010); remaining = 0xffff - *((uint16_t*) 0xfffb0010);
/* /*
Z8x36_READ( TIMER, CT1_CUR_CNT_MSB, msb ); Z8x36_READ( TIMER, CT1_CUR_CNT_MSB, msb );
Z8x36_READ( TIMER, CT1_CUR_CNT_LSB, lsb ); Z8x36_READ( TIMER, CT1_CUR_CNT_LSB, lsb );