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bsp/atsam: Align SPI API with PIO_Configure()

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This commit is contained in:
Sebastian Huber
2016-12-14 07:18:11 +01:00
parent 5dd02e9569
commit 1505eca59c
3 changed files with 44 additions and 27 deletions
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4
c/src/lib/libbsp/arm/atsam/include/atsam-spi.h
View File

@@ -51,8 +51,8 @@ int spi_bus_register_atsam(
const char *bus_path, const char *bus_path,
Spi *register_base, Spi *register_base,
rtems_vector_number irq, rtems_vector_number irq,
size_t pin_amount, const Pin *pins,
const Pin *pins size_t pin_count
); );
#ifdef __cplusplus #ifdef __cplusplus

12
c/src/lib/libbsp/arm/atsam/spi/atsam_spi_bus.c
View File

@@ -495,11 +495,11 @@ static int atsam_spi_setup(spi_bus *base)
static void atsam_spi_init( static void atsam_spi_init(
atsam_spi_bus *bus, atsam_spi_bus *bus,
size_t pin_amount, const Pin *pins,
const Pin *pins size_t pin_count
) )
{ {
PIO_Configure(pins, pin_amount); PIO_Configure(pins, pin_count);
ENABLE_PERIPHERAL(bus->board_id); ENABLE_PERIPHERAL(bus->board_id);
XDMAD_Initialize(&bus->Dma, 0); XDMAD_Initialize(&bus->Dma, 0);
bus->base.mode = 0; bus->base.mode = 0;
@@ -516,8 +516,8 @@ int spi_bus_register_atsam(
const char *bus_path, const char *bus_path,
Spi *register_base, Spi *register_base,
rtems_vector_number irq, rtems_vector_number irq,
size_t pin_amount, const Pin *pins,
const Pin *pins size_t pin_count
) )
{ {
atsam_spi_bus *bus; atsam_spi_bus *bus;
@@ -533,7 +533,7 @@ int spi_bus_register_atsam(
bus->board_id = board_id; bus->board_id = board_id;
bus->irq = ID_XDMAC; bus->irq = ID_XDMAC;
atsam_spi_init(bus, pin_amount, pins); atsam_spi_init(bus, pins, pin_count);
sc = rtems_interrupt_handler_install( sc = rtems_interrupt_handler_install(
bus->irq, bus->irq,

39
c/src/lib/libbsp/arm/atsam/spi/atsam_spi_init.c
View File

@@ -55,29 +55,46 @@
int atsam_register_spi_0(void) int atsam_register_spi_0(void)
{ {
static const Pin pins[] = {PIN_SPI0_MISO, PIN_SPI0_MOSI, PIN_SPI0_NPCS0, static const Pin pins[] = {
PIN_SPI0_NPCS1_1, PIN_SPI0_NPCS1_2, PIN_SPI0_NPCS2, PIN_SPI0_NPCS3, PIN_SPI0_MISO,
PIN_SPI0_CLOCK}; PIN_SPI0_MOSI,
PIN_SPI0_NPCS0,
PIN_SPI0_NPCS1_1,
PIN_SPI0_NPCS1_2,
PIN_SPI0_NPCS2,
PIN_SPI0_NPCS3,
PIN_SPI0_CLOCK
};
return spi_bus_register_atsam( return spi_bus_register_atsam(
ATSAM_SPI_0_BUS_PATH, ATSAM_SPI_0_BUS_PATH,
SPI0, SPI0,
ID_SPI0, ID_SPI0,
8, pins,
pins); RTEMS_ARRAY_SIZE(pins)
);
} }
int atsam_register_spi_1(void) int atsam_register_spi_1(void)
{ {
static const Pin pins[] = {PIN_SPI1_MISO, PIN_SPI1_MOSI, PIN_SPI1_NPCS0, static const Pin pins[] = {
PIN_SPI1_NPCS1_1, PIN_SPI1_NPCS1_2, PIN_SPI1_NPCS2_1, PIN_SPI1_MISO,
PIN_SPI1_NPCS2_2, PIN_SPI1_NPCS3_1, PIN_SPI1_NPCS3_2, PIN_SPI1_MOSI,
PIN_SPI1_CLOCK}; PIN_SPI1_NPCS0,
PIN_SPI1_NPCS1_1,
PIN_SPI1_NPCS1_2,
PIN_SPI1_NPCS2_1,
PIN_SPI1_NPCS2_2,
PIN_SPI1_NPCS3_1,
PIN_SPI1_NPCS3_2,
PIN_SPI1_CLOCK
};
return spi_bus_register_atsam( return spi_bus_register_atsam(
ATSAM_SPI_1_BUS_PATH, ATSAM_SPI_1_BUS_PATH,
SPI1, SPI1,
ID_SPI1, ID_SPI1,
10, pins,
pins); RTEMS_ARRAY_SIZE(pins)
);
} }