forked from Imagelibrary/rtems
arm/raspberrypi: Force VC mail box buffer to be synchronized through cache.
This solution is quick fix until CPU_DATA_CACHE_ALIGNMENT is defined and cache manager is checked on all Raspberry Pi variants.
This commit is contained in:
@@ -34,6 +34,7 @@
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static inline bool
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static inline bool
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bcm2835_mailbox_buffer_suceeded(const bcm2835_mbox_buf_hdr *hdr)
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bcm2835_mailbox_buffer_suceeded(const bcm2835_mbox_buf_hdr *hdr)
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{
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{
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RTEMS_COMPILER_MEMORY_BARRIER();
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return (hdr->buf_code == BCM2835_MBOX_BUF_CODE_REQUEST_SUCCEED);
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return (hdr->buf_code == BCM2835_MBOX_BUF_CODE_REQUEST_SUCCEED);
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}
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}
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@@ -58,11 +59,22 @@ bcm2835_mailbox_buffer_flush_and_invalidate(void *buf, size_t size)
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sctlr_val = arm_cp15_get_control();
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sctlr_val = arm_cp15_get_control();
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RTEMS_COMPILER_MEMORY_BARRIER();
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arm_cp15_drain_write_buffer();
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arm_cp15_drain_write_buffer();
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if (sctlr_val & (ARM_CP15_CTRL_C | ARM_CP15_CTRL_M)) {
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if (sctlr_val & (ARM_CP15_CTRL_C | ARM_CP15_CTRL_M)) {
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arm_cp15_drain_write_buffer();
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#if 0
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/*
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These architecture independent RTEMS API functions should be
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used there but CPU_DATA_CACHE_ALIGNMENT is not defined
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for ARM architecture version used on RPi and functions
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are dummy for now and do not provide required synchronization
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*/
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rtems_cache_flush_multiple_data_lines(buf, size);
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rtems_cache_flush_multiple_data_lines(buf, size);
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rtems_cache_invalidate_multiple_data_lines(buf, size);
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rtems_cache_invalidate_multiple_data_lines(buf, size);
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#else
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/* Flush complete data cache */
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arm_cp15_data_cache_clean_and_invalidate();
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#endif
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}
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}
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}
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}
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