forked from Imagelibrary/rtems
beagle bsp: disable watchdog on am335x
On recent u-boots, the watchdog is turned on / left enabled. The Beaglebone Black rev. C ships with such a u-boot internally so any application booting from it must disable the watchdog. Therefore this change is needed to boot an RTEMS app out-of-the-box on a BBB Rev C - otherwise the user button must be held during boot (to bypass the stock uboot) or the internal uboot must be updated. To allow for a better out-of-the-box experience, we just turn off the watchdog.
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@@ -251,6 +251,15 @@ beagle_clock_initialize(void)
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OMAP3_TCLR_OVF_TRG | OMAP3_TCLR_AR | OMAP3_TCLR_ST);
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OMAP3_TCLR_OVF_TRG | OMAP3_TCLR_AR | OMAP3_TCLR_ST);
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/* also initilize the free runnning timer */
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/* also initilize the free runnning timer */
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omap3_frclock_init();
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omap3_frclock_init();
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#if IS_AM335X
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/* Disable AM335X watchdog */
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mmio_write(AM335X_WDT_BASE+AM335X_WDT_WSPR, 0xAAAA);
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while(mmio_read(AM335X_WDT_BASE+AM335X_WDT_WWPS) != 0) ;
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mmio_write(AM335X_WDT_BASE+AM335X_WDT_WSPR, 0x5555);
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while(mmio_read(AM335X_WDT_BASE+AM335X_WDT_WWPS) != 0) ;
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#endif
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}
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}
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static void beagle_clock_at_tick(void)
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static void beagle_clock_at_tick(void)
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@@ -274,3 +274,9 @@
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/* Control posted mode and functional SW reset */
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/* Control posted mode and functional SW reset */
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#define AM335X_TIMER_TCAR2 0x058
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#define AM335X_TIMER_TCAR2 0x058
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/* Second captured value of counter register */
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/* Second captured value of counter register */
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#define AM335X_WDT_BASE 0x44E35000
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/* Watchdog timer */
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#define AM335X_WDT_WWPS 0x34
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/* Command posted status */
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#define AM335X_WDT_WSPR 0x48
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/* Activate/deactivate sequence */
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