RTOS/rtems
1
0
Fork 0
forked from Imagelibrary/rtems
Code Pull Requests Activity

mvme5500 and cpukit pci.h - Eliminate mvme5500 specific pci.h

Browse Source 
All constants that should have been in cpukit pci.h were moved there.
One naming style was corrected. This impacted if_wm.c.

All other contents were the same as powerpc/shared/pci.h so BSP
specific pci.h could be eliminated.
This commit is contained in:
Joel Sherrill
2012-05-16 14:47:31 -05:00
parent 226d48d826
commit 1364701915
6 changed files with 17 additions and 65 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
c/src/lib/libbsp/powerpc/mvme5500/Makefile.am
View File

@@ -51,7 +51,8 @@ include_bsp_HEADERS += ../../powerpc/shared/console/consoleIo.h
libbsp_a_SOURCES += ../../powerpc/shared/console/uart.c \
../../powerpc/shared/console/console.c
include_bsp_HEADERS += pci/gtpcireg.h pci/pci.h
include_bsp_HEADERS += pci/gtpcireg.h
include_bsp_HEADERS += ../../powerpc/shared/pci/pci.h
# pci
libbsp_a_SOURCES += pci/pci.c pci/pci_interface.c pci/detect_host_bridge.c \
pci/pcifinddevice.c

2
c/src/lib/libbsp/powerpc/mvme5500/network/if_1GHz/if_wm.c
View File

@@ -309,7 +309,7 @@ int rtems_i82544EI_driver_attach(struct rtems_bsdnet_ifconfig *config, int attac
sprintf(sc->dv_xname, "%s%d", name, unit);
if (pci_find_device(PCI_VENDOR_ID_INTEL,PCI_DEVICE_INTEL_82544EI_COPPER,
if (pci_find_device(PCI_VENDOR_ID_INTEL,PCI_DEVICE_ID_INTEL_82544EI_COPPER,
unit-1,&b, &d, &f))
rtems_panic("i82544EI device ID not found\n");

2
c/src/lib/libbsp/powerpc/mvme5500/pci/pci.c
View File

@@ -411,7 +411,7 @@ int pci_initialize(void)
return(0);
}
void FixupPCI( struct _int_map *bspmap, int (*swizzler)(int,int) )
void FixupPCI( const struct _int_map *bspmap, int (*swizzler)(int,int) )
{
}

59
c/src/lib/libbsp/powerpc/mvme5500/pci/pci.h
View File

@@ -1,59 +0,0 @@
/*
*
* PCI defines and function prototypes
* Copyright 1994, Drew Eckhardt
* Copyright 1997, 1998 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
*
* For more information, please consult the following manuals (look at
* http://www.pcisig.com/ for how to get them):
*
* PCI BIOS Specification
* PCI Local Bus Specification
* PCI to PCI Bridge Specification
* PCI System Design Guide
*
* pci.h,v 1.2 2002/05/14 17:10:16 joel Exp
*
* S. Kate Feng : Added support for Marvell and PLX. 3/5/2004.
*/
#ifndef RTEMS_PCI_H
#define RTEMS_PCI_H
#include <rtems/pci.h>
#define PCI_CAPABILITY_LIST_POINTER 0x34 /* <SKF> */
/* Device classes and subclasses */
#define PCI_CLASS_GT6426xAB_BRIDGE_PCI 0x0580 /* <SKF> */
/*
* Vendor and card ID's: sort these numerically according to vendor
* (and according to card ID within vendor). Send all updates to
* <linux-pcisupport@cck.uni-kl.de>.
*/
#define PCI_VENDOR_ID_MARVELL 0x11ab /* <SKF> */
#define PCI_DEVICE_ID_MARVELL_GT6426xAB 0x6430 /* <SKF> */
/* Note : The PLX Technology Inc. had the old VENDOR_ID.
* See PCI_VENDOR_ID_PLX, PCI_VENDOR_ID_PLX_9050, ..etc.
*/
#define PCI_VENDOR_ID_PLX2 0x3388 /* <SKF> */
#define PCI_DEVICE_ID_PLX2_PCI6154_HB2 0x26 /* <SKF> */
#define PCI_DEVICE_INTEL_82544EI_COPPER 0x1008 /* <SKF> */
struct _pin_routes
{
int pin, int_name[4];
};
struct _int_map
{
int bus, slot, opts;
struct _pin_routes pin_route[5];
};
void FixupPCI( struct _int_map *, int (*swizzler)(int,int) );
#endif /* RTEMS_PCI_H */

2
c/src/lib/libbsp/powerpc/mvme5500/preinstall.am
View File

@@ -73,7 +73,7 @@ $(PROJECT_INCLUDE)/bsp/gtpcireg.h: pci/gtpcireg.h $(PROJECT_INCLUDE)/bsp/$(dirst
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/gtpcireg.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/gtpcireg.h
$(PROJECT_INCLUDE)/bsp/pci.h: pci/pci.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(PROJECT_INCLUDE)/bsp/pci.h: ../../powerpc/shared/pci/pci.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/pci.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/pci.h

14
cpukit/include/rtems/pci.h
View File

@@ -105,11 +105,14 @@ extern "C" {
#define PCI_CARDBUS_CIS 0x28
#define PCI_SUBSYSTEM_VENDOR_ID 0x2c
#define PCI_SUBSYSTEM_ID 0x2e
#define PCI_ROM_ADDRESS 0x30/* Bits 31..11 address, 10..1 reserved */
#define PCI_ROM_ADDRESS 0x30 /* Bits 31..11 address, 10..1 reserved */
#define PCI_ROM_ADDRESS_ENABLE 0x01
#define PCI_ROM_ADDRESS_MASK (~0x7ffUL)
/* 0x34-0x3b are reserved */
/* upper 24 bits are reserved */
#define PCI_CAPABILITY_LIST_POINTER 0x34
/* 0x38-0x3b are reserved */
#define PCI_INTERRUPT_LINE 0x3c /* 8 bits */
#define PCI_INTERRUPT_PIN 0x3d /* 8 bits */
#define PCI_MIN_GNT 0x3e /* 8 bits */
@@ -628,6 +631,9 @@ extern "C" {
#define PCI_DEVICE_ID_PLX_9060SD 0x906D
#define PCI_DEVICE_ID_PLX_9080 0x9080
#define PCI_VENDOR_ID_PLX2 0x3388
#define PCI_DEVICE_ID_PLX2_PCI6154_HB2 0x0026
#define PCI_VENDOR_ID_MADGE 0x10b6
#define PCI_DEVICE_ID_MADGE_MK2 0x0002
#define PCI_DEVICE_ID_MADGE_C155S 0x1001
@@ -850,6 +856,9 @@ extern "C" {
#define PCI_VENDOR_ID_OMEGA 0x119b
#define PCI_DEVICE_ID_OMEGA_82C092G 0x1221
#define PCI_VENDOR_ID_MARVELL 0x11ab
#define PCI_DEVICE_ID_MARVELL_GT6426xAB 0x6430
#define PCI_VENDOR_ID_LITEON 0x11ad
#define PCI_DEVICE_ID_LITEON_LNE100TX 0x0002
@@ -1002,6 +1011,7 @@ extern "C" {
#define PCI_DEVICE_ID_INTEL_82378 0x0484
#define PCI_DEVICE_ID_INTEL_82430 0x0486
#define PCI_DEVICE_ID_INTEL_82434 0x04a3
#define PCI_DEVICE_ID_INTEL_82544EI_COPPER 0x1008
#define PCI_DEVICE_ID_INTEL_82092AA_0 0x1221
#define PCI_DEVICE_ID_INTEL_82092AA_1 0x1222
#define PCI_DEVICE_ID_INTEL_7116 0x1223