2001-10-15 Ralf Corsepius <corsepiu@faw.uni-ulm.de>

* include/sh4uart.h: move to include/sh/sh4uart.h.
	* include/ispsh7750.h: move to include/rtems/score/ispsh7750.h.
	* include/iosh7750.h: move include/rtems/score/iosh7750.h.
	* include/sh7750_regs.h: move to include/rtems/score/sh7750_regs.h.
	* include/rtems/score/ipl.h: move to include/rtems/score/ipl.h.
	* include/rtems/score/sh4_regs.h: Reintroduce from Alexandra
	Kossovsky's original sources.
	* include/Makefile.am: reflect changes above, remove EXTRA_DIST,
	require automake 1.5.
	* sci/Makefile.am: Disable compilation of console.c.
	* sci/sh4uart.c: include <sh/sh4uart.h>, add SH7750_SCSMR_CHK_S,
	remove SH4_CPU_HZ_Frequency;
	* score/isph7750.c: Remove #if !defined(sh7750), include sh4_regs.h.
This commit is contained in:
Joel Sherrill
2001-10-15 18:01:12 +00:00
parent 3bcc0d8913
commit 12ae6d9e06
11 changed files with 100 additions and 206 deletions

View File

@@ -1,3 +1,19 @@
2001-10-15 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* include/sh4uart.h: move to include/sh/sh4uart.h.
* include/ispsh7750.h: move to include/rtems/score/ispsh7750.h.
* include/iosh7750.h: move include/rtems/score/iosh7750.h.
* include/sh7750_regs.h: move to include/rtems/score/sh7750_regs.h.
* include/rtems/score/ipl.h: move to include/rtems/score/ipl.h.
* include/rtems/score/sh4_regs.h: Reintroduce from Alexandra
Kossovsky's original sources.
* include/Makefile.am: reflect changes above, remove EXTRA_DIST,
require automake 1.5.
* sci/Makefile.am: Disable compilation of console.c.
* sci/sh4uart.c: include <sh/sh4uart.h>, add SH7750_SCSMR_CHK_S,
remove SH4_CPU_HZ_Frequency;
* score/isph7750.c: Remove #if !defined(sh7750), include sh4_regs.h.
2001-10-12 Joel Sherrill <joel@OARcorp.com>
* include/sh4_regs.h: Deleted and contents merged in score/cpu

View File

@@ -2,36 +2,36 @@
## $Id$
##
AUTOMAKE_OPTIONS = foreign 1.4
AUTOMAKE_OPTIONS = foreign 1.5
# NOTE: Unlike other CPUS, we install into a subdirectory to avoid
# file name conflicts
include_shdir = $(includedir)/sh
include_rtems_scoredir = $(includedir)/rtems/score
include_sh_HEADERS = sh4uart.h
include_rtems_score_HEADERS = ispsh7750.h iosh7750.h
include_sh_HEADERS = sh/sh4uart.h
include_rtems_score_HEADERS = \
rtems/score/sh7750_regs.h \
rtems/score/ipl.h \
rtems/score/iosh7750.h \
rtems/score/ispsh7750.h \
rtems/score/sh4_regs.h
$(PROJECT_INCLUDE)/sh:
$(mkinstalldirs) $@
$(PROJECT_INCLUDE)/sh/%.h: %.h
$(PROJECT_INCLUDE)/rtems/score:
$(mkinstalldirs) $@
$(PROJECT_INCLUDE)/%.h: %.h
$(INSTALL_DATA) $< $@
$(PROJECT_INCLUDE)/rtems/score/%.h: %.h
$(INSTALL_DATA) $< $@
TMPINSTALL_FILES = $(PROJECT_INCLUDE)/sh \
$(include_sh_HEADERS:%=$(PROJECT_INCLUDE)/sh/%) \
$(include_rtems_score_HEADERS:%=$(PROJECT_INCLUDE)/rtems/score/%)
TMPINSTALL_FILES = \
$(PROJECT_INCLUDE)/sh \
$(include_sh_HEADERS:%=$(PROJECT_INCLUDE)/%) \
$(PROJECT_INCLUDE)/rtems/score \
$(include_rtems_score_HEADERS:%=$(PROJECT_INCLUDE)/%)
all-local: $(TMPINSTALL_FILES)
# FIXME: What are these files here?
# They should either be installed or removed
EXTRA_DIST = \
ipl.h \
sh4uart.h \
sh7750_regs.h
include $(top_srcdir)/../../../../../../automake/local.am

View File

@@ -44,6 +44,6 @@
#ifndef __IOSH7750_H
#define __IOSH7750_H
#include "sh7750_regs.h"
#include <rtems/score/sh7750_regs.h>
#endif

View File

@@ -0,0 +1,53 @@
/*
* Bits on SH-4 registers.
* See SH-4 Programming manual for more details.
*
* Copyright (C) 2001 OKTET Ltd., St.-Petersburg, Russia
* Author: Alexandra Kossovsky <sasha@oktet.ru>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* @(#) $Id$
*/
#ifndef __SH4_REGS_H__
#define __SH4_REGS_H__
/* SR -- Status Register */
#define SH4_SR_MD 0x40000000 /* Priveleged mode */
#define SH4_SR_RB 0x20000000 /* General register bank specifier */
#define SH4_SR_BL 0x10000000 /* Exeption/interrupt masking bit */
#define SH4_SR_FD 0x00008000 /* FPU disable bit */
#define SH4_SR_M 0x00000200 /* For signed division:
divisor (module) is negative */
#define SH4_SR_Q 0x00000100 /* For signed division:
dividend (and quotient) is negative */
#define SH4_SR_IMASK 0x000000f0 /* Interrupt mask level */
#define SH4_SR_IMASK_S 4
#define SH4_SR_S 0x00000002 /* Saturation for MAC instruction:
if set, data in MACH/L register
is restricted to 48/32 bits
for MAC.W/L instructions */
#define SH4_SR_T 0x00000001 /* 1 if last condiyion was true */
#define SH4_SR_RESERV 0x8fff7d0d /* Reserved bits, read/write as 0 */
/* FPSCR -- FPU Starus/Control Register */
#define SH4_FPSCR_FR 0x00200000 /* FPU register bank specifier */
#define SH4_FPSCR_SZ 0x00100000 /* FMOV 64-bit transfer mode */
#define SH4_FPSCR_PR 0x00080000 /* Double-percision floating-point
operations flag */
/* SH4_FPSCR_SZ & SH4_FPSCR_PR != 1 */
#define SH4_FPSCR_DN 0x00040000 /* Treat denormalized number as zero */
#define SH4_FPSCR_CAUSE 0x0003f000 /* FPU exeption cause field */
#define SH4_FPSCR_CAUSE_S 12
#define SH4_FPSCR_ENABLE 0x00000f80 /* FPU exeption enable field */
#define SH4_FPSCR_ENABLE_s 7
#define SH4_FPSCR_FLAG 0x0000007d /* FPU exeption flag field */
#define SH4_FPSCR_FLAG_S 2
#define SH4_FPSCR_RM 0x00000001 /* Rounding mode:
1/0 -- round to zero/nearest */
#define SH4_FPSCR_RESERV 0xffd00000 /* Reserved bits, read/write as 0 */
#endif

View File

@@ -1,178 +0,0 @@
/*
* Generic UART Serial driver for SH-4 processors definitions
*
* Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russian Fed.
* Author: Alexandra Kossovsky <sasha@oktet.ru>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
*
* http://www.OARcorp.com/rtems/license.html.
*
* @(#) $Id$
*
*/
#ifndef __SH4UART_H__
#define __SH4UART_H__
#include "bsp.h"
#include "rtems/score/sh7750_regs.h"
/*
* Define this to work from gdb stub
*/
#define SH4_WITH_IPL
#define SH4_SCI 1 /* Serial Communication Interface - SCI */
#define SH4_SCIF 2 /* Serial Communication Interface with FIFO - SCIF */
#define TRANSMIT_TRIGGER_VALUE(ttrg) ((ttrg) == SH7750_SCFCR2_RTRG_1 ? 1 : \
(ttrg) == SH7750_SCFCR2_RTRG_4 ? 4 : \
(ttrg) == SH7750_SCFCR2_RTRG_8 ? 8 : 14)
/*
* Macros to call UART registers
*/
#define SCRDR(n) (*(volatile rtems_unsigned8 *)SH7750_SCRDR(n))
#define SCRDR1 SCRDR(1)
#define SCRDR2 SCRDR(2)
#define SCTDR(n) (*(volatile rtems_unsigned8 *)SH7750_SCTDR(n))
#define SCTDR1 SCTDR(1)
#define SCTDR2 SCTDR(2)
#define SCSMR(n) ((n) == 1 ? *(volatile rtems_unsigned8 *)SH7750_SCSMR1 : \
*(volatile rtems_unsigned16 *)SH7750_SCSMR2)
#define SCSMR1 SCSMR(1)
#define SCSMR2 SCSMR(2)
#define SCSCR(n) ((n) == 1 ? *(volatile rtems_unsigned8 *)SH7750_SCSCR1 : \
*(volatile rtems_unsigned16 *)SH7750_SCSCR2)
#define SCSCR1 SCSCR(1)
#define SCSCR2 SCSCR(2)
#define SCSSR(n) ((n) == 1 ? *(volatile rtems_unsigned8 *)SH7750_SCSSR1 : \
*(volatile rtems_unsigned16 *)SH7750_SCSSR2)
#define SCSSR1 SCSSR(1)
#define SCSSR2 SCSSR(2)
#define SCSPTR1 (*(volatile rtems_unsigned8 *)SH7750_SCSPTR1)
#define SCSPTR2 (*(volatile rtems_unsigned16 *)SH7750_SCSPTR2)
#define SCBRR(n) (*(volatile rtems_unsigned8 *)SH7750_SCBRR(n))
#define SCBRR1 SCBRR(1)
#define SCBRR2 SCBRR(2)
#define SCFCR2 (*(volatile rtems_unsigned16 *)SH7750_SCFCR2)
#define SCFDR2 (*(volatile rtems_unsigned16 *)SH7750_SCFDR2)
#define SCLSR2 (*(volatile rtems_unsigned16 *)SH7750_SCLSR2)
#define IPRB (*(volatile rtems_unsigned16 *)SH7750_IPRB)
#define IPRC (*(volatile rtems_unsigned16 *)SH7750_IPRC)
/*
* The following structure is a descriptor of single UART channel.
* It contains the initialization information about channel and
* current operating values
*/
typedef struct sh4uart {
rtems_unsigned8 chn; /* UART channel number */
rtems_unsigned8 int_driven; /* UART interrupt vector number, or
0 if polled I/O */
void *tty; /* termios channel descriptor */
volatile const char *tx_buf; /* Transmit buffer from termios */
volatile rtems_unsigned32 tx_buf_len; /* Transmit buffer length */
volatile rtems_unsigned32 tx_ptr; /* Index of next char to transmit*/
rtems_isr_entry old_handler_transmit; /* Saved interrupt handlers */
rtems_isr_entry old_handler_receive;
tcflag_t c_iflag; /* termios input mode flags */
rtems_boolean parerr_mark_flag; /* Parity error processing state */
} sh4uart;
/*
* Functions from sh4uart.c
*/
/* sh4uart_init --
* This function verifies the input parameters and perform initialization
* of the Motorola Coldfire on-chip UART descriptor structure.
*
*/
rtems_status_code
sh4uart_init(sh4uart *uart, void *tty, int chn, int int_driven);
/* sh4uart_reset --
* This function perform the hardware initialization of Motorola
* Coldfire processor on-chip UART controller using parameters
* filled by the sh4uart_init function.
*/
rtems_status_code
sh4uart_reset(sh4uart *uart);
/* sh4uart_disable --
* This function disable the operations on Motorola Coldfire UART
* controller
*/
rtems_status_code
sh4uart_disable(sh4uart *uart);
/* sh4uart_set_attributes --
* This function parse the termios attributes structure and perform
* the appropriate settings in hardware.
*/
rtems_status_code
sh4uart_set_attributes(sh4uart *mcf, const struct termios *t);
/* sh4uart_poll_read --
* This function tried to read character from MCF UART and perform
* error handling.
*/
int
sh4uart_poll_read(sh4uart *uart);
#ifdef SH4_WITH_IPL
/* ipl_console_poll_read --
* This function tried to read character from MCF UART over SH-IPL.
*/
int
ipl_console_poll_read(int minor);
/* sh4uart_interrupt_write --
* This function initiate transmitting of the buffer in interrupt mode.
*/
rtems_status_code
sh4uart_interrupt_write(sh4uart *uart, const char *buf, int len);
/* sh4uart_poll_write --
* This function transmit buffer byte-by-byte in polling mode.
*/
int
sh4uart_poll_write(sh4uart *uart, const char *buf, int len);
/* ipl_console_poll_write --
* This function transmit buffer byte-by-byte in polling mode over SH-IPL.
*/
int
ipl_console_poll_write(int minor, const char *buf, int len);
/*
* ipl_finish --
* Says gdb that program finished to get out from it.
*/
extern void ipl_finish(void);
#endif
/* sh4uart_stop_remote_tx --
* This function stop data flow from remote device.
*/
rtems_status_code
sh4uart_stop_remote_tx(sh4uart *uart);
/* sh4uart_start_remote_tx --
* This function resume data flow from remote device.
*/
rtems_status_code
sh4uart_start_remote_tx(sh4uart *uart);
/* Descriptor structures for two on-chip UART channels */
extern sh4uart sh4_uarts[2];
#endif

View File

@@ -6,7 +6,7 @@ AUTOMAKE_OPTIONS = foreign 1.4
PGM = $(ARCH)/sci.rel
C_FILES = console.c sh4uart.c
C_FILES = sh4uart.c
C_O_FILES = $(C_FILES:%.c=$(ARCH)/%.o)
OBJS = $(C_O_FILES)
@@ -26,4 +26,8 @@ all-local: $(ARCH) $(OBJS) $(PGM)
.PRECIOUS: $(PGM)
## FIXME: Moved to libbsp/sh/<BSP>/console/
## Needs to be reworked to be usable here.
EXTRA_DIST = console.c
include $(top_srcdir)/../../../../../../automake/local.am

View File

@@ -1,9 +1,6 @@
/*
* Generic UART Serial driver for SH-4 processors
*
* This driver uses variable SH4_CPU_HZ_Frequency,
* which should be defined in bsp to HZ macro.
*
* Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russian Fed.
* Author: Alexandra Kossovsky <sasha@oktet.ru>
*
@@ -22,12 +19,17 @@
#include <rtems.h>
#include <termios.h>
#include <rtems/libio.h>
#include "sh/sh4uart.h"
#include <sh/sh4uart.h>
#ifndef SH4_UART_INTERRUPT_LEVEL
#define SH4_UART_INTERRUPT_LEVEL 4
#endif
/* FIXME: ???
#define SH7750_SCSMR_CKS_S SH7750_SCSMR_CKS_DIV1
*/
#define SH7750_SCSMR_CKS_S 0
/* Forward function declarations */
static rtems_isr
sh4uart1_interrupt_transmit(rtems_vector_number vec);
@@ -86,7 +88,7 @@ rtems_unsigned32
sh4uart_get_Pph(void)
{
rtems_unsigned16 frqcr = *(volatile rtems_unsigned16 *)SH7750_FRQCR;
rtems_unsigned32 Pph = SH4_CPU_HZ_Frequency;
rtems_unsigned32 Pph = rtems_cpu_configuration_get_clicks_per_second() ;
switch (frqcr & SH7750_FRQCR_IFC)
{

View File

@@ -41,10 +41,6 @@
#include <rtems/score/shtypes.h>
#include <rtems/score/isr.h>
#if !defined (sh7750)
#error Wrong CPU MODEL
#endif
/*
* This is a exception vector table
*
@@ -53,6 +49,7 @@
#include <rtems/score/ispsh7750.h>
#include <rtems/score/sh4_regs.h>
#include <rtems/score/sh7750_regs.h>
/* VBR register contents saved on startup -- used to hook exception by debug