forked from Imagelibrary/rtems
2001-10-15 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* include/sh4uart.h: move to include/sh/sh4uart.h. * include/ispsh7750.h: move to include/rtems/score/ispsh7750.h. * include/iosh7750.h: move include/rtems/score/iosh7750.h. * include/sh7750_regs.h: move to include/rtems/score/sh7750_regs.h. * include/rtems/score/ipl.h: move to include/rtems/score/ipl.h. * include/rtems/score/sh4_regs.h: Reintroduce from Alexandra Kossovsky's original sources. * include/Makefile.am: reflect changes above, remove EXTRA_DIST, require automake 1.5. * sci/Makefile.am: Disable compilation of console.c. * sci/sh4uart.c: include <sh/sh4uart.h>, add SH7750_SCSMR_CHK_S, remove SH4_CPU_HZ_Frequency; * score/isph7750.c: Remove #if !defined(sh7750), include sh4_regs.h.
This commit is contained in:
@@ -1,3 +1,19 @@
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2001-10-15 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
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* include/sh4uart.h: move to include/sh/sh4uart.h.
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* include/ispsh7750.h: move to include/rtems/score/ispsh7750.h.
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* include/iosh7750.h: move include/rtems/score/iosh7750.h.
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* include/sh7750_regs.h: move to include/rtems/score/sh7750_regs.h.
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* include/rtems/score/ipl.h: move to include/rtems/score/ipl.h.
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* include/rtems/score/sh4_regs.h: Reintroduce from Alexandra
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Kossovsky's original sources.
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* include/Makefile.am: reflect changes above, remove EXTRA_DIST,
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require automake 1.5.
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* sci/Makefile.am: Disable compilation of console.c.
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* sci/sh4uart.c: include <sh/sh4uart.h>, add SH7750_SCSMR_CHK_S,
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remove SH4_CPU_HZ_Frequency;
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* score/isph7750.c: Remove #if !defined(sh7750), include sh4_regs.h.
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2001-10-12 Joel Sherrill <joel@OARcorp.com>
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* include/sh4_regs.h: Deleted and contents merged in score/cpu
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@@ -2,36 +2,36 @@
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## $Id$
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##
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AUTOMAKE_OPTIONS = foreign 1.4
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AUTOMAKE_OPTIONS = foreign 1.5
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# NOTE: Unlike other CPUS, we install into a subdirectory to avoid
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# file name conflicts
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include_shdir = $(includedir)/sh
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include_rtems_scoredir = $(includedir)/rtems/score
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include_sh_HEADERS = sh4uart.h
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include_rtems_score_HEADERS = ispsh7750.h iosh7750.h
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include_sh_HEADERS = sh/sh4uart.h
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include_rtems_score_HEADERS = \
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rtems/score/sh7750_regs.h \
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rtems/score/ipl.h \
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rtems/score/iosh7750.h \
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rtems/score/ispsh7750.h \
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rtems/score/sh4_regs.h
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$(PROJECT_INCLUDE)/sh:
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$(mkinstalldirs) $@
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$(PROJECT_INCLUDE)/sh/%.h: %.h
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$(PROJECT_INCLUDE)/rtems/score:
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$(mkinstalldirs) $@
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$(PROJECT_INCLUDE)/%.h: %.h
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$(INSTALL_DATA) $< $@
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$(PROJECT_INCLUDE)/rtems/score/%.h: %.h
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$(INSTALL_DATA) $< $@
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TMPINSTALL_FILES = $(PROJECT_INCLUDE)/sh \
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$(include_sh_HEADERS:%=$(PROJECT_INCLUDE)/sh/%) \
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$(include_rtems_score_HEADERS:%=$(PROJECT_INCLUDE)/rtems/score/%)
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TMPINSTALL_FILES = \
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$(PROJECT_INCLUDE)/sh \
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$(include_sh_HEADERS:%=$(PROJECT_INCLUDE)/%) \
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$(PROJECT_INCLUDE)/rtems/score \
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$(include_rtems_score_HEADERS:%=$(PROJECT_INCLUDE)/%)
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all-local: $(TMPINSTALL_FILES)
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# FIXME: What are these files here?
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# They should either be installed or removed
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EXTRA_DIST = \
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ipl.h \
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sh4uart.h \
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sh7750_regs.h
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include $(top_srcdir)/../../../../../../automake/local.am
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@@ -44,6 +44,6 @@
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#ifndef __IOSH7750_H
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#define __IOSH7750_H
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#include "sh7750_regs.h"
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#include <rtems/score/sh7750_regs.h>
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#endif
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53
c/src/lib/libcpu/sh/sh7750/include/rtems/score/sh4_regs.h
Normal file
53
c/src/lib/libcpu/sh/sh7750/include/rtems/score/sh4_regs.h
Normal file
@@ -0,0 +1,53 @@
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/*
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* Bits on SH-4 registers.
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* See SH-4 Programming manual for more details.
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*
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* Copyright (C) 2001 OKTET Ltd., St.-Petersburg, Russia
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* Author: Alexandra Kossovsky <sasha@oktet.ru>
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.OARcorp.com/rtems/license.html.
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*
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* @(#) $Id$
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*/
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#ifndef __SH4_REGS_H__
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#define __SH4_REGS_H__
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/* SR -- Status Register */
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#define SH4_SR_MD 0x40000000 /* Priveleged mode */
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#define SH4_SR_RB 0x20000000 /* General register bank specifier */
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#define SH4_SR_BL 0x10000000 /* Exeption/interrupt masking bit */
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#define SH4_SR_FD 0x00008000 /* FPU disable bit */
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#define SH4_SR_M 0x00000200 /* For signed division:
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divisor (module) is negative */
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#define SH4_SR_Q 0x00000100 /* For signed division:
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dividend (and quotient) is negative */
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#define SH4_SR_IMASK 0x000000f0 /* Interrupt mask level */
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#define SH4_SR_IMASK_S 4
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#define SH4_SR_S 0x00000002 /* Saturation for MAC instruction:
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if set, data in MACH/L register
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is restricted to 48/32 bits
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for MAC.W/L instructions */
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#define SH4_SR_T 0x00000001 /* 1 if last condiyion was true */
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#define SH4_SR_RESERV 0x8fff7d0d /* Reserved bits, read/write as 0 */
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/* FPSCR -- FPU Starus/Control Register */
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#define SH4_FPSCR_FR 0x00200000 /* FPU register bank specifier */
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#define SH4_FPSCR_SZ 0x00100000 /* FMOV 64-bit transfer mode */
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#define SH4_FPSCR_PR 0x00080000 /* Double-percision floating-point
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operations flag */
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/* SH4_FPSCR_SZ & SH4_FPSCR_PR != 1 */
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#define SH4_FPSCR_DN 0x00040000 /* Treat denormalized number as zero */
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#define SH4_FPSCR_CAUSE 0x0003f000 /* FPU exeption cause field */
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#define SH4_FPSCR_CAUSE_S 12
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#define SH4_FPSCR_ENABLE 0x00000f80 /* FPU exeption enable field */
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#define SH4_FPSCR_ENABLE_s 7
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#define SH4_FPSCR_FLAG 0x0000007d /* FPU exeption flag field */
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#define SH4_FPSCR_FLAG_S 2
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#define SH4_FPSCR_RM 0x00000001 /* Rounding mode:
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1/0 -- round to zero/nearest */
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#define SH4_FPSCR_RESERV 0xffd00000 /* Reserved bits, read/write as 0 */
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#endif
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@@ -1,178 +0,0 @@
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/*
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* Generic UART Serial driver for SH-4 processors definitions
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*
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* Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russian Fed.
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* Author: Alexandra Kossovsky <sasha@oktet.ru>
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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*
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* http://www.OARcorp.com/rtems/license.html.
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*
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* @(#) $Id$
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*
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*/
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#ifndef __SH4UART_H__
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#define __SH4UART_H__
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#include "bsp.h"
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#include "rtems/score/sh7750_regs.h"
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/*
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* Define this to work from gdb stub
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*/
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#define SH4_WITH_IPL
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#define SH4_SCI 1 /* Serial Communication Interface - SCI */
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#define SH4_SCIF 2 /* Serial Communication Interface with FIFO - SCIF */
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#define TRANSMIT_TRIGGER_VALUE(ttrg) ((ttrg) == SH7750_SCFCR2_RTRG_1 ? 1 : \
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(ttrg) == SH7750_SCFCR2_RTRG_4 ? 4 : \
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(ttrg) == SH7750_SCFCR2_RTRG_8 ? 8 : 14)
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/*
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* Macros to call UART registers
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*/
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#define SCRDR(n) (*(volatile rtems_unsigned8 *)SH7750_SCRDR(n))
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#define SCRDR1 SCRDR(1)
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#define SCRDR2 SCRDR(2)
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#define SCTDR(n) (*(volatile rtems_unsigned8 *)SH7750_SCTDR(n))
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#define SCTDR1 SCTDR(1)
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#define SCTDR2 SCTDR(2)
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#define SCSMR(n) ((n) == 1 ? *(volatile rtems_unsigned8 *)SH7750_SCSMR1 : \
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*(volatile rtems_unsigned16 *)SH7750_SCSMR2)
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#define SCSMR1 SCSMR(1)
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#define SCSMR2 SCSMR(2)
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#define SCSCR(n) ((n) == 1 ? *(volatile rtems_unsigned8 *)SH7750_SCSCR1 : \
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*(volatile rtems_unsigned16 *)SH7750_SCSCR2)
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#define SCSCR1 SCSCR(1)
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#define SCSCR2 SCSCR(2)
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#define SCSSR(n) ((n) == 1 ? *(volatile rtems_unsigned8 *)SH7750_SCSSR1 : \
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*(volatile rtems_unsigned16 *)SH7750_SCSSR2)
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#define SCSSR1 SCSSR(1)
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#define SCSSR2 SCSSR(2)
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#define SCSPTR1 (*(volatile rtems_unsigned8 *)SH7750_SCSPTR1)
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#define SCSPTR2 (*(volatile rtems_unsigned16 *)SH7750_SCSPTR2)
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#define SCBRR(n) (*(volatile rtems_unsigned8 *)SH7750_SCBRR(n))
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#define SCBRR1 SCBRR(1)
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#define SCBRR2 SCBRR(2)
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#define SCFCR2 (*(volatile rtems_unsigned16 *)SH7750_SCFCR2)
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#define SCFDR2 (*(volatile rtems_unsigned16 *)SH7750_SCFDR2)
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#define SCLSR2 (*(volatile rtems_unsigned16 *)SH7750_SCLSR2)
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#define IPRB (*(volatile rtems_unsigned16 *)SH7750_IPRB)
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#define IPRC (*(volatile rtems_unsigned16 *)SH7750_IPRC)
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/*
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* The following structure is a descriptor of single UART channel.
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* It contains the initialization information about channel and
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* current operating values
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*/
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typedef struct sh4uart {
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rtems_unsigned8 chn; /* UART channel number */
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rtems_unsigned8 int_driven; /* UART interrupt vector number, or
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0 if polled I/O */
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void *tty; /* termios channel descriptor */
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volatile const char *tx_buf; /* Transmit buffer from termios */
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volatile rtems_unsigned32 tx_buf_len; /* Transmit buffer length */
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volatile rtems_unsigned32 tx_ptr; /* Index of next char to transmit*/
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rtems_isr_entry old_handler_transmit; /* Saved interrupt handlers */
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rtems_isr_entry old_handler_receive;
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tcflag_t c_iflag; /* termios input mode flags */
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rtems_boolean parerr_mark_flag; /* Parity error processing state */
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} sh4uart;
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/*
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* Functions from sh4uart.c
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*/
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/* sh4uart_init --
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* This function verifies the input parameters and perform initialization
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* of the Motorola Coldfire on-chip UART descriptor structure.
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*
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*/
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rtems_status_code
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sh4uart_init(sh4uart *uart, void *tty, int chn, int int_driven);
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/* sh4uart_reset --
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* This function perform the hardware initialization of Motorola
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* Coldfire processor on-chip UART controller using parameters
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* filled by the sh4uart_init function.
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*/
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rtems_status_code
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sh4uart_reset(sh4uart *uart);
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/* sh4uart_disable --
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* This function disable the operations on Motorola Coldfire UART
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* controller
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*/
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rtems_status_code
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sh4uart_disable(sh4uart *uart);
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/* sh4uart_set_attributes --
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* This function parse the termios attributes structure and perform
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* the appropriate settings in hardware.
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*/
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rtems_status_code
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sh4uart_set_attributes(sh4uart *mcf, const struct termios *t);
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/* sh4uart_poll_read --
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* This function tried to read character from MCF UART and perform
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* error handling.
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*/
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int
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sh4uart_poll_read(sh4uart *uart);
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#ifdef SH4_WITH_IPL
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/* ipl_console_poll_read --
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* This function tried to read character from MCF UART over SH-IPL.
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*/
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int
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ipl_console_poll_read(int minor);
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/* sh4uart_interrupt_write --
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* This function initiate transmitting of the buffer in interrupt mode.
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*/
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rtems_status_code
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sh4uart_interrupt_write(sh4uart *uart, const char *buf, int len);
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/* sh4uart_poll_write --
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* This function transmit buffer byte-by-byte in polling mode.
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*/
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int
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sh4uart_poll_write(sh4uart *uart, const char *buf, int len);
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/* ipl_console_poll_write --
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* This function transmit buffer byte-by-byte in polling mode over SH-IPL.
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*/
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int
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ipl_console_poll_write(int minor, const char *buf, int len);
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/*
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* ipl_finish --
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* Says gdb that program finished to get out from it.
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*/
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extern void ipl_finish(void);
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#endif
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/* sh4uart_stop_remote_tx --
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* This function stop data flow from remote device.
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*/
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rtems_status_code
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sh4uart_stop_remote_tx(sh4uart *uart);
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/* sh4uart_start_remote_tx --
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* This function resume data flow from remote device.
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*/
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rtems_status_code
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sh4uart_start_remote_tx(sh4uart *uart);
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/* Descriptor structures for two on-chip UART channels */
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extern sh4uart sh4_uarts[2];
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#endif
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@@ -6,7 +6,7 @@ AUTOMAKE_OPTIONS = foreign 1.4
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PGM = $(ARCH)/sci.rel
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C_FILES = console.c sh4uart.c
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C_FILES = sh4uart.c
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C_O_FILES = $(C_FILES:%.c=$(ARCH)/%.o)
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OBJS = $(C_O_FILES)
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@@ -26,4 +26,8 @@ all-local: $(ARCH) $(OBJS) $(PGM)
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.PRECIOUS: $(PGM)
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## FIXME: Moved to libbsp/sh/<BSP>/console/
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## Needs to be reworked to be usable here.
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EXTRA_DIST = console.c
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include $(top_srcdir)/../../../../../../automake/local.am
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@@ -1,9 +1,6 @@
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/*
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* Generic UART Serial driver for SH-4 processors
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*
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* This driver uses variable SH4_CPU_HZ_Frequency,
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* which should be defined in bsp to HZ macro.
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*
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* Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russian Fed.
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* Author: Alexandra Kossovsky <sasha@oktet.ru>
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*
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@@ -22,12 +19,17 @@
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#include <rtems.h>
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#include <termios.h>
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#include <rtems/libio.h>
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#include "sh/sh4uart.h"
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#include <sh/sh4uart.h>
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#ifndef SH4_UART_INTERRUPT_LEVEL
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#define SH4_UART_INTERRUPT_LEVEL 4
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#endif
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/* FIXME: ???
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#define SH7750_SCSMR_CKS_S SH7750_SCSMR_CKS_DIV1
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*/
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#define SH7750_SCSMR_CKS_S 0
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/* Forward function declarations */
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static rtems_isr
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sh4uart1_interrupt_transmit(rtems_vector_number vec);
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@@ -86,7 +88,7 @@ rtems_unsigned32
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sh4uart_get_Pph(void)
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{
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rtems_unsigned16 frqcr = *(volatile rtems_unsigned16 *)SH7750_FRQCR;
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rtems_unsigned32 Pph = SH4_CPU_HZ_Frequency;
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rtems_unsigned32 Pph = rtems_cpu_configuration_get_clicks_per_second() ;
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switch (frqcr & SH7750_FRQCR_IFC)
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{
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@@ -41,10 +41,6 @@
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#include <rtems/score/shtypes.h>
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#include <rtems/score/isr.h>
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#if !defined (sh7750)
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#error Wrong CPU MODEL
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#endif
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/*
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* This is a exception vector table
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*
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@@ -53,6 +49,7 @@
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#include <rtems/score/ispsh7750.h>
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#include <rtems/score/sh4_regs.h>
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#include <rtems/score/sh7750_regs.h>
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/* VBR register contents saved on startup -- used to hook exception by debug
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||||
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||||
Reference in New Issue
Block a user