forked from Imagelibrary/rtems
bsp/arm: Correct L2 cache enable method
This commit is contained in:
committed by
Sebastian Huber
parent
62fa1ea25e
commit
127634c358
@@ -1275,9 +1275,12 @@ static inline void
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cache_l2c_310_enable( void )
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{
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volatile L2CC *l2cc = (volatile L2CC *) BSP_ARM_L2CC_BASE;
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uint32_t cache_id = l2cc->cache_id & CACHE_L2C_310_L2CC_ID_PART_MASK;
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int ways = 0;
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/* Only enable if L2CC is currently disabled */
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if( ( l2cc->ctrl & CACHE_L2C_310_L2CC_ENABLE_MASK ) == 0 ) {
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uint32_t cache_id =
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l2cc->cache_id & CACHE_L2C_310_L2CC_ID_PART_MASK;
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int ways = 0;
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/* Do we actually have an L2C-310 cache controller?
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* Has BSP_ARM_L2CC_BASE been configured correctly? */
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@@ -1323,14 +1326,8 @@ cache_l2c_310_enable( void )
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}
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if ( ways > 0 ) {
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/* Only enable if L2CC is currently disabled */
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if ( ways != 0
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&& ( l2cc->ctrl & CACHE_L2C_310_L2CC_ENABLE_MASK ) == 0 ) {
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rtems_interrupt_level level;
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uint32_t aux;
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rtems_interrupt_disable( level );
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/* Set up the way size */
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aux = l2cc->aux_ctrl;
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aux &= CACHE_L2C_310_L2CC_AUX_REG_ZERO_MASK; /* Set way_size to 0 */
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@@ -1362,8 +1359,6 @@ cache_l2c_310_enable( void )
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/* Enable the L2CC */
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l2cc->ctrl |= CACHE_L2C_310_L2CC_ENABLE_MASK;
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rtems_interrupt_enable( level );
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}
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}
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}
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