./clock/Makefile.in,v

./clock/clock.c,v
./console/Makefile.in,v
./console/config.c,v
./console/console.c,v
./console/console.h,v
./console/debugio.c,v
./console/i8042.c,v
./console/i8042_p.h,v
./console/i8042vga.c,v
./console/i8042vga.h,v
./console/ns16550.c,v
./console/ns16550.h,v
./console/ns16550_p.h,v
./console/ns16550cfg.c,v
./console/ns16550cfg.h,v
./console/vga.c,v
./console/vga_p.h,v
./console/z85c30.c,v
./console/z85c30.h,v
./console/z85c30_p.h,v
./console/z85c30cfg.c,v
./console/z85c30cfg.h,v
./include/Makefile.in,v
./include/bsp.h,v
./include/chain.h,v
./include/coverhd.h,v
./include/extisrdrv.h,v
./include/nvram.h,v
./include/pci.h,v
./include/tod.h,v
./network/Makefile.in,v
./network/amd79c970.c,v
./network/amd79c970.h,v
./nvram/Makefile.in,v
./nvram/ds1385.h,v
./nvram/mk48t18.h,v
./nvram/nvram.c,v
./nvram/prepnvr.h,v
./nvram/stk11c68.h,v
./pci/Makefile.in,v
./pci/pci.c,v
./start/Makefile.in,v
./start/start.s,v
./startup/Makefile.in,v
./startup/bspclean.c,v
./startup/bspstart.c,v
./startup/bsptrap.s,v
./startup/device-tree,v
./startup/genpvec.c,v
./startup/linkcmds,v
./startup/rtems-ctor.cc,v
./startup/sbrk.c,v
./startup/setvec.c,v
./startup/spurious.c,v
./startup/swap.c,v
./timer/Makefile.in,v
./timer/timer.c,v
./tod/Makefile.in,v
./tod/cmos.h,v
./tod/tod.c,v
./universe/Makefile.in,v
./universe/universe.c,v
./vectors/Makefile.in,v
./vectors/README,v
./vectors/align_h.s,v
./vectors/vectors.s,v
./wrapup/Makefile.in,v
./Makefile.in,v
./README,v
./STATUS,v
./bsp_specs,v

make/custom/ppcn_60x.cfg

@@ -0,0 +1,111 @@
+#
+#  Config file for a Radstone Technology Plc. PowerPC 60x based VME board
+#
+#  $Id: ppcn_60x.cfg
+#
+
+include $(RTEMS_ROOT)/make/custom/default.cfg
+
+RTEMS_CPU=powerpc
+RTEMS_CPU_MODEL=ppc603e
+
+# This is the actual bsp directory used during the build process.
+
+RTEMS_BSP_FAMILY=ppcn_60x
+
+RTEMS_BSP=ppcn_60x
+
+#  This contains the compiler options necessary to select the CPU model
+#  This section makes the target dependent options file.
+
+#  NDEBUG (C library)
+#     if defined asserts do not generate code.  This is commonly used
+#     as a command line option.
+#
+#  RTEMS_TEST_NO_PAUSE (RTEMS tests)
+#     do not pause between screens of output in the rtems tests
+#
+#  RTEMS_DEBUG (RTEMS)
+#     If defined, debug checks in RTEMS and support library code are enabled.
+#
+#  PPCN_60X_USE_DINK           (ppcn_60x_bsp)
+#  PPCN_60X_USE_NONE          (ppcn_60x_bsp)
+#     The Score603e board can be configured with 3 ROM monitors.  Only two
+#     are appropriate for use with RTEMS.  Set exactly one of these to "1"
+#     to indicate which ROM monitor is on the board you are using.
+#
+#  PPC_VECTOR_FILE_BASE (ppc)
+#     This defines the base address of the exception table.
+#     NOTE: Vectors are actually at 0xFFF00000 but file starts at offset 0x0100
+#
+#  PPC_ABI (ppc)
+#     This defines the calling convention (Application Binary Interface)
+#     used in this configuration.  EABI is the only one supported.
+#
+#  PPC_ASM (ppc)
+#     This defines the assembly language format used in this configuration.
+#     ELF is the only one supported.
+#
+#  PPC_USE_SPRG (RTEMS PowerPC port)
+#     If defined, then the PowerPC specific code in RTEMS will use some
+#     of the special purpose registers to slightly optimize interrupt
+#     response time.  The use of these registers can conflict with 
+#     other tools like debuggers.
+#
+#  PPC_USE_DATA_CACHE (RTEMS PowerPC port)
+#     If defined, then the PowerPC specific code in RTEMS will use 
+#     data cache instructions to optimize the context switch code.
+#     This code can conflict with debuggers or emulators.
+#
+
+define make-target-options
+	@echo "/* #define NDEBUG 1 */ "                        >>$@
+	@echo "#define RTEMS_TEST_NO_PAUSE 1"                  >>$@
+	@echo "/* #define RTEMS_DEBUG  1 */"                   >>$@
+	@echo "#define PPCN_60X_USE_DINK 1"                   >>$@
+	@echo "#define PPCN_60X_USE_NONE 0"                   >>$@
+	@echo "#define PPC_USE_DATA_CACHE 1"                   >>$@
+	@echo "#define PPC_VECTOR_FILE_BASE 0x0100"            >>$@
+	@echo "#define PPC_ABI PPC_ABI_EABI"                   >>$@
+	@echo "#define PPC_ASM PPC_ASM_ELF"                    >>$@
+	@echo "#define PPC_USE_SPRG  0"                        >>$@
+endef
+
+#  This contains the compiler options necessary to select the CPU model
+#  and (hopefully) optimize for it. 
+#
+CPU_CFLAGS = -mcpu=603
+
+# Define this to yes if this target supports multiprocessor environments.
+HAS_MP=no
+
+# optimize flag: typically -0, could use -O4 or -fast
+# -O4 is ok for RTEMS
+# NOTE: some level of -O may be actually required by inline assembler
+CFLAGS_OPTIMIZE_V=-O0 -fno-keep-inline-functions -fvolatile-global -fvolatile
+#CFLAGS_OPTIMIZE_V=-O4 -fno-keep-inline-functions -fvolatile-global -fvolatile
+
+# The following is a linkcmds file which will work without using the
+# -specs system in gcc 2.8.
+#       $(LD) $(XLDFLAGS) -T $(LINKCMDS) \
+#         -o $@ -u atexit -u __vectors -u download_entry $(LINK_FILES)
+#       $(LD) $(XLDFLAGS) -Ttext 0x20000 \
+#         -o $@ -u atexit -u __vectors -u download_entry $(LINK_FILES)
+
+#       $(CC) -mmvme -mrtems -nostartfiles -mcpu=603 \
+#           -o $(basename $@).exe -L $(PROJECT_RELEASE)/lib \
+#            $(START_FILE) $(LINK_OBJS) \
+#            $(LD_LIBS) \
+#           -Wl,-\( -Wl,-lc -Wl,-lrtemsall -Wl,-lgcc -Wl,-\)
+define make-exe
+	$(CC) $(CFLAGS) -o $(basename $@).exe $(LINK_OBJS) $(LINK_LIBS)
+	$(NM) -g -n $(basename $@).exe > $(basename $@).num
+	$(SIZE) $(basename $@).exe
+endef
+
+# Miscellaneous additions go here
+
+# No start file
+START_BASE=
+
+DRIVER_ARCHITECTURE=vmebus