forked from Imagelibrary/rtems
bsp/atsam: Add option to disable 32kHz XTAL.
This commit is contained in:
committed by
Christian Mauderer
parent
a3eec5cf35
commit
03fecae9c4
@@ -43,6 +43,10 @@ const struct BOARD_Sdram_Config BOARD_Sdram_Config = {
|
||||
};
|
||||
--------
|
||||
|
||||
Use ATSAM_SLOWCLOCK_USE_XTAL=0 to disable the usage of the external 32kHz
|
||||
oscillator for the slow clock. This is useful for example for the SAM E70
|
||||
Xplained kit.
|
||||
|
||||
Use ATSAM_CONSOLE_BAUD=XYZ to set the initial baud for console devices (default
|
||||
115200).
|
||||
|
||||
|
||||
@@ -72,6 +72,14 @@ RTEMS_BSPOPTS_HELP([ATSAM_MCK],
|
||||
[Frequency of the MCK in Hz. Set to 0 to force application defined speed.
|
||||
See startup/pmc-config.c for available clock configurations.])
|
||||
|
||||
RTEMS_BSPOPTS_SET([ATSAM_SLOWCLOCK_USE_XTAL],[*],[1])
|
||||
RTEMS_BSPOPTS_HELP([ATSAM_SLOWCLOCK_USE_XTAL],
|
||||
[Use the external crystal as source for the slow clock instead of the internal
|
||||
RC oscillator. Note that on the ATSAM the NRST pin seems to depend on the slow
|
||||
clock as well as all watchdogs. If ATSAM_SLOWCLOCK_USE_XTAL is set to 1 without
|
||||
a external crystal connected, the controller might hang in the switching process
|
||||
without a working NRST pin. ])
|
||||
|
||||
RTEMS_BSPOPTS_SET([ATSAM_CHANGE_CLOCK_FROM_SRAM],[*],[0])
|
||||
RTEMS_BSPOPTS_HELP([ATSAM_CHANGE_CLOCK_FROM_SRAM],
|
||||
[Move the functions that set up the clock into the SRAM.
|
||||
|
||||
@@ -93,6 +93,7 @@ extern "C" {
|
||||
* OSC
|
||||
*/
|
||||
|
||||
#if ATSAM_SLOWCLOCK_USE_XTAL == 1
|
||||
read_MOR = PMC->CKGR_MOR;
|
||||
/* enable external crystal - enable RC OSC */
|
||||
read_MOR |= (CKGR_MOR_KEY_PASSWD | CKGR_MOR_XT32KFME);
|
||||
@@ -104,6 +105,7 @@ extern "C" {
|
||||
|
||||
while (!(SUPC->SUPC_SR & SUPC_SR_OSCSEL));
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Initialize main oscillator */
|
||||
if (!(PMC->CKGR_MOR & CKGR_MOR_MOSCSEL)) {
|
||||
|
||||
Reference in New Issue
Block a user