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score: Statically initialize _ISR_Vector_table

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This commit is contained in:
Sebastian Huber
2014-04-26 15:09:10 +02:00
parent a16af0b367
commit 03b7789ec7
21 changed files with 28 additions and 149 deletions
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1
c/src/lib/libbsp/mips/shared/irq/exception.S
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@@ -88,7 +88,6 @@
.extern _Thread_Dispatch
.extern _ISR_Vector_table
/* void __ISR_Handler()
*

2
c/src/lib/libbsp/sparc/shared/irq_asm.S
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@@ -423,7 +423,7 @@ dont_fix_pil2:
*/
sethi %hi(SYM(_ISR_Vector_table)), %g4
ld [%g4+%lo(SYM(_ISR_Vector_table))], %g4
or %g4, %lo(SYM(_ISR_Vector_table)), %g4
and %l3, 0xFF, %g5 ! remove synchronous trap indicator
sll %g5, 2, %g5 ! g5 = offset into table
ld [%g4 + %g5], %g4 ! g4 = _ISR_Vector_table[ vector ]

1
c/src/lib/libcpu/sparc64/shared/score/interrupt.S
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@@ -249,7 +249,6 @@ PUBLIC(_ISR_Handler)
* we just enabled traps. It is definitely in g2.
*/
setx SYM(_ISR_Vector_table), %o5, %g1
ldx [%g1], %g1
and %g2, 0x1FF, %o5 ! remove synchronous trap indicator
sll %o5, 3, %o5 ! o5 = offset into table
ldx [%g1 + %o5], %g1 ! g1 = _ISR_Vector_table[ vector ]

28
cpukit/sapi/include/confdefs.h
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@@ -2283,31 +2283,6 @@ const rtems_libio_helper rtems_fs_init_helper =
#define CONFIGURE_MEMORY_OVERHEAD 0
#endif
/**
* On architectures that use Simple Vectored Interrupts, it is RTEMS
* responsibility to allocate the vector table. This avoids reserving
* the memory on architectures that use the Programmable Interrupt
* Controller Vectored Interrupts.
*/
#if (CPU_SIMPLE_VECTORED_INTERRUPTS == TRUE)
/*
* This is a (hopefully) temporary hack. On the mips, the number of
* vectors is NOT statically defined. But it has to be statically
* defined for this to work. This is an issue looking for a nice
* solution.
*/
#if defined(__mips__)
#define CONFIGURE_INTERRUPT_VECTOR_TABLE \
_Configure_From_workspace( (sizeof(ISR_Handler_entry) * 256))
#else
#define CONFIGURE_INTERRUPT_VECTOR_TABLE \
_Configure_From_workspace( \
(sizeof(ISR_Handler_entry) * ISR_NUMBER_OF_VECTORS))
#endif
#else
#define CONFIGURE_INTERRUPT_VECTOR_TABLE 0
#endif
/**
* RTEMS uses two instance of an internal mutex class. This accounts
* for these mutexes.
@@ -2337,7 +2312,6 @@ const rtems_libio_helper rtems_fs_init_helper =
*/
#define CONFIGURE_MEMORY_FOR_SYSTEM_OVERHEAD \
( CONFIGURE_MEMORY_FOR_IDLE_TASK + /* IDLE and stack */ \
CONFIGURE_INTERRUPT_VECTOR_TABLE + /* interrupt vectors */ \
CONFIGURE_INTERRUPT_STACK_MEMORY + /* interrupt stack */ \
CONFIGURE_API_MUTEX_MEMORY /* allocation mutex */ \
)
@@ -2755,7 +2729,6 @@ const rtems_libio_helper rtems_fs_init_helper =
uint32_t POSIX;
/* System overhead pieces */
uint32_t INTERRUPT_VECTOR_TABLE;
uint32_t INTERRUPT_STACK_MEMORY;
uint32_t MEMORY_FOR_IDLE_TASK;
@@ -2810,7 +2783,6 @@ const rtems_libio_helper rtems_fs_init_helper =
CONFIGURE_MEMORY_FOR_POSIX,
/* System overhead pieces */
CONFIGURE_INTERRUPT_VECTOR_TABLE,
CONFIGURE_INTERRUPT_STACK_MEMORY,
CONFIGURE_MEMORY_FOR_IDLE_TASK,

4
cpukit/score/cpu/arm/rtems/score/cpu.h
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@@ -171,10 +171,6 @@
#define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 0
#define CPU_INTERRUPT_NUMBER_OF_VECTORS 8
#define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1)
#define CPU_PROVIDES_ISR_IS_IN_PROGRESS FALSE
#define CPU_STACK_MINIMUM_SIZE (1024 * 4)

5
cpukit/score/cpu/bfin/cpu_asm.S
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@@ -359,9 +359,8 @@ vectorIDLoop:
if !cc jump vectorIDLoop;
[--sp] = r2;
p0.h = SYM(_ISR_Vector_table);
p0.l = SYM(_ISR_Vector_table);
r2 = [p0];
r2.h = SYM(_ISR_Vector_table);
r2.l = SYM(_ISR_Vector_table);
r1 = r0 << 2;
r1 = r1 + r2;
p0 = r1;

4
cpukit/score/cpu/h8300/cpu_asm.S
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@@ -133,12 +133,10 @@ nested:
/* Vector to ISR */
mov.l @SYM(_ISR_Vector_table),er1
mov er0,er2 ; copy vector
shll.l er2
shll.l er2 ; vector = vector * 4 (sizeof(int))
add.l er2,er1
mov.l @er1,er1
mov.l @(SYM(_ISR_Vector_table), er2),er1
jsr @er1 ; er0 = arg1 =vector
orc #0xc0,ccr

7
cpukit/score/cpu/i386/rtems/score/cpu.h
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@@ -315,13 +315,6 @@ SCORE_EXTERN Context_Control_fp _CPU_Null_fp_context;
#define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 1024
/*
* i386 family supports 256 distinct vectors.
*/
#define CPU_INTERRUPT_NUMBER_OF_VECTORS 256
#define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1)
/*
* This is defined if the port has a special way to report the ISR nesting
* level. Most ports maintain the variable _ISR_Nest_level.

9
cpukit/score/cpu/m68k/cpu_asm.S
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@@ -276,13 +276,8 @@ SYM (_ISR_Handler):
addql #1,ISR_NEST_LEVEL | one nest level deeper
movel SYM (_ISR_Vector_table),a0 | a0= base of RTEMS table
#if ( M68K_HAS_PREINDEXING == 1 )
movel (a0,d0:w:1),a0 | a0 = address of user routine
#else
addal d0,a0 | a0 = address of vector
movel (a0),a0 | a0 = address of user routine
#endif
lea SYM(_ISR_Vector_table),a0
movel (a0,d0),a0 | a0 = address of user routine
lsrl #2,d0 | d0 = vector number
movel d0,a7@- | push vector number

1
cpukit/score/cpu/mips/cpu_asm.S
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@@ -583,7 +583,6 @@ FRAME(_CPU_Context_restore,sp,0,ra)
ENDFRAME(_CPU_Context_restore)
.extern _Thread_Dispatch
.extern _ISR_Vector_table
/* void _DBG_Handler()
*

9
cpukit/score/cpu/mips/rtems/score/cpu.h
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@@ -659,15 +659,6 @@ SCORE_EXTERN Context_Control_fp _CPU_Null_fp_context;
#define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 0
/*
* This defines the number of entries in the ISR_Vector_table managed
* by RTEMS.
*/
extern unsigned int mips_interrupt_number_of_vectors;
#define CPU_INTERRUPT_NUMBER_OF_VECTORS (mips_interrupt_number_of_vectors)
#define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1)
/*
* Should be large enough to run all RTEMS tests. This ensures
* that a "reasonable" small application should not have any problems.

1
cpukit/score/cpu/nios2/Makefile.am
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@@ -33,7 +33,6 @@ libscorecpu_a_SOURCES += nios2-fatal-halt.c
libscorecpu_a_SOURCES += nios2-iic-low-level.S
libscorecpu_a_SOURCES += nios2-iic-irq.c
libscorecpu_a_SOURCES += nios2-initialize.c
libscorecpu_a_SOURCES += nios2-initialize-vectors.c
libscorecpu_a_SOURCES += nios2-isr-get-level.c
libscorecpu_a_SOURCES += nios2-isr-install-raw-handler.c
libscorecpu_a_SOURCES += nios2-isr-install-vector.c

25
cpukit/score/cpu/nios2/nios2-initialize-vectors.c
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@@ -1,25 +0,0 @@
/*
* Copyright (c) 2011 embedded brains GmbH
*
* Copyright (c) 2006 Kolja Waschk (rtemsdev/ixo.de)
*
* COPYRIGHT (c) 1989-2006
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#include <rtems/score/isr.h>
#include <string.h>
void _CPU_Initialize_vectors( void )
{
memset(_ISR_Vector_table, 0, sizeof(ISR_Handler_entry) * ISR_NUMBER_OF_VECTORS);
}

2
cpukit/score/cpu/nios2/rtems/score/cpu.h
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@@ -192,7 +192,7 @@ typedef struct {
uint32_t ipending;
} CPU_Exception_frame;
void _CPU_Initialize_vectors( void );
#define _CPU_Initialize_vectors()
/**
* @brief Macro to disable interrupts.

17
cpukit/score/cpu/no_cpu/rtems/score/cpu.h
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@@ -686,19 +686,24 @@ SCORE_EXTERN Context_Control_fp _CPU_Null_fp_context;
/**
* @ingroup CPUInterrupt
*
* This defines the number of entries in the @ref _ISR_Vector_table managed
* by RTEMS.
* This defines the number of entries in the _ISR_Vector_table managed by RTEMS
* in case CPU_SIMPLE_VECTORED_INTERRUPTS is defined to TRUE. It must be a
* compile-time constant.
*
* Port Specific Information:
*
* XXX document implementation including references if appropriate
* It must be undefined in case CPU_SIMPLE_VECTORED_INTERRUPTS is defined to
* FALSE.
*/
#define CPU_INTERRUPT_NUMBER_OF_VECTORS 32
/**
* @ingroup CPUInterrupt
*
* This defines the highest interrupt vector number for this port.
* This defines the highest interrupt vector number for this port in case
* CPU_SIMPLE_VECTORED_INTERRUPTS is defined to TRUE. It must be less than
* CPU_INTERRUPT_NUMBER_OF_VECTORS. It may be not a compile-time constant.
*
* It must be undefined in case CPU_SIMPLE_VECTORED_INTERRUPTS is defined to
* FALSE.
*/
#define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1)

10
cpukit/score/cpu/powerpc/rtems/score/cpu.h
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@@ -598,16 +598,6 @@ SCORE_EXTERN struct {
#define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 0
/*
* This defines the number of entries in the ISR_Vector_table managed
* by RTEMS.
*
* NOTE: CPU_INTERRUPT_NUMBER_OF_VECTORS and
* CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER are only used on
* Simple Vectored Architectures and thus are not defined
* for this architecture.
*/
/*
* This is defined if the port has a special way to report the ISR nesting
* level. Most ports maintain the variable _ISR_Nest_level. Note that

19
cpukit/score/cpu/v850/rtems/score/cpu.h
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@@ -549,25 +549,6 @@ typedef struct {
*/
#define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 0
/* XXX this should not be needed on PIC architectures */
/* XXX evaluate removing it */
#if 0
/**
* This defines the number of entries in the @ref _ISR_Vector_table managed
* by RTEMS.
*
* Port Specific Information:
*
* XXX document implementation including references if appropriate
*/
#define CPU_INTERRUPT_NUMBER_OF_VECTORS 32
#endif
/**
* This defines the highest interrupt vector number for this port.
*/
#define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1)
/**
* This is defined if the port has a special way to report the ISR nesting
* level. Most ports maintain the variable @a _ISR_Nest_level.

14
cpukit/score/include/rtems/score/isr.h
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@@ -70,23 +70,11 @@ typedef ISR_Handler ( *ISR_Handler_entry )(
);
#endif
/**
* This constant promotes out the number of vectors truly supported by
* the current CPU being used. This is usually the number of distinct vectors
* the cpu can vector.
*/
#define ISR_NUMBER_OF_VECTORS CPU_INTERRUPT_NUMBER_OF_VECTORS
/**
* This constant promotes out the highest valid interrupt vector number.
*/
#define ISR_INTERRUPT_MAXIMUM_VECTOR_NUMBER CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER
/**
* The following declares the Vector Table. Application
* interrupt service routines are vectored by the ISR Handler via this table.
*/
SCORE_EXTERN ISR_Handler_entry *_ISR_Vector_table;
extern ISR_Handler_entry _ISR_Vector_table[ CPU_INTERRUPT_NUMBER_OF_VECTORS ];
#endif
/**

12
cpukit/score/src/isr.c
View File

@@ -26,15 +26,19 @@
#include <rtems/score/wkspace.h>
#include <rtems/config.h>
#if (CPU_SIMPLE_VECTORED_INTERRUPTS == TRUE)
ISR_Handler_entry _ISR_Vector_table[ CPU_INTERRUPT_NUMBER_OF_VECTORS ];
#elif defined(CPU_INTERRUPT_NUMBER_OF_VECTORS)
#error "CPU_INTERRUPT_NUMBER_OF_VECTORS is defined for non-simple vectored interrupts"
#elif defined(CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER)
#error "CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER is defined for non-simple vectored interrupts"
#endif
void _ISR_Handler_initialization( void )
{
_ISR_Nest_level = 0;
#if (CPU_SIMPLE_VECTORED_INTERRUPTS == TRUE)
_ISR_Vector_table = _Workspace_Allocate_or_fatal_error(
sizeof(ISR_Handler_entry) * ISR_NUMBER_OF_VECTORS
);
_CPU_Initialize_vectors();
#endif

4
testsuites/sptests/spfatal07/testcase.h
View File

@@ -37,10 +37,6 @@ rtems_initialization_tasks_table Initialization_tasks[] = {
#define FATAL_ERROR_EXPECTED_ERROR \
INTERNAL_ERROR_INTERRUPT_STACK_TOO_SMALL
#if CPU_SIMPLE_VECTORED_INTERRUPTS == TRUE
#define CONFIGURE_MEMORY_OVERHEAD (sizeof(ISR_Handler_entry) * ISR_NUMBER_OF_VECTORS)
#endif
#if CPU_ALLOCATE_INTERRUPT_STACK == TRUE
#define CONFIGURE_INTERRUPT_STACK_SIZE (STACK_MINIMUM_SIZE - 1)
#endif

2
testsuites/sptests/spintr_err01/init.c
View File

@@ -36,7 +36,7 @@ rtems_task Init(
rtems_isr_entry old_service_routine;
status = rtems_interrupt_catch(
Service_routine,
ISR_INTERRUPT_MAXIMUM_VECTOR_NUMBER + 10,
CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER + 1,
&old_service_routine
);
fatal_directive_status(