forked from Imagelibrary/rtems
score: Statically initialize _ISR_Vector_table
This commit is contained in:
@@ -88,7 +88,6 @@
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.extern _Thread_Dispatch
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.extern _Thread_Dispatch
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.extern _ISR_Vector_table
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/* void __ISR_Handler()
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/* void __ISR_Handler()
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*
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*
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@@ -423,7 +423,7 @@ dont_fix_pil2:
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*/
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*/
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sethi %hi(SYM(_ISR_Vector_table)), %g4
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sethi %hi(SYM(_ISR_Vector_table)), %g4
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ld [%g4+%lo(SYM(_ISR_Vector_table))], %g4
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or %g4, %lo(SYM(_ISR_Vector_table)), %g4
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and %l3, 0xFF, %g5 ! remove synchronous trap indicator
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and %l3, 0xFF, %g5 ! remove synchronous trap indicator
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sll %g5, 2, %g5 ! g5 = offset into table
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sll %g5, 2, %g5 ! g5 = offset into table
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ld [%g4 + %g5], %g4 ! g4 = _ISR_Vector_table[ vector ]
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ld [%g4 + %g5], %g4 ! g4 = _ISR_Vector_table[ vector ]
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@@ -249,7 +249,6 @@ PUBLIC(_ISR_Handler)
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* we just enabled traps. It is definitely in g2.
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* we just enabled traps. It is definitely in g2.
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*/
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*/
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setx SYM(_ISR_Vector_table), %o5, %g1
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setx SYM(_ISR_Vector_table), %o5, %g1
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ldx [%g1], %g1
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and %g2, 0x1FF, %o5 ! remove synchronous trap indicator
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and %g2, 0x1FF, %o5 ! remove synchronous trap indicator
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sll %o5, 3, %o5 ! o5 = offset into table
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sll %o5, 3, %o5 ! o5 = offset into table
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ldx [%g1 + %o5], %g1 ! g1 = _ISR_Vector_table[ vector ]
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ldx [%g1 + %o5], %g1 ! g1 = _ISR_Vector_table[ vector ]
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@@ -2283,31 +2283,6 @@ const rtems_libio_helper rtems_fs_init_helper =
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#define CONFIGURE_MEMORY_OVERHEAD 0
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#define CONFIGURE_MEMORY_OVERHEAD 0
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#endif
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#endif
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/**
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* On architectures that use Simple Vectored Interrupts, it is RTEMS
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* responsibility to allocate the vector table. This avoids reserving
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* the memory on architectures that use the Programmable Interrupt
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* Controller Vectored Interrupts.
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*/
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#if (CPU_SIMPLE_VECTORED_INTERRUPTS == TRUE)
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/*
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* This is a (hopefully) temporary hack. On the mips, the number of
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* vectors is NOT statically defined. But it has to be statically
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* defined for this to work. This is an issue looking for a nice
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* solution.
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*/
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#if defined(__mips__)
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#define CONFIGURE_INTERRUPT_VECTOR_TABLE \
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_Configure_From_workspace( (sizeof(ISR_Handler_entry) * 256))
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#else
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#define CONFIGURE_INTERRUPT_VECTOR_TABLE \
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_Configure_From_workspace( \
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(sizeof(ISR_Handler_entry) * ISR_NUMBER_OF_VECTORS))
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#endif
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#else
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#define CONFIGURE_INTERRUPT_VECTOR_TABLE 0
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#endif
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/**
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/**
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* RTEMS uses two instance of an internal mutex class. This accounts
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* RTEMS uses two instance of an internal mutex class. This accounts
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* for these mutexes.
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* for these mutexes.
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@@ -2337,7 +2312,6 @@ const rtems_libio_helper rtems_fs_init_helper =
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*/
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*/
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#define CONFIGURE_MEMORY_FOR_SYSTEM_OVERHEAD \
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#define CONFIGURE_MEMORY_FOR_SYSTEM_OVERHEAD \
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( CONFIGURE_MEMORY_FOR_IDLE_TASK + /* IDLE and stack */ \
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( CONFIGURE_MEMORY_FOR_IDLE_TASK + /* IDLE and stack */ \
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CONFIGURE_INTERRUPT_VECTOR_TABLE + /* interrupt vectors */ \
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CONFIGURE_INTERRUPT_STACK_MEMORY + /* interrupt stack */ \
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CONFIGURE_INTERRUPT_STACK_MEMORY + /* interrupt stack */ \
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CONFIGURE_API_MUTEX_MEMORY /* allocation mutex */ \
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CONFIGURE_API_MUTEX_MEMORY /* allocation mutex */ \
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)
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)
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@@ -2755,7 +2729,6 @@ const rtems_libio_helper rtems_fs_init_helper =
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uint32_t POSIX;
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uint32_t POSIX;
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/* System overhead pieces */
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/* System overhead pieces */
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uint32_t INTERRUPT_VECTOR_TABLE;
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uint32_t INTERRUPT_STACK_MEMORY;
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uint32_t INTERRUPT_STACK_MEMORY;
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uint32_t MEMORY_FOR_IDLE_TASK;
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uint32_t MEMORY_FOR_IDLE_TASK;
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@@ -2810,7 +2783,6 @@ const rtems_libio_helper rtems_fs_init_helper =
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CONFIGURE_MEMORY_FOR_POSIX,
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CONFIGURE_MEMORY_FOR_POSIX,
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/* System overhead pieces */
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/* System overhead pieces */
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CONFIGURE_INTERRUPT_VECTOR_TABLE,
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CONFIGURE_INTERRUPT_STACK_MEMORY,
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CONFIGURE_INTERRUPT_STACK_MEMORY,
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CONFIGURE_MEMORY_FOR_IDLE_TASK,
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CONFIGURE_MEMORY_FOR_IDLE_TASK,
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@@ -171,10 +171,6 @@
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#define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 0
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#define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 0
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#define CPU_INTERRUPT_NUMBER_OF_VECTORS 8
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#define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1)
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#define CPU_PROVIDES_ISR_IS_IN_PROGRESS FALSE
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#define CPU_PROVIDES_ISR_IS_IN_PROGRESS FALSE
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#define CPU_STACK_MINIMUM_SIZE (1024 * 4)
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#define CPU_STACK_MINIMUM_SIZE (1024 * 4)
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@@ -359,9 +359,8 @@ vectorIDLoop:
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if !cc jump vectorIDLoop;
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if !cc jump vectorIDLoop;
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[--sp] = r2;
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[--sp] = r2;
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p0.h = SYM(_ISR_Vector_table);
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r2.h = SYM(_ISR_Vector_table);
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p0.l = SYM(_ISR_Vector_table);
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r2.l = SYM(_ISR_Vector_table);
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r2 = [p0];
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r1 = r0 << 2;
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r1 = r0 << 2;
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r1 = r1 + r2;
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r1 = r1 + r2;
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p0 = r1;
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p0 = r1;
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@@ -133,12 +133,10 @@ nested:
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/* Vector to ISR */
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/* Vector to ISR */
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mov.l @SYM(_ISR_Vector_table),er1
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mov er0,er2 ; copy vector
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mov er0,er2 ; copy vector
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shll.l er2
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shll.l er2
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shll.l er2 ; vector = vector * 4 (sizeof(int))
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shll.l er2 ; vector = vector * 4 (sizeof(int))
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add.l er2,er1
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mov.l @(SYM(_ISR_Vector_table), er2),er1
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mov.l @er1,er1
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jsr @er1 ; er0 = arg1 =vector
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jsr @er1 ; er0 = arg1 =vector
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orc #0xc0,ccr
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orc #0xc0,ccr
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@@ -315,13 +315,6 @@ SCORE_EXTERN Context_Control_fp _CPU_Null_fp_context;
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#define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 1024
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#define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 1024
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/*
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* i386 family supports 256 distinct vectors.
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*/
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#define CPU_INTERRUPT_NUMBER_OF_VECTORS 256
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#define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1)
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/*
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/*
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* This is defined if the port has a special way to report the ISR nesting
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* This is defined if the port has a special way to report the ISR nesting
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* level. Most ports maintain the variable _ISR_Nest_level.
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* level. Most ports maintain the variable _ISR_Nest_level.
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@@ -276,13 +276,8 @@ SYM (_ISR_Handler):
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addql #1,ISR_NEST_LEVEL | one nest level deeper
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addql #1,ISR_NEST_LEVEL | one nest level deeper
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movel SYM (_ISR_Vector_table),a0 | a0= base of RTEMS table
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lea SYM(_ISR_Vector_table),a0
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#if ( M68K_HAS_PREINDEXING == 1 )
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movel (a0,d0),a0 | a0 = address of user routine
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movel (a0,d0:w:1),a0 | a0 = address of user routine
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#else
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addal d0,a0 | a0 = address of vector
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movel (a0),a0 | a0 = address of user routine
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#endif
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lsrl #2,d0 | d0 = vector number
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lsrl #2,d0 | d0 = vector number
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movel d0,a7@- | push vector number
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movel d0,a7@- | push vector number
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@@ -583,7 +583,6 @@ FRAME(_CPU_Context_restore,sp,0,ra)
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ENDFRAME(_CPU_Context_restore)
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ENDFRAME(_CPU_Context_restore)
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.extern _Thread_Dispatch
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.extern _Thread_Dispatch
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.extern _ISR_Vector_table
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/* void _DBG_Handler()
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/* void _DBG_Handler()
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*
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*
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@@ -659,15 +659,6 @@ SCORE_EXTERN Context_Control_fp _CPU_Null_fp_context;
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#define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 0
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#define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 0
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/*
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* This defines the number of entries in the ISR_Vector_table managed
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* by RTEMS.
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*/
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extern unsigned int mips_interrupt_number_of_vectors;
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#define CPU_INTERRUPT_NUMBER_OF_VECTORS (mips_interrupt_number_of_vectors)
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#define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1)
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/*
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/*
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* Should be large enough to run all RTEMS tests. This ensures
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* Should be large enough to run all RTEMS tests. This ensures
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* that a "reasonable" small application should not have any problems.
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* that a "reasonable" small application should not have any problems.
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@@ -33,7 +33,6 @@ libscorecpu_a_SOURCES += nios2-fatal-halt.c
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libscorecpu_a_SOURCES += nios2-iic-low-level.S
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libscorecpu_a_SOURCES += nios2-iic-low-level.S
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libscorecpu_a_SOURCES += nios2-iic-irq.c
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libscorecpu_a_SOURCES += nios2-iic-irq.c
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libscorecpu_a_SOURCES += nios2-initialize.c
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libscorecpu_a_SOURCES += nios2-initialize.c
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libscorecpu_a_SOURCES += nios2-initialize-vectors.c
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libscorecpu_a_SOURCES += nios2-isr-get-level.c
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libscorecpu_a_SOURCES += nios2-isr-get-level.c
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libscorecpu_a_SOURCES += nios2-isr-install-raw-handler.c
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libscorecpu_a_SOURCES += nios2-isr-install-raw-handler.c
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libscorecpu_a_SOURCES += nios2-isr-install-vector.c
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libscorecpu_a_SOURCES += nios2-isr-install-vector.c
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@@ -1,25 +0,0 @@
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/*
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* Copyright (c) 2011 embedded brains GmbH
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*
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* Copyright (c) 2006 Kolja Waschk (rtemsdev/ixo.de)
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*
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* COPYRIGHT (c) 1989-2006
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* On-Line Applications Research Corporation (OAR).
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include <rtems/score/isr.h>
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#include <string.h>
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void _CPU_Initialize_vectors( void )
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{
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memset(_ISR_Vector_table, 0, sizeof(ISR_Handler_entry) * ISR_NUMBER_OF_VECTORS);
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}
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@@ -192,7 +192,7 @@ typedef struct {
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uint32_t ipending;
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uint32_t ipending;
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} CPU_Exception_frame;
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} CPU_Exception_frame;
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void _CPU_Initialize_vectors( void );
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#define _CPU_Initialize_vectors()
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/**
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/**
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* @brief Macro to disable interrupts.
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* @brief Macro to disable interrupts.
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@@ -686,19 +686,24 @@ SCORE_EXTERN Context_Control_fp _CPU_Null_fp_context;
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/**
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/**
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* @ingroup CPUInterrupt
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* @ingroup CPUInterrupt
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*
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*
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* This defines the number of entries in the @ref _ISR_Vector_table managed
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* This defines the number of entries in the _ISR_Vector_table managed by RTEMS
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* by RTEMS.
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* in case CPU_SIMPLE_VECTORED_INTERRUPTS is defined to TRUE. It must be a
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* compile-time constant.
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*
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*
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* Port Specific Information:
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* It must be undefined in case CPU_SIMPLE_VECTORED_INTERRUPTS is defined to
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*
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* FALSE.
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* XXX document implementation including references if appropriate
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*/
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*/
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#define CPU_INTERRUPT_NUMBER_OF_VECTORS 32
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#define CPU_INTERRUPT_NUMBER_OF_VECTORS 32
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/**
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/**
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* @ingroup CPUInterrupt
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* @ingroup CPUInterrupt
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*
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*
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* This defines the highest interrupt vector number for this port.
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* This defines the highest interrupt vector number for this port in case
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* CPU_SIMPLE_VECTORED_INTERRUPTS is defined to TRUE. It must be less than
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* CPU_INTERRUPT_NUMBER_OF_VECTORS. It may be not a compile-time constant.
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*
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* It must be undefined in case CPU_SIMPLE_VECTORED_INTERRUPTS is defined to
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* FALSE.
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*/
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*/
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#define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1)
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#define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1)
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@@ -598,16 +598,6 @@ SCORE_EXTERN struct {
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#define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 0
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#define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 0
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/*
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* This defines the number of entries in the ISR_Vector_table managed
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* by RTEMS.
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*
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* NOTE: CPU_INTERRUPT_NUMBER_OF_VECTORS and
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* CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER are only used on
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* Simple Vectored Architectures and thus are not defined
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* for this architecture.
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*/
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/*
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/*
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* This is defined if the port has a special way to report the ISR nesting
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* This is defined if the port has a special way to report the ISR nesting
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* level. Most ports maintain the variable _ISR_Nest_level. Note that
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* level. Most ports maintain the variable _ISR_Nest_level. Note that
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@@ -549,25 +549,6 @@ typedef struct {
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*/
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*/
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#define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 0
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#define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 0
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/* XXX this should not be needed on PIC architectures */
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/* XXX evaluate removing it */
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#if 0
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/**
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* This defines the number of entries in the @ref _ISR_Vector_table managed
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* by RTEMS.
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*
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* Port Specific Information:
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*
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* XXX document implementation including references if appropriate
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*/
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#define CPU_INTERRUPT_NUMBER_OF_VECTORS 32
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#endif
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/**
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* This defines the highest interrupt vector number for this port.
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*/
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#define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1)
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/**
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/**
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* This is defined if the port has a special way to report the ISR nesting
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* This is defined if the port has a special way to report the ISR nesting
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* level. Most ports maintain the variable @a _ISR_Nest_level.
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* level. Most ports maintain the variable @a _ISR_Nest_level.
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@@ -70,23 +70,11 @@ typedef ISR_Handler ( *ISR_Handler_entry )(
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);
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);
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#endif
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#endif
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/**
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* This constant promotes out the number of vectors truly supported by
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* the current CPU being used. This is usually the number of distinct vectors
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* the cpu can vector.
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*/
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#define ISR_NUMBER_OF_VECTORS CPU_INTERRUPT_NUMBER_OF_VECTORS
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/**
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* This constant promotes out the highest valid interrupt vector number.
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*/
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#define ISR_INTERRUPT_MAXIMUM_VECTOR_NUMBER CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER
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/**
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/**
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* The following declares the Vector Table. Application
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* The following declares the Vector Table. Application
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* interrupt service routines are vectored by the ISR Handler via this table.
|
* interrupt service routines are vectored by the ISR Handler via this table.
|
||||||
*/
|
*/
|
||||||
SCORE_EXTERN ISR_Handler_entry *_ISR_Vector_table;
|
extern ISR_Handler_entry _ISR_Vector_table[ CPU_INTERRUPT_NUMBER_OF_VECTORS ];
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|||||||
@@ -26,15 +26,19 @@
|
|||||||
#include <rtems/score/wkspace.h>
|
#include <rtems/score/wkspace.h>
|
||||||
#include <rtems/config.h>
|
#include <rtems/config.h>
|
||||||
|
|
||||||
|
#if (CPU_SIMPLE_VECTORED_INTERRUPTS == TRUE)
|
||||||
|
ISR_Handler_entry _ISR_Vector_table[ CPU_INTERRUPT_NUMBER_OF_VECTORS ];
|
||||||
|
#elif defined(CPU_INTERRUPT_NUMBER_OF_VECTORS)
|
||||||
|
#error "CPU_INTERRUPT_NUMBER_OF_VECTORS is defined for non-simple vectored interrupts"
|
||||||
|
#elif defined(CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER)
|
||||||
|
#error "CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER is defined for non-simple vectored interrupts"
|
||||||
|
#endif
|
||||||
|
|
||||||
void _ISR_Handler_initialization( void )
|
void _ISR_Handler_initialization( void )
|
||||||
{
|
{
|
||||||
_ISR_Nest_level = 0;
|
_ISR_Nest_level = 0;
|
||||||
|
|
||||||
#if (CPU_SIMPLE_VECTORED_INTERRUPTS == TRUE)
|
#if (CPU_SIMPLE_VECTORED_INTERRUPTS == TRUE)
|
||||||
_ISR_Vector_table = _Workspace_Allocate_or_fatal_error(
|
|
||||||
sizeof(ISR_Handler_entry) * ISR_NUMBER_OF_VECTORS
|
|
||||||
);
|
|
||||||
|
|
||||||
_CPU_Initialize_vectors();
|
_CPU_Initialize_vectors();
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|||||||
@@ -37,10 +37,6 @@ rtems_initialization_tasks_table Initialization_tasks[] = {
|
|||||||
#define FATAL_ERROR_EXPECTED_ERROR \
|
#define FATAL_ERROR_EXPECTED_ERROR \
|
||||||
INTERNAL_ERROR_INTERRUPT_STACK_TOO_SMALL
|
INTERNAL_ERROR_INTERRUPT_STACK_TOO_SMALL
|
||||||
|
|
||||||
#if CPU_SIMPLE_VECTORED_INTERRUPTS == TRUE
|
|
||||||
#define CONFIGURE_MEMORY_OVERHEAD (sizeof(ISR_Handler_entry) * ISR_NUMBER_OF_VECTORS)
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if CPU_ALLOCATE_INTERRUPT_STACK == TRUE
|
#if CPU_ALLOCATE_INTERRUPT_STACK == TRUE
|
||||||
#define CONFIGURE_INTERRUPT_STACK_SIZE (STACK_MINIMUM_SIZE - 1)
|
#define CONFIGURE_INTERRUPT_STACK_SIZE (STACK_MINIMUM_SIZE - 1)
|
||||||
#endif
|
#endif
|
||||||
|
|||||||
@@ -36,7 +36,7 @@ rtems_task Init(
|
|||||||
rtems_isr_entry old_service_routine;
|
rtems_isr_entry old_service_routine;
|
||||||
status = rtems_interrupt_catch(
|
status = rtems_interrupt_catch(
|
||||||
Service_routine,
|
Service_routine,
|
||||||
ISR_INTERRUPT_MAXIMUM_VECTOR_NUMBER + 10,
|
CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER + 1,
|
||||||
&old_service_routine
|
&old_service_routine
|
||||||
);
|
);
|
||||||
fatal_directive_status(
|
fatal_directive_status(
|
||||||
|
|||||||
Reference in New Issue
Block a user