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@@ -6,20 +6,8 @@
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@c $Id$
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@c
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@ifinfo
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@node Memory Model, Memory Model Introduction, Calling Conventions User-Provided Routines, Top
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@end ifinfo
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@chapter Memory Model
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@ifinfo
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@menu
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* Memory Model Introduction::
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* Memory Model Flat Memory Model::
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@end menu
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@end ifinfo
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@ifinfo
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@node Memory Model Introduction, Memory Model Flat Memory Model, Memory Model, Memory Model
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@end ifinfo
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@section Introduction
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A processor may support any combination of memory
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@@ -31,9 +19,6 @@ memory of any kind. The appropriate memory model for RTEMS
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provided by the targeted processor and related characteristics
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of that model are described in this chapter.
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@ifinfo
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@node Memory Model Flat Memory Model, Interrupt Processing, Memory Model Introduction, Memory Model
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@end ifinfo
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@section Flat Memory Model
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The SPARC architecture supports a flat 32-bit address
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