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arm: Fix CPU_MODES_INTERRUPT_MASK

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The set of interrupt levels must be a continuous range of non-negative
integers starting at zero.
This commit is contained in:
Sebastian Huber
2013-08-05 10:16:31 +02:00
parent da831d06fd
commit 007bdc4f59
2 changed files with 6 additions and 4 deletions
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8
cpukit/score/cpu/arm/cpu.c
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@@ -87,10 +87,12 @@ void _CPU_ISR_Set_level( uint32_t level )
{
uint32_t arm_switch_reg;
level = ( level != 0 ) ? ARM_PSR_I : 0;
__asm__ volatile (
ARM_SWITCH_TO_ARM
"mrs %[arm_switch_reg], cpsr\n"
"bic %[arm_switch_reg], #" _CPU_ISR_LEVEL_STRINGOF( CPU_MODES_INTERRUPT_MASK ) "\n"
"bic %[arm_switch_reg], #" _CPU_ISR_LEVEL_STRINGOF( ARM_PSR_I ) "\n"
"orr %[arm_switch_reg], %[level]\n"
"msr cpsr, %0\n"
ARM_SWITCH_BACK
@@ -107,12 +109,12 @@ uint32_t _CPU_ISR_Get_level( void )
__asm__ volatile (
ARM_SWITCH_TO_ARM
"mrs %[level], cpsr\n"
"and %[level], #" _CPU_ISR_LEVEL_STRINGOF( CPU_MODES_INTERRUPT_MASK ) "\n"
"and %[level], #" _CPU_ISR_LEVEL_STRINGOF( ARM_PSR_I ) "\n"
ARM_SWITCH_BACK
: [level] "=&r" (level) ARM_SWITCH_ADDITIONAL_OUTPUT
);
return level;
return ( level & ARM_PSR_I ) != 0;
}
void _CPU_ISR_install_vector(

2
cpukit/score/cpu/arm/rtems/score/cpu.h
View File

@@ -165,7 +165,7 @@
* operating system support for a FIQ, she can trigger a software interrupt and
* service the request in a two-step process.
*/
#define CPU_MODES_INTERRUPT_MASK 0x80
#define CPU_MODES_INTERRUPT_MASK 0x1
#define CPU_CONTEXT_FP_SIZE sizeof( Context_Control_fp )