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7f13f24e12
Use asm implements for i386/x86_64/arm/aarch64/riscv: __atomic_load_[1,2,4,8] __atomic_store_[1,2,4,8] __atomic_compare_exchange_[1,2,4,8] __atomic_test_and_set_[1,2,4,8] atomic_thread_fence atomic_signal_fence atomic_flag_test_and_set atomic_flag_test_and_set_explicit atomic_flag_clear atomic_flag_clear_explicit `atomic.S` is extracted from `gcc` v15.1.0 `libatomic.a`. And generated by https://github.com/kbkpbot/gen_atomic.git
105 lines
3.4 KiB
C
105 lines
3.4 KiB
C
// for libtcc1, avoid including files that are not part of tcc
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// #include <stdint.h>
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#define uint8_t unsigned char
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#define uint16_t unsigned short
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#define uint32_t unsigned int
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#define uint64_t unsigned long long
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#define bool _Bool
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#define false 0
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#define true 1
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#define __ATOMIC_RELAXED 0
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#define __ATOMIC_CONSUME 1
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#define __ATOMIC_ACQUIRE 2
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#define __ATOMIC_RELEASE 3
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#define __ATOMIC_ACQ_REL 4
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#define __ATOMIC_SEQ_CST 5
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typedef __SIZE_TYPE__ size_t;
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#define ATOMIC_GEN_OP(TYPE, MODE, NAME, OP, RET) \
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TYPE __atomic_##NAME##_##MODE(volatile void *atom, TYPE value, int memorder) \
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{ \
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TYPE xchg, cmp; \
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__atomic_load((TYPE *)atom, (TYPE *)&cmp, __ATOMIC_RELAXED); \
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do { \
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xchg = (OP); \
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} while (!__atomic_compare_exchange((TYPE *)atom, &cmp, &xchg, true, \
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__ATOMIC_SEQ_CST, __ATOMIC_SEQ_CST)); \
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return RET; \
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}
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#define ATOMIC_EXCHANGE(TYPE, MODE) \
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ATOMIC_GEN_OP(TYPE, MODE, exchange, value, cmp)
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#define ATOMIC_ADD_FETCH(TYPE, MODE) \
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ATOMIC_GEN_OP(TYPE, MODE, add_fetch, (cmp + value), xchg)
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#define ATOMIC_SUB_FETCH(TYPE, MODE) \
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ATOMIC_GEN_OP(TYPE, MODE, sub_fetch, (cmp - value), xchg)
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#define ATOMIC_AND_FETCH(TYPE, MODE) \
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ATOMIC_GEN_OP(TYPE, MODE, and_fetch, (cmp & value), xchg)
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#define ATOMIC_OR_FETCH(TYPE, MODE) \
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ATOMIC_GEN_OP(TYPE, MODE, or_fetch, (cmp | value), xchg)
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#define ATOMIC_XOR_FETCH(TYPE, MODE) \
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ATOMIC_GEN_OP(TYPE, MODE, xor_fetch, (cmp ^ value), xchg)
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#define ATOMIC_NAND_FETCH(TYPE, MODE) \
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ATOMIC_GEN_OP(TYPE, MODE, nand_fetch, ~(cmp & value), xchg)
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#define ATOMIC_FETCH_ADD(TYPE, MODE) \
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ATOMIC_GEN_OP(TYPE, MODE, fetch_add, (cmp + value), cmp)
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#define ATOMIC_FETCH_SUB(TYPE, MODE) \
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ATOMIC_GEN_OP(TYPE, MODE, fetch_sub, (cmp - value), cmp)
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#define ATOMIC_FETCH_AND(TYPE, MODE) \
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ATOMIC_GEN_OP(TYPE, MODE, fetch_and, (cmp & value), cmp)
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#define ATOMIC_FETCH_OR(TYPE, MODE) \
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ATOMIC_GEN_OP(TYPE, MODE, fetch_or, (cmp | value), cmp)
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#define ATOMIC_FETCH_XOR(TYPE, MODE) \
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ATOMIC_GEN_OP(TYPE, MODE, fetch_xor, (cmp ^ value), cmp)
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#define ATOMIC_FETCH_NAND(TYPE, MODE) \
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ATOMIC_GEN_OP(TYPE, MODE, fetch_nand, ~(cmp & value), cmp)
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#define ATOMIC_GEN(TYPE, SIZE) \
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ATOMIC_EXCHANGE(TYPE, SIZE) \
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ATOMIC_ADD_FETCH(TYPE, SIZE) \
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ATOMIC_SUB_FETCH(TYPE, SIZE) \
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ATOMIC_AND_FETCH(TYPE, SIZE) \
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ATOMIC_OR_FETCH(TYPE, SIZE) \
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ATOMIC_XOR_FETCH(TYPE, SIZE) \
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ATOMIC_NAND_FETCH(TYPE, SIZE) \
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ATOMIC_FETCH_ADD(TYPE, SIZE) \
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ATOMIC_FETCH_SUB(TYPE, SIZE) \
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ATOMIC_FETCH_AND(TYPE, SIZE) \
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ATOMIC_FETCH_OR(TYPE, SIZE) \
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ATOMIC_FETCH_XOR(TYPE, SIZE) \
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ATOMIC_FETCH_NAND(TYPE, SIZE)
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ATOMIC_GEN(uint8_t, 1)
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ATOMIC_GEN(uint16_t, 2)
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ATOMIC_GEN(uint32_t, 4)
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ATOMIC_GEN(uint64_t, 8)
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/* uses alias to allow building with gcc/clang */
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#ifdef __TINYC__
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#define ATOMIC(x) __atomic_##x
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#else
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#define ATOMIC(x) __tcc_atomic_##x
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#endif
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bool ATOMIC(is_lock_free) (unsigned long size, const volatile void *ptr)
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{
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bool ret;
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switch (size) {
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case 1: ret = true; break;
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case 2: ret = true; break;
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case 4: ret = true; break;
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#if defined __x86_64__ || defined __aarch64__ || defined __riscv
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case 8: ret = true; break;
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#else
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case 8: ret = false; break;
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#endif
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default: ret = false; break;
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}
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return ret;
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}
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#ifndef __TINYC__
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bool __atomic_is_lock_free(unsigned long size, const volatile void *ptr) __attribute__((alias("__tcc_atomic_is_lock_free")));
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#endif
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