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arm-asm: Accept additional register names

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This commit is contained in:
Detlef Riekenberg
2025-05-07 22:29:46 +02:00
parent 30c2373c8a
commit 6ca228339c
2 changed files with 34 additions and 19 deletions
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33
arm-asm.c
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@@ -376,8 +376,8 @@ static void asm_coprocessor_opcode(TCCState *s1, int token) {
for (i = 0; i < 3; ++i) {
skip(',');
if (i == 0 && token != TOK_ASM_cdp2 && (ARM_INSTRUCTION_GROUP(token) == TOK_ASM_mrceq || ARM_INSTRUCTION_GROUP(token) == TOK_ASM_mcreq)) {
if (tok >= TOK_ASM_r0 && tok <= TOK_ASM_r15) {
registers[i] = tok - TOK_ASM_r0;
if (tok >= TOK_ASM_r0 && tok <= TOK_ASM_pc) {
registers[i] = asm_parse_regvar(tok);
next();
} else {
expect("'r<number>'");
@@ -3072,23 +3072,20 @@ ST_FUNC void asm_clobber(uint8_t *clobber_regs, const char *str)
Otherwise return -1. */
ST_FUNC int asm_parse_regvar (int t)
{
if (t >= TOK_ASM_r0 && t <= TOK_ASM_pc) { /* register name */
switch (t) {
case TOK_ASM_fp:
return TOK_ASM_r11 - TOK_ASM_r0;
case TOK_ASM_ip:
return TOK_ASM_r12 - TOK_ASM_r0;
case TOK_ASM_sp:
return TOK_ASM_r13 - TOK_ASM_r0;
case TOK_ASM_lr:
return TOK_ASM_r14 - TOK_ASM_r0;
case TOK_ASM_pc:
return TOK_ASM_r15 - TOK_ASM_r0;
default:
return t - TOK_ASM_r0;
}
} else
/* coprocessors (p0-p15) and coprocessor registers (c0-c15) are handled elsewere */
/* single fp (s0-s31) and double fp registers (d0-d15) are handled elsewere */
if (t < TOK_ASM_r0 || t > TOK_ASM_pc) /* filter unrelated registers */
return -1;
if (t <= TOK_ASM_r15) /* default register names r0-r15 */
return t - TOK_ASM_r0;
if (t <= TOK_ASM_v8) /* synonym register names a1-a4,v1-v8 (alias: r0-r11) */
return t - TOK_ASM_a1;
/* special register names sb/sl/fp/ip/sp/lr/pc (alias: r9-r15) */
return t - TOK_ASM_sb + (TOK_ASM_r9 - TOK_ASM_r0);
}
/*************************************************************/

20
arm-tok.h
View File

@@ -20,8 +20,26 @@
DEF_ASM(r14) /* lr */
DEF_ASM(r15) /* pc */
/* register macros */
/* synonym register names */
DEF_ASM(a1) /* argument/result/scratch register 1: alias for r0 */
DEF_ASM(a2) /* argument/result/scratch register 2: alias for r1 */
DEF_ASM(a3) /* argument/result/scratch register 3: alias for r2 */
DEF_ASM(a4) /* argument/result/scratch register 4: alias for r3 */
DEF_ASM(v1) /* variable register 1: alias for r4 */
DEF_ASM(v2) /* variable register 2: alias for r5 */
DEF_ASM(v3) /* variable register 3: alias for r6 */
DEF_ASM(v4) /* variable register 4: alias for r7 */
DEF_ASM(v5) /* ARM state variable register 5: alias for r8 */
DEF_ASM(v6) /* ARM state variable register 6: alias for r9 */
DEF_ASM(v7) /* ARM state variable register 7: alias for r10 */
DEF_ASM(v8) /* ARM state variable register 8: alias for r11 */
/* special register names */
DEF_ASM(sb) /* alias for r9 */
DEF_ASM(sl) /* alias for r10 */
DEF_ASM(fp) /* alias for r11 */
DEF_ASM(ip) /* alias for r12 */
DEF_ASM(sp) /* alias for r13 */