mirror of
https://github.com/eclipse-threadx/threadx.git
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109 lines
6.0 KiB
Plaintext
109 lines
6.0 KiB
Plaintext
;/**************************************************************************/
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;/* */
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;/* Copyright (c) Microsoft Corporation. All rights reserved. */
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;/* */
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;/* This software is licensed under the Microsoft Software License */
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;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
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;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
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;/* and in the root directory of this software. */
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;/* */
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;/**************************************************************************/
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;
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;
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;/**************************************************************************/
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;/**************************************************************************/
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;/** */
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;/** ThreadX Component */
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;/** */
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;/** Initialize */
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;/** */
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;/**************************************************************************/
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;/**************************************************************************/
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;
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.GLB __tx_initialize_unused_memory
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IPR03 .EQU 87303H
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IEN03 .EQU 87203H
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.SECTION P,CODE
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;
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;/**************************************************************************/
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;/* */
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;/* FUNCTION RELEASE */
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;/* */
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;/* _tx_initialize_low_level RXv3/CCRX */
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;/* 6.1.11 */
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;/* AUTHOR */
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;/* */
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;/* William E. Lamie, Microsoft Corporation */
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;/* */
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;/* DESCRIPTION */
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;/* */
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;/* This function is responsible for any low-level processor */
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;/* initialization, including setting up interrupt vectors, setting */
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;/* up a periodic timer interrupt source, saving the system stack */
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;/* pointer for use in ISR processing later, and finding the first */
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;/* available RAM memory address for tx_application_define. */
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;/* */
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;/* INPUT */
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;/* */
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;/* None */
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;/* */
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;/* OUTPUT */
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;/* */
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;/* None */
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;/* */
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;/* CALLS */
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;/* */
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;/* None */
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;/* */
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;/* CALLED BY */
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;/* */
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;/* _tx_initialize_kernel_enter ThreadX entry function */
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;/* */
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;/* RELEASE HISTORY */
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;/* */
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;/* DATE NAME DESCRIPTION */
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;/* */
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;/* 06-02-2021 William E. Lamie Initial Version 6.1.7 */
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;/* 10-15-2021 William E. Lamie Modified comment(s), */
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;/* resulting in version 6.1.9 */
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;/* 01-31-2022 William E. Lamie Modified comment(s), */
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;/* resulting in version 6.1.10 */
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;/* 04-25-2022 William E. Lamie Modified comment(s), */
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;/* resulting in version 6.1.11 */
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;/* */
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;/**************************************************************************/
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.GLB __tx_initialize_low_level
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__tx_initialize_low_level:
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;
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; /* Save the first available memory address. */
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; _tx_initialize_unused_memory = (VOID_PTR) &free_mem_start;
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;
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MOV.L #free_mem_start, R1 ; Pickup unused memory address
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MOV.L #__tx_initialize_unused_memory,R2
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MOV.L R1,[R2] ; Save first free memory address
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; /* Set priority of SWINT to 1. */
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MOV.L #IPR03, r1
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MOV.L #1, r2
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MOV.B r2, [r1]
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; /* Enable SWINT. */
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MOV.L #IEN03,r1
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MOV.B [r1], r2
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OR #(1 << 3), r2
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MOV.B r2, [r1]
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RTS
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.SECTION FREEMEM ,DATA, ALIGN=4
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free_mem_start:
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.BLKL 8 ; this section is last in the link map so we can access the end of RAM memory
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.END
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