Release 6.1.12

CMakeLists.txt

@@ -31,8 +31,17 @@ endif()
 # Pick up the common stuff
 add_subdirectory(${CMAKE_CURRENT_LIST_DIR}/common)
 
-
+# Define the FreeRTOS adaptation layer
-
+add_library(freertos-threadx EXCLUDE_FROM_ALL)
+target_include_directories(freertos-threadx
+    PUBLIC
+    ${CMAKE_CURRENT_LIST_DIR}/utility/rtos_compatibility_layers/FreeRTOS
+)
+target_sources(freertos-threadx
+    PRIVATE
+    ${CMAKE_CURRENT_LIST_DIR}/utility/rtos_compatibility_layers/FreeRTOS/tx_freertos.c
+)
+target_link_libraries(freertos-threadx PUBLIC threadx)
 
 # If the user provided an override, copy it to the custom directory
 if (NOT TX_USER_FILE)

README.md

@@ -87,7 +87,7 @@ Azure RTOS provides OEMs with components to secure communication and to create c
 
 # Adaptation layer for ThreadX
 
-Azure RTOS ThreadX is an advanced real-time operating system (RTOS) designed specifically for deeply embedded applications. To help ease application migration to Auzre RTOS, ThreadX provides [adaption layers](https://github.com/azure-rtos/threadx/tree/master/utility/rtos_compatibility_layers) for various legacy RTOS APIs (FreeRTOS, POSIX, OSEK, etc.).
+Azure RTOS ThreadX is an advanced real-time operating system (RTOS) designed specifically for deeply embedded applications. To help ease application migration to Azure RTOS, ThreadX provides [adaption layers](https://github.com/azure-rtos/threadx/tree/master/utility/rtos_compatibility_layers) for various legacy RTOS APIs (FreeRTOS, POSIX, OSEK, etc.).
 
 # Licensing
 
@@ -109,7 +109,7 @@ The following are references to additional Azure RTOS and Azure IoT in general:
 | TraceX Installer | https://aka.ms/azrtos-tracex-installer |
 | Azure RTOS Documentation and Guides: | https://docs.microsoft.com/azure/rtos |
 | Azure RTOS Website: | https://azure.microsoft.com/services/rtos/ |
-| Azure RTOS Sales Questions: | https://azure-rtos.ms-iot-contact.com/ |
+| Azure RTOS Sales Questions: | https://aka.ms/azrtos-license |
 | Azure RTOS Product Support Policy | https://aka.ms/azrtos/lts |
 | Azure RTOS Functional Safety Artifacts | https://aka.ms/azrtos/tuv |
 | For technical questions check out Microsoft Q/A for Azure IoT | https://aka.ms/QnA/azure-rtos |

common/CMakeLists.txt

@@ -202,6 +202,7 @@ target_sources(${PROJECT_NAME}
 
 # Add the Common/inc directory to the project include list
 target_include_directories(${PROJECT_NAME} 
+    SYSTEM
     PUBLIC 
     ${CMAKE_CURRENT_LIST_DIR}/inc
 )

common/inc/tx_api.h

@@ -26,7 +26,7 @@
 /*  APPLICATION INTERFACE DEFINITION                       RELEASE        */
 /*                                                                        */
 /*    tx_api.h                                            PORTABLE C      */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -86,6 +86,9 @@
 /*                                            optimized the definition of */
 /*                                            TX_TIMER_TICKS_PER_SECOND,  */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Modified comment(s),          */
+/*                                            update patch number,        */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -122,7 +125,7 @@ extern   "C" {
 #define AZURE_RTOS_THREADX
 #define THREADX_MAJOR_VERSION           6
 #define THREADX_MINOR_VERSION           1
-#define THREADX_PATCH_VERSION           11
+#define THREADX_PATCH_VERSION           12
 
 /* Define the following symbol for backward compatibility */
 #define EL_PRODUCT_THREADX

common/src/tx_trace_object_register.c

@@ -34,7 +34,7 @@
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_trace_object_register                           PORTABLE C      */
-/*                                                           6.1          */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -69,9 +69,12 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  05-19-2020     William E. Lamie         Initial Version 6.0           */
+/*  05-19-2020      William E. Lamie        Initial Version 6.0           */
-/*  09-30-2020     Yuxin Zhou               Modified comment(s),          */
+/*  09-30-2020      Yuxin Zhou              Modified comment(s),          */
 /*                                            resulting in version 6.1    */
+/*  07-29-2022      Scott Larson            Modified comment(s),          */
+/*                                            check for null name,        */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 VOID  _tx_trace_object_register(UCHAR object_type, VOID *object_ptr, CHAR *object_name, ULONG parameter_1, ULONG parameter_2)
@@ -223,6 +226,12 @@ TX_TRACE_OBJECT_ENTRY           *entry_ptr;
                     work_ptr =  TX_CHAR_TO_UCHAR_POINTER_CONVERT(object_name);
                     work_ptr =  TX_UCHAR_POINTER_ADD(work_ptr, i);
 
+                    /* Determine if object_name (work_ptr) is null.  */
+                    if (work_ptr == TX_NULL)
+                    {
+                        break;
+                    }
+
                     /* Copy a character of the name.  */
                     entry_ptr -> tx_trace_object_entry_name[i] =  (UCHAR) *work_ptr;
 

common_modules/module_manager/utilities/module_binary_to_c_array.c

@@ -0,0 +1,139 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+
+/* Define the file handles.  */
+
+FILE	*source_file;
+FILE    *array_file;
+
+
+int main(int argc, char* argv[])
+{
+
+int             alpha;
+int             alpha1;
+int             alpha2;
+int             alpha3;
+unsigned long   address;
+unsigned long   column;
+
+
+    /* Determine if the proper number of files are provided.  */
+    if (argc != 3) 
+    {
+
+        /* Print an error message out and wait for user key hit.  */
+		printf("module_binary_to_c_array.exe - Copyright (c) Microsoft Corporation v5.8\n");
+        printf("**** Error: invalid input parameter for module_binary_to_c_array.exe **** \n");
+        printf("     Command Line Should be:\n\n");
+        printf("     > module_binary_to_c_array source_binary_file c_array_file <cr> \n\n");
+        return(1);
+    }
+
+    /* Attempt to open the source file for reading.  */
+    source_file =  fopen(argv[1], "rb");
+
+    /* Determine if the source file was opened properly.  */
+    if (source_file == NULL)
+    {
+
+        /* Print an error message out and wait for user key hit.  */
+        printf("**** Error: open failed on binary source file **** \n");
+        printf("            File: %s   ", argv[1]);
+        return(2);
+    }
+    
+	/* Determine if the binary file is a valid ThreadX module.  */
+	alpha =   fgetc(source_file);
+	alpha1 =  fgetc(source_file);
+	alpha2 =  fgetc(source_file);
+	alpha3 =  fgetc(source_file);
+
+	if ((alpha != 0x4D && alpha != 0x55) || (alpha1 != 0x4F && alpha1 != 0x44) || (alpha2 != 0x44 && alpha2 != 0x4F) || (alpha3 != 0x55 && alpha3 != 0x4D))
+	{
+
+        /* Print an error message out and wait for user key hit.  */
+        printf("**** Error: invalid format of binary input file **** \n");
+        printf("            File: %s   ", argv[1]);
+        return(3);
+	}
+
+	/* Attempt to open the dump file for writing.  */
+    array_file =  fopen(argv[2], "w");
+
+    /* Determine if the dump file was opened properly.  */
+    if (array_file == NULL)
+    {
+
+        /* Print an error message out and wait for user key hit.  */
+        printf("**** Error: open failed on C array file **** \n");
+        printf("            File: %s   ", argv[2]);
+        return(4);
+    }
+
+    fprintf(array_file, "/**************************** Module-Binary-to-C-array Utility **********************************/\n");
+	fprintf(array_file, "/*                                                                                              */\n");
+	fprintf(array_file, "/* Copyright (c) Microsoft Corporation                      Version 5.4, build date: 03-01-2018 */\n");
+	fprintf(array_file, "/*                                                                                              */\n");
+	fprintf(array_file, "/************************************************************************************************/\n\n");
+    fprintf(array_file, "/* \n");
+	fprintf(array_file, "   Input Binary file:   %30s\n", argv[1]);
+	fprintf(array_file, "   Output C Array file: %30s\n", argv[2]);
+	fprintf(array_file, "*/\n\n");
+
+	/* Now print out the sections in a C array.  */
+	fprintf(array_file, "unsigned char  module_code[] = {\n\n");
+	fprintf(array_file, "/* Address                                            Contents                                        */\n\n");
+
+	/* Seek to the beginning of the source file. */
+    fseek(source_file, 0, SEEK_SET);
+
+	/* Initialize the variables.  */
+	address =  0;
+	column =   0;
+
+	do 
+	{
+
+		/* Get character from the input file.  */
+		alpha =   fgetc(source_file);
+
+		/* Have we reached EOF?  */
+		if (alpha == EOF)
+			break;
+
+		/* Print out character with a leading comma, except on the first character.  */
+		if (column == 0)
+		{
+			if (address != 0)
+				fprintf(array_file, ",\n");
+			fprintf(array_file, "/* 0x%08X */   0x%02X", address, (unsigned int) alpha);
+		}
+		else
+			fprintf(array_file, ", 0x%02X", (unsigned int) alpha);
+
+		/* Move column forward.  */
+		column++;
+
+		/* Are we at the end of the column?  */
+		if (column >= 16)
+		{
+
+			column =  0;
+    	}
+
+		/* Move address forward.  */
+		address++;
+	} while (alpha != EOF);
+
+	/* Finally, finish the C array containing the module code.  */
+	fprintf(array_file, "};\n\n");
+
+	/* Close files.  */
+	fclose(source_file);
+    fclose(array_file);
+
+	return 0;
+}

common_modules/module_manager/utilities/module_to_binary.c

@@ -0,0 +1,332 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+
+/* Define the file handles.  */
+
+FILE	*source_file;
+FILE    *binary_file;
+
+
+#define ELF_ID_STRING_SIZE	    16
+#define ELF_ARM_MACHINE_TYPE    40
+#define ELF_EXECUTABLE          2
+
+
+typedef struct ELF_HEADER_STRUCT 
+{
+    unsigned char   elf_header_id_string[ELF_ID_STRING_SIZE];
+    unsigned short  elf_header_file_type;
+    unsigned short  elf_header_machinge_type;
+    unsigned long   elf_header_version;
+    unsigned long   elf_header_entry_address;
+    unsigned long   elf_header_program_header_offset;
+    unsigned long   elf_header_section_header_offset;
+    unsigned long   elf_header_processor_flags;
+    unsigned short  elf_header_size;
+    unsigned short  elf_header_program_header_size;
+    unsigned short  elf_header_program_header_entries;
+    unsigned short  elf_header_section_header_size;
+    unsigned short  elf_header_section_header_entries;
+    unsigned short  elf_header_section_string_index;
+} ELF_HEADER;
+
+
+typedef struct ELF_PROGRAM_HEADER_STRUCT
+{
+    unsigned long   elf_program_header_type;
+    unsigned long   elf_program_header_offset;
+    unsigned long   elf_program_header_virtual_address;
+    unsigned long   elf_program_header_physical_address;
+    unsigned long   elf_program_header_file_size;
+    unsigned long   elf_program_header_memory_size;
+    unsigned long   elf_program_header_flags;
+    unsigned long   elf_program_header_alignment;
+} ELF_PROGRAM_HEADER;
+
+
+typedef struct ELF_SECTION_HEADER_STRUCT
+{
+    unsigned long   elf_section_header_name;
+    unsigned long   elf_section_header_type;
+    unsigned long   elf_section_header_flags;
+    unsigned long   elf_section_header_address;
+    unsigned long   elf_section_header_offset;
+    unsigned long   elf_section_header_size;
+    unsigned long   elf_section_header_link;
+    unsigned long   elf_section_header_info;
+    unsigned long   elf_section_header_alignment;
+    unsigned long   elf_section_header_entry_size;
+} ELF_SECTION_HEADER;
+
+
+typedef struct ELF_SYMBOL_TABLE_ENTRY_STRUCT
+{
+    unsigned long   elf_symbol_table_entry_name;
+    unsigned long   elf_symbol_table_entry_address;
+    unsigned long   elf_symbol_table_entry_size;
+    unsigned char   elf_symbol_table_entry_info;
+    unsigned char   elf_symbol_table_entry_other;
+    unsigned short  elf_symbol_table_entry_shndx;
+
+} ELF_SYMBOL_TABLE_ENTRY;
+
+
+typedef struct CODE_SECTION_ENTRY_STRUCT
+{
+    unsigned long   code_section_index;
+    unsigned long   code_section_address;
+    unsigned long   code_section_size;
+} CODE_SECTION_ENTRY;
+
+
+/* Define global variables.  */
+
+ELF_HEADER              header;
+ELF_PROGRAM_HEADER      *program_header;
+ELF_SECTION_HEADER      *section_header;
+unsigned char           *section_string_table;
+unsigned char           *main_string_table;
+unsigned long           total_symbols;
+ELF_SYMBOL_TABLE_ENTRY  *symbol_table;
+unsigned long           total_functions;
+ELF_SYMBOL_TABLE_ENTRY  *function_table;
+CODE_SECTION_ENTRY		*code_section_array;
+
+
+/* Define helper functions.  */
+
+int elf_object_read(unsigned long offset, void *object_address, int object_size)
+{
+
+int             i;
+int             alpha;
+unsigned char   *buffer;
+
+    /* Setup the buffer pointer.  */
+    buffer =  (unsigned char *) object_address;
+
+    /* Seek to the proper position in the file.  */
+    fseek(source_file, offset, SEEK_SET);
+
+    /* Read the ELF object.  */
+    for (i = 0; i < object_size; i++)
+    {
+        alpha =  fgetc(source_file);
+        
+        if (alpha == EOF)
+            return(1);
+            
+        buffer[i] =  (unsigned char) alpha;
+    }    
+
+    /* Return success.  */
+    return(0);
+}
+
+
+int main(int argc, char* argv[])
+{
+
+unsigned long           i, j;
+unsigned long           current_total;
+unsigned long           address;
+unsigned long           size;
+unsigned char           *code_buffer;
+unsigned long			code_section_index;
+CODE_SECTION_ENTRY		code_section_temp;
+unsigned char           zero_value;
+
+
+    /* Determine if the proper number of files are provided.  */
+    if (argc != 3) 
+    {
+
+        /* Print an error message out and wait for user key hit.  */
+		printf("module_to_binary.exe - Copyright (c) Microsoft Corporation v5.8\n");
+        printf("**** Error: invalid input parameter for module_to_binary.exe **** \n");
+        printf("     Command Line Should be:\n\n");
+        printf("     > module_to_binary source_elf_file c_binary_file <cr> \n\n");
+        return(1);
+    }
+
+    /* Attempt to open the source file for reading.  */
+    source_file =  fopen(argv[1], "rb");
+
+    /* Determine if the source file was opened properly.  */
+    if (source_file == NULL)
+    {
+
+        /* Print an error message out.  */
+        printf("**** Error: open failed on source elf file **** \n");
+        printf("            File: %s   ", argv[1]);
+        return(2);
+    }
+    
+    /* Attempt to open the binary file for writing.  */
+    binary_file =  fopen(argv[2], "wb");
+
+    /* Determine if the binary file was opened properly.  */
+    if (binary_file == NULL)
+    {
+
+        /* Print an error message out and wait for user key hit.  */
+        printf("**** Error: open failed on binary output file **** \n");
+        printf("            File: %s   ", argv[2]);
+        return(3);
+    }
+
+    /* Read the ELF header.  */
+    elf_object_read(0, &header, sizeof(header));
+
+    /* Allocate memory for the program header(s).  */
+    program_header =  malloc(sizeof(ELF_PROGRAM_HEADER)*header.elf_header_program_header_entries);
+    
+    /* Read the program header(s).  */
+    elf_object_read(header.elf_header_program_header_offset, program_header, (sizeof(ELF_PROGRAM_HEADER)*header.elf_header_program_header_entries));
+
+    /* Allocate memory for the section header(s).  */
+    section_header =  malloc(sizeof(ELF_SECTION_HEADER)*header.elf_header_section_header_entries);
+
+    /* Read the section header(s).  */
+    elf_object_read(header.elf_header_section_header_offset, section_header, (sizeof(ELF_SECTION_HEADER)*header.elf_header_section_header_entries));
+
+
+    /* Alocate memory for the section string table.  */
+    section_string_table =  malloc(section_header[header.elf_header_section_string_index].elf_section_header_size);   
+
+    /* Read the section string table.  */
+    elf_object_read(section_header[header.elf_header_section_string_index].elf_section_header_offset, section_string_table, section_header[header.elf_header_section_string_index].elf_section_header_size);
+
+    /* Allocate memory for the code section array.  */
+    code_section_array =  malloc(sizeof(CODE_SECTION_ENTRY)*header.elf_header_section_header_entries);
+	code_section_index =  0;
+
+     /* Print out the section header(s).  */
+    for (i = 0; i < header.elf_header_section_header_entries; i++)
+    {
+
+		/* Determine if this section is a code section and there is a size.  */
+		if ((section_header[i].elf_section_header_type == 1) && (section_header[i].elf_section_header_size))
+		{
+
+        /* Check for an-instruction area.  */
+        if ((section_header[i].elf_section_header_flags & 0x4) || (section_header[i].elf_section_header_flags & 0x2))
+			{
+
+                /* Determine if this new section overlaps with an existing section.  */
+				for (j = 0; j < code_section_index; j++)
+				{
+					/* Is there an overlap?  */
+					if ((section_header[i].elf_section_header_address >= code_section_array[j].code_section_address) &&
+						((section_header[i].elf_section_header_address+section_header[i].elf_section_header_size + section_header[i].elf_section_header_offset) < (code_section_array[j].code_section_address+code_section_array[j].code_section_size)))
+					{
+						/* New section is within a current section, just disregard it.  */
+						break;
+					}
+				}
+
+				/* Determine if we have an overlap.  */
+				if (j == code_section_index)
+				{
+
+				    /* Yes, we have a code section... save it!  */
+				    code_section_array[code_section_index].code_section_index =  i;
+				    code_section_array[code_section_index].code_section_address =  section_header[i].elf_section_header_address;
+				    code_section_array[code_section_index].code_section_size =     section_header[i].elf_section_header_size;
+
+				    /* Move to next code section.  */
+				    code_section_index++;
+				}
+			}
+		}
+	}
+
+	/* Check for no code sections.  */
+	if (code_section_index == 0)
+	{
+
+		/* Close files.  */
+		fclose(source_file);
+		fclose(binary_file);
+
+		return(4);
+ 	}
+
+	/* One or more code sections have been found... let's put them in the correct order by address.  */
+	i = 0;
+	while (i+1 < code_section_index)
+	{
+
+		/* Make the "ith" entry the lowest address.  */
+		j = i + 1;
+		do
+		{
+			/* Is there a new lowest address?  */
+			if (code_section_array[j].code_section_address < code_section_array[i].code_section_address)
+			{
+				/* Yes, swap them!  */
+				code_section_temp =  code_section_array[i];
+				code_section_array[i] =  code_section_array[j];
+				code_section_array[j] = code_section_temp;
+			}
+
+			/* Move the inner index.  */
+			j++;
+		} while (j < code_section_index);
+
+		/* Move top index.  */
+		i++;
+	}
+
+	address =  code_section_array[0].code_section_address;
+	zero_value = 0;
+	for (i = 0; i < code_section_index; i++)
+	{
+
+		/* Determine if there is any fill characters between sections.  */
+		while (address < code_section_array[i].code_section_address)
+		{
+
+			/* Write a zero value.  */
+			fwrite(&zero_value, 1, 1, binary_file);
+
+			/* Move address forward.  */
+			address++;
+		}
+
+		/* Now allocate memory for the code section.  */
+		code_buffer =  malloc(code_section_array[i].code_section_size);
+
+		/* Read in the code area.  */
+		j =  code_section_array[i].code_section_index;
+		elf_object_read(section_header[j].elf_section_header_offset, code_buffer, code_section_array[i].code_section_size);
+
+		/* Write out the contents of this program area.  */
+		size =  code_section_array[i].code_section_size;
+
+		j =  0;
+		while (size)
+		{
+
+			/* Print out a byte.  */
+			fwrite(&code_buffer[j], 1, 1, binary_file);
+
+			/* Move address forward.  */
+			address++;
+			
+			/* Decrement size.  */
+			size--;
+
+			/* Move index into buffer.  */
+			j++;
+		}
+	}
+
+	/* Close files.  */
+	fclose(source_file);
+    fclose(binary_file);
+
+	return 0;
+}

common_modules/module_manager/utilities/module_to_c_array.c

@@ -0,0 +1,392 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+
+/* Define the file handles.  */
+
+FILE	*source_file;
+FILE    *array_file;
+
+
+#define ELF_ID_STRING_SIZE	    16
+#define ELF_ARM_MACHINE_TYPE    40
+#define ELF_EXECUTABLE          2
+
+
+typedef struct ELF_HEADER_STRUCT 
+{
+    unsigned char   elf_header_id_string[ELF_ID_STRING_SIZE];
+    unsigned short  elf_header_file_type;
+    unsigned short  elf_header_machinge_type;
+    unsigned long   elf_header_version;
+    unsigned long   elf_header_entry_address;
+    unsigned long   elf_header_program_header_offset;
+    unsigned long   elf_header_section_header_offset;
+    unsigned long   elf_header_processor_flags;
+    unsigned short  elf_header_size;
+    unsigned short  elf_header_program_header_size;
+    unsigned short  elf_header_program_header_entries;
+    unsigned short  elf_header_section_header_size;
+    unsigned short  elf_header_section_header_entries;
+    unsigned short  elf_header_section_string_index;
+} ELF_HEADER;
+
+
+typedef struct ELF_PROGRAM_HEADER_STRUCT
+{
+    unsigned long   elf_program_header_type;
+    unsigned long   elf_program_header_offset;
+    unsigned long   elf_program_header_virtual_address;
+    unsigned long   elf_program_header_physical_address;
+    unsigned long   elf_program_header_file_size;
+    unsigned long   elf_program_header_memory_size;
+    unsigned long   elf_program_header_flags;
+    unsigned long   elf_program_header_alignment;
+} ELF_PROGRAM_HEADER;
+
+
+typedef struct ELF_SECTION_HEADER_STRUCT
+{
+    unsigned long   elf_section_header_name;
+    unsigned long   elf_section_header_type;
+    unsigned long   elf_section_header_flags;
+    unsigned long   elf_section_header_address;
+    unsigned long   elf_section_header_offset;
+    unsigned long   elf_section_header_size;
+    unsigned long   elf_section_header_link;
+    unsigned long   elf_section_header_info;
+    unsigned long   elf_section_header_alignment;
+    unsigned long   elf_section_header_entry_size;
+} ELF_SECTION_HEADER;
+
+
+typedef struct ELF_SYMBOL_TABLE_ENTRY_STRUCT
+{
+    unsigned long   elf_symbol_table_entry_name;
+    unsigned long   elf_symbol_table_entry_address;
+    unsigned long   elf_symbol_table_entry_size;
+    unsigned char   elf_symbol_table_entry_info;
+    unsigned char   elf_symbol_table_entry_other;
+    unsigned short  elf_symbol_table_entry_shndx;
+
+} ELF_SYMBOL_TABLE_ENTRY;
+
+
+typedef struct CODE_SECTION_ENTRY_STRUCT
+{
+    unsigned long   code_section_index;
+    unsigned long   code_section_address;
+    unsigned long   code_section_size;
+} CODE_SECTION_ENTRY;
+
+
+/* Define global variables.  */
+
+ELF_HEADER              header;
+ELF_PROGRAM_HEADER      *program_header;
+ELF_SECTION_HEADER      *section_header;
+unsigned char           *section_string_table;
+unsigned char           *main_string_table;
+unsigned long           total_symbols;
+ELF_SYMBOL_TABLE_ENTRY  *symbol_table;
+unsigned long           total_functions;
+ELF_SYMBOL_TABLE_ENTRY  *function_table;
+CODE_SECTION_ENTRY		*code_section_array;
+
+
+/* Define helper functions.  */
+
+int elf_object_read(unsigned long offset, void *object_address, int object_size)
+{
+
+int             i;
+int             alpha;
+unsigned char   *buffer;
+
+    /* Setup the buffer pointer.  */
+    buffer =  (unsigned char *) object_address;
+
+    /* Seek to the proper position in the file.  */
+    fseek(source_file, offset, SEEK_SET);
+
+    /* Read the ELF object.  */
+    for (i = 0; i < object_size; i++)
+    {
+        alpha =  fgetc(source_file);
+        
+        if (alpha == EOF)
+            return(1);
+            
+        buffer[i] =  (unsigned char) alpha;
+    }    
+
+    /* Return success.  */
+    return(0);
+}
+
+
+int main(int argc, char* argv[])
+{
+
+unsigned long           i, j, k;
+unsigned long           current_total;
+unsigned long           address;
+unsigned long           size;
+unsigned long           column;
+unsigned char           *code_buffer;
+unsigned long			code_section_index;
+CODE_SECTION_ENTRY		code_section_temp;
+
+
+    /* Determine if the proper number of files are provided.  */
+    if (argc != 3) 
+    {
+
+        /* Print an error message out and wait for user key hit.  */
+		printf("module_to_c_array.exe - Copyright (c) Microsoft Corporation v5.8\n");
+        printf("**** Error: invalid input parameter for module_to_c_array.exe **** \n");
+        printf("     Command Line Should be:\n\n");
+        printf("     > module_to_c_array source_elf_file c_array_file <cr> \n\n");
+        return(1);
+    }
+
+    /* Attempt to open the source file for reading.  */
+    source_file =  fopen(argv[1], "rb");
+
+    /* Determine if the source file was opened properly.  */
+    if (source_file == NULL)
+    {
+
+        /* Print an error message out and wait for user key hit.  */
+        printf("**** Error: open failed on source elf file **** \n");
+        printf("            File: %s   ", argv[1]);
+        return(2);
+    }
+    
+    /* Attempt to open the dump file for writing.  */
+    array_file =  fopen(argv[2], "w");
+
+    /* Determine if the dump file was opened properly.  */
+    if (array_file == NULL)
+    {
+
+        /* Print an error message out and wait for user key hit.  */
+        printf("**** Error: open failed on C array file **** \n");
+        printf("            File: %s   ", argv[2]);
+        return(3);
+    }
+
+    /* Read the ELF header.  */
+    elf_object_read(0, &header, sizeof(header));
+
+    fprintf(array_file, "/**************************** Module-to-C-array Utility *****************************************/\n");
+	fprintf(array_file, "/*                                                                                              */\n");
+	fprintf(array_file, "/* Copyright (c) Microsoft Corporation                      Version 5.8, build date: 03-01-2018 */\n");
+	fprintf(array_file, "/*                                                                                              */\n");
+	fprintf(array_file, "/************************************************************************************************/\n\n");
+    fprintf(array_file, "/* \n");
+	fprintf(array_file, "   Input ELF file:      %30s\n", argv[1]);
+	fprintf(array_file, "   Output C Array file: %30s\n", argv[2]);
+	fprintf(array_file, "*/\n\n");
+
+    /* Allocate memory for the program header(s).  */
+    program_header =  malloc(sizeof(ELF_PROGRAM_HEADER)*header.elf_header_program_header_entries);
+	
+    /* Read the program header(s).  */
+    elf_object_read(header.elf_header_program_header_offset, program_header, (sizeof(ELF_PROGRAM_HEADER)*header.elf_header_program_header_entries));
+
+    /* Allocate memory for the section header(s).  */
+    section_header =  malloc(sizeof(ELF_SECTION_HEADER)*header.elf_header_section_header_entries);
+
+    /* Read the section header(s).  */
+    elf_object_read(header.elf_header_section_header_offset, section_header, (sizeof(ELF_SECTION_HEADER)*header.elf_header_section_header_entries));
+
+
+    /* Alocate memory for the section string table.  */
+    section_string_table =  malloc(section_header[header.elf_header_section_string_index].elf_section_header_size);   
+
+    /* Read the section string table.  */
+    elf_object_read(section_header[header.elf_header_section_string_index].elf_section_header_offset, section_string_table, section_header[header.elf_header_section_string_index].elf_section_header_size);
+
+    /* Allocate memory for the code section array.  */
+    code_section_array =  malloc(sizeof(CODE_SECTION_ENTRY)*header.elf_header_section_header_entries);
+	code_section_index =  0;
+
+    /* Print out the section header(s).  */
+    for (i = 0; i < header.elf_header_section_header_entries; i++)
+    {
+
+		/* Determine if this section is a code section and there is a size.  */
+		if ((section_header[i].elf_section_header_type == 1) && (section_header[i].elf_section_header_size))
+		{
+
+            /* Check for an-instruction area.  */
+            if ((section_header[i].elf_section_header_flags & 0x4) || (section_header[i].elf_section_header_flags & 0x2))
+			{
+                /* Determine if this new section overlaps with an existing section.  */
+				for (j = 0; j < code_section_index; j++)
+				{
+					/* Is there an overlap?  */
+					if ((section_header[i].elf_section_header_address >= code_section_array[j].code_section_address) &&
+						((section_header[i].elf_section_header_address+section_header[i].elf_section_header_size + section_header[i].elf_section_header_offset) < (code_section_array[j].code_section_address+code_section_array[j].code_section_size)))
+					{
+						/* New section is within a current section, just disregard it.  */
+						break;
+					}
+				}
+
+				/* Determine if we have an overlap.  */
+				if (j == code_section_index)
+				{
+
+				    /* Yes, we have a code section... save it!  */
+				    code_section_array[code_section_index].code_section_index =  i;
+				    code_section_array[code_section_index].code_section_address =  section_header[i].elf_section_header_address;
+				    code_section_array[code_section_index].code_section_size =     section_header[i].elf_section_header_size;
+
+				    /* Move to next code section.  */
+				    code_section_index++;
+				}
+			}
+		}
+	}
+
+	/* Check for no code sections.  */
+	if (code_section_index == 0)
+	{
+
+        /* Print an error message out.  */
+        printf("**** Error: No code sections found! **** \n");
+
+		fprintf(array_file, "unsigned char  module_code[] = {0x00};\n\n");
+		
+		/* Close files.  */
+		fclose(source_file);
+		fclose(array_file);
+
+		return(4);
+ 	}
+
+	/* One or more code sections have been found... let's put them in the correct order by address.  */
+	i = 0;
+	while (i+1 < code_section_index)
+	{
+
+		/* Make the "ith" entry the lowest address.  */
+		j = i + 1;
+		do
+		{
+			/* Is there a new lowest address?  */
+			if (code_section_array[j].code_section_address < code_section_array[i].code_section_address)
+			{
+				/* Yes, swap them!  */
+				code_section_temp =  code_section_array[i];
+				code_section_array[i] =  code_section_array[j];
+				code_section_array[j] = code_section_temp;
+			}
+
+			/* Move the inner index.  */
+			j++;
+		} while (j < code_section_index);
+
+		/* Move top index.  */
+		i++;
+	}
+
+	/* Now print out the sections in a C array.  */
+	fprintf(array_file, "unsigned char  module_code[] = {\n\n");
+	fprintf(array_file, "/* Address                                            Contents                                        */\n\n");
+
+	address =  code_section_array[0].code_section_address;
+	column =   0;
+
+	for (i = 0; i < code_section_index; i++)
+	{
+
+		/* Determine if there is any fill characters between sections.  */
+		while (address < code_section_array[i].code_section_address)
+		{
+
+			/* Print out a character with a leading comma, except on the first character.  */
+			if (column == 0)
+				fprintf(array_file, "/* 0x%08X */   0x00", address);
+			else
+  				fprintf(array_file, ", 0x00");
+
+			/* Move column forward.  */
+			column++;
+
+			/* Are we at the end of the column?  */
+			if (column >= 16)
+			{
+				fprintf(array_file, ",\n");
+				column =  0;
+			}
+
+			/* Move address forward.  */
+			address++;
+		}
+
+		/* Now allocate memory for the code section.  */
+		code_buffer =  malloc(code_section_array[i].code_section_size);
+
+		/* Read in the code area.  */
+		j =  code_section_array[i].code_section_index;
+		elf_object_read(section_header[j].elf_section_header_offset, code_buffer, code_section_array[i].code_section_size);
+
+		/* Write out the contents of this program area.  */
+		size =  code_section_array[i].code_section_size;
+		
+		j =  0;
+		k =  0;
+		while (size)
+		{
+
+			/* Print out a character with a leading comma, except on the first character.  */
+			if (column == 0)
+				fprintf(array_file, "/* 0x%08X */   0x%02X", address, (unsigned int) code_buffer[j]);
+			else
+  				fprintf(array_file, ", 0x%02X", (unsigned int) code_buffer[j]);
+
+			/* Move column forward.  */
+			column++;
+
+			/* Are we at the end of the column?  */
+			if (column >= 16)
+			{
+
+				/* Is this the last byte of the image?  */
+				if ((size != 1) || (i+1 != code_section_index))
+				{
+					if (k == 0)
+					{
+						k = code_section_array[i].code_section_index;
+					    fprintf(array_file, ",      /* SECTION: %s  */\n", &section_string_table[section_header[k].elf_section_header_name]);
+					}
+					else
+  					    fprintf(array_file, ",\n");
+				}
+				column =  0;
+			}
+
+			/* Move address forward.  */
+			address++;
+			
+			/* Decrement size.  */
+			size--;
+
+			/* Move index into buffer.  */
+			j++;
+		}
+	}
+
+	/* Finally, finish the C array containing the module code.  */
+	fprintf(array_file, "};\n\n");
+
+	/* Close files.  */
+	fclose(source_file);
+    fclose(array_file);
+
+	return 0;
+}

common_smp/inc/tx_api.h

@@ -26,7 +26,7 @@
 /*  APPLICATION INTERFACE DEFINITION                       RELEASE        */
 /*                                                                        */
 /*    tx_api.h                                            PORTABLE SMP    */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -75,6 +75,9 @@
 /*                                            optimized the definition of */
 /*                                            TX_TIMER_TICKS_PER_SECOND,  */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Modified comment(s),          */
+/*                                            update patch number,        */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -127,7 +130,7 @@ extern   "C" {
 #define AZURE_RTOS_THREADX
 #define THREADX_MAJOR_VERSION           6
 #define THREADX_MINOR_VERSION           1
-#define THREADX_PATCH_VERSION           11
+#define THREADX_PATCH_VERSION           12
 
 /* Define the following symbol for backward compatibility */
 #define EL_PRODUCT_THREADX

common_smp/src/tx_trace_object_register.c

@@ -34,7 +34,7 @@
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_trace_object_register                           PORTABLE C      */
-/*                                                           6.1          */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -69,9 +69,12 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  05-19-2020     William E. Lamie         Initial Version 6.0           */
+/*  05-19-2020      William E. Lamie        Initial Version 6.0           */
-/*  09-30-2020     Yuxin Zhou               Modified comment(s),          */
+/*  09-30-2020      Yuxin Zhou              Modified comment(s),          */
 /*                                            resulting in version 6.1    */
+/*  07-29-2022      Scott Larson            Modified comment(s),          */
+/*                                            check for null name,        */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 VOID  _tx_trace_object_register(UCHAR object_type, VOID *object_ptr, CHAR *object_name, ULONG parameter_1, ULONG parameter_2)
@@ -223,6 +226,12 @@ TX_TRACE_OBJECT_ENTRY           *entry_ptr;
                     work_ptr =  TX_CHAR_TO_UCHAR_POINTER_CONVERT(object_name);
                     work_ptr =  TX_UCHAR_POINTER_ADD(work_ptr, i);
 
+                    /* Determine if object_name (work_ptr) is null.  */
+                    if (work_ptr == TX_NULL)
+                    {
+                        break;
+                    }
+
                     /* Copy a character of the name.  */
                     entry_ptr -> tx_trace_object_entry_name[i] =  (UCHAR) *work_ptr;
 

ports/cortex_a12/ac6/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                            ARMv7-A        */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -47,12 +47,15 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
+/*  09-30-2020      William E. Lamie        Initial Version 6.1           */
-/*  04-02-2021     Bhupendra Naphade        Modified comment(s),updated   */
+/*  04-02-2021      Bhupendra Naphade       Modified comment(s),updated   */
 /*                                            macro definition,           */
 /*                                            resulting in version 6.1.6  */
-/*  04-25-2022     Zhen Kong                Updated comments,             */
+/*  04-25-2022      Zhen Kong               Updated comments,             */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Updated comments, removed     */
+/*                                            unneeded temp variable,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -284,7 +287,7 @@ unsigned int   _tx_thread_interrupt_restore(UINT old_posture);
 
 #else
 
-#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save, tx_temp;
+#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save;
 
 #ifdef TX_ENABLE_FIQ_SUPPORT
 #define TX_DISABLE                              asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) );

ports/cortex_a12/gnu/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                            ARMv7-A        */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -47,12 +47,15 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
+/*  09-30-2020      William E. Lamie        Initial Version 6.1           */
-/*  04-02-2021     Bhupendra Naphade        Modified comment(s),updated   */
+/*  04-02-2021      Bhupendra Naphade       Modified comment(s),updated   */
 /*                                            macro definition,           */
 /*                                            resulting in version 6.1.6  */
-/*  04-25-2022     Zhen Kong                Updated comments,             */
+/*  04-25-2022      Zhen Kong               Updated comments,             */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Updated comments, removed     */
+/*                                            unneeded temp variable,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -284,7 +287,7 @@ unsigned int   _tx_thread_interrupt_restore(UINT old_posture);
 
 #else
 
-#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save, tx_temp;
+#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save;
 
 #ifdef TX_ENABLE_FIQ_SUPPORT
 #define TX_DISABLE                              asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) );

ports/cortex_a15/ac6/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                            ARMv7-A        */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -47,12 +47,15 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
+/*  09-30-2020      William E. Lamie        Initial Version 6.1           */
-/*  04-02-2021     Bhupendra Naphade        Modified comment(s),updated   */
+/*  04-02-2021      Bhupendra Naphade       Modified comment(s),updated   */
 /*                                            macro definition,           */
 /*                                            resulting in version 6.1.6  */
-/*  04-25-2022     Zhen Kong                Updated comments,             */
+/*  04-25-2022      Zhen Kong               Updated comments,             */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Updated comments, removed     */
+/*                                            unneeded temp variable,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -284,7 +287,7 @@ unsigned int   _tx_thread_interrupt_restore(UINT old_posture);
 
 #else
 
-#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save, tx_temp;
+#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save;
 
 #ifdef TX_ENABLE_FIQ_SUPPORT
 #define TX_DISABLE                              asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) );

ports/cortex_a15/gnu/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                            ARMv7-A        */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -47,12 +47,15 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
+/*  09-30-2020      William E. Lamie        Initial Version 6.1           */
-/*  04-02-2021     Bhupendra Naphade        Modified comment(s),updated   */
+/*  04-02-2021      Bhupendra Naphade       Modified comment(s),updated   */
 /*                                            macro definition,           */
 /*                                            resulting in version 6.1.6  */
-/*  04-25-2022     Zhen Kong                Updated comments,             */
+/*  04-25-2022      Zhen Kong               Updated comments,             */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Updated comments, removed     */
+/*                                            unneeded temp variable,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -284,7 +287,7 @@ unsigned int   _tx_thread_interrupt_restore(UINT old_posture);
 
 #else
 
-#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save, tx_temp;
+#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save;
 
 #ifdef TX_ENABLE_FIQ_SUPPORT
 #define TX_DISABLE                              asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) );

ports/cortex_a17/ac6/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                            ARMv7-A        */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -47,12 +47,15 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
+/*  09-30-2020      William E. Lamie        Initial Version 6.1           */
-/*  04-02-2021     Bhupendra Naphade        Modified comment(s),updated   */
+/*  04-02-2021      Bhupendra Naphade       Modified comment(s),updated   */
 /*                                            macro definition,           */
 /*                                            resulting in version 6.1.6  */
-/*  04-25-2022     Zhen Kong                Updated comments,             */
+/*  04-25-2022      Zhen Kong               Updated comments,             */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Updated comments, removed     */
+/*                                            unneeded temp variable,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -284,7 +287,7 @@ unsigned int   _tx_thread_interrupt_restore(UINT old_posture);
 
 #else
 
-#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save, tx_temp;
+#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save;
 
 #ifdef TX_ENABLE_FIQ_SUPPORT
 #define TX_DISABLE                              asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) );

ports/cortex_a17/gnu/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                            ARMv7-A        */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -47,12 +47,15 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
+/*  09-30-2020      William E. Lamie        Initial Version 6.1           */
-/*  04-02-2021     Bhupendra Naphade        Modified comment(s),updated   */
+/*  04-02-2021      Bhupendra Naphade       Modified comment(s),updated   */
 /*                                            macro definition,           */
 /*                                            resulting in version 6.1.6  */
-/*  04-25-2022     Zhen Kong                Updated comments,             */
+/*  04-25-2022      Zhen Kong               Updated comments,             */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Updated comments, removed     */
+/*                                            unneeded temp variable,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -284,7 +287,7 @@ unsigned int   _tx_thread_interrupt_restore(UINT old_posture);
 
 #else
 
-#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save, tx_temp;
+#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save;
 
 #ifdef TX_ENABLE_FIQ_SUPPORT
 #define TX_DISABLE                              asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) );

ports/cortex_a5/ac6/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                            ARMv7-A        */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -47,12 +47,15 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
+/*  09-30-2020      William E. Lamie        Initial Version 6.1           */
-/*  04-02-2021     Bhupendra Naphade        Modified comment(s),updated   */
+/*  04-02-2021      Bhupendra Naphade       Modified comment(s),updated   */
 /*                                            macro definition,           */
 /*                                            resulting in version 6.1.6  */
-/*  04-25-2022     Zhen Kong                Updated comments,             */
+/*  04-25-2022      Zhen Kong               Updated comments,             */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Updated comments, removed     */
+/*                                            unneeded temp variable,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -284,7 +287,7 @@ unsigned int   _tx_thread_interrupt_restore(UINT old_posture);
 
 #else
 
-#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save, tx_temp;
+#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save;
 
 #ifdef TX_ENABLE_FIQ_SUPPORT
 #define TX_DISABLE                              asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) );

ports/cortex_a5/gnu/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                            ARMv7-A        */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -47,12 +47,15 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
+/*  09-30-2020      William E. Lamie        Initial Version 6.1           */
-/*  04-02-2021     Bhupendra Naphade        Modified comment(s),updated   */
+/*  04-02-2021      Bhupendra Naphade       Modified comment(s),updated   */
 /*                                            macro definition,           */
 /*                                            resulting in version 6.1.6  */
-/*  04-25-2022     Zhen Kong                Updated comments,             */
+/*  04-25-2022      Zhen Kong               Updated comments,             */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Updated comments, removed     */
+/*                                            unneeded temp variable,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -284,7 +287,7 @@ unsigned int   _tx_thread_interrupt_restore(UINT old_posture);
 
 #else
 
-#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save, tx_temp;
+#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save;
 
 #ifdef TX_ENABLE_FIQ_SUPPORT
 #define TX_DISABLE                              asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) );

ports/cortex_a7/ac6/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                            ARMv7-A        */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -47,12 +47,15 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
+/*  09-30-2020      William E. Lamie        Initial Version 6.1           */
-/*  04-02-2021     Bhupendra Naphade        Modified comment(s),updated   */
+/*  04-02-2021      Bhupendra Naphade       Modified comment(s),updated   */
 /*                                            macro definition,           */
 /*                                            resulting in version 6.1.6  */
-/*  04-25-2022     Zhen Kong                Updated comments,             */
+/*  04-25-2022      Zhen Kong               Updated comments,             */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Updated comments, removed     */
+/*                                            unneeded temp variable,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -284,7 +287,7 @@ unsigned int   _tx_thread_interrupt_restore(UINT old_posture);
 
 #else
 
-#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save, tx_temp;
+#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save;
 
 #ifdef TX_ENABLE_FIQ_SUPPORT
 #define TX_DISABLE                              asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) );

ports/cortex_a7/gnu/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                            ARMv7-A        */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -47,12 +47,15 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
+/*  09-30-2020      William E. Lamie        Initial Version 6.1           */
-/*  04-02-2021     Bhupendra Naphade        Modified comment(s),updated   */
+/*  04-02-2021      Bhupendra Naphade       Modified comment(s),updated   */
 /*                                            macro definition,           */
 /*                                            resulting in version 6.1.6  */
-/*  04-25-2022     Zhen Kong                Updated comments,             */
+/*  04-25-2022      Zhen Kong               Updated comments,             */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Updated comments, removed     */
+/*                                            unneeded temp variable,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -284,7 +287,7 @@ unsigned int   _tx_thread_interrupt_restore(UINT old_posture);
 
 #else
 
-#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save, tx_temp;
+#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save;
 
 #ifdef TX_ENABLE_FIQ_SUPPORT
 #define TX_DISABLE                              asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) );

ports/cortex_a8/ac6/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                            ARMv7-A        */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -47,12 +47,15 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
+/*  09-30-2020      William E. Lamie        Initial Version 6.1           */
-/*  04-02-2021     Bhupendra Naphade        Modified comment(s),updated   */
+/*  04-02-2021      Bhupendra Naphade       Modified comment(s),updated   */
 /*                                            macro definition,           */
 /*                                            resulting in version 6.1.6  */
-/*  04-25-2022     Zhen Kong                Updated comments,             */
+/*  04-25-2022      Zhen Kong               Updated comments,             */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Updated comments, removed     */
+/*                                            unneeded temp variable,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -284,7 +287,7 @@ unsigned int   _tx_thread_interrupt_restore(UINT old_posture);
 
 #else
 
-#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save, tx_temp;
+#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save;
 
 #ifdef TX_ENABLE_FIQ_SUPPORT
 #define TX_DISABLE                              asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) );

ports/cortex_a8/gnu/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                            ARMv7-A        */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -47,12 +47,15 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
+/*  09-30-2020      William E. Lamie        Initial Version 6.1           */
-/*  04-02-2021     Bhupendra Naphade        Modified comment(s),updated   */
+/*  04-02-2021      Bhupendra Naphade       Modified comment(s),updated   */
 /*                                            macro definition,           */
 /*                                            resulting in version 6.1.6  */
-/*  04-25-2022     Zhen Kong                Updated comments,             */
+/*  04-25-2022      Zhen Kong               Updated comments,             */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Updated comments, removed     */
+/*                                            unneeded temp variable,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -284,7 +287,7 @@ unsigned int   _tx_thread_interrupt_restore(UINT old_posture);
 
 #else
 
-#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save, tx_temp;
+#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save;
 
 #ifdef TX_ENABLE_FIQ_SUPPORT
 #define TX_DISABLE                              asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) );

ports/cortex_a9/ac6/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                            ARMv7-A        */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -47,12 +47,15 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
+/*  09-30-2020      William E. Lamie        Initial Version 6.1           */
-/*  04-02-2021     Bhupendra Naphade        Modified comment(s),updated   */
+/*  04-02-2021      Bhupendra Naphade       Modified comment(s),updated   */
 /*                                            macro definition,           */
 /*                                            resulting in version 6.1.6  */
-/*  04-25-2022     Zhen Kong                Updated comments,             */
+/*  04-25-2022      Zhen Kong               Updated comments,             */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Updated comments, removed     */
+/*                                            unneeded temp variable,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -284,7 +287,7 @@ unsigned int   _tx_thread_interrupt_restore(UINT old_posture);
 
 #else
 
-#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save, tx_temp;
+#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save;
 
 #ifdef TX_ENABLE_FIQ_SUPPORT
 #define TX_DISABLE                              asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) );

ports/cortex_a9/gnu/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                            ARMv7-A        */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -47,12 +47,15 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
+/*  09-30-2020      William E. Lamie        Initial Version 6.1           */
-/*  04-02-2021     Bhupendra Naphade        Modified comment(s),updated   */
+/*  04-02-2021      Bhupendra Naphade       Modified comment(s),updated   */
 /*                                            macro definition,           */
 /*                                            resulting in version 6.1.6  */
-/*  04-25-2022     Zhen Kong                Updated comments,             */
+/*  04-25-2022      Zhen Kong               Updated comments,             */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Updated comments, removed     */
+/*                                            unneeded temp variable,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -284,7 +287,7 @@ unsigned int   _tx_thread_interrupt_restore(UINT old_posture);
 
 #else
 
-#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save, tx_temp;
+#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save;
 
 #ifdef TX_ENABLE_FIQ_SUPPORT
 #define TX_DISABLE                              asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) );

ports/cortex_m0/gnu/example_build/build_threadx.bat

@@ -1,5 +1,4 @@
 del tx.a
-arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb tx_initialize_low_level.S
 arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb ../src/tx_thread_stack_build.S
 arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb ../src/tx_thread_schedule.S
 arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb ../src/tx_thread_system_return.S
@@ -7,7 +6,7 @@ arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb ../src/tx_thread_context_save.S
 arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb ../src/tx_thread_context_restore.S
 arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb ../src/tx_thread_interrupt_control.S
 arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb ../src/tx_timer_interrupt.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb ../src/tx_thread_interrupt_control.S
+
 arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_allocate.c
 arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_cleanup.c
 arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_create.c
@@ -192,8 +191,8 @@ arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb -I../../../../common/inc -I../in
 arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_deactivate.c
 arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_delete.c
 arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_info_get.c
+
 arm-none-eabi-ar -r tx.a tx_thread_stack_build.o tx_thread_schedule.o tx_thread_system_return.o tx_thread_context_save.o tx_thread_context_restore.o tx_timer_interrupt.o tx_thread_interrupt_control.o
-arm-none-eabi-ar -r tx.a tx_thread_interrupt_control.o
 arm-none-eabi-ar -r tx.a tx_block_allocate.o tx_block_pool_cleanup.o tx_block_pool_create.o tx_block_pool_delete.o tx_block_pool_info_get.o
 arm-none-eabi-ar -r tx.a tx_block_pool_initialize.o tx_block_pool_performance_info_get.o tx_block_pool_performance_system_info_get.o tx_block_pool_prioritize.o
 arm-none-eabi-ar -r tx.a tx_block_release.o tx_byte_allocate.o tx_byte_pool_cleanup.o tx_byte_pool_create.o tx_byte_pool_delete.o tx_byte_pool_info_get.o

ports/cortex_m0/gnu/example_build/build_threadx_sample.bat

@@ -1,7 +1,5 @@
-arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb tx_vectors.S
+arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb cortexm0_vectors.S
 arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb cortexm0_crt0.S
 arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb tx_initialize_low_level.S
 arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb -I../../../../common/inc -I../inc sample_threadx.c
-arm-none-eabi-ld -A cortex-m0 -ereset_handler -T sample_threadx.ld tx_vectors.o cortexm0_crt0.o tx_initialize_low_level.o sample_threadx.o tx.a  libgcc.a -o sample_threadx.out -M > sample_threadx.map
+arm-none-eabi-gcc -g -mcpu=cortex-m0 -mthumb -T sample_threadx.ld -ereset_handler -nostartfiles -o sample_threadx.out -Wl,-Map=sample_threadx.map cortexm0_vectors.o cortexm0_crt0.o tx_initialize_low_level.o sample_threadx.o tx.a
-
-

ports/cortex_m0/gnu/example_build/cortexm0_crt0.S

@@ -13,7 +13,6 @@ _start:
   ldr r1, =__stack_end__
   mov sp, r1
 
-
   /* Copy initialised sections into RAM if required. */
   ldr r0, =__data_load_start__
   ldr r1, =__data_start__
@@ -47,7 +46,6 @@ _start:
   mov r2, #0
   bl crt0_memory_set
 
-
   /* Setup heap - not recommended for Threadx but here for compatibility reasons */
   ldr r0, = __heap_start__
   ldr r1, = __heap_end__
@@ -57,7 +55,6 @@ _start:
   add r0, r0, #4
   str r1, [r0]
 
-
   /* constructors in case of using C++ */
   ldr r0, =__ctors_start__
   ldr r1, =__ctors_end__
@@ -72,13 +69,11 @@ crt0_ctor_loop:
   b crt0_ctor_loop
 crt0_ctor_end:
 
-
   /* Setup call frame for main() */
   mov r0, #0
   mov lr, r0
   mov r12, sp
 
-
 start:
   /* Jump to main() */
   mov r0, #0
@@ -93,7 +88,6 @@ crt0_exit_loop:
 
   /* Startup helper functions. */
 
-
 crt0_memory_copy:
   cmp r0, r1
   beq memory_copy_done
@@ -109,7 +103,6 @@ memory_copy_loop:
 memory_copy_done:
   bx lr
 
-
 crt0_memory_set:
   cmp r0, r1
   beq memory_set_done
@@ -119,7 +112,6 @@ crt0_memory_set:
 memory_set_done:
   bx lr
 
-
   /* Setup attibutes of stack and heap sections so they don't take up room in the elf file */
   .section .stack, "wa", %nobits
   .section .stack_process, "wa", %nobits

ports/cortex_m0/gnu/example_build/cortexm0_vectors.S

@@ -1,5 +1,3 @@
-
-
   .global reset_handler
 
   .global __tx_NMIHandler
@@ -10,7 +8,6 @@
   .global __tx_SysTickHandler 
   .global __tx_BadHandler
 
-
   .syntax unified
   .section .vectors, "ax"
   .code 16
@@ -29,7 +26,7 @@ _vectors:
   .word 0 // Reserved
   .word 0 // Reserved
   .word 0 // Reserved
-  .word __tx_SVCallHandler //_SVC_Handler - used by Threadx scheduler //
+  .word __tx_SVCallHandler    //_SVC_Handler - used by Threadx scheduler //
   .word __tx_DBGHandler
   .word 0 // Reserved
   .word __tx_PendSVHandler 
@@ -70,14 +67,10 @@ _vectors:
   .word __tx_BadHandler
   .word __tx_BadHandler
 
-
+  .section .init, "ax"
-
+  .thumb_func
-    .section .init, "ax"
-    .thumb_func
 reset_handler:
-
+  // low level hardware config, such as PLL setup goes here
-// low level hardware config, such as PLL setup goes here
-
   b _start
 
 

ports/cortex_m0/gnu/example_build/sample_threadx.ld

@@ -1,206 +1,125 @@
 MEMORY
 {
-  UNPLACED_SECTIONS (wx) : ORIGIN = 0x100000000, LENGTH = 0
+  RAM (wx) : ORIGIN = 0x20000000, LENGTH = 0x00800000
-  CM3_System_Control_Space (wx) : ORIGIN = 0xe000e000, LENGTH = 0x00001000
+  FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00400000
-  AHB_Peripherals (wx) : ORIGIN = 0x50000000, LENGTH = 0x00200000
-  APB1_Peripherals (wx) : ORIGIN = 0x40080000, LENGTH = 0x00080000
-  APB0_Peripherals (wx) : ORIGIN = 0x40000000, LENGTH = 0x00080000
-  GPIO (wx) : ORIGIN = 0x2009c000, LENGTH = 0x00004000
-  AHBSRAM1 (wx) : ORIGIN = 0x20080000, LENGTH = 0x00004000
-  AHBSRAM0 (wx) : ORIGIN = 0x2007c000, LENGTH = 0x00004000
-  RAM (wx) : ORIGIN = 0x10000000, LENGTH = 0x00008000
-  FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00080000
 }
 
+__STACKSIZE__ = 1024;
+__STACKSIZE_PROCESS__ = 0;
+__HEAPSIZE__ = 128;
 
 SECTIONS
 {
-  __CM3_System_Control_Space_segment_start__ = 0xe000e000;
+  .vectors : 
-  __CM3_System_Control_Space_segment_end__ = 0xe000f000;
-  __AHB_Peripherals_segment_start__ = 0x50000000;
-  __AHB_Peripherals_segment_end__ = 0x50200000;
-  __APB1_Peripherals_segment_start__ = 0x40080000;
-  __APB1_Peripherals_segment_end__ = 0x40100000;
-  __APB0_Peripherals_segment_start__ = 0x40000000;
-  __APB0_Peripherals_segment_end__ = 0x40080000;
-  __GPIO_segment_start__ = 0x2009c000;
-  __GPIO_segment_end__ = 0x200a0000;
-  __AHBSRAM1_segment_start__ = 0x20080000;
-  __AHBSRAM1_segment_end__ = 0x20084000;
-  __AHBSRAM0_segment_start__ = 0x2007c000;
-  __AHBSRAM0_segment_end__ = 0x20080000;
-  __RAM_segment_start__ = 0x10000000;
-  __RAM_segment_end__ = 0x10008000;
-  __FLASH_segment_start__ = 0x00000000;
-  __FLASH_segment_end__ = 0x00080000;
-
-  __STACKSIZE__ = 1024;
-  __STACKSIZE_PROCESS__ = 0;
-  __STACKSIZE_IRQ__ = 0;
-  __STACKSIZE_FIQ__ = 0;
-  __STACKSIZE_SVC__ = 0;
-  __STACKSIZE_ABT__ = 0;
-  __STACKSIZE_UND__ = 0;
-  __HEAPSIZE__ = 128;
-
-  __vectors_load_start__ = __FLASH_segment_start__;
-  .vectors __FLASH_segment_start__ : AT(__FLASH_segment_start__)
   {
-    __vectors_start__ = .;
+    KEEP(*(.vectors .vectors.*))
-    *(.vectors .vectors.*)
+  } > FLASH
-  }
-  __vectors_end__ = __vectors_start__ + SIZEOF(.vectors);
 
-  . = ASSERT(__vectors_end__ >= __FLASH_segment_start__ && __vectors_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .vectors is too large to fit in FLASH memory segment");
+	.text :
+	{
+		*(.text*)
 
-  __init_load_start__ = ALIGN(__vectors_end__ , 4);
+		KEEP(*(.init))
-  .init ALIGN(__vectors_end__ , 4) : AT(ALIGN(__vectors_end__ , 4))
+		KEEP(*(.fini))
-  {
-    __init_start__ = .;
-    *(.init .init.*)
-  }
-  __init_end__ = __init_start__ + SIZEOF(.init);
 
-  . = ASSERT(__init_end__ >= __FLASH_segment_start__ && __init_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .init is too large to fit in FLASH memory segment");
+		/* .ctors */
+		*crtbegin.o(.ctors)
+		*crtbegin?.o(.ctors)
+		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+    __ctors_start__ = ALIGN(4);
+		*(SORT(.ctors.*))
+		*(.ctors)
+    __ctors_end__ = ALIGN(4);
 
-  __text_load_start__ = ALIGN(__init_end__ , 4);
+		/* .dtors */
-  .text ALIGN(__init_end__ , 4) : AT(ALIGN(__init_end__ , 4))
+ 		*crtbegin.o(.dtors)
-  {
+ 		*crtbegin?.o(.dtors)
-    __text_start__ = .;
+ 		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
-    *(.text .text.* .glue_7t .glue_7 .gnu.linkonce.t.* .gcc_except_table)
+    __dtors_start__ = ALIGN(4);
-  }
+ 		*(SORT(.dtors.*))
-  __text_end__ = __text_start__ + SIZEOF(.text);
+ 		*(.dtors)
+    __dtors_end__ = ALIGN(4);
 
-  . = ASSERT(__text_end__ >= __FLASH_segment_start__ && __text_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .text is too large to fit in FLASH memory segment");
+		*(.rodata*)
 
-  __dtors_load_start__ = ALIGN(__text_end__ , 4);
+		KEEP(*(.eh_frame*))
-  .dtors ALIGN(__text_end__ , 4) : AT(ALIGN(__text_end__ , 4))
+	} > FLASH
-  {
-    __dtors_start__ = .;
-    KEEP (*(SORT(.dtors.*))) KEEP (*(.dtors))
-  }
-  __dtors_end__ = __dtors_start__ + SIZEOF(.dtors);
 
-  . = ASSERT(__dtors_end__ >= __FLASH_segment_start__ && __dtors_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .dtors is too large to fit in FLASH memory segment");
+	.ARM.extab : 
+	{
+		*(.ARM.extab* .gnu.linkonce.armextab.*)
+	} > FLASH
 
-  __ctors_load_start__ = ALIGN(__dtors_end__ , 4);
+	__exidx_start = .;
-  .ctors ALIGN(__dtors_end__ , 4) : AT(ALIGN(__dtors_end__ , 4))
+	.ARM.exidx :
-  {
+	{
-    __ctors_start__ = .;
+		*(.ARM.exidx* .gnu.linkonce.armexidx.*)
-    KEEP (*(SORT(.ctors.*))) KEEP (*(.ctors))
+	} > FLASH
-  }
+	__exidx_end = .;
-  __ctors_end__ = __ctors_start__ + SIZEOF(.ctors);
 
-  . = ASSERT(__ctors_end__ >= __FLASH_segment_start__ && __ctors_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .ctors is too large to fit in FLASH memory segment");
+	__data_load_start__ = ALIGN (4);
 
-  __rodata_load_start__ = ALIGN(__ctors_end__ , 4);
+	.data : AT (__data_load_start__) 
-  .rodata ALIGN(__ctors_end__ , 4) : AT(ALIGN(__ctors_end__ , 4))
+	{
-  {
+		__data_start__ = .;
-    __rodata_start__ = .;
-    *(.rodata .rodata.* .gnu.linkonce.r.*)
-  }
-  __rodata_end__ = __rodata_start__ + SIZEOF(.rodata);
 
-  . = ASSERT(__rodata_end__ >= __FLASH_segment_start__ && __rodata_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .rodata is too large to fit in FLASH memory segment");
+		*(vtable)
+		*(.data*)
 
-  __fast_load_start__ = ALIGN(__rodata_end__ , 4);
+		. = ALIGN(4);
-  .fast ALIGN(__RAM_segment_start__ , 4) : AT(ALIGN(__rodata_end__ , 4))
+		/* preinit data */
-  {
+		PROVIDE_HIDDEN (__preinit_array_start = .);
-    __fast_start__ = .;
+		KEEP(*(.preinit_array))
-    *(.fast .fast.*)
+		PROVIDE_HIDDEN (__preinit_array_end = .);
-  }
-  __fast_end__ = __fast_start__ + SIZEOF(.fast);
 
-  __fast_load_end__ = __fast_load_start__ + SIZEOF(.fast);
+		. = ALIGN(4);
+		/* init data */
+		PROVIDE_HIDDEN (__init_array_start = .);
+		KEEP(*(SORT(.init_array.*)))
+		KEEP(*(.init_array))
+		PROVIDE_HIDDEN (__init_array_end = .);
 
-  . = ASSERT((__fast_load_start__ + SIZEOF(.fast)) >= __FLASH_segment_start__ && (__fast_load_start__ + SIZEOF(.fast)) <= (__FLASH_segment_start__ + 0x00080000) , "error: .fast is too large to fit in FLASH memory segment");
+		. = ALIGN(4);
+		/* finit data */
+		PROVIDE_HIDDEN (__fini_array_start = .);
+		KEEP(*(SORT(.fini_array.*)))
+		KEEP(*(.fini_array))
+		PROVIDE_HIDDEN (__fini_array_end = .);
 
-  .fast_run ALIGN(__RAM_segment_start__ , 4) (NOLOAD) :
+		KEEP(*(.jcr*))
-  {
+		. = ALIGN(4);
-    __fast_run_start__ = .;
+		/* All data end */
-    . = MAX(__fast_run_start__ + SIZEOF(.fast), .);
+		
-  }
+    __data_end__ = .;
-  __fast_run_end__ = __fast_run_start__ + SIZEOF(.fast_run);
 
-  . = ASSERT(__fast_run_end__ >= __RAM_segment_start__ && __fast_run_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .fast_run is too large to fit in RAM memory segment");
+	} > RAM
 
-  __data_load_start__ = ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4);
+	.bss :
-  .data ALIGN(__fast_run_end__ , 4) : AT(ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4))
+	{
-  {
+		. = ALIGN(4);
-    __data_start__ = .;
+		__bss_start__ = .;
-    *(.data .data.* .gnu.linkonce.d.*)
+		*(.bss*)
-  }
+		*(COMMON)
-  __data_end__ = __data_start__ + SIZEOF(.data);
+		. = ALIGN(4);
+		__bss_end__ = .;
 
-  __data_load_end__ = __data_load_start__ + SIZEOF(.data);
+	} > RAM
-
+	
-  __FLASH_segment_used_end__ = ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4) + SIZEOF(.data);
+	.heap (COPY):
-
+	{
-  . = ASSERT((__data_load_start__ + SIZEOF(.data)) >= __FLASH_segment_start__ && (__data_load_start__ + SIZEOF(.data)) <= (__FLASH_segment_start__ + 0x00080000) , "error: .data is too large to fit in FLASH memory segment");
+    __heap_start__ = ALIGN(4);
-
-  .data_run ALIGN(__fast_run_end__ , 4) (NOLOAD) :
-  {
-    __data_run_start__ = .;
-    . = MAX(__data_run_start__ + SIZEOF(.data), .);
-  }
-  __data_run_end__ = __data_run_start__ + SIZEOF(.data_run);
-
-  . = ASSERT(__data_run_end__ >= __RAM_segment_start__ && __data_run_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .data_run is too large to fit in RAM memory segment");
-
-  __bss_load_start__ = ALIGN(__data_run_end__ , 4);
-  .bss ALIGN(__data_run_end__ , 4) (NOLOAD) : AT(ALIGN(__data_run_end__ , 4))
-  {
-    __bss_start__ = .;
-    *(.bss .bss.* .gnu.linkonce.b.*) *(COMMON)
-  }
-  __bss_end__ = __bss_start__ + SIZEOF(.bss);
-
-  . = ASSERT(__bss_end__ >= __RAM_segment_start__ && __bss_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .bss is too large to fit in RAM memory segment");
-
-  __non_init_load_start__ = ALIGN(__bss_end__ , 4);
-  .non_init ALIGN(__bss_end__ , 4) (NOLOAD) : AT(ALIGN(__bss_end__ , 4))
-  {
-    __non_init_start__ = .;
-    *(.non_init .non_init.*)
-  }
-  __non_init_end__ = __non_init_start__ + SIZEOF(.non_init);
-
-  . = ASSERT(__non_init_end__ >= __RAM_segment_start__ && __non_init_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .non_init is too large to fit in RAM memory segment");
-
-  __heap_load_start__ = ALIGN(__non_init_end__ , 4);
-  .heap ALIGN(__non_init_end__ , 4) (NOLOAD) : AT(ALIGN(__non_init_end__ , 4))
-  {
-    __heap_start__ = .;
     *(.heap)
-    . = ALIGN(MAX(__heap_start__ + __HEAPSIZE__ , .), 4);
+    . = ALIGN(. + __HEAPSIZE__, 4);
-  }
+    __heap_end__ = ALIGN(4);
-  __heap_end__ = __heap_start__ + SIZEOF(.heap);
+	} > RAM
 
-  . = ASSERT(__heap_end__ >= __RAM_segment_start__ && __heap_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .heap is too large to fit in RAM memory segment");
+  .stack ALIGN(4) (NOLOAD) :
-
-  __stack_load_start__ = ALIGN(__heap_end__ , 4);
-  .stack ALIGN(__heap_end__ , 4) (NOLOAD) : AT(ALIGN(__heap_end__ , 4))
   {
-    __stack_start__ = .;
+    __stack_start__ = ALIGN(4);
     *(.stack)
-    . = ALIGN(MAX(__stack_start__ + __STACKSIZE__ , .), 4);
+    . = ALIGN(. + __STACKSIZE__, 4);
-  }
+    __stack_end__ = ALIGN(4);
-  __stack_end__ = __stack_start__ + SIZEOF(.stack);
+  } > RAM
-
-  . = ASSERT(__stack_end__ >= __RAM_segment_start__ && __stack_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .stack is too large to fit in RAM memory segment");
-
-  __stack_process_load_start__ = ALIGN(__stack_end__ , 4);
-  .stack_process ALIGN(__stack_end__ , 4) (NOLOAD) : AT(ALIGN(__stack_end__ , 4))
-  {
-    __stack_process_start__ = .;
-    *(.stack_process)
-    . = ALIGN(MAX(__stack_process_start__ + __STACKSIZE_PROCESS__ , .), 4);
-  }
-  __stack_process_end__ = __stack_process_start__ + SIZEOF(.stack_process);
-
-  __RAM_segment_used_end__ = ALIGN(__stack_end__ , 4) + SIZEOF(.stack_process);
-
-  . = ASSERT(__stack_process_end__ >= __RAM_segment_start__ && __stack_process_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .stack_process is too large to fit in RAM memory segment");
 
+  __RAM_segment_used_end__ = .;
 }
-

ports/cortex_m0/iar/CMakeLists.txt

@@ -0,0 +1,21 @@
+
+target_sources(${PROJECT_NAME}
+    PRIVATE
+    # {{BEGIN_TARGET_SOURCES}}
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_iar.c
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_restore.S
+	${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_save.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_control.S
+	${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_disable.S
+	${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_restore.S    
+	${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_schedule.S
+	${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_stack_build.S
+	${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_system_return.S
+	${CMAKE_CURRENT_LIST_DIR}/src/tx_timer_interrupt.S
+    # {{END_TARGET_SOURCES}}
+)
+
+target_include_directories(${PROJECT_NAME}
+    PUBLIC
+    ${CMAKE_CURRENT_LIST_DIR}/inc
+)

ports/cortex_m0/keil/example_build/sample_threadx.uvoptx

@@ -1,281 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
-<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
-
-  <SchemaVersion>1.0</SchemaVersion>
-
-  <Header>### uVision Project, (C) Keil Software</Header>
-
-  <Extensions>
-    <cExt>*.c</cExt>
-    <aExt>*.s*; *.src; *.a*</aExt>
-    <oExt>*.obj; *.o</oExt>
-    <lExt>*.lib</lExt>
-    <tExt>*.txt; *.h; *.inc</tExt>
-    <pExt>*.plm</pExt>
-    <CppX>*.cpp</CppX>
-    <nMigrate>0</nMigrate>
-  </Extensions>
-
-  <DaveTm>
-    <dwLowDateTime>0</dwLowDateTime>
-    <dwHighDateTime>0</dwHighDateTime>
-  </DaveTm>
-
-  <Target>
-    <TargetName>sample_threadx</TargetName>
-    <ToolsetNumber>0x4</ToolsetNumber>
-    <ToolsetName>ARM-ADS</ToolsetName>
-    <TargetOption>
-      <CLKADS>12000000</CLKADS>
-      <OPTTT>
-        <gFlags>1</gFlags>
-        <BeepAtEnd>1</BeepAtEnd>
-        <RunSim>0</RunSim>
-        <RunTarget>1</RunTarget>
-        <RunAbUc>0</RunAbUc>
-      </OPTTT>
-      <OPTHX>
-        <HexSelection>1</HexSelection>
-        <FlashByte>65535</FlashByte>
-        <HexRangeLowAddress>0</HexRangeLowAddress>
-        <HexRangeHighAddress>0</HexRangeHighAddress>
-        <HexOffset>0</HexOffset>
-      </OPTHX>
-      <OPTLEX>
-        <PageWidth>79</PageWidth>
-        <PageLength>66</PageLength>
-        <TabStop>8</TabStop>
-        <ListingPath>.\Listings\</ListingPath>
-      </OPTLEX>
-      <ListingPage>
-        <CreateCListing>1</CreateCListing>
-        <CreateAListing>1</CreateAListing>
-        <CreateLListing>1</CreateLListing>
-        <CreateIListing>0</CreateIListing>
-        <AsmCond>1</AsmCond>
-        <AsmSymb>1</AsmSymb>
-        <AsmXref>0</AsmXref>
-        <CCond>1</CCond>
-        <CCode>0</CCode>
-        <CListInc>0</CListInc>
-        <CSymb>0</CSymb>
-        <LinkerCodeListing>0</LinkerCodeListing>
-      </ListingPage>
-      <OPTXL>
-        <LMap>1</LMap>
-        <LComments>1</LComments>
-        <LGenerateSymbols>1</LGenerateSymbols>
-        <LLibSym>1</LLibSym>
-        <LLines>1</LLines>
-        <LLocSym>1</LLocSym>
-        <LPubSym>1</LPubSym>
-        <LXref>0</LXref>
-        <LExpSel>0</LExpSel>
-      </OPTXL>
-      <OPTFL>
-        <tvExp>1</tvExp>
-        <tvExpOptDlg>0</tvExpOptDlg>
-        <IsCurrentTarget>1</IsCurrentTarget>
-      </OPTFL>
-      <CpuCode>7</CpuCode>
-      <DebugOpt>
-        <uSim>1</uSim>
-        <uTrg>0</uTrg>
-        <sLdApp>1</sLdApp>
-        <sGomain>1</sGomain>
-        <sRbreak>1</sRbreak>
-        <sRwatch>1</sRwatch>
-        <sRmem>1</sRmem>
-        <sRfunc>1</sRfunc>
-        <sRbox>1</sRbox>
-        <tLdApp>1</tLdApp>
-        <tGomain>1</tGomain>
-        <tRbreak>1</tRbreak>
-        <tRwatch>1</tRwatch>
-        <tRmem>1</tRmem>
-        <tRfunc>0</tRfunc>
-        <tRbox>1</tRbox>
-        <tRtrace>1</tRtrace>
-        <sRSysVw>1</sRSysVw>
-        <tRSysVw>1</tRSysVw>
-        <sRunDeb>0</sRunDeb>
-        <sLrtime>0</sLrtime>
-        <bEvRecOn>1</bEvRecOn>
-        <bSchkAxf>0</bSchkAxf>
-        <bTchkAxf>0</bTchkAxf>
-        <nTsel>5</nTsel>
-        <sDll></sDll>
-        <sDllPa></sDllPa>
-        <sDlgDll></sDlgDll>
-        <sDlgPa></sDlgPa>
-        <sIfile></sIfile>
-        <tDll></tDll>
-        <tDllPa></tDllPa>
-        <tDlgDll></tDlgDll>
-        <tDlgPa></tDlgPa>
-        <tIfile></tIfile>
-        <pMon>BIN\DbgFM.DLL</pMon>
-      </DebugOpt>
-      <TargetDriverDllRegistry>
-        <SetRegEntry>
-          <Number>0</Number>
-          <Key>ARMRTXEVENTFLAGS</Key>
-          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
-        </SetRegEntry>
-        <SetRegEntry>
-          <Number>0</Number>
-          <Key>DLGDARM</Key>
-          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)</Name>
-        </SetRegEntry>
-        <SetRegEntry>
-          <Number>0</Number>
-          <Key>ARMDBGFLAGS</Key>
-          <Name>-T0</Name>
-        </SetRegEntry>
-        <SetRegEntry>
-          <Number>0</Number>
-          <Key>UL2CM3</Key>
-          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
-        </SetRegEntry>
-      </TargetDriverDllRegistry>
-      <Breakpoint/>
-      <WatchWindow1>
-        <Ww>
-          <count>0</count>
-          <WinNumber>1</WinNumber>
-          <ItemText>thread_0_counter</ItemText>
-        </Ww>
-        <Ww>
-          <count>1</count>
-          <WinNumber>1</WinNumber>
-          <ItemText>thread_1_counter</ItemText>
-        </Ww>
-        <Ww>
-          <count>2</count>
-          <WinNumber>1</WinNumber>
-          <ItemText>thread_2_counter</ItemText>
-        </Ww>
-        <Ww>
-          <count>3</count>
-          <WinNumber>1</WinNumber>
-          <ItemText>thread_3_counter</ItemText>
-        </Ww>
-        <Ww>
-          <count>4</count>
-          <WinNumber>1</WinNumber>
-          <ItemText>thread_4_counter</ItemText>
-        </Ww>
-        <Ww>
-          <count>5</count>
-          <WinNumber>1</WinNumber>
-          <ItemText>thread_5_counter</ItemText>
-        </Ww>
-        <Ww>
-          <count>6</count>
-          <WinNumber>1</WinNumber>
-          <ItemText>thread_6_counter</ItemText>
-        </Ww>
-        <Ww>
-          <count>7</count>
-          <WinNumber>1</WinNumber>
-          <ItemText>thread_7_counter</ItemText>
-        </Ww>
-      </WatchWindow1>
-      <Tracepoint>
-        <THDelay>0</THDelay>
-      </Tracepoint>
-      <DebugFlag>
-        <trace>0</trace>
-        <periodic>1</periodic>
-        <aLwin>1</aLwin>
-        <aCover>0</aCover>
-        <aSer1>0</aSer1>
-        <aSer2>0</aSer2>
-        <aPa>0</aPa>
-        <viewmode>1</viewmode>
-        <vrSel>0</vrSel>
-        <aSym>0</aSym>
-        <aTbox>0</aTbox>
-        <AscS1>0</AscS1>
-        <AscS2>0</AscS2>
-        <AscS3>0</AscS3>
-        <aSer3>0</aSer3>
-        <eProf>0</eProf>
-        <aLa>0</aLa>
-        <aPa1>0</aPa1>
-        <AscS4>0</AscS4>
-        <aSer4>0</aSer4>
-        <StkLoc>0</StkLoc>
-        <TrcWin>0</TrcWin>
-        <newCpu>0</newCpu>
-        <uProt>0</uProt>
-      </DebugFlag>
-      <LintExecutable></LintExecutable>
-      <LintConfigFile></LintConfigFile>
-      <bLintAuto>0</bLintAuto>
-      <bAutoGenD>0</bAutoGenD>
-      <LntExFlags>0</LntExFlags>
-      <pMisraName></pMisraName>
-      <pszMrule></pszMrule>
-      <pSingCmds></pSingCmds>
-      <pMultCmds></pMultCmds>
-      <pMisraNamep></pMisraNamep>
-      <pszMrulep></pszMrulep>
-      <pSingCmdsp></pSingCmdsp>
-      <pMultCmdsp></pMultCmdsp>
-    </TargetOption>
-  </Target>
-
-  <Group>
-    <GroupName>src</GroupName>
-    <tvExp>1</tvExp>
-    <tvExpOptDlg>0</tvExpOptDlg>
-    <cbSel>0</cbSel>
-    <RteFlg>0</RteFlg>
-    <File>
-      <GroupNumber>1</GroupNumber>
-      <FileNumber>1</FileNumber>
-      <FileType>1</FileType>
-      <tvExp>0</tvExp>
-      <tvExpOptDlg>0</tvExpOptDlg>
-      <bDave2>0</bDave2>
-      <PathWithFileName>.\sample_threadx.c</PathWithFileName>
-      <FilenameWithoutPath>sample_threadx.c</FilenameWithoutPath>
-      <RteFlg>0</RteFlg>
-      <bShared>0</bShared>
-    </File>
-    <File>
-      <GroupNumber>1</GroupNumber>
-      <FileNumber>2</FileNumber>
-      <FileType>2</FileType>
-      <tvExp>0</tvExp>
-      <tvExpOptDlg>0</tvExpOptDlg>
-      <bDave2>0</bDave2>
-      <PathWithFileName>.\tx_initialize_low_level.s</PathWithFileName>
-      <FilenameWithoutPath>tx_initialize_low_level.s</FilenameWithoutPath>
-      <RteFlg>0</RteFlg>
-      <bShared>0</bShared>
-    </File>
-  </Group>
-
-  <Group>
-    <GroupName>lib</GroupName>
-    <tvExp>1</tvExp>
-    <tvExpOptDlg>0</tvExpOptDlg>
-    <cbSel>0</cbSel>
-    <RteFlg>0</RteFlg>
-    <File>
-      <GroupNumber>2</GroupNumber>
-      <FileNumber>3</FileNumber>
-      <FileType>4</FileType>
-      <tvExp>0</tvExp>
-      <tvExpOptDlg>0</tvExpOptDlg>
-      <bDave2>0</bDave2>
-      <PathWithFileName>.\Objects\tx.lib</PathWithFileName>
-      <FilenameWithoutPath>tx.lib</FilenameWithoutPath>
-      <RteFlg>0</RteFlg>
-      <bShared>0</bShared>
-    </File>
-  </Group>
-
-</ProjectOpt>

ports/cortex_m0/keil/example_build/sample_threadx.uvprojx

@@ -1,433 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
-<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
-
-  <SchemaVersion>2.1</SchemaVersion>
-
-  <Header>### uVision Project, (C) Keil Software</Header>
-
-  <Targets>
-    <Target>
-      <TargetName>sample_threadx</TargetName>
-      <ToolsetNumber>0x4</ToolsetNumber>
-      <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>5060750::V5.06 update 6 (build 750)::.\ARMCC</pCCUsed>
-      <uAC6>0</uAC6>
-      <TargetOption>
-        <TargetCommonOption>
-          <Device>ARMCM0</Device>
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-          <Cpu>IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu>
-          <FlashUtilSpec></FlashUtilSpec>
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-          <ModuleSelection>0</ModuleSelection>
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-          <StopOnExitCode>3</StopOnExitCode>
-          <CustomArgument></CustomArgument>
-          <IncludeLibraryModules></IncludeLibraryModules>
-          <ComprImg>1</ComprImg>
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-        <DllOption>
-          <SimDllName>SARMCM3.DLL</SimDllName>
-          <SimDllArguments>  </SimDllArguments>
-          <SimDlgDll>DARMCM1.DLL</SimDlgDll>
-          <SimDlgDllArguments>-pCM0</SimDlgDllArguments>
-          <TargetDllName>SARMCM3.DLL</TargetDllName>
-          <TargetDllArguments> </TargetDllArguments>
-          <TargetDlgDll>TARMCM1.DLL</TargetDlgDll>
-          <TargetDlgDllArguments>-pCM0</TargetDlgDllArguments>
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-        <DebugOption>
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-            <Oh166RecLen>16</Oh166RecLen>
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-        <Utilities>
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-            <RunIndependent>0</RunIndependent>
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-          <bUseTDR>1</bUseTDR>
-          <Flash2>BIN\UL2CM3.DLL</Flash2>
-          <Flash3></Flash3>
-          <Flash4></Flash4>
-          <pFcarmOut></pFcarmOut>
-          <pFcarmGrp></pFcarmGrp>
-          <pFcArmRoot></pFcArmRoot>
-          <FcArmLst>0</FcArmLst>
-        </Utilities>
-        <TargetArmAds>
-          <ArmAdsMisc>
-            <GenerateListings>0</GenerateListings>
-            <asHll>1</asHll>
-            <asAsm>1</asAsm>
-            <asMacX>1</asMacX>
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-            <asDbgD>1</asDbgD>
-            <asForm>1</asForm>
-            <ldLst>0</ldLst>
-            <ldmm>1</ldmm>
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-            <BigEnd>0</BigEnd>
-            <AdsALst>1</AdsALst>
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-            <AdsLsun>1</AdsLsun>
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-            <AdsLsxf>1</AdsLsxf>
-            <RvctClst>0</RvctClst>
-            <GenPPlst>0</GenPPlst>
-            <AdsCpuType>"Cortex-M0"</AdsCpuType>
-            <RvctDeviceName></RvctDeviceName>
-            <mOS>0</mOS>
-            <uocRom>0</uocRom>
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-            <hadIROM>1</hadIROM>
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-            <hadXRAM>0</hadXRAM>
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-            <RvdsVP>0</RvdsVP>
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-              <Ocm1>
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-              <Ocm4>
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-                <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
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-              <Ocm6>
-                <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
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-              <IRAM>
-                <Type>0</Type>
-                <StartAddress>0x20000000</StartAddress>
-                <Size>0x20000</Size>
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-                <Type>1</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x40000</Size>
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-                <Type>0</Type>
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-              </XRAM>
-              <OCR_RVCT1>
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-                <StartAddress>0x0</StartAddress>
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-              <OCR_RVCT3>
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-              <OCR_RVCT6>
-                <Type>0</Type>
-                <StartAddress>0x20000000</StartAddress>
-                <Size>0x20000</Size>
-              </OCR_RVCT6>
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-                <Size>0x0</Size>
-              </OCR_RVCT10>
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-            <RvctStartVector></RvctStartVector>
-          </ArmAdsMisc>
-          <Cads>
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-              <MiscControls></MiscControls>
-              <Define></Define>
-              <Undefine></Undefine>
-              <IncludePath>..\inc;..\..\..\..\common\inc</IncludePath>
-            </VariousControls>
-          </Cads>
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-            <IncludeLibs></IncludeLibs>
-            <IncludeLibsPath></IncludeLibsPath>
-            <Misc>--first __tx_vectors --entry=__main</Misc>
-            <LinkerInputFile></LinkerInputFile>
-            <DisabledWarnings></DisabledWarnings>
-          </LDads>
-        </TargetArmAds>
-      </TargetOption>
-      <Groups>
-        <Group>
-          <GroupName>src</GroupName>
-          <Files>
-            <File>
-              <FileName>sample_threadx.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>.\sample_threadx.c</FilePath>
-            </File>
-            <File>
-              <FileName>tx_initialize_low_level.s</FileName>
-              <FileType>2</FileType>
-              <FilePath>.\tx_initialize_low_level.s</FilePath>
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-        </Group>
-        <Group>
-          <GroupName>lib</GroupName>
-          <Files>
-            <File>
-              <FileName>tx.lib</FileName>
-              <FileType>4</FileType>
-              <FilePath>.\Objects\tx.lib</FilePath>
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-    </Target>
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-
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-    <Layers>
-      <Layer>
-        <LayName>&lt;Project Info&gt;</LayName>
-        <LayDesc></LayDesc>
-        <LayUrl></LayUrl>
-        <LayKeys></LayKeys>
-        <LayCat></LayCat>
-        <LayLic></LayLic>
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-  </LayerInfo>
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-</Project>

ports/cortex_m23/ac6/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                         Cortex-M23/AC6    */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -62,6 +62,10 @@
 /*  04-25-2022      Scott Larson            Modified comments and added   */
 /*                                            volatile to registers,      */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Modified comments and changed */
+/*                                            secure stack initialization */
+/*                                            macro to port-specific,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -342,7 +346,7 @@ ULONG   _tx_misra_ipsr_get(VOID);
 #if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
 /* Initialize secure stacks for threads calling secure functions. */
 extern void    _tx_thread_secure_stack_initialize(void);
-#define TX_INITIALIZE_KERNEL_ENTER_EXTENSION            _tx_thread_secure_stack_initialize();
+#define TX_PORT_SPECIFIC_PRE_INITIALIZATION             _tx_thread_secure_stack_initialize();
 #endif
 
 /* Define the macro to ensure _tx_thread_preempt_disable is set early in initialization in order to 
@@ -411,7 +415,7 @@ unsigned int          was_masked;
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] = 
-                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M23/AC6 Version 6.1.11 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M23/AC6 Version 6.1.12 *";
 #else
 #ifdef TX_MISRA_ENABLE
 extern  CHAR                    _tx_version_id[100];

ports/cortex_m23/ac6/src/tx_misra.S

@@ -0,0 +1,724 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   ThreadX MISRA Compliance                                            */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        #define SHT_PROGBITS 0x1
+
+        .global __aeabi_memset
+        .global _tx_thread_current_ptr
+        .global _tx_thread_interrupt_disable
+        .global _tx_thread_interrupt_restore
+        .global _tx_thread_stack_analyze
+        .global _tx_thread_stack_error_handler
+        .global _tx_thread_system_state
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_trace_buffer_current_ptr
+        .global _tx_trace_buffer_end_ptr
+        .global _tx_trace_buffer_start_ptr
+        .global _tx_trace_event_enable_bits
+        .global _tx_trace_full_notify_function
+        .global _tx_trace_header_ptr
+#endif
+
+        .global _tx_misra_always_true
+        .global _tx_misra_block_pool_to_uchar_pointer_convert
+        .global _tx_misra_byte_pool_to_uchar_pointer_convert
+        .global _tx_misra_char_to_uchar_pointer_convert
+        .global _tx_misra_const_char_to_char_pointer_convert
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_entry_to_uchar_pointer_convert
+#endif
+        .global _tx_misra_indirect_void_to_uchar_pointer_convert
+        .global _tx_misra_memset
+        .global _tx_misra_message_copy
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_object_to_uchar_pointer_convert
+#endif
+        .global _tx_misra_pointer_to_ulong_convert
+        .global _tx_misra_status_get
+        .global _tx_misra_thread_stack_check
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_time_stamp_get
+#endif
+        .global _tx_misra_timer_indirect_to_void_pointer_convert
+        .global _tx_misra_timer_pointer_add
+        .global _tx_misra_timer_pointer_dif
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_trace_event_insert
+#endif
+        .global _tx_misra_uchar_pointer_add
+        .global _tx_misra_uchar_pointer_dif
+        .global _tx_misra_uchar_pointer_sub
+        .global _tx_misra_uchar_to_align_type_pointer_convert
+        .global _tx_misra_uchar_to_block_pool_pointer_convert
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_uchar_to_entry_pointer_convert
+        .global _tx_misra_uchar_to_header_pointer_convert
+#endif
+        .global _tx_misra_uchar_to_indirect_byte_pool_pointer_convert
+        .global _tx_misra_uchar_to_indirect_uchar_pointer_convert
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_uchar_to_object_pointer_convert
+#endif
+        .global _tx_misra_uchar_to_void_pointer_convert
+        .global _tx_misra_ulong_pointer_add
+        .global _tx_misra_ulong_pointer_dif
+        .global _tx_misra_ulong_pointer_sub
+        .global _tx_misra_ulong_to_pointer_convert
+        .global _tx_misra_ulong_to_thread_pointer_convert
+        .global _tx_misra_user_timer_pointer_get
+        .global _tx_misra_void_to_block_pool_pointer_convert
+        .global _tx_misra_void_to_byte_pool_pointer_convert
+        .global _tx_misra_void_to_event_flags_pointer_convert
+        .global _tx_misra_void_to_indirect_uchar_pointer_convert
+        .global _tx_misra_void_to_mutex_pointer_convert
+        .global _tx_misra_void_to_queue_pointer_convert
+        .global _tx_misra_void_to_semaphore_pointer_convert
+        .global _tx_misra_void_to_thread_pointer_convert
+        .global _tx_misra_void_to_uchar_pointer_convert
+        .global _tx_misra_void_to_ulong_pointer_convert
+        .global _tx_misra_ipsr_get
+        .global _tx_misra_control_get
+        .global _tx_misra_control_set
+#ifdef __ARM_FP
+        .global _tx_misra_fpccr_get
+        .global _tx_misra_vfp_touch
+#endif
+
+        .global _tx_misra_event_flags_group_not_used
+        .global _tx_misra_event_flags_set_notify_not_used
+        .global _tx_misra_queue_not_used
+        .global _tx_misra_queue_send_notify_not_used
+        .global _tx_misra_semaphore_not_used
+        .global _tx_misra_semaphore_put_notify_not_used
+        .global _tx_misra_thread_entry_exit_notify_not_used
+        .global _tx_misra_thread_not_used
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_memset(VOID *ptr, UINT value, UINT size);            */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .align 4
+        .syntax unified
+        .thumb_func
+_tx_misra_memset:
+        PUSH     {R4,LR}
+        MOVS     R4,R0
+        MOVS     R0,R2
+        MOVS     R2,R1
+        MOVS     R1,R0
+        MOVS     R0,R4
+        BL       __aeabi_memset
+        POP      {R4,PC}          // return
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  UCHAR  *_tx_misra_uchar_pointer_add(UCHAR *ptr, ULONG amount);       */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_uchar_pointer_add:
+        ADD      R0,R0,R1
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  UCHAR  *_tx_misra_uchar_pointer_sub(UCHAR *ptr, ULONG amount);       */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_uchar_pointer_sub:
+        RSBS     R1,R1,#+0
+        ADD      R0,R0,R1
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  _tx_misra_uchar_pointer_dif(UCHAR *ptr1, UCHAR *ptr2);        */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_uchar_pointer_dif:
+        SUBS     R0,R0,R1
+        BX       LR               // return
+
+
+/************************************************************************************************************************************/
+/************************************************************************************************************************************/
+/**                                                                                                                                 */
+/**  This single function serves all of the below prototypes.                                                                       */
+/**                                                                                                                                 */
+/**  ULONG  _tx_misra_pointer_to_ulong_convert(VOID *ptr);                                                                          */
+/**  VOID  *_tx_misra_ulong_to_pointer_convert(ULONG input);                                                                        */
+/**  UCHAR  **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr);                                                  */
+/**  UCHAR  **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer);                                                    */
+/**  UCHAR  *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool);                                                    */
+/**  TX_BLOCK_POOL  *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer);                                                   */
+/**  UCHAR  *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer);                                                                */
+/**  TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer);                                                  */
+/**  UCHAR  **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer);                                                      */
+/**  TX_BYTE_POOL  *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer);                                                     */
+/**  UCHAR  *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool);                                                      */
+/**  ALIGN_TYPE  *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer);                                                    */
+/**  TX_BYTE_POOL  **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer);                                         */
+/**  TX_EVENT_FLAGS_GROUP  *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer);                                           */
+/**  ULONG  *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer);                                                                */
+/**  TX_MUTEX  *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer);                                                             */
+/**  TX_QUEUE  *_tx_misra_void_to_queue_pointer_convert(VOID *pointer);                                                             */
+/**  TX_SEMAPHORE  *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer);                                                     */
+/**  VOID  *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer);                                                                */
+/**  TX_THREAD  *_tx_misra_ulong_to_thread_pointer_convert(ULONG value);                                                            */
+/**  VOID  *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer);                                          */
+/**  CHAR  *_tx_misra_const_char_to_char_pointer_convert(const char *pointer);                                                      */
+/**  TX_THREAD  *_tx_misra_void_to_thread_pointer_convert(void *pointer);                                                           */
+/**  UCHAR  *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer);                                             */
+/**  TX_TRACE_OBJECT_ENTRY  *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer);                                             */
+/**  TX_TRACE_HEADER  *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer);                                                   */
+/**  TX_TRACE_BUFFER_ENTRY  *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer);                                              */
+/**  UCHAR  *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer);                                              */
+/**  UCHAR  *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer);                                                                */
+/**  VOID    _tx_misra_event_flags_group_not_used(TX_EVENT_FLAGS_GROUP *group_ptr);                                                 */
+/**  VOID    _tx_misra_event_flags_set_notify_not_used(VOID (*events_set_notify)(TX_EVENT_FLAGS_GROUP *notify_group_ptr));          */
+/**  VOID    _tx_misra_queue_not_used(TX_QUEUE *queue_ptr);                                                                         */
+/**  VOID    _tx_misra_queue_send_notify_not_used(VOID (*queue_send_notify)(TX_QUEUE *notify_queue_ptr));                           */
+/**  VOID    _tx_misra_semaphore_not_used(TX_SEMAPHORE *semaphore_ptr);                                                             */
+/**  VOID    _tx_misra_semaphore_put_notify_not_used(VOID (*semaphore_put_notify)(TX_SEMAPHORE *notify_semaphore_ptr));             */
+/**  VOID    _tx_misra_thread_not_used(TX_THREAD *thread_ptr);                                                                      */
+/**  VOID    _tx_misra_thread_entry_exit_notify_not_used(VOID (*thread_entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT id));  */
+/**                                                                                                                                 */
+/************************************************************************************************************************************/
+/************************************************************************************************************************************/
+        .text
+        .thumb_func
+_tx_misra_pointer_to_ulong_convert:
+_tx_misra_ulong_to_pointer_convert:
+_tx_misra_indirect_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_indirect_uchar_pointer_convert:
+_tx_misra_block_pool_to_uchar_pointer_convert:
+_tx_misra_void_to_block_pool_pointer_convert:
+_tx_misra_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_block_pool_pointer_convert:
+_tx_misra_void_to_indirect_uchar_pointer_convert:
+_tx_misra_void_to_byte_pool_pointer_convert:
+_tx_misra_byte_pool_to_uchar_pointer_convert:
+_tx_misra_uchar_to_align_type_pointer_convert:
+_tx_misra_uchar_to_indirect_byte_pool_pointer_convert:
+_tx_misra_void_to_event_flags_pointer_convert:
+_tx_misra_void_to_ulong_pointer_convert:
+_tx_misra_void_to_mutex_pointer_convert:
+_tx_misra_void_to_queue_pointer_convert:
+_tx_misra_void_to_semaphore_pointer_convert:
+_tx_misra_uchar_to_void_pointer_convert:
+_tx_misra_ulong_to_thread_pointer_convert:
+_tx_misra_timer_indirect_to_void_pointer_convert:
+_tx_misra_const_char_to_char_pointer_convert:
+_tx_misra_void_to_thread_pointer_convert:
+#ifdef TX_ENABLE_EVENT_TRACE
+_tx_misra_object_to_uchar_pointer_convert:
+_tx_misra_uchar_to_object_pointer_convert:
+_tx_misra_uchar_to_header_pointer_convert:
+_tx_misra_uchar_to_entry_pointer_convert:
+_tx_misra_entry_to_uchar_pointer_convert:
+#endif
+_tx_misra_char_to_uchar_pointer_convert:
+_tx_misra_event_flags_group_not_used:
+_tx_misra_event_flags_set_notify_not_used:
+_tx_misra_queue_not_used:
+_tx_misra_queue_send_notify_not_used:
+_tx_misra_semaphore_not_used:
+_tx_misra_semaphore_put_notify_not_used:
+_tx_misra_thread_entry_exit_notify_not_used:
+_tx_misra_thread_not_used:
+
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  *_tx_misra_ulong_pointer_add(ULONG *ptr, ULONG amount);       */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_ulong_pointer_add:
+        LSLS    R1,#2
+        ADD     R0,R0,R1
+        BX      LR              // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  *_tx_misra_ulong_pointer_sub(ULONG *ptr, ULONG amount);       */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_ulong_pointer_sub:
+        MOVS    R3,#3
+        MVNS    R2,R3
+        MULS    R1,R2,R1
+        ADD     R0,R0,R1
+        BX      LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  _tx_misra_ulong_pointer_dif(ULONG *ptr1, ULONG *ptr2);        */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_ulong_pointer_dif:
+        SUBS     R0,R0,R1
+        ASRS     R0,R0,#+2
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_message_copy(ULONG **source, ULONG **destination,    */
+/**                                                           UINT size); */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_message_copy:
+        PUSH     {R4,R5}
+        LDR      R3,[R0, #+0]
+        LDR      R4,[R1, #+0]
+        LDR      R5,[R3, #+0]
+        STR      R5,[R4, #+0]
+        ADDS     R4,R4,#+4
+        ADDS     R3,R3,#+4
+        CMP      R2,#+2
+        BCC.N    _tx_misra_message_copy_0
+        SUBS     R2,R2,#+1
+        B.N      _tx_misra_message_copy_1
+_tx_misra_message_copy_2:
+        LDR      R5,[R3, #+0]
+        STR      R5,[R4, #+0]
+        ADDS     R4,R4,#+4
+        ADDS     R3,R3,#+4
+        SUBS     R2,R2,#+1
+_tx_misra_message_copy_1:
+        CMP      R2,#+0
+        BNE.N    _tx_misra_message_copy_2
+_tx_misra_message_copy_0:
+        STR      R3,[R0, #+0]
+        STR      R4,[R1, #+0]
+        POP      {R4,R5}
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  _tx_misra_timer_pointer_dif(TX_TIMER_INTERNAL **ptr1,         */
+/**                                           TX_TIMER_INTERNAL **ptr2);  */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_timer_pointer_dif:
+        SUBS     R0,R0,R1
+        ASRS     R0,R0,#+2
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  TX_TIMER_INTERNAL **_tx_misra_timer_pointer_add(TX_TIMER_INTERNAL    */
+/**                                                  **ptr1, ULONG size); */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_timer_pointer_add:
+        LSLS    R1,#2
+        ADD     R0,R0,R1
+        BX      LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_user_timer_pointer_get(TX_TIMER_INTERNAL             */
+/**                              *internal_timer, TX_TIMER **user_timer); */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_user_timer_pointer_get:
+        SUBS    R0,#8
+        STR     R0,[R1, #+0]
+        BX      LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_thread_stack_check(TX_THREAD *thread_ptr,            */
+/**                                              VOID **highest_stack);   */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_thread_stack_check:
+        PUSH    {R3-R7,LR}
+        MOVS    R4,R0
+        MOVS    R5,R1
+        BL      _tx_thread_interrupt_disable
+        CMP     R4,#0
+        BEQ.N   _tx_misra_thread_stack_check_0
+        LDR     R1,[R4]
+        LDR     R2,=0x54485244
+        CMP     R1,R2
+        BNE.N   _tx_misra_thread_stack_check_0
+        LDR     R1,[R4, #8]
+        LDR     R2,[R5]
+        CMP     R1,R2
+        BCS.N   _tx_misra_thread_stack_check_1
+        STR     R1,[R5]
+_tx_misra_thread_stack_check_1:
+        LDR     R1,[R4, #12]
+        LDR     R1,[R1]
+        LDR     R6,=0xEFEFEFEF
+        CMP     R1,R6
+        BNE.N   _tx_misra_thread_stack_check_2
+        LDR     R1,[R4, #16]
+        MOVS    R7,#1
+        LDR     R1,[R1, R7]
+        CMP     R1,R6
+        BNE.N   _tx_misra_thread_stack_check_2
+        LDR     R1,[R5]
+        LDR     R2,[R4, #12]
+        CMP     R1,R2
+        BCS.N   _tx_misra_thread_stack_check_3
+_tx_misra_thread_stack_check_2:
+        BL      _tx_thread_interrupt_restore
+        MOVS    R0,R4
+        BL      _tx_thread_stack_error_handler
+        BL      _tx_thread_interrupt_disable
+_tx_misra_thread_stack_check_3:
+        LDR     R1,[R5]
+        LDR     R7,=-4
+        LDR     R1,[R1, R7]
+        CMP     R1,R6
+        BEQ.N   _tx_misra_thread_stack_check_0
+        BL      _tx_thread_interrupt_restore
+        MOVS    R0,R4
+        BL      _tx_thread_stack_analyze
+        BL      _tx_thread_interrupt_disable
+_tx_misra_thread_stack_check_0:
+        BL      _tx_thread_interrupt_restore
+        POP     {R0,R4,R5,R6,R7,PC}    // return
+
+#ifdef TX_ENABLE_EVENT_TRACE
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_trace_event_insert(ULONG event_id,                   */
+/**           VOID *info_field_1, ULONG info_field_2, ULONG info_field_3, */
+/**           ULONG info_field_4, ULONG filter, ULONG time_stamp);        */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_trace_event_insert:
+        PUSH     {R3-R7,LR}
+        LDR.N    R4,DataTable2_1
+        LDR      R4,[R4, #+0]
+        CMP      R4,#+0
+        BEQ.N    _tx_misra_trace_event_insert_0
+        LDR.N    R5,DataTable2_2
+        LDR      R5,[R5, #+0]
+        LDR      R6,[SP, #+28]
+        TST      R5,R6
+        BEQ.N    _tx_misra_trace_event_insert_0
+        LDR.N    R5,DataTable2_3
+        LDR      R5,[R5, #+0]
+        LDR.N    R6,DataTable2_4
+        LDR      R6,[R6, #+0]
+        CMP      R5,#+0
+        BNE.N    _tx_misra_trace_event_insert_1
+        LDR      R5,[R6, #+44]
+        LDR      R7,[R6, #+60]
+        LSLS     R7,R7,#+16
+        ORRS     R7,R7,#0x80000000
+        ORRS     R5,R7,R5
+        B.N      _tx_misra_trace_event_insert_2
+_tx_misra_trace_event_insert_1:
+        CMP      R5,#-252645136
+        BCS.N    _tx_misra_trace_event_insert_3
+        MOVS     R5,R6
+        MOVS     R6,#-1
+        B.N      _tx_misra_trace_event_insert_2
+_tx_misra_trace_event_insert_3:
+        MOVS     R6,#-252645136
+        MOVS     R5,#+0
+_tx_misra_trace_event_insert_2:
+        STR      R6,[R4, #+0]
+        STR      R5,[R4, #+4]
+        STR      R0,[R4, #+8]
+        LDR      R0,[SP, #+32]
+        STR      R0,[R4, #+12]
+        STR      R1,[R4, #+16]
+        STR      R2,[R4, #+20]
+        STR      R3,[R4, #+24]
+        LDR      R0,[SP, #+24]
+        STR      R0,[R4, #+28]
+        ADDS     R4,R4,#+32
+        LDR.N    R0,DataTable2_5
+        LDR      R0,[R0, #+0]
+        CMP      R4,R0
+        BCC.N    _tx_misra_trace_event_insert_4
+        LDR.N    R0,DataTable2_6
+        LDR      R4,[R0, #+0]
+        LDR.N    R0,DataTable2_1
+        STR      R4,[R0, #+0]
+        LDR.N    R0,DataTable2_7
+        LDR      R0,[R0, #+0]
+        STR      R4,[R0, #+32]
+        LDR.N    R0,DataTable2_8
+        LDR      R0,[R0, #+0]
+        CMP      R0,#+0
+        BEQ.N    _tx_misra_trace_event_insert_0
+        LDR.N    R0,DataTable2_7
+        LDR      R0,[R0, #+0]
+        LDR.N    R1,DataTable2_8
+        LDR      R1,[R1, #+0]
+        BLX      R1
+        B.N      _tx_misra_trace_event_insert_0
+_tx_misra_trace_event_insert_4:
+        LDR.N    R0,DataTable2_1
+        STR      R4,[R0, #+0]
+        LDR.N    R0,DataTable2_7
+        LDR      R0,[R0, #+0]
+        STR      R4,[R0, #+32]
+_tx_misra_trace_event_insert_0:
+        POP      {R0,R4-R7,PC}    // return
+
+
+        .data
+DataTable2_1:
+        .word     _tx_trace_buffer_current_ptr
+
+        .data
+DataTable2_2:
+        .word     _tx_trace_event_enable_bits
+
+        .data
+DataTable2_5:
+        .word     _tx_trace_buffer_end_ptr
+
+        .data
+DataTable2_6:
+        .word     _tx_trace_buffer_start_ptr
+
+        .data
+DataTable2_7:
+        .word     _tx_trace_header_ptr
+
+        .data
+DataTable2_8:
+        .word     _tx_trace_full_notify_function
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  _tx_misra_time_stamp_get(VOID);                               */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_time_stamp_get:
+        MOVS     R0,#+0
+        BX       LR               // return
+
+#endif
+
+        .data
+DataTable2_3:
+        .word     _tx_thread_system_state
+
+        .data
+DataTable2_4:
+        .word     _tx_thread_current_ptr
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  UINT  _tx_misra_always_true(void);                                   */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_always_true:
+        MOVS     R0,#+1
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  UINT  _tx_misra_status_get(UINT status);                             */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_status_get:
+        MOVS     R0,#+0
+        BX       LR               // return
+
+
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  ULONG  _tx_misra_ipsr_get(void);                                                          */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_ipsr_get:
+        MRS      R0, IPSR
+        BX       LR               // return
+
+
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  ULONG  _tx_misra_control_get(void);                                                       */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_control_get:
+        MRS      R0, CONTROL
+        BX       LR               // return
+
+        
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  void   _tx_misra_control_set(ULONG value);                                                */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_control_set:
+        MSR      CONTROL, R0
+        BX       LR               // return
+
+        
+#ifdef __ARM_FP
+
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  ULONG  _tx_misra_fpccr_get(void);                                                         */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_fpccr_get:
+        LDR      r0, =0xE000EF34  // Build FPCCR address
+        LDR      r0, [r0]         // Load FPCCR value
+        BX       LR               // return
+        
+        
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  void   _tx_misra_vfp_touch(void);                                                         */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_vfp_touch:
+        vmov.f32 s0, s0
+        BX       LR               // return
+        
+#endif
+        
+
+        .data
+        .word 0

ports/cortex_m23/ac6/src/tx_thread_secure_stack.c

@@ -23,7 +23,7 @@
 
 #include "tx_api.h"
 
-/* If TX_SINGLE_MODE_SECURE or TX_SINGLE_MODE_NON_SECURE is defined, 
+/* If TX_SINGLE_MODE_SECURE or TX_SINGLE_MODE_NON_SECURE is defined,
    no secure stack functionality is needed. */
 #if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
 
@@ -45,8 +45,14 @@
 #define TX_THREAD_STACK_SEAL_SIZE           8
 #define TX_THREAD_STACK_SEAL_VALUE          0xFEF5EDA5
 
-/* Secure stack info struct to hold stack start, stack limit, 
+/* max number of Secure context */
-   current stack pointer, and pointer to owning thread. 
+#ifndef TX_MAX_SECURE_CONTEXTS
+#define TX_MAX_SECURE_CONTEXTS              32
+#endif
+#define TX_INVALID_SECURE_CONTEXT_IDX       (-1)
+
+/* Secure stack info struct to hold stack start, stack limit,
+   current stack pointer, and pointer to owning thread.
    This will be allocated for each thread with a secure stack. */
 typedef struct TX_THREAD_SECURE_STACK_INFO_STRUCT
 {
@@ -54,8 +60,14 @@ typedef struct TX_THREAD_SECURE_STACK_INFO_STRUCT
     VOID        *tx_thread_secure_stack_start;      /* Thread's secure stack start address */
     VOID        *tx_thread_secure_stack_limit;      /* Thread's secure stack limit */
     TX_THREAD   *tx_thread_ptr;                     /* Keep track of thread for error handling */
+    INT          tx_next_free_index;                /* Next free index of free secure context */
 } TX_THREAD_SECURE_STACK_INFO;
 
+/* Static secure contexts */
+static TX_THREAD_SECURE_STACK_INFO tx_thread_secure_context[TX_MAX_SECURE_CONTEXTS];
+/* Head of free secure context */
+static INT tx_head_free_index = 0U;
+
 
 
 /**************************************************************************/
@@ -63,7 +75,7 @@ typedef struct TX_THREAD_SECURE_STACK_INFO_STRUCT
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_mode_stack_initialize           Cortex-M23/AC6    */
-/*                                                           6.1.7        */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -102,12 +114,16 @@ typedef struct TX_THREAD_SECURE_STACK_INFO_STRUCT
 /*                                            changed name, execute in    */
 /*                                            handler mode,               */
 /*                                            resulting in version 6.1.7  */
+/*  07-29-2022      Scott Larson            Modified comments, updated    */
+/*                                            secure stack allocation,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 __attribute__((cmse_nonsecure_entry))
 UINT    _tx_thread_secure_mode_stack_initialize(void)
 {
 UINT    status;
+INT     index;
 
     /* Make sure function is called from interrupt (threads should not call). */
     if (__get_IPSR() == 0)
@@ -118,12 +134,26 @@ UINT    status;
     {
         /* Set secure mode to use PSP. */
         __set_CONTROL(__get_CONTROL() | 2);
-        
+
         /* Set process stack pointer and stack limit to 0 to throw exception when a thread
            without a secure stack calls a secure function that tries to use secure stack. */
         __set_PSPLIM(0);
         __set_PSP(0);
-        
+
+        for (index = 0; index < TX_MAX_SECURE_CONTEXTS; index++)
+        {
+
+            /* Check last index and mark next free to invalid index */
+            if(index == (TX_MAX_SECURE_CONTEXTS - 1))
+            {
+                tx_thread_secure_context[index].tx_next_free_index = TX_INVALID_SECURE_CONTEXT_IDX;
+            }
+            else
+            {
+                tx_thread_secure_context[index].tx_next_free_index = index + 1;
+            }
+        }
+
         status = TX_SUCCESS;
     }
     return status;
@@ -136,7 +166,7 @@ UINT    status;
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_mode_stack_allocate             Cortex-M23/AC6    */
-/*                                                           6.1.1        */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -160,9 +190,7 @@ UINT    status;
 /*  CALLS                                                                 */
 /*                                                                        */
 /*    __get_IPSR                            Intrinsic to get IPSR         */
-/*    calloc                                Compiler's calloc function    */
 /*    malloc                                Compiler's malloc function    */
-/*    free                                  Compiler's free() function    */
 /*    __set_PSPLIM                          Intrinsic to set PSP limit    */
 /*    __set_PSP                             Intrinsic to set PSP          */
 /*    __TZ_get_PSPLIM_NS                    Intrinsic to get NS PSP       */
@@ -179,18 +207,22 @@ UINT    status;
 /*  10-16-2020      Scott Larson            Modified comment(s),          */
 /*                                            added stack sealing,        */
 /*                                            resulting in version 6.1.1  */
+/*  07-29-2022      Scott Larson            Modified comments, updated    */
+/*                                            secure stack allocation,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 __attribute__((cmse_nonsecure_entry))
 UINT    _tx_thread_secure_mode_stack_allocate(TX_THREAD *thread_ptr, ULONG stack_size)
 {
+TX_INTERRUPT_SAVE_AREA
 UINT    status;
 TX_THREAD_SECURE_STACK_INFO *info_ptr;
 UCHAR   *stack_mem;
-ULONG   sp;
+INT     secure_context_index;
 
     status = TX_SUCCESS;
-    
+
     /* Make sure function is called from interrupt (threads should not call). */
     if (__get_IPSR() == 0)
     {
@@ -200,23 +232,38 @@ ULONG   sp;
     {
         status = TX_SIZE_ERROR;
     }
-    
+
     /* Check if thread already has secure stack allocated. */
     else if (thread_ptr -> tx_thread_secure_stack_context != 0)
     {
         status = TX_THREAD_ERROR;
     }
-    
+
     else
     {
-        /* Allocate space for secure stack info. */
+        TX_DISABLE
-        info_ptr = calloc(1, sizeof(TX_THREAD_SECURE_STACK_INFO));
+
-        
+        /* Allocate free index for secure stack info. */
-        if(info_ptr != TX_NULL)
+        if(tx_head_free_index != TX_INVALID_SECURE_CONTEXT_IDX)
         {
+            secure_context_index = tx_head_free_index;
+            tx_head_free_index = tx_thread_secure_context[tx_head_free_index].tx_next_free_index;
+            tx_thread_secure_context[secure_context_index].tx_next_free_index = TX_INVALID_SECURE_CONTEXT_IDX;
+        }
+        else
+        {
+            secure_context_index = TX_INVALID_SECURE_CONTEXT_IDX;
+        }
+
+        TX_RESTORE
+
+        if(secure_context_index != TX_INVALID_SECURE_CONTEXT_IDX)
+        {
+            info_ptr = &tx_thread_secure_context[secure_context_index];
+
             /* If stack info allocated, allocate a stack & seal. */
             stack_mem = malloc(stack_size + TX_THREAD_STACK_SEAL_SIZE);
-            
+
             if(stack_mem != TX_NULL)
             {
                 /* Secure stack has been allocated, save in the stack info struct. */
@@ -224,38 +271,41 @@ ULONG   sp;
                 info_ptr -> tx_thread_secure_stack_start = stack_mem + stack_size;
                 info_ptr -> tx_thread_secure_stack_ptr = info_ptr -> tx_thread_secure_stack_start;
                 info_ptr -> tx_thread_ptr = thread_ptr;
-                
+
                 /* Seal bottom of stack. */
                 *(ULONG*)info_ptr -> tx_thread_secure_stack_start = TX_THREAD_STACK_SEAL_VALUE;
-                
+
-                /* Save info pointer in thread. */
+                /* Save secure context id (i.e non-zero base index) in thread. */
-                thread_ptr -> tx_thread_secure_stack_context = info_ptr;
+                thread_ptr -> tx_thread_secure_stack_context = (VOID *)(secure_context_index + 1);
-                
+
-                /* Check if this thread is running by looking at PSP_NS and seeing if it is within
+                /* Check if this thread is running by looking at its stack start and PSPLIM_NS */
-                   the stack_start and stack_end range. */
+                if(((ULONG) thread_ptr -> tx_thread_stack_start & 0xFFFFFFF8) == __TZ_get_PSPLIM_NS())
-                sp = __TZ_get_PSP_NS();
-                if(sp > ((ULONG) thread_ptr -> tx_thread_stack_start) && sp < ((ULONG) thread_ptr -> tx_thread_stack_end))
                 {
                     /* If this thread is running, set Secure PSP and PSPLIM. */
                     __set_PSPLIM((ULONG)(info_ptr -> tx_thread_secure_stack_limit));
                     __set_PSP((ULONG)(info_ptr -> tx_thread_secure_stack_ptr));
                 }
             }
-            
+
             else
             {
+                TX_DISABLE
+
                 /* Stack not allocated, free the info struct. */
-                free(info_ptr);
+                tx_thread_secure_context[secure_context_index].tx_next_free_index = tx_head_free_index;
+                tx_head_free_index = secure_context_index;
+                TX_RESTORE
+
                 status = TX_NO_MEMORY;
             }
         }
-        
+
         else
         {
             status = TX_NO_MEMORY;
         }
     }
-    
+
     return(status);
 }
 
@@ -266,7 +316,7 @@ ULONG   sp;
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_mode_stack_free                 Cortex-M23/AC6    */
-/*                                                           6.1.1        */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -301,44 +351,65 @@ ULONG   sp;
 /*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*  10-16-2020      Scott Larson            Modified comment(s),          */
 /*                                            resulting in version 6.1.1  */
+/*  07-29-2022      Scott Larson            Modified comments, updated    */
+/*                                            secure stack allocation,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 __attribute__((cmse_nonsecure_entry))
 UINT    _tx_thread_secure_mode_stack_free(TX_THREAD *thread_ptr)
 {
+TX_INTERRUPT_SAVE_AREA
 UINT    status;
 TX_THREAD_SECURE_STACK_INFO *info_ptr;
+INT     secure_context_index;
 
     status = TX_SUCCESS;
-    
+
-    /* Pickup stack info from thread. */
+    /* Pickup stack info id from thread. */
-    info_ptr = thread_ptr -> tx_thread_secure_stack_context;
+    secure_context_index = (INT)thread_ptr -> tx_thread_secure_stack_context - 1;
-    
+
     /* Make sure function is called from interrupt (threads should not call). */
     if (__get_IPSR() == 0)
     {
         status = TX_CALLER_ERROR;
     }
-    
+
-    /* Check that this secure context is for this thread. */
+    /* Check if secure context index is in valid range. */
-    else if (info_ptr -> tx_thread_ptr != thread_ptr)
+    else if (secure_context_index < 0 || secure_context_index >= TX_MAX_SECURE_CONTEXTS)
     {
         status = TX_THREAD_ERROR;
     }
-    
     else
     {
-        
+
-        /* Free secure stack. */
+        /* Pickup stack info from static array of secure contexts. */
-        free(info_ptr -> tx_thread_secure_stack_limit);
+        info_ptr = &tx_thread_secure_context[secure_context_index];
-        
+
-        /* Free info struct. */
+        /* Check that this secure context is for this thread. */
-        free(info_ptr);
+        if (info_ptr -> tx_thread_ptr != thread_ptr)
-        
+        {
-        /* Clear secure context from thread. */
+            status = TX_THREAD_ERROR;
-        thread_ptr -> tx_thread_secure_stack_context = 0;
+        }
+
+        else
+        {
+
+            /* Free secure stack. */
+            free(info_ptr -> tx_thread_secure_stack_limit);
+
+            TX_DISABLE
+
+            /* Free info struct. */
+            tx_thread_secure_context[secure_context_index].tx_next_free_index = tx_head_free_index;
+            tx_head_free_index = secure_context_index;
+            TX_RESTORE
+
+            /* Clear secure context from thread. */
+            thread_ptr -> tx_thread_secure_stack_context = 0;
+        }
     }
-    
+
     return(status);
 }
 
@@ -349,7 +420,7 @@ TX_THREAD_SECURE_STACK_INFO *info_ptr;
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_stack_context_save              Cortex-M23/AC6    */
-/*                                                           6.1.7        */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -386,6 +457,9 @@ TX_THREAD_SECURE_STACK_INFO *info_ptr;
 /*                                            resulting in version 6.1.1  */
 /*  06-02-2021      Scott Larson            Fix stack pointer save,       */
 /*                                            resulting in version 6.1.7  */
+/*  07-29-2022      Scott Larson            Modified comments, updated    */
+/*                                            secure stack allocation,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 __attribute__((cmse_nonsecure_entry))
@@ -393,38 +467,45 @@ void _tx_thread_secure_stack_context_save(TX_THREAD *thread_ptr)
 {
 TX_THREAD_SECURE_STACK_INFO *info_ptr;
 ULONG   sp;
+INT secure_context_index = (INT)thread_ptr -> tx_thread_secure_stack_context - 1;
 
     /* This function should be called from scheduler only. */
     if (__get_IPSR() == 0)
     {
         return;
     }
-    
+
+    /* Check if secure context index is in valid range. */
+    else if (secure_context_index < 0 || secure_context_index >= TX_MAX_SECURE_CONTEXTS)
+    {
+        return;
+    }
+
     /* Pickup the secure context pointer. */
-    info_ptr = (TX_THREAD_SECURE_STACK_INFO *)(thread_ptr -> tx_thread_secure_stack_context);
+    info_ptr = &tx_thread_secure_context[secure_context_index];
-    
+
     /* Check that this secure context is for this thread. */
     if (info_ptr -> tx_thread_ptr != thread_ptr)
     {
         return;
     }
-    
+
     /* Check that stack pointer is in range */
     sp = __get_PSP();
-    if ((sp < (ULONG)info_ptr -> tx_thread_secure_stack_limit) || 
+    if ((sp < (ULONG)info_ptr -> tx_thread_secure_stack_limit) ||
         (sp > (ULONG)info_ptr -> tx_thread_secure_stack_start))
     {
         return;
     }
-    
+
     /* Save stack pointer. */
     info_ptr -> tx_thread_secure_stack_ptr = (VOID *) sp;
-    
+
     /* Set process stack pointer and stack limit to 0 to throw exception when a thread
        without a secure stack calls a secure function that tries to use secure stack. */
     __set_PSPLIM(0);
     __set_PSP(0);
-    
+
     return;
 }
 
@@ -435,7 +516,7 @@ ULONG   sp;
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_stack_context_restore           Cortex-M23/AC6    */
-/*                                                           6.1.1        */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -469,32 +550,42 @@ ULONG   sp;
 /*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*  10-16-2020      Scott Larson            Modified comment(s),          */
 /*                                            resulting in version 6.1.1  */
+/*  07-29-2022      Scott Larson            Modified comments, updated    */
+/*                                            secure stack allocation,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 __attribute__((cmse_nonsecure_entry))
 void _tx_thread_secure_stack_context_restore(TX_THREAD *thread_ptr)
 {
 TX_THREAD_SECURE_STACK_INFO *info_ptr;
+INT secure_context_index = (INT)thread_ptr -> tx_thread_secure_stack_context - 1;
 
     /* This function should be called from scheduler only. */
     if (__get_IPSR() == 0)
     {
         return;
     }
-    
+
+    /* Check if secure context index is in valid range. */
+    else if (secure_context_index < 0 || secure_context_index >= TX_MAX_SECURE_CONTEXTS)
+    {
+        return;
+    }
+
     /* Pickup the secure context pointer. */
-    info_ptr = (TX_THREAD_SECURE_STACK_INFO *)(thread_ptr -> tx_thread_secure_stack_context);
+    info_ptr = &tx_thread_secure_context[secure_context_index];
-    
+
     /* Check that this secure context is for this thread. */
     if (info_ptr -> tx_thread_ptr != thread_ptr)
     {
         return;
     }
-    
+
     /* Set stack pointer and limit. */
     __set_PSPLIM((ULONG)info_ptr -> tx_thread_secure_stack_limit);
     __set_PSP   ((ULONG)info_ptr -> tx_thread_secure_stack_ptr);
-    
+
     return;
 }
 

ports/cortex_m23/ac6/src/tx_thread_secure_stack_initialize.S

@@ -26,7 +26,7 @@
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_stack_initialize                Cortex-M23/AC6    */
-/*                                                           6.1.7        */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -49,13 +49,17 @@
 /*                                                                        */
 /*  CALLED BY                                                             */
 /*                                                                        */
-/*    TX_INITIALIZE_KERNEL_ENTER_EXTENSION                                */
+/*    TX_PORT_SPECIFIC_PRE_INITIALIZATION                                 */
 /*                                                                        */
 /*  RELEASE HISTORY                                                       */
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
 /*  06-02-2021      Scott Larson            Initial Version 6.1.7         */
+/*  07-29-2022      Scott Larson            Modified comments and changed */
+/*                                            secure stack initialization */
+/*                                            macro to port-specific,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 // VOID   _tx_thread_secure_stack_initialize(VOID)

ports/cortex_m23/gnu/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                         Cortex-M23/GNU    */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -63,6 +63,10 @@
 /*  04-25-2022      Scott Larson            Modified comments and added   */
 /*                                            volatile to registers,      */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Modified comments and changed */
+/*                                            secure stack initialization */
+/*                                            macro to port-specific,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -341,7 +345,7 @@ ULONG   _tx_misra_ipsr_get(VOID);
 #if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
 /* Initialize secure stacks for threads calling secure functions. */
 extern void    _tx_thread_secure_stack_initialize(void);
-#define TX_INITIALIZE_KERNEL_ENTER_EXTENSION            _tx_thread_secure_stack_initialize();
+#define TX_PORT_SPECIFIC_PRE_INITIALIZATION             _tx_thread_secure_stack_initialize();
 #endif
 
 /* Define the macro to ensure _tx_thread_preempt_disable is set early in initialization in order to 
@@ -443,7 +447,7 @@ unsigned int interrupt_save;
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] = 
-                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M23/GNU Version 6.1.11 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M23/GNU Version 6.1.12 *";
 #else
 #ifdef TX_MISRA_ENABLE
 extern  CHAR                    _tx_version_id[100];

ports/cortex_m23/gnu/src/tx_misra.S

@@ -0,0 +1,724 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   ThreadX MISRA Compliance                                            */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        #define SHT_PROGBITS 0x1
+
+        .global __aeabi_memset
+        .global _tx_thread_current_ptr
+        .global _tx_thread_interrupt_disable
+        .global _tx_thread_interrupt_restore
+        .global _tx_thread_stack_analyze
+        .global _tx_thread_stack_error_handler
+        .global _tx_thread_system_state
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_trace_buffer_current_ptr
+        .global _tx_trace_buffer_end_ptr
+        .global _tx_trace_buffer_start_ptr
+        .global _tx_trace_event_enable_bits
+        .global _tx_trace_full_notify_function
+        .global _tx_trace_header_ptr
+#endif
+
+        .global _tx_misra_always_true
+        .global _tx_misra_block_pool_to_uchar_pointer_convert
+        .global _tx_misra_byte_pool_to_uchar_pointer_convert
+        .global _tx_misra_char_to_uchar_pointer_convert
+        .global _tx_misra_const_char_to_char_pointer_convert
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_entry_to_uchar_pointer_convert
+#endif
+        .global _tx_misra_indirect_void_to_uchar_pointer_convert
+        .global _tx_misra_memset
+        .global _tx_misra_message_copy
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_object_to_uchar_pointer_convert
+#endif
+        .global _tx_misra_pointer_to_ulong_convert
+        .global _tx_misra_status_get
+        .global _tx_misra_thread_stack_check
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_time_stamp_get
+#endif
+        .global _tx_misra_timer_indirect_to_void_pointer_convert
+        .global _tx_misra_timer_pointer_add
+        .global _tx_misra_timer_pointer_dif
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_trace_event_insert
+#endif
+        .global _tx_misra_uchar_pointer_add
+        .global _tx_misra_uchar_pointer_dif
+        .global _tx_misra_uchar_pointer_sub
+        .global _tx_misra_uchar_to_align_type_pointer_convert
+        .global _tx_misra_uchar_to_block_pool_pointer_convert
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_uchar_to_entry_pointer_convert
+        .global _tx_misra_uchar_to_header_pointer_convert
+#endif
+        .global _tx_misra_uchar_to_indirect_byte_pool_pointer_convert
+        .global _tx_misra_uchar_to_indirect_uchar_pointer_convert
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_uchar_to_object_pointer_convert
+#endif
+        .global _tx_misra_uchar_to_void_pointer_convert
+        .global _tx_misra_ulong_pointer_add
+        .global _tx_misra_ulong_pointer_dif
+        .global _tx_misra_ulong_pointer_sub
+        .global _tx_misra_ulong_to_pointer_convert
+        .global _tx_misra_ulong_to_thread_pointer_convert
+        .global _tx_misra_user_timer_pointer_get
+        .global _tx_misra_void_to_block_pool_pointer_convert
+        .global _tx_misra_void_to_byte_pool_pointer_convert
+        .global _tx_misra_void_to_event_flags_pointer_convert
+        .global _tx_misra_void_to_indirect_uchar_pointer_convert
+        .global _tx_misra_void_to_mutex_pointer_convert
+        .global _tx_misra_void_to_queue_pointer_convert
+        .global _tx_misra_void_to_semaphore_pointer_convert
+        .global _tx_misra_void_to_thread_pointer_convert
+        .global _tx_misra_void_to_uchar_pointer_convert
+        .global _tx_misra_void_to_ulong_pointer_convert
+        .global _tx_misra_ipsr_get
+        .global _tx_misra_control_get
+        .global _tx_misra_control_set
+#ifdef __ARM_FP
+        .global _tx_misra_fpccr_get
+        .global _tx_misra_vfp_touch
+#endif
+
+        .global _tx_misra_event_flags_group_not_used
+        .global _tx_misra_event_flags_set_notify_not_used
+        .global _tx_misra_queue_not_used
+        .global _tx_misra_queue_send_notify_not_used
+        .global _tx_misra_semaphore_not_used
+        .global _tx_misra_semaphore_put_notify_not_used
+        .global _tx_misra_thread_entry_exit_notify_not_used
+        .global _tx_misra_thread_not_used
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_memset(VOID *ptr, UINT value, UINT size);            */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .align 4
+        .syntax unified
+        .thumb_func
+_tx_misra_memset:
+        PUSH     {R4,LR}
+        MOVS     R4,R0
+        MOVS     R0,R2
+        MOVS     R2,R1
+        MOVS     R1,R0
+        MOVS     R0,R4
+        BL       __aeabi_memset
+        POP      {R4,PC}          // return
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  UCHAR  *_tx_misra_uchar_pointer_add(UCHAR *ptr, ULONG amount);       */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_uchar_pointer_add:
+        ADD      R0,R0,R1
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  UCHAR  *_tx_misra_uchar_pointer_sub(UCHAR *ptr, ULONG amount);       */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_uchar_pointer_sub:
+        RSBS     R1,R1,#+0
+        ADD      R0,R0,R1
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  _tx_misra_uchar_pointer_dif(UCHAR *ptr1, UCHAR *ptr2);        */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_uchar_pointer_dif:
+        SUBS     R0,R0,R1
+        BX       LR               // return
+
+
+/************************************************************************************************************************************/
+/************************************************************************************************************************************/
+/**                                                                                                                                 */
+/**  This single function serves all of the below prototypes.                                                                       */
+/**                                                                                                                                 */
+/**  ULONG  _tx_misra_pointer_to_ulong_convert(VOID *ptr);                                                                          */
+/**  VOID  *_tx_misra_ulong_to_pointer_convert(ULONG input);                                                                        */
+/**  UCHAR  **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr);                                                  */
+/**  UCHAR  **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer);                                                    */
+/**  UCHAR  *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool);                                                    */
+/**  TX_BLOCK_POOL  *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer);                                                   */
+/**  UCHAR  *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer);                                                                */
+/**  TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer);                                                  */
+/**  UCHAR  **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer);                                                      */
+/**  TX_BYTE_POOL  *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer);                                                     */
+/**  UCHAR  *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool);                                                      */
+/**  ALIGN_TYPE  *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer);                                                    */
+/**  TX_BYTE_POOL  **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer);                                         */
+/**  TX_EVENT_FLAGS_GROUP  *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer);                                           */
+/**  ULONG  *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer);                                                                */
+/**  TX_MUTEX  *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer);                                                             */
+/**  TX_QUEUE  *_tx_misra_void_to_queue_pointer_convert(VOID *pointer);                                                             */
+/**  TX_SEMAPHORE  *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer);                                                     */
+/**  VOID  *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer);                                                                */
+/**  TX_THREAD  *_tx_misra_ulong_to_thread_pointer_convert(ULONG value);                                                            */
+/**  VOID  *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer);                                          */
+/**  CHAR  *_tx_misra_const_char_to_char_pointer_convert(const char *pointer);                                                      */
+/**  TX_THREAD  *_tx_misra_void_to_thread_pointer_convert(void *pointer);                                                           */
+/**  UCHAR  *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer);                                             */
+/**  TX_TRACE_OBJECT_ENTRY  *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer);                                             */
+/**  TX_TRACE_HEADER  *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer);                                                   */
+/**  TX_TRACE_BUFFER_ENTRY  *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer);                                              */
+/**  UCHAR  *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer);                                              */
+/**  UCHAR  *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer);                                                                */
+/**  VOID    _tx_misra_event_flags_group_not_used(TX_EVENT_FLAGS_GROUP *group_ptr);                                                 */
+/**  VOID    _tx_misra_event_flags_set_notify_not_used(VOID (*events_set_notify)(TX_EVENT_FLAGS_GROUP *notify_group_ptr));          */
+/**  VOID    _tx_misra_queue_not_used(TX_QUEUE *queue_ptr);                                                                         */
+/**  VOID    _tx_misra_queue_send_notify_not_used(VOID (*queue_send_notify)(TX_QUEUE *notify_queue_ptr));                           */
+/**  VOID    _tx_misra_semaphore_not_used(TX_SEMAPHORE *semaphore_ptr);                                                             */
+/**  VOID    _tx_misra_semaphore_put_notify_not_used(VOID (*semaphore_put_notify)(TX_SEMAPHORE *notify_semaphore_ptr));             */
+/**  VOID    _tx_misra_thread_not_used(TX_THREAD *thread_ptr);                                                                      */
+/**  VOID    _tx_misra_thread_entry_exit_notify_not_used(VOID (*thread_entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT id));  */
+/**                                                                                                                                 */
+/************************************************************************************************************************************/
+/************************************************************************************************************************************/
+        .text
+        .thumb_func
+_tx_misra_pointer_to_ulong_convert:
+_tx_misra_ulong_to_pointer_convert:
+_tx_misra_indirect_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_indirect_uchar_pointer_convert:
+_tx_misra_block_pool_to_uchar_pointer_convert:
+_tx_misra_void_to_block_pool_pointer_convert:
+_tx_misra_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_block_pool_pointer_convert:
+_tx_misra_void_to_indirect_uchar_pointer_convert:
+_tx_misra_void_to_byte_pool_pointer_convert:
+_tx_misra_byte_pool_to_uchar_pointer_convert:
+_tx_misra_uchar_to_align_type_pointer_convert:
+_tx_misra_uchar_to_indirect_byte_pool_pointer_convert:
+_tx_misra_void_to_event_flags_pointer_convert:
+_tx_misra_void_to_ulong_pointer_convert:
+_tx_misra_void_to_mutex_pointer_convert:
+_tx_misra_void_to_queue_pointer_convert:
+_tx_misra_void_to_semaphore_pointer_convert:
+_tx_misra_uchar_to_void_pointer_convert:
+_tx_misra_ulong_to_thread_pointer_convert:
+_tx_misra_timer_indirect_to_void_pointer_convert:
+_tx_misra_const_char_to_char_pointer_convert:
+_tx_misra_void_to_thread_pointer_convert:
+#ifdef TX_ENABLE_EVENT_TRACE
+_tx_misra_object_to_uchar_pointer_convert:
+_tx_misra_uchar_to_object_pointer_convert:
+_tx_misra_uchar_to_header_pointer_convert:
+_tx_misra_uchar_to_entry_pointer_convert:
+_tx_misra_entry_to_uchar_pointer_convert:
+#endif
+_tx_misra_char_to_uchar_pointer_convert:
+_tx_misra_event_flags_group_not_used:
+_tx_misra_event_flags_set_notify_not_used:
+_tx_misra_queue_not_used:
+_tx_misra_queue_send_notify_not_used:
+_tx_misra_semaphore_not_used:
+_tx_misra_semaphore_put_notify_not_used:
+_tx_misra_thread_entry_exit_notify_not_used:
+_tx_misra_thread_not_used:
+
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  *_tx_misra_ulong_pointer_add(ULONG *ptr, ULONG amount);       */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_ulong_pointer_add:
+        LSLS    R1,#2
+        ADD     R0,R0,R1
+        BX      LR              // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  *_tx_misra_ulong_pointer_sub(ULONG *ptr, ULONG amount);       */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_ulong_pointer_sub:
+        MOVS    R3,#3
+        MVNS    R2,R3
+        MULS    R1,R2,R1
+        ADD     R0,R0,R1
+        BX      LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  _tx_misra_ulong_pointer_dif(ULONG *ptr1, ULONG *ptr2);        */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_ulong_pointer_dif:
+        SUBS     R0,R0,R1
+        ASRS     R0,R0,#+2
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_message_copy(ULONG **source, ULONG **destination,    */
+/**                                                           UINT size); */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_message_copy:
+        PUSH     {R4,R5}
+        LDR      R3,[R0, #+0]
+        LDR      R4,[R1, #+0]
+        LDR      R5,[R3, #+0]
+        STR      R5,[R4, #+0]
+        ADDS     R4,R4,#+4
+        ADDS     R3,R3,#+4
+        CMP      R2,#+2
+        BCC.N    _tx_misra_message_copy_0
+        SUBS     R2,R2,#+1
+        B.N      _tx_misra_message_copy_1
+_tx_misra_message_copy_2:
+        LDR      R5,[R3, #+0]
+        STR      R5,[R4, #+0]
+        ADDS     R4,R4,#+4
+        ADDS     R3,R3,#+4
+        SUBS     R2,R2,#+1
+_tx_misra_message_copy_1:
+        CMP      R2,#+0
+        BNE.N    _tx_misra_message_copy_2
+_tx_misra_message_copy_0:
+        STR      R3,[R0, #+0]
+        STR      R4,[R1, #+0]
+        POP      {R4,R5}
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  _tx_misra_timer_pointer_dif(TX_TIMER_INTERNAL **ptr1,         */
+/**                                           TX_TIMER_INTERNAL **ptr2);  */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_timer_pointer_dif:
+        SUBS     R0,R0,R1
+        ASRS     R0,R0,#+2
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  TX_TIMER_INTERNAL **_tx_misra_timer_pointer_add(TX_TIMER_INTERNAL    */
+/**                                                  **ptr1, ULONG size); */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_timer_pointer_add:
+        LSLS    R1,#2
+        ADD     R0,R0,R1
+        BX      LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_user_timer_pointer_get(TX_TIMER_INTERNAL             */
+/**                              *internal_timer, TX_TIMER **user_timer); */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_user_timer_pointer_get:
+        SUBS    R0,#8
+        STR     R0,[R1, #+0]
+        BX      LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_thread_stack_check(TX_THREAD *thread_ptr,            */
+/**                                              VOID **highest_stack);   */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_thread_stack_check:
+        PUSH    {R3-R7,LR}
+        MOVS    R4,R0
+        MOVS    R5,R1
+        BL      _tx_thread_interrupt_disable
+        CMP     R4,#0
+        BEQ.N   _tx_misra_thread_stack_check_0
+        LDR     R1,[R4]
+        LDR     R2,=0x54485244
+        CMP     R1,R2
+        BNE.N   _tx_misra_thread_stack_check_0
+        LDR     R1,[R4, #8]
+        LDR     R2,[R5]
+        CMP     R1,R2
+        BCS.N   _tx_misra_thread_stack_check_1
+        STR     R1,[R5]
+_tx_misra_thread_stack_check_1:
+        LDR     R1,[R4, #12]
+        LDR     R1,[R1]
+        LDR     R6,=0xEFEFEFEF
+        CMP     R1,R6
+        BNE.N   _tx_misra_thread_stack_check_2
+        LDR     R1,[R4, #16]
+        MOVS    R7,#1
+        LDR     R1,[R1, R7]
+        CMP     R1,R6
+        BNE.N   _tx_misra_thread_stack_check_2
+        LDR     R1,[R5]
+        LDR     R2,[R4, #12]
+        CMP     R1,R2
+        BCS.N   _tx_misra_thread_stack_check_3
+_tx_misra_thread_stack_check_2:
+        BL      _tx_thread_interrupt_restore
+        MOVS    R0,R4
+        BL      _tx_thread_stack_error_handler
+        BL      _tx_thread_interrupt_disable
+_tx_misra_thread_stack_check_3:
+        LDR     R1,[R5]
+        LDR     R7,=-4
+        LDR     R1,[R1, R7]
+        CMP     R1,R6
+        BEQ.N   _tx_misra_thread_stack_check_0
+        BL      _tx_thread_interrupt_restore
+        MOVS    R0,R4
+        BL      _tx_thread_stack_analyze
+        BL      _tx_thread_interrupt_disable
+_tx_misra_thread_stack_check_0:
+        BL      _tx_thread_interrupt_restore
+        POP     {R0,R4,R5,R6,R7,PC}    // return
+
+#ifdef TX_ENABLE_EVENT_TRACE
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_trace_event_insert(ULONG event_id,                   */
+/**           VOID *info_field_1, ULONG info_field_2, ULONG info_field_3, */
+/**           ULONG info_field_4, ULONG filter, ULONG time_stamp);        */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_trace_event_insert:
+        PUSH     {R3-R7,LR}
+        LDR.N    R4,DataTable2_1
+        LDR      R4,[R4, #+0]
+        CMP      R4,#+0
+        BEQ.N    _tx_misra_trace_event_insert_0
+        LDR.N    R5,DataTable2_2
+        LDR      R5,[R5, #+0]
+        LDR      R6,[SP, #+28]
+        TST      R5,R6
+        BEQ.N    _tx_misra_trace_event_insert_0
+        LDR.N    R5,DataTable2_3
+        LDR      R5,[R5, #+0]
+        LDR.N    R6,DataTable2_4
+        LDR      R6,[R6, #+0]
+        CMP      R5,#+0
+        BNE.N    _tx_misra_trace_event_insert_1
+        LDR      R5,[R6, #+44]
+        LDR      R7,[R6, #+60]
+        LSLS     R7,R7,#+16
+        ORRS     R7,R7,#0x80000000
+        ORRS     R5,R7,R5
+        B.N      _tx_misra_trace_event_insert_2
+_tx_misra_trace_event_insert_1:
+        CMP      R5,#-252645136
+        BCS.N    _tx_misra_trace_event_insert_3
+        MOVS     R5,R6
+        MOVS     R6,#-1
+        B.N      _tx_misra_trace_event_insert_2
+_tx_misra_trace_event_insert_3:
+        MOVS     R6,#-252645136
+        MOVS     R5,#+0
+_tx_misra_trace_event_insert_2:
+        STR      R6,[R4, #+0]
+        STR      R5,[R4, #+4]
+        STR      R0,[R4, #+8]
+        LDR      R0,[SP, #+32]
+        STR      R0,[R4, #+12]
+        STR      R1,[R4, #+16]
+        STR      R2,[R4, #+20]
+        STR      R3,[R4, #+24]
+        LDR      R0,[SP, #+24]
+        STR      R0,[R4, #+28]
+        ADDS     R4,R4,#+32
+        LDR.N    R0,DataTable2_5
+        LDR      R0,[R0, #+0]
+        CMP      R4,R0
+        BCC.N    _tx_misra_trace_event_insert_4
+        LDR.N    R0,DataTable2_6
+        LDR      R4,[R0, #+0]
+        LDR.N    R0,DataTable2_1
+        STR      R4,[R0, #+0]
+        LDR.N    R0,DataTable2_7
+        LDR      R0,[R0, #+0]
+        STR      R4,[R0, #+32]
+        LDR.N    R0,DataTable2_8
+        LDR      R0,[R0, #+0]
+        CMP      R0,#+0
+        BEQ.N    _tx_misra_trace_event_insert_0
+        LDR.N    R0,DataTable2_7
+        LDR      R0,[R0, #+0]
+        LDR.N    R1,DataTable2_8
+        LDR      R1,[R1, #+0]
+        BLX      R1
+        B.N      _tx_misra_trace_event_insert_0
+_tx_misra_trace_event_insert_4:
+        LDR.N    R0,DataTable2_1
+        STR      R4,[R0, #+0]
+        LDR.N    R0,DataTable2_7
+        LDR      R0,[R0, #+0]
+        STR      R4,[R0, #+32]
+_tx_misra_trace_event_insert_0:
+        POP      {R0,R4-R7,PC}    // return
+
+
+        .data
+DataTable2_1:
+        .word     _tx_trace_buffer_current_ptr
+
+        .data
+DataTable2_2:
+        .word     _tx_trace_event_enable_bits
+
+        .data
+DataTable2_5:
+        .word     _tx_trace_buffer_end_ptr
+
+        .data
+DataTable2_6:
+        .word     _tx_trace_buffer_start_ptr
+
+        .data
+DataTable2_7:
+        .word     _tx_trace_header_ptr
+
+        .data
+DataTable2_8:
+        .word     _tx_trace_full_notify_function
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  _tx_misra_time_stamp_get(VOID);                               */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_time_stamp_get:
+        MOVS     R0,#+0
+        BX       LR               // return
+
+#endif
+
+        .data
+DataTable2_3:
+        .word     _tx_thread_system_state
+
+        .data
+DataTable2_4:
+        .word     _tx_thread_current_ptr
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  UINT  _tx_misra_always_true(void);                                   */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_always_true:
+        MOVS     R0,#+1
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  UINT  _tx_misra_status_get(UINT status);                             */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_status_get:
+        MOVS     R0,#+0
+        BX       LR               // return
+
+
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  ULONG  _tx_misra_ipsr_get(void);                                                          */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_ipsr_get:
+        MRS      R0, IPSR
+        BX       LR               // return
+
+
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  ULONG  _tx_misra_control_get(void);                                                       */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_control_get:
+        MRS      R0, CONTROL
+        BX       LR               // return
+
+        
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  void   _tx_misra_control_set(ULONG value);                                                */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_control_set:
+        MSR      CONTROL, R0
+        BX       LR               // return
+
+        
+#ifdef __ARM_FP
+
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  ULONG  _tx_misra_fpccr_get(void);                                                         */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_fpccr_get:
+        LDR      r0, =0xE000EF34  // Build FPCCR address
+        LDR      r0, [r0]         // Load FPCCR value
+        BX       LR               // return
+        
+        
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  void   _tx_misra_vfp_touch(void);                                                         */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_vfp_touch:
+        vmov.f32 s0, s0
+        BX       LR               // return
+        
+#endif
+        
+
+        .data
+        .word 0

ports/cortex_m23/gnu/src/tx_thread_secure_stack.c

@@ -23,7 +23,7 @@
 
 #include "tx_api.h"
 
-/* If TX_SINGLE_MODE_SECURE or TX_SINGLE_MODE_NON_SECURE is defined, 
+/* If TX_SINGLE_MODE_SECURE or TX_SINGLE_MODE_NON_SECURE is defined,
    no secure stack functionality is needed. */
 #if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
 
@@ -44,8 +44,14 @@
 #define TX_THREAD_STACK_SEAL_SIZE           8
 #define TX_THREAD_STACK_SEAL_VALUE          0xFEF5EDA5
 
-/* Secure stack info struct to hold stack start, stack limit, 
+/* max number of Secure context */
-   current stack pointer, and pointer to owning thread. 
+#ifndef TX_MAX_SECURE_CONTEXTS
+#define TX_MAX_SECURE_CONTEXTS              32
+#endif
+#define TX_INVALID_SECURE_CONTEXT_IDX       (-1)
+
+/* Secure stack info struct to hold stack start, stack limit,
+   current stack pointer, and pointer to owning thread.
    This will be allocated for each thread with a secure stack. */
 typedef struct TX_THREAD_SECURE_STACK_INFO_STRUCT
 {
@@ -53,8 +59,14 @@ typedef struct TX_THREAD_SECURE_STACK_INFO_STRUCT
     VOID        *tx_thread_secure_stack_start;      /* Thread's secure stack start address */
     VOID        *tx_thread_secure_stack_limit;      /* Thread's secure stack limit */
     TX_THREAD   *tx_thread_ptr;                     /* Keep track of thread for error handling */
+    INT          tx_next_free_index;                /* Next free index of free secure context */
 } TX_THREAD_SECURE_STACK_INFO;
 
+/* Static secure contexts */
+static TX_THREAD_SECURE_STACK_INFO tx_thread_secure_context[TX_MAX_SECURE_CONTEXTS];
+/* Head of free secure context */
+static INT tx_head_free_index = 0U;
+
 
 
 /**************************************************************************/
@@ -62,7 +74,7 @@ typedef struct TX_THREAD_SECURE_STACK_INFO_STRUCT
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_mode_stack_initialize           Cortex-M23/GNU    */
-/*                                                           6.1.7        */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -98,6 +110,9 @@ typedef struct TX_THREAD_SECURE_STACK_INFO_STRUCT
 /*                                            name, execute in handler    */
 /*                                            mode, disable optimization, */
 /*                                            resulting in version 6.1.7  */
+/*  07-29-2022      Scott Larson            Modified comments, updated    */
+/*                                            secure stack allocation,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 __attribute__((cmse_nonsecure_entry, optimize(0)))
@@ -106,6 +121,7 @@ UINT    _tx_thread_secure_mode_stack_initialize(void)
 UINT    status;
 ULONG   control;
 ULONG   ipsr;
+INT     index;
 
     /* Make sure function is called from interrupt (threads should not call). */
     asm volatile("MRS     %0, IPSR" : "=r" (ipsr));   /* Get IPSR register. */
@@ -119,12 +135,26 @@ ULONG   ipsr;
         asm volatile("MRS     %0, CONTROL" : "=r" (control));   /* Get CONTROL register. */
         control |= 2;                                           /* Use PSP. */
         asm volatile("MSR     CONTROL, %0" :: "r" (control));   /* Set CONTROL register. */
-        
+
         /* Set process stack pointer and stack limit to 0 to throw exception when a thread
            without a secure stack calls a secure function that tries to use secure stack. */
         asm volatile("MSR     PSPLIM, %0" :: "r" (0));
         asm volatile("MSR     PSP, %0" :: "r" (0));
-        
+
+        for (index = 0; index < TX_MAX_SECURE_CONTEXTS; index++)
+        {
+
+            /* Check last index and mark next free to invalid index */
+            if(index == (TX_MAX_SECURE_CONTEXTS - 1))
+            {
+                tx_thread_secure_context[index].tx_next_free_index = TX_INVALID_SECURE_CONTEXT_IDX;
+            }
+            else
+            {
+                tx_thread_secure_context[index].tx_next_free_index = index + 1;
+            }
+        }
+
         status = TX_SUCCESS;
     }
     return status;
@@ -137,7 +167,7 @@ ULONG   ipsr;
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_mode_stack_allocate             Cortex-M23/GNU    */
-/*                                                           6.1.3        */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -160,9 +190,7 @@ ULONG   ipsr;
 /*                                                                        */
 /*  CALLS                                                                 */
 /*                                                                        */
-/*    calloc                                Compiler's calloc function    */
 /*    malloc                                Compiler's malloc function    */
-/*    free                                  Compiler's free() function    */
 /*                                                                        */
 /*  CALLED BY                                                             */
 /*                                                                        */
@@ -179,20 +207,26 @@ ULONG   ipsr;
 /*  12-31-2020      Scott Larson            Modified comment(s), and      */
 /*                                            fixed M23 GCC build,        */
 /*                                            resulting in version 6.1.3  */
-
+/*  07-29-2022      Scott Larson            Modified comments, updated    */
+/*                                            secure stack allocation,    */
+/*                                            added                       */
+/*                                            TX_INTERRUPT_SAVE_AREA,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 __attribute__((cmse_nonsecure_entry))
 UINT    _tx_thread_secure_mode_stack_allocate(TX_THREAD *thread_ptr, ULONG stack_size)
 {
+TX_INTERRUPT_SAVE_AREA
 UINT    status;
 TX_THREAD_SECURE_STACK_INFO *info_ptr;
 UCHAR   *stack_mem;
 ULONG   ipsr;
 ULONG   psplim_ns;
+INT     secure_context_index;
 
     status = TX_SUCCESS;
-    
+
     /* Make sure function is called from interrupt (threads should not call). */
     asm volatile("MRS     %0, IPSR" : "=r" (ipsr));   /* Get IPSR register. */
     if (ipsr == 0)
@@ -203,23 +237,38 @@ ULONG   psplim_ns;
     {
         status = TX_SIZE_ERROR;
     }
-    
+
     /* Check if thread already has secure stack allocated. */
     else if (thread_ptr -> tx_thread_secure_stack_context != 0)
     {
         status = TX_THREAD_ERROR;
     }
-    
+
     else
     {
-        /* Allocate space for secure stack info. */
+        TX_DISABLE
-        info_ptr = calloc(1, sizeof(TX_THREAD_SECURE_STACK_INFO));
+
-        
+        /* Allocate free index for secure stack info. */
-        if(info_ptr != TX_NULL)
+        if(tx_head_free_index != TX_INVALID_SECURE_CONTEXT_IDX)
         {
+            secure_context_index = tx_head_free_index;
+            tx_head_free_index = tx_thread_secure_context[tx_head_free_index].tx_next_free_index;
+            tx_thread_secure_context[secure_context_index].tx_next_free_index = TX_INVALID_SECURE_CONTEXT_IDX;
+        }
+        else
+        {
+            secure_context_index = TX_INVALID_SECURE_CONTEXT_IDX;
+        }
+
+        TX_RESTORE
+
+        if(secure_context_index != TX_INVALID_SECURE_CONTEXT_IDX)
+        {
+            info_ptr = &tx_thread_secure_context[secure_context_index];
+
             /* If stack info allocated, allocate a stack & seal. */
             stack_mem = malloc(stack_size + TX_THREAD_STACK_SEAL_SIZE);
-            
+
             if(stack_mem != TX_NULL)
             {
                 /* Secure stack has been allocated, save in the stack info struct. */
@@ -227,13 +276,13 @@ ULONG   psplim_ns;
                 info_ptr -> tx_thread_secure_stack_start = stack_mem + stack_size;
                 info_ptr -> tx_thread_secure_stack_ptr = info_ptr -> tx_thread_secure_stack_start;
                 info_ptr -> tx_thread_ptr = thread_ptr;
-                
+
                 /* Seal bottom of stack. */
                 *(ULONG*)info_ptr -> tx_thread_secure_stack_start = TX_THREAD_STACK_SEAL_VALUE;
-                
+
-                /* Save info pointer in thread. */
+                /* Save secure context id (i.e non-zero base index) in thread. */
-                thread_ptr -> tx_thread_secure_stack_context = info_ptr;
+                thread_ptr -> tx_thread_secure_stack_context = (VOID *)(secure_context_index + 1);
-                
+
                 /* Check if this thread is running by looking at its stack start and PSPLIM_NS */
                 asm volatile("MRS     %0, PSPLIM_NS" : "=r" (psplim_ns));   /* Get PSPLIM_NS register. */
                 if(((ULONG) thread_ptr -> tx_thread_stack_start & 0xFFFFFFF8) == psplim_ns)
@@ -243,21 +292,26 @@ ULONG   psplim_ns;
                     asm volatile("MSR     PSP, %0" :: "r" ((ULONG)(info_ptr -> tx_thread_secure_stack_ptr)));
                 }
             }
-            
+
             else
             {
+                TX_DISABLE
+
                 /* Stack not allocated, free the info struct. */
-                free(info_ptr);
+                tx_thread_secure_context[secure_context_index].tx_next_free_index = tx_head_free_index;
+                tx_head_free_index = secure_context_index;
+                TX_RESTORE
+
                 status = TX_NO_MEMORY;
             }
         }
-        
+
         else
         {
             status = TX_NO_MEMORY;
         }
     }
-    
+
     return(status);
 }
 
@@ -268,7 +322,7 @@ ULONG   psplim_ns;
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_mode_stack_free                 Cortex-M23/GNU    */
-/*                                                           6.1.3        */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -305,46 +359,67 @@ ULONG   psplim_ns;
 /*  12-31-2020      Scott Larson            Modified comment(s), and      */
 /*                                            fixed M23 GCC build,        */
 /*                                            resulting in version 6.1.3  */
+/*  07-29-2022      Scott Larson            Modified comments, updated    */
+/*                                            secure stack allocation,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 __attribute__((cmse_nonsecure_entry))
 UINT    _tx_thread_secure_mode_stack_free(TX_THREAD *thread_ptr)
 {
+TX_INTERRUPT_SAVE_AREA
 UINT    status;
 TX_THREAD_SECURE_STACK_INFO *info_ptr;
 ULONG   ipsr;
+INT     secure_context_index;
 
     status = TX_SUCCESS;
-    
+
-    /* Pickup stack info from thread. */
+    /* Pickup stack info id from thread. */
-    info_ptr = thread_ptr -> tx_thread_secure_stack_context;
+    secure_context_index = (INT)thread_ptr -> tx_thread_secure_stack_context - 1;
-    
+
     /* Make sure function is called from interrupt (threads should not call). */
     asm volatile("MRS     %0, IPSR" : "=r" (ipsr));   /* Get IPSR register. */
     if (ipsr == 0)
     {
         status = TX_CALLER_ERROR;
     }
-    
+
-    /* Check that this secure context is for this thread. */
+    /* Check if secure context index is in valid range. */
-    else if (info_ptr -> tx_thread_ptr != thread_ptr)
+    else if (secure_context_index < 0 || secure_context_index >= TX_MAX_SECURE_CONTEXTS)
     {
         status = TX_THREAD_ERROR;
     }
-    
     else
     {
-        
+
-        /* Free secure stack. */
+        /* Pickup stack info from static array of secure contexts. */
-        free(info_ptr -> tx_thread_secure_stack_limit);
+        info_ptr = &tx_thread_secure_context[secure_context_index];
-        
+
-        /* Free info struct. */
+        /* Check that this secure context is for this thread. */
-        free(info_ptr);
+        if (info_ptr -> tx_thread_ptr != thread_ptr)
-        
+        {
-        /* Clear secure context from thread. */
+            status = TX_THREAD_ERROR;
-        thread_ptr -> tx_thread_secure_stack_context = 0;
+        }
+
+        else
+        {
+
+            /* Free secure stack. */
+            free(info_ptr -> tx_thread_secure_stack_limit);
+
+            TX_DISABLE
+
+            /* Free info struct. */
+            tx_thread_secure_context[secure_context_index].tx_next_free_index = tx_head_free_index;
+            tx_head_free_index = secure_context_index;
+            TX_RESTORE
+
+            /* Clear secure context from thread. */
+            thread_ptr -> tx_thread_secure_stack_context = 0;
+        }
     }
-    
+
     return(status);
 }
 
@@ -355,7 +430,7 @@ ULONG   ipsr;
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_stack_context_save              Cortex-M23/GNU    */
-/*                                                           6.1.7        */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -392,6 +467,9 @@ ULONG   ipsr;
 /*                                            resulting in version 6.1.3  */
 /*  06-02-2021      Scott Larson            Fix stack pointer save,       */
 /*                                            resulting in version 6.1.7  */
+/*  07-29-2022      Scott Larson            Modified comments, updated    */
+/*                                            secure stack allocation,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 __attribute__((cmse_nonsecure_entry))
@@ -400,6 +478,7 @@ void _tx_thread_secure_stack_context_save(TX_THREAD *thread_ptr)
 TX_THREAD_SECURE_STACK_INFO *info_ptr;
 ULONG   sp;
 ULONG   ipsr;
+INT secure_context_index = (INT)thread_ptr -> tx_thread_secure_stack_context - 1;
 
     /* This function should be called from scheduler only. */
     asm volatile("MRS     %0, IPSR" : "=r" (ipsr));   /* Get IPSR register. */
@@ -407,32 +486,38 @@ ULONG   ipsr;
     {
         return;
     }
-    
+
+    /* Check if secure context index is in valid range. */
+    else if (secure_context_index < 0 || secure_context_index >= TX_MAX_SECURE_CONTEXTS)
+    {
+        return;
+    }
+
     /* Pickup the secure context pointer. */
-    info_ptr = (TX_THREAD_SECURE_STACK_INFO *)(thread_ptr -> tx_thread_secure_stack_context);
+    info_ptr = &tx_thread_secure_context[secure_context_index];
-    
+
     /* Check that this secure context is for this thread. */
     if (info_ptr -> tx_thread_ptr != thread_ptr)
     {
         return;
     }
-    
+
     /* Check that stack pointer is in range */
     asm volatile("MRS     %0, PSP" : "=r" (sp));   /* Get PSP register. */
-    if ((sp < (ULONG)info_ptr -> tx_thread_secure_stack_limit) || 
+    if ((sp < (ULONG)info_ptr -> tx_thread_secure_stack_limit) ||
         (sp > (ULONG)info_ptr -> tx_thread_secure_stack_start))
     {
         return;
     }
-    
+
     /* Save stack pointer. */
     info_ptr -> tx_thread_secure_stack_ptr = (VOID *) sp;
-    
+
     /* Set process stack pointer and stack limit to 0 to throw exception when a thread
        without a secure stack calls a secure function that tries to use secure stack. */
     asm volatile("MSR     PSPLIM, %0" :: "r" (0));
     asm volatile("MSR     PSP, %0" :: "r" (0));
-    
+
     return;
 }
 
@@ -443,7 +528,7 @@ ULONG   ipsr;
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_stack_context_restore           Cortex-M23/GNU    */
-/*                                                           6.1.3        */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -478,6 +563,9 @@ ULONG   ipsr;
 /*  12-31-2020      Scott Larson            Modified comment(s), and      */
 /*                                            fixed M23 GCC build,        */
 /*                                            resulting in version 6.1.3  */
+/*  07-29-2022      Scott Larson            Modified comments, updated    */
+/*                                            secure stack allocation,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 __attribute__((cmse_nonsecure_entry))
@@ -485,6 +573,7 @@ void _tx_thread_secure_stack_context_restore(TX_THREAD *thread_ptr)
 {
 TX_THREAD_SECURE_STACK_INFO *info_ptr;
 ULONG   ipsr;
+INT secure_context_index = (INT)thread_ptr -> tx_thread_secure_stack_context - 1;
 
     /* This function should be called from scheduler only. */
     asm volatile("MRS     %0, IPSR" : "=r" (ipsr));   /* Get IPSR register. */
@@ -492,20 +581,26 @@ ULONG   ipsr;
     {
         return;
     }
-    
+
+    /* Check if secure context index is in valid range. */
+    else if (secure_context_index < 0 || secure_context_index >= TX_MAX_SECURE_CONTEXTS)
+    {
+        return;
+    }
+
     /* Pickup the secure context pointer. */
-    info_ptr = (TX_THREAD_SECURE_STACK_INFO *)(thread_ptr -> tx_thread_secure_stack_context);
+    info_ptr = &tx_thread_secure_context[secure_context_index];
-    
+
     /* Check that this secure context is for this thread. */
     if (info_ptr -> tx_thread_ptr != thread_ptr)
     {
         return;
     }
-    
+
     /* Set stack pointer and limit. */
     asm volatile("MSR     PSPLIM, %0" :: "r" ((ULONG)info_ptr -> tx_thread_secure_stack_limit));
     asm volatile("MSR     PSP, %0" :: "r" ((ULONG)info_ptr -> tx_thread_secure_stack_ptr));
-    
+
     return;
 }
 

ports/cortex_m23/gnu/src/tx_thread_secure_stack_initialize.S

@@ -26,7 +26,7 @@
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_stack_initialize                Cortex-M23/GNU    */
-/*                                                           6.1.7        */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -49,13 +49,17 @@
 /*                                                                        */
 /*  CALLED BY                                                             */
 /*                                                                        */
-/*    TX_INITIALIZE_KERNEL_ENTER_EXTENSION                                */
+/*    TX_PORT_SPECIFIC_PRE_INITIALIZATION                                 */
 /*                                                                        */
 /*  RELEASE HISTORY                                                       */
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
 /*  06-02-2021      Scott Larson            Initial Version 6.1.7         */
+/*  07-29-2022      Scott Larson            Modified comments and changed */
+/*                                            secure stack initialization */
+/*                                            macro to port-specific,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 // VOID   _tx_thread_secure_stack_initialize(VOID)

ports/cortex_m23/iar/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                         Cortex-M23/IAR    */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -61,6 +61,10 @@
 /*  04-25-2022      Scott Larson            Modified comments and added   */
 /*                                            volatile to registers,      */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Modified comments and changed */
+/*                                            secure stack initialization */
+/*                                            macro to port-specific,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -366,7 +370,7 @@ ULONG   _tx_misra_ipsr_get(VOID);
 #if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
 /* Initialize secure stacks for threads calling secure functions. */
 extern void    _tx_thread_secure_stack_initialize(void);
-#define TX_INITIALIZE_KERNEL_ENTER_EXTENSION            _tx_thread_secure_stack_initialize();
+#define TX_PORT_SPECIFIC_PRE_INITIALIZATION             _tx_thread_secure_stack_initialize();
 #endif
 
 /* Define the macro to ensure _tx_thread_preempt_disable is set early in initialization in order to 
@@ -433,7 +437,7 @@ __istate_t interrupt_save;
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] = 
-                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M23/IAR Version 6.1.11 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M23/IAR Version 6.1.12 *";
 #else
 #ifdef TX_MISRA_ENABLE
 extern  CHAR                    _tx_version_id[100];

ports/cortex_m23/iar/src/tx_misra.s

@@ -96,6 +96,22 @@
         PUBLIC _tx_misra_void_to_uchar_pointer_convert
         PUBLIC _tx_misra_void_to_ulong_pointer_convert
         PUBLIC _tx_misra_ipsr_get
+        PUBLIC _tx_misra_control_get
+        PUBLIC _tx_misra_control_set
+#ifdef __ARMVFP__
+        PUBLIC _tx_misra_fpccr_get
+        PUBLIC _tx_misra_vfp_touch
+#endif
+
+        PUBLIC _tx_misra_event_flags_group_not_used
+        PUBLIC _tx_misra_event_flags_set_notify_not_used
+        PUBLIC _tx_misra_queue_not_used
+        PUBLIC _tx_misra_queue_send_notify_not_used
+        PUBLIC _tx_misra_semaphore_not_used
+        PUBLIC _tx_misra_semaphore_put_notify_not_used
+        PUBLIC _tx_misra_thread_entry_exit_notify_not_used
+        PUBLIC _tx_misra_thread_not_used
+        
         PUBLIC _tx_version_id
 
 
@@ -109,7 +125,7 @@ _tx_version_id:
         DC8 45H, 78H, 70H, 72H, 65H, 73H, 73H, 20H
         DC8 4CH, 6FH, 67H, 69H, 63H, 20H, 49H, 6EH
         DC8 63H, 2EH, 20H, 2AH, 20H, 54H, 68H, 72H
-        DC8 65H, 61H, 64H, 58H, 20H, 36H, 2EH, 30H
+        DC8 65H, 61H, 64H, 58H, 20H, 36H, 2EH, 31H
         DC8 20H, 4DH, 49H, 53H, 52H, 41H, 20H, 43H
         DC8 20H, 43H, 6FH, 6DH, 70H, 6CH, 69H, 61H
         DC8 6EH, 74H, 20H, 2AH, 0
@@ -133,7 +149,7 @@ _tx_misra_memset:
         MOVS     R1,R0
         MOVS     R0,R4
         BL       __aeabi_memset
-        POP      {R4,PC}          ;; return
+        POP      {R4,PC}          // return
 
 /**************************************************************************/
 /**************************************************************************/
@@ -147,7 +163,7 @@ _tx_misra_memset:
         THUMB
 _tx_misra_uchar_pointer_add:
         ADD      R0,R0,R1
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -163,7 +179,7 @@ _tx_misra_uchar_pointer_add:
 _tx_misra_uchar_pointer_sub:
         RSBS     R1,R1,#+0
         ADD      R0,R0,R1
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -178,21 +194,97 @@ _tx_misra_uchar_pointer_sub:
         THUMB
 _tx_misra_uchar_pointer_dif:
         SUBS     R0,R0,R1
-        BX       LR               ;; return
+        BX       LR               // return
 
 
-/**************************************************************************/
+/************************************************************************************************************************************/
-/**************************************************************************/
+/************************************************************************************************************************************/
-/**                                                                       */
+/**                                                                                                                                 */
-/**  ULONG  _tx_misra_pointer_to_ulong_convert(VOID *ptr);                */
+/**  This single function serves all of the below prototypes.                                                                       */
-/**                                                                       */
+/**                                                                                                                                 */
-/**************************************************************************/
+/**  ULONG  _tx_misra_pointer_to_ulong_convert(VOID *ptr);                                                                          */
-/**************************************************************************/
+/**  VOID  *_tx_misra_ulong_to_pointer_convert(ULONG input);                                                                        */
-
+/**  UCHAR  **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr);                                                  */
+/**  UCHAR  **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer);                                                    */
+/**  UCHAR  *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool);                                                    */
+/**  TX_BLOCK_POOL  *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer);                                                   */
+/**  UCHAR  *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer);                                                                */
+/**  TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer);                                                  */
+/**  UCHAR  **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer);                                                      */
+/**  TX_BYTE_POOL  *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer);                                                     */
+/**  UCHAR  *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool);                                                      */
+/**  ALIGN_TYPE  *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer);                                                    */
+/**  TX_BYTE_POOL  **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer);                                         */
+/**  TX_EVENT_FLAGS_GROUP  *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer);                                           */
+/**  ULONG  *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer);                                                                */
+/**  TX_MUTEX  *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer);                                                             */
+/**  TX_QUEUE  *_tx_misra_void_to_queue_pointer_convert(VOID *pointer);                                                             */
+/**  TX_SEMAPHORE  *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer);                                                     */
+/**  VOID  *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer);                                                                */
+/**  TX_THREAD  *_tx_misra_ulong_to_thread_pointer_convert(ULONG value);                                                            */
+/**  VOID  *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer);                                          */
+/**  CHAR  *_tx_misra_const_char_to_char_pointer_convert(const char *pointer);                                                      */
+/**  TX_THREAD  *_tx_misra_void_to_thread_pointer_convert(void *pointer);                                                           */
+/**  UCHAR  *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer);                                             */
+/**  TX_TRACE_OBJECT_ENTRY  *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer);                                             */
+/**  TX_TRACE_HEADER  *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer);                                                   */
+/**  TX_TRACE_BUFFER_ENTRY  *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer);                                              */
+/**  UCHAR  *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer);                                              */
+/**  UCHAR  *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer);                                                                */
+/**  VOID    _tx_misra_event_flags_group_not_used(TX_EVENT_FLAGS_GROUP *group_ptr);                                                 */
+/**  VOID    _tx_misra_event_flags_set_notify_not_used(VOID (*events_set_notify)(TX_EVENT_FLAGS_GROUP *notify_group_ptr));          */
+/**  VOID    _tx_misra_queue_not_used(TX_QUEUE *queue_ptr);                                                                         */
+/**  VOID    _tx_misra_queue_send_notify_not_used(VOID (*queue_send_notify)(TX_QUEUE *notify_queue_ptr));                           */
+/**  VOID    _tx_misra_semaphore_not_used(TX_SEMAPHORE *semaphore_ptr);                                                             */
+/**  VOID    _tx_misra_semaphore_put_notify_not_used(VOID (*semaphore_put_notify)(TX_SEMAPHORE *notify_semaphore_ptr));             */
+/**  VOID    _tx_misra_thread_not_used(TX_THREAD *thread_ptr);                                                                      */
+/**  VOID    _tx_misra_thread_entry_exit_notify_not_used(VOID (*thread_entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT id));  */
+/**                                                                                                                                 */
+/************************************************************************************************************************************/
+/************************************************************************************************************************************/
         SECTION `.text`:CODE:NOROOT(1)
         THUMB
 _tx_misra_pointer_to_ulong_convert:
-        BX       LR               ;; return
+_tx_misra_ulong_to_pointer_convert:
+_tx_misra_indirect_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_indirect_uchar_pointer_convert:
+_tx_misra_block_pool_to_uchar_pointer_convert:
+_tx_misra_void_to_block_pool_pointer_convert:
+_tx_misra_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_block_pool_pointer_convert:
+_tx_misra_void_to_indirect_uchar_pointer_convert:
+_tx_misra_void_to_byte_pool_pointer_convert:
+_tx_misra_byte_pool_to_uchar_pointer_convert:
+_tx_misra_uchar_to_align_type_pointer_convert:
+_tx_misra_uchar_to_indirect_byte_pool_pointer_convert:
+_tx_misra_void_to_event_flags_pointer_convert:
+_tx_misra_void_to_ulong_pointer_convert:
+_tx_misra_void_to_mutex_pointer_convert:
+_tx_misra_void_to_queue_pointer_convert:
+_tx_misra_void_to_semaphore_pointer_convert:
+_tx_misra_uchar_to_void_pointer_convert:
+_tx_misra_ulong_to_thread_pointer_convert:
+_tx_misra_timer_indirect_to_void_pointer_convert:
+_tx_misra_const_char_to_char_pointer_convert:
+_tx_misra_void_to_thread_pointer_convert:
+#ifdef TX_ENABLE_EVENT_TRACE
+_tx_misra_object_to_uchar_pointer_convert:
+_tx_misra_uchar_to_object_pointer_convert:
+_tx_misra_uchar_to_header_pointer_convert:
+_tx_misra_uchar_to_entry_pointer_convert:
+_tx_misra_entry_to_uchar_pointer_convert:
+#endif
+_tx_misra_char_to_uchar_pointer_convert:
+_tx_misra_event_flags_group_not_used:
+_tx_misra_event_flags_set_notify_not_used:
+_tx_misra_queue_not_used:
+_tx_misra_queue_send_notify_not_used:
+_tx_misra_semaphore_not_used:
+_tx_misra_semaphore_put_notify_not_used:
+_tx_misra_thread_entry_exit_notify_not_used:
+_tx_misra_thread_not_used:
+
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -206,8 +298,9 @@ _tx_misra_pointer_to_ulong_convert:
         SECTION `.text`:CODE:NOROOT(1)
         THUMB
 _tx_misra_ulong_pointer_add:
-        ADD      R0,R0,R1, LSL #+2
+        LSLS    R1,#2
-        BX       LR               ;; return
+        ADD     R0,R0,R1
+        BX      LR              // return
 
 
 /**************************************************************************/
@@ -221,10 +314,11 @@ _tx_misra_ulong_pointer_add:
         SECTION `.text`:CODE:NOROOT(1)
         THUMB
 _tx_misra_ulong_pointer_sub:
-        MVNS     R2,#+3
+        MOVS    R3,#3
-        MULS     R1,R2,R1
+        MVNS    R2,R3
-        ADD      R0,R0,R1
+        MULS    R1,R2,R1
-        BX       LR               ;; return
+        ADD     R0,R0,R1
+        BX      LR               // return
 
 
 /**************************************************************************/
@@ -240,21 +334,7 @@ _tx_misra_ulong_pointer_sub:
 _tx_misra_ulong_pointer_dif:
         SUBS     R0,R0,R1
         ASRS     R0,R0,#+2
-        BX       LR               ;; return
+        BX       LR               // return
-
-
-/**************************************************************************/
-/**************************************************************************/
-/**                                                                       */
-/**  VOID  *_tx_misra_ulong_to_pointer_convert(ULONG input);              */
-/**                                                                       */
-/**************************************************************************/
-/**************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_ulong_to_pointer_convert:
-        BX       LR               ;; return
 
 
 /**************************************************************************/
@@ -293,7 +373,7 @@ _tx_misra_message_copy:
         STR      R3,[R0, #+0]
         STR      R4,[R1, #+0]
         POP      {R4,R5}
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -310,7 +390,7 @@ _tx_misra_message_copy:
 _tx_misra_timer_pointer_dif:
         SUBS     R0,R0,R1
         ASRS     R0,R0,#+2
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -325,8 +405,9 @@ _tx_misra_timer_pointer_dif:
         SECTION `.text`:CODE:NOROOT(1)
         THUMB
 _tx_misra_timer_pointer_add:
-        ADD      R0,R0,R1, LSL #+2
+        LSLS    R1,#2
-        BX       LR               ;; return
+        ADD     R0,R0,R1
+        BX      LR               // return
 
 
 /**************************************************************************/
@@ -341,12 +422,9 @@ _tx_misra_timer_pointer_add:
         SECTION `.text`:CODE:NOROOT(1)
         THUMB
 _tx_misra_user_timer_pointer_get:
-        ADDS     R2,R0,#+8
+        SUBS    R0,#8
-        SUBS     R2,R2,R0
+        STR     R0,[R1, #+0]
-        RSBS     R2,R2,#+0
+        BX      LR               // return
-        ADD      R0,R0,R2
-        STR      R0,[R1, #+0]
-        BX       LR               ;; return
 
 
 /**************************************************************************/
@@ -361,52 +439,54 @@ _tx_misra_user_timer_pointer_get:
         SECTION `.text`:CODE:NOROOT(1)
         THUMB
 _tx_misra_thread_stack_check:
-        PUSH     {R3-R5,LR}
+        PUSH    {R3-R5,LR}
-        MOVS     R4,R0
+        MOVS    R4,R0
-        MOVS     R5,R1
+        MOVS    R5,R1
-        BL       _tx_thread_interrupt_disable
+        BL      _tx_thread_interrupt_disable
-        CMP      R4,#+0
+        CMP     R4,#0
-        BEQ.N    ??_tx_misra_thread_stack_check_0
+        BEQ.N   ??_tx_misra_thread_stack_check_0
-        LDR      R1,[R4, #+0]
+        LDR     R1,[R4]
-        LDR.N    R2,??DataTable2  ;; 0x54485244
+        LDR.N   R2,??DataTable2  // 0x54485244
-        CMP      R1,R2
+        CMP     R1,R2
-        BNE.N    ??_tx_misra_thread_stack_check_0
+        BNE.N   ??_tx_misra_thread_stack_check_0
-        LDR      R1,[R4, #+8]
+        LDR     R1,[R4, #8]
-        LDR      R2,[R5, #+0]
+        LDR     R2,[R5]
-        CMP      R1,R2
+        CMP     R1,R2
-        BCS.N    ??_tx_misra_thread_stack_check_1
+        BCS.N   ??_tx_misra_thread_stack_check_1
-        LDR      R1,[R4, #+8]
+        STR     R1,[R5]
-        STR      R1,[R5, #+0]
 ??_tx_misra_thread_stack_check_1:
-        LDR      R1,[R4, #+12]
+        LDR     R1,[R4, #12]
-        LDR      R1,[R1, #+0]
+        LDR     R1,[R1]
-        CMP      R1,#-269488145
+        LDR     R6,=0xEFEFEFEF
-        BNE.N    ??_tx_misra_thread_stack_check_2
+        CMP     R1,R6
-        LDR      R1,[R4, #+16]
+        BNE.N   ??_tx_misra_thread_stack_check_2
-        LDR      R1,[R1, #+1]
+        LDR     R1,[R4, #16]
-        CMP      R1,#-269488145
+        MOVS    R7,#1
-        BNE.N    ??_tx_misra_thread_stack_check_2
+        LDR     R1,[R1, R7]
-        LDR      R1,[R5, #+0]
+        CMP     R1,R6
-        LDR      R2,[R4, #+12]
+        BNE.N   ??_tx_misra_thread_stack_check_2
-        CMP      R1,R2
+        LDR     R1,[R5]
-        BCS.N    ??_tx_misra_thread_stack_check_3
+        LDR     R2,[R4, #12]
+        CMP     R1,R2
+        BCS.N   ??_tx_misra_thread_stack_check_3
 ??_tx_misra_thread_stack_check_2:
-        BL       _tx_thread_interrupt_restore
+        BL      _tx_thread_interrupt_restore
-        MOVS     R0,R4
+        MOVS    R0,R4
-        BL       _tx_thread_stack_error_handler
+        BL      _tx_thread_stack_error_handler
-        BL       _tx_thread_interrupt_disable
+        BL      _tx_thread_interrupt_disable
 ??_tx_misra_thread_stack_check_3:
-        LDR      R1,[R5, #+0]
+        LDR     R1,[R5]
-        LDR      R1,[R1, #-4]
+        LDR     R7,=-4
-        CMP      R1,#-269488145
+        LDR     R1,[R1, R7]
-        BEQ.N    ??_tx_misra_thread_stack_check_0
+        CMP     R1,R6
-        BL       _tx_thread_interrupt_restore
+        BEQ.N   ??_tx_misra_thread_stack_check_0
-        MOVS     R0,R4
+        BL      _tx_thread_interrupt_restore
-        BL       _tx_thread_stack_analyze
+        MOVS    R0,R4
-        BL       _tx_thread_interrupt_disable
+        BL      _tx_thread_stack_analyze
+        BL      _tx_thread_interrupt_disable
 ??_tx_misra_thread_stack_check_0:
-        BL       _tx_thread_interrupt_restore
+        BL      _tx_thread_interrupt_restore
-        POP      {R0,R4,R5,PC}    ;; return
+        POP     {R0,R4,R5,R6,R7,PC}    // return
 
 #ifdef TX_ENABLE_EVENT_TRACE
 
@@ -494,7 +574,7 @@ _tx_misra_trace_event_insert:
         LDR      R0,[R0, #+0]
         STR      R4,[R0, #+32]
 ??_tx_misra_trace_event_insert_0:
-        POP      {R0,R4-R7,PC}    ;; return
+        POP      {R0,R4-R7,PC}    // return
 
 
         SECTION `.text`:CODE:NOROOT(2)
@@ -546,7 +626,7 @@ _tx_misra_trace_event_insert:
         THUMB
 _tx_misra_time_stamp_get:
         MOVS     R0,#+0
-        BX       LR               ;; return
+        BX       LR               // return
 
 #endif
 
@@ -581,203 +661,7 @@ _tx_misra_time_stamp_get:
         THUMB
 _tx_misra_always_true:
         MOVS     R0,#+1
-        BX       LR               ;; return
+        BX       LR               // return
-
-
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  UCHAR  **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr);        */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_indirect_void_to_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  UCHAR  **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer);       */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_indirect_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/***********************************************************************************/
-/***********************************************************************************/
-/**                                                                                */
-/**  UCHAR  *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool);   */
-/**                                                                                */
-/***********************************************************************************/
-/***********************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_block_pool_to_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  TX_BLOCK_POOL  *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer);         */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_block_pool_pointer_convert:
-        BX       LR               ;; return
-
-
-/*****************************************************************************/
-/*****************************************************************************/
-/**                                                                          */
-/**  UCHAR  *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer);         */
-/**                                                                          */
-/*****************************************************************************/
-/*****************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/************************************************************************************/
-/************************************************************************************/
-/**                                                                                 */
-/**  TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer);  */
-/**                                                                                 */
-/************************************************************************************/
-/************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_block_pool_pointer_convert:
-        BX       LR               ;; return
-
-
-/**************************************************************************************/
-/**************************************************************************************/
-/**                                                                                   */
-/**  UCHAR  **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer);        */
-/**                                                                                   */
-/**************************************************************************************/
-/**************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_indirect_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/*****************************************************************************************/
-/*****************************************************************************************/
-/**                                                                                      */
-/**  TX_BYTE_POOL  *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer);          */
-/**                                                                                      */
-/*****************************************************************************************/
-/*****************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_byte_pool_pointer_convert:
-        BX       LR               ;; return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  UCHAR  *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool);         */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_byte_pool_to_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/*****************************************************************************************/
-/*****************************************************************************************/
-/**                                                                                      */
-/**  ALIGN_TYPE  *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer);         */
-/**                                                                                      */
-/*****************************************************************************************/
-/*****************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_align_type_pointer_convert:
-        BX       LR               ;; return
-
-
-/****************************************************************************************************/
-/****************************************************************************************************/
-/**                                                                                                 */
-/**  TX_BYTE_POOL  **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer);         */
-/**                                                                                                 */
-/****************************************************************************************************/
-/****************************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_indirect_byte_pool_pointer_convert:
-        BX       LR               ;; return
-
-
-/**************************************************************************************************/
-/**************************************************************************************************/
-/**                                                                                               */
-/**  TX_EVENT_FLAGS_GROUP  *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer);         */
-/**                                                                                               */
-/**************************************************************************************************/
-/**************************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_event_flags_pointer_convert:
-        BX       LR               ;; return
-
-
-/*****************************************************************************/
-/*****************************************************************************/
-/**                                                                          */
-/**  ULONG  *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer);         */
-/**                                                                          */
-/*****************************************************************************/
-/*****************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_ulong_pointer_convert:
-        BX       LR               ;; return
-
-
-/********************************************************************************/
-/********************************************************************************/
-/**                                                                             */
-/**  TX_MUTEX  *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer);         */
-/**                                                                             */
-/********************************************************************************/
-/********************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_mutex_pointer_convert:
-        BX       LR               ;; return
 
 
 /**************************************************************************/
@@ -792,197 +676,12 @@ _tx_misra_void_to_mutex_pointer_convert:
         THUMB
 _tx_misra_status_get:
         MOVS     R0,#+0
-        BX       LR               ;; return
+        BX       LR               // return
-
-
-/********************************************************************************/
-/********************************************************************************/
-/**                                                                             */
-/**  TX_QUEUE  *_tx_misra_void_to_queue_pointer_convert(VOID *pointer);         */
-/**                                                                             */
-/********************************************************************************/
-/********************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_queue_pointer_convert:
-        BX       LR               ;; return
-
-
-/****************************************************************************************/
-/****************************************************************************************/
-/**                                                                                     */
-/**  TX_SEMAPHORE  *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer);         */
-/**                                                                                     */
-/****************************************************************************************/
-/****************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_semaphore_pointer_convert:
-        BX       LR               ;; return
-
-
-/**************************************************************************/
-/**************************************************************************/
-/**                                                                       */
-/**  VOID  *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer);      */
-/**                                                                       */
-/**************************************************************************/
-/**************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_void_pointer_convert:
-        BX       LR               ;; return
-
-
-/*********************************************************************************/
-/*********************************************************************************/
-/**                                                                              */
-/**  TX_THREAD  *_tx_misra_ulong_to_thread_pointer_convert(ULONG value);         */
-/**                                                                              */
-/*********************************************************************************/
-/*********************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_ulong_to_thread_pointer_convert:
-        BX       LR               ;; return
-
-
-/***************************************************************************************************/
-/***************************************************************************************************/
-/**                                                                                                */
-/**  VOID  *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer);         */
-/**                                                                                                */
-/***************************************************************************************************/
-/***************************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_timer_indirect_to_void_pointer_convert:
-        BX       LR               ;; return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  CHAR  *_tx_misra_const_char_to_char_pointer_convert(const char *pointer);         */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_const_char_to_char_pointer_convert:
-        BX       LR               ;; return
-
-
-/**********************************************************************************/
-/**********************************************************************************/
-/**                                                                               */
-/**  TX_THREAD  *_tx_misra_void_to_thread_pointer_convert(void *pointer);         */
-/**                                                                               */
-/**********************************************************************************/
-/**********************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_thread_pointer_convert:
-        BX       LR               ;; return
-
-
-#ifdef TX_ENABLE_EVENT_TRACE
-
-/************************************************************************************************/
-/************************************************************************************************/
-/**                                                                                             */
-/**  UCHAR  *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer);         */
-/**                                                                                             */
-/************************************************************************************************/
-/************************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_object_to_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/************************************************************************************************/
-/************************************************************************************************/
-/**                                                                                             */
-/**  TX_TRACE_OBJECT_ENTRY  *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer);         */
-/**                                                                                             */
-/************************************************************************************************/
-/************************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_object_pointer_convert:
-        BX       LR               ;; return
-
-
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  TX_TRACE_HEADER  *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer);         */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_header_pointer_convert:
-        BX       LR               ;; return
 
 
 /***********************************************************************************************/
 /***********************************************************************************************/
 /**                                                                                            */
-/**  TX_TRACE_BUFFER_ENTRY  *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer);         */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_entry_pointer_convert:
-        BX       LR               ;; return
-
-
-/***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
-/**  UCHAR  *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer);         */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_entry_to_uchar_pointer_convert:
-        BX       LR               ;; return
-#endif
-
-
-/***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
-/**  UCHAR  *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer);                           */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_char_to_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
 /**  ULONG  _tx_misra_ipsr_get(void);                                                          */
 /**                                                                                            */
 /***********************************************************************************************/
@@ -992,9 +691,74 @@ _tx_misra_char_to_uchar_pointer_convert:
         THUMB
 _tx_misra_ipsr_get:
         MRS      R0, IPSR
-        BX       LR               ;; return
+        BX       LR               // return
 
 
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  ULONG  _tx_misra_control_get(void);                                                       */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        SECTION `.text`:CODE:NOROOT(1)
+        THUMB
+_tx_misra_control_get:
+        MRS      R0, CONTROL
+        BX       LR               // return
+
+        
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  void   _tx_misra_control_set(ULONG value);                                                */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        SECTION `.text`:CODE:NOROOT(1)
+        THUMB
+_tx_misra_control_set:
+        MSR      CONTROL, R0
+        BX       LR               // return
+
+        
+#ifdef __ARMVFP__
+
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  ULONG  _tx_misra_fpccr_get(void);                                                         */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        SECTION `.text`:CODE:NOROOT(2)
+        THUMB
+_tx_misra_fpccr_get:
+        LDR      r0, =0xE000EF34  // Build FPCCR address
+        LDR      r0, [r0]         // Load FPCCR value
+        BX       LR               // return
+        
+        
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  void   _tx_misra_vfp_touch(void);                                                         */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        SECTION `.text`:CODE:NOROOT(1)
+        THUMB
+_tx_misra_vfp_touch:
+        vmov.f32 s0, s0
+        BX       LR               // return
+        
+#endif
+        
+        
         SECTION `.iar_vfe_header`:DATA:NOALLOC:NOROOT(2)
         SECTION_TYPE SHT_PROGBITS, 0
         DATA

ports/cortex_m23/iar/src/tx_thread_secure_stack.c

@@ -23,7 +23,7 @@
 
 #include "tx_api.h"
 
-/* If TX_SINGLE_MODE_SECURE or TX_SINGLE_MODE_NON_SECURE is defined, 
+/* If TX_SINGLE_MODE_SECURE or TX_SINGLE_MODE_NON_SECURE is defined,
    no secure stack functionality is needed. */
 #if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
 
@@ -45,8 +45,14 @@
 #define TX_THREAD_STACK_SEAL_SIZE           8
 #define TX_THREAD_STACK_SEAL_VALUE          0xFEF5EDA5
 
-/* Secure stack info struct to hold stack start, stack limit, 
+/* max number of Secure context */
-   current stack pointer, and pointer to owning thread. 
+#ifndef TX_MAX_SECURE_CONTEXTS
+#define TX_MAX_SECURE_CONTEXTS              32
+#endif
+#define TX_INVALID_SECURE_CONTEXT_IDX       (-1)
+
+/* Secure stack info struct to hold stack start, stack limit,
+   current stack pointer, and pointer to owning thread.
    This will be allocated for each thread with a secure stack. */
 typedef struct TX_THREAD_SECURE_STACK_INFO_STRUCT
 {
@@ -54,8 +60,14 @@ typedef struct TX_THREAD_SECURE_STACK_INFO_STRUCT
     VOID        *tx_thread_secure_stack_start;      /* Thread's secure stack start address */
     VOID        *tx_thread_secure_stack_limit;      /* Thread's secure stack limit */
     TX_THREAD   *tx_thread_ptr;                     /* Keep track of thread for error handling */
+    INT          tx_next_free_index;                /* Next free index of free secure context */
 } TX_THREAD_SECURE_STACK_INFO;
 
+/* Static secure contexts */
+static TX_THREAD_SECURE_STACK_INFO tx_thread_secure_context[TX_MAX_SECURE_CONTEXTS];
+/* Head of free secure context */
+static INT tx_head_free_index = 0U;
+
 
 
 /**************************************************************************/
@@ -63,7 +75,7 @@ typedef struct TX_THREAD_SECURE_STACK_INFO_STRUCT
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_mode_stack_initialize           Cortex-M23/IAR    */
-/*                                                           6.1.7        */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -102,12 +114,16 @@ typedef struct TX_THREAD_SECURE_STACK_INFO_STRUCT
 /*                                            name, execute in handler    */
 /*                                            mode, disable optimization, */
 /*                                            resulting in version 6.1.7  */
+/*  07-29-2022      Scott Larson            Modified comments, updated    */
+/*                                            secure stack allocation,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 __attribute__((cmse_nonsecure_entry))
 UINT    _tx_thread_secure_mode_stack_initialize(void)
 {
 UINT    status;
+INT     index;
 
     /* Make sure function is called from interrupt (threads should not call). */
     if (__get_IPSR() == 0)
@@ -118,12 +134,26 @@ UINT    status;
     {
         /* Set secure mode to use PSP. */
         __set_CONTROL(__get_CONTROL() | 2);
-        
+
         /* Set process stack pointer and stack limit to 0 to throw exception when a thread
            without a secure stack calls a secure function that tries to use secure stack. */
         __set_PSPLIM(0);
         __set_PSP(0);
-        
+
+        for (index = 0; index < TX_MAX_SECURE_CONTEXTS; index++)
+        {
+
+            /* Check last index and mark next free to invalid index */
+            if(index == (TX_MAX_SECURE_CONTEXTS - 1))
+            {
+                tx_thread_secure_context[index].tx_next_free_index = TX_INVALID_SECURE_CONTEXT_IDX;
+            }
+            else
+            {
+                tx_thread_secure_context[index].tx_next_free_index = index + 1;
+            }
+        }
+
         status = TX_SUCCESS;
     }
     return status;
@@ -136,7 +166,7 @@ UINT    status;
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_mode_stack_allocate             Cortex-M23/IAR    */
-/*                                                           6.1.1        */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -160,9 +190,7 @@ UINT    status;
 /*  CALLS                                                                 */
 /*                                                                        */
 /*    __get_IPSR                            Intrinsic to get IPSR         */
-/*    calloc                                Compiler's calloc function    */
 /*    malloc                                Compiler's malloc function    */
-/*    free                                  Compiler's free() function    */
 /*    __set_PSPLIM                          Intrinsic to set PSP limit    */
 /*    __set_PSP                             Intrinsic to set PSP          */
 /*    __TZ_get_PSPLIM_NS                    Intrinsic to get NS PSP       */
@@ -179,18 +207,24 @@ UINT    status;
 /*  10-16-2020      Scott Larson            Modified comment(s),          */
 /*                                            added stack sealing,        */
 /*                                            resulting in version 6.1.1  */
+/*  07-29-2022      Scott Larson            Modified comments, updated    */
+/*                                            secure stack allocation,    */
+/*                                            added                       */
+/*                                            TX_INTERRUPT_SAVE_AREA,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 __attribute__((cmse_nonsecure_entry))
 UINT    _tx_thread_secure_mode_stack_allocate(TX_THREAD *thread_ptr, ULONG stack_size)
 {
+TX_INTERRUPT_SAVE_AREA
 UINT    status;
 TX_THREAD_SECURE_STACK_INFO *info_ptr;
 UCHAR   *stack_mem;
-ULONG   sp;
+INT     secure_context_index;
 
     status = TX_SUCCESS;
-    
+
     /* Make sure function is called from interrupt (threads should not call). */
     if (__get_IPSR() == 0)
     {
@@ -200,23 +234,38 @@ ULONG   sp;
     {
         status = TX_SIZE_ERROR;
     }
-    
+
     /* Check if thread already has secure stack allocated. */
     else if (thread_ptr -> tx_thread_secure_stack_context != 0)
     {
         status = TX_THREAD_ERROR;
     }
-    
+
     else
     {
-        /* Allocate space for secure stack info. */
+        TX_DISABLE
-        info_ptr = calloc(1, sizeof(TX_THREAD_SECURE_STACK_INFO));
+
-        
+        /* Allocate free index for secure stack info. */
-        if(info_ptr != TX_NULL)
+        if(tx_head_free_index != TX_INVALID_SECURE_CONTEXT_IDX)
         {
+            secure_context_index = tx_head_free_index;
+            tx_head_free_index = tx_thread_secure_context[tx_head_free_index].tx_next_free_index;
+            tx_thread_secure_context[secure_context_index].tx_next_free_index = TX_INVALID_SECURE_CONTEXT_IDX;
+        }
+        else
+        {
+            secure_context_index = TX_INVALID_SECURE_CONTEXT_IDX;
+        }
+
+        TX_RESTORE
+
+        if(secure_context_index != TX_INVALID_SECURE_CONTEXT_IDX)
+        {
+            info_ptr = &tx_thread_secure_context[secure_context_index];
+
             /* If stack info allocated, allocate a stack & seal. */
             stack_mem = malloc(stack_size + TX_THREAD_STACK_SEAL_SIZE);
-            
+
             if(stack_mem != TX_NULL)
             {
                 /* Secure stack has been allocated, save in the stack info struct. */
@@ -224,38 +273,41 @@ ULONG   sp;
                 info_ptr -> tx_thread_secure_stack_start = stack_mem + stack_size;
                 info_ptr -> tx_thread_secure_stack_ptr = info_ptr -> tx_thread_secure_stack_start;
                 info_ptr -> tx_thread_ptr = thread_ptr;
-                
+
                 /* Seal bottom of stack. */
                 *(ULONG*)info_ptr -> tx_thread_secure_stack_start = TX_THREAD_STACK_SEAL_VALUE;
-                
+
-                /* Save info pointer in thread. */
+                /* Save secure context id (i.e non-zero base index) in thread. */
-                thread_ptr -> tx_thread_secure_stack_context = info_ptr;
+                thread_ptr -> tx_thread_secure_stack_context = (VOID *)(secure_context_index + 1);
-                
+
-                /* Check if this thread is running by looking at PSP_NS and seeing if it is within
+                /* Check if this thread is running by looking at its stack start and PSPLIM_NS */
-                   the stack_start and stack_end range. */
+                if(((ULONG) thread_ptr -> tx_thread_stack_start & 0xFFFFFFF8) == __TZ_get_PSPLIM_NS())
-                sp = __TZ_get_PSP_NS();
-                if(sp > ((ULONG) thread_ptr -> tx_thread_stack_start) && sp < ((ULONG) thread_ptr -> tx_thread_stack_end))
                 {
                     /* If this thread is running, set Secure PSP and PSPLIM. */
                     __set_PSPLIM((ULONG)(info_ptr -> tx_thread_secure_stack_limit));
                     __set_PSP((ULONG)(info_ptr -> tx_thread_secure_stack_ptr));
                 }
             }
-            
+
             else
             {
+                TX_DISABLE
+
                 /* Stack not allocated, free the info struct. */
-                free(info_ptr);
+                tx_thread_secure_context[secure_context_index].tx_next_free_index = tx_head_free_index;
+                tx_head_free_index = secure_context_index;
+                TX_RESTORE
+
                 status = TX_NO_MEMORY;
             }
         }
-        
+
         else
         {
             status = TX_NO_MEMORY;
         }
     }
-    
+
     return(status);
 }
 
@@ -266,7 +318,7 @@ ULONG   sp;
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_mode_stack_free                 Cortex-M23/IAR    */
-/*                                                           6.1.1        */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -301,44 +353,67 @@ ULONG   sp;
 /*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*  10-16-2020      Scott Larson            Modified comment(s),          */
 /*                                            resulting in version 6.1.1  */
+/*  07-29-2022      Scott Larson            Modified comments, updated    */
+/*                                            secure stack allocation,    */
+/*                                            added                       */
+/*                                            TX_INTERRUPT_SAVE_AREA,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 __attribute__((cmse_nonsecure_entry))
 UINT    _tx_thread_secure_mode_stack_free(TX_THREAD *thread_ptr)
 {
+TX_INTERRUPT_SAVE_AREA
 UINT    status;
 TX_THREAD_SECURE_STACK_INFO *info_ptr;
+INT     secure_context_index;
 
     status = TX_SUCCESS;
-    
+
-    /* Pickup stack info from thread. */
+    /* Pickup stack info id from thread. */
-    info_ptr = thread_ptr -> tx_thread_secure_stack_context;
+    secure_context_index = (INT)thread_ptr -> tx_thread_secure_stack_context - 1;
-    
+
     /* Make sure function is called from interrupt (threads should not call). */
     if (__get_IPSR() == 0)
     {
         status = TX_CALLER_ERROR;
     }
-    
+
-    /* Check that this secure context is for this thread. */
+    /* Check if secure context index is in valid range. */
-    else if (info_ptr -> tx_thread_ptr != thread_ptr)
+    else if (secure_context_index < 0 || secure_context_index >= TX_MAX_SECURE_CONTEXTS)
     {
         status = TX_THREAD_ERROR;
     }
-    
     else
     {
-        
+
-        /* Free secure stack. */
+        /* Pickup stack info from static array of secure contexts. */
-        free(info_ptr -> tx_thread_secure_stack_limit);
+        info_ptr = &tx_thread_secure_context[secure_context_index];
-        
+
-        /* Free info struct. */
+        /* Check that this secure context is for this thread. */
-        free(info_ptr);
+        if (info_ptr -> tx_thread_ptr != thread_ptr)
-        
+        {
-        /* Clear secure context from thread. */
+            status = TX_THREAD_ERROR;
-        thread_ptr -> tx_thread_secure_stack_context = 0;
+        }
+
+        else
+        {
+
+            /* Free secure stack. */
+            free(info_ptr -> tx_thread_secure_stack_limit);
+
+            TX_DISABLE
+
+            /* Free info struct. */
+            tx_thread_secure_context[secure_context_index].tx_next_free_index = tx_head_free_index;
+            tx_head_free_index = secure_context_index;
+            TX_RESTORE
+
+            /* Clear secure context from thread. */
+            thread_ptr -> tx_thread_secure_stack_context = 0;
+        }
     }
-    
+
     return(status);
 }
 
@@ -349,7 +424,7 @@ TX_THREAD_SECURE_STACK_INFO *info_ptr;
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_stack_context_save              Cortex-M23/IAR    */
-/*                                                           6.1.7        */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -386,6 +461,9 @@ TX_THREAD_SECURE_STACK_INFO *info_ptr;
 /*                                            resulting in version 6.1.1  */
 /*  06-02-2021      Scott Larson            Fix stack pointer save,       */
 /*                                            resulting in version 6.1.7  */
+/*  07-29-2022      Scott Larson            Modified comments, updated    */
+/*                                            secure stack allocation,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 __attribute__((cmse_nonsecure_entry))
@@ -393,38 +471,45 @@ void _tx_thread_secure_stack_context_save(TX_THREAD *thread_ptr)
 {
 TX_THREAD_SECURE_STACK_INFO *info_ptr;
 ULONG   sp;
+INT secure_context_index = (INT)thread_ptr -> tx_thread_secure_stack_context - 1;
 
     /* This function should be called from scheduler only. */
     if (__get_IPSR() == 0)
     {
         return;
     }
-    
+
+    /* Check if secure context index is in valid range. */
+    else if (secure_context_index < 0 || secure_context_index >= TX_MAX_SECURE_CONTEXTS)
+    {
+        return;
+    }
+
     /* Pickup the secure context pointer. */
-    info_ptr = (TX_THREAD_SECURE_STACK_INFO *)(thread_ptr -> tx_thread_secure_stack_context);
+    info_ptr = &tx_thread_secure_context[secure_context_index];
-    
+
     /* Check that this secure context is for this thread. */
     if (info_ptr -> tx_thread_ptr != thread_ptr)
     {
         return;
     }
-    
+
     /* Check that stack pointer is in range */
     sp = __get_PSP();
-    if ((sp < (ULONG)info_ptr -> tx_thread_secure_stack_limit) || 
+    if ((sp < (ULONG)info_ptr -> tx_thread_secure_stack_limit) ||
         (sp > (ULONG)info_ptr -> tx_thread_secure_stack_start))
     {
         return;
     }
-    
+
     /* Save stack pointer. */
     info_ptr -> tx_thread_secure_stack_ptr = (VOID *) sp;
-    
+
     /* Set process stack pointer and stack limit to 0 to throw exception when a thread
        without a secure stack calls a secure function that tries to use secure stack. */
     __set_PSPLIM(0);
     __set_PSP(0);
-    
+
     return;
 }
 
@@ -435,7 +520,7 @@ ULONG   sp;
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_stack_context_restore           Cortex-M23/IAR    */
-/*                                                           6.1.1        */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -469,32 +554,42 @@ ULONG   sp;
 /*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*  10-16-2020      Scott Larson            Modified comment(s),          */
 /*                                            resulting in version 6.1.1  */
+/*  07-29-2022      Scott Larson            Modified comments, updated    */
+/*                                            secure stack allocation,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 __attribute__((cmse_nonsecure_entry))
 void _tx_thread_secure_stack_context_restore(TX_THREAD *thread_ptr)
 {
 TX_THREAD_SECURE_STACK_INFO *info_ptr;
+INT secure_context_index = (INT)thread_ptr -> tx_thread_secure_stack_context - 1;
 
     /* This function should be called from scheduler only. */
     if (__get_IPSR() == 0)
     {
         return;
     }
-    
+
+    /* Check if secure context index is in valid range. */
+    else if (secure_context_index < 0 || secure_context_index >= TX_MAX_SECURE_CONTEXTS)
+    {
+        return;
+    }
+
     /* Pickup the secure context pointer. */
-    info_ptr = (TX_THREAD_SECURE_STACK_INFO *)(thread_ptr -> tx_thread_secure_stack_context);
+    info_ptr = &tx_thread_secure_context[secure_context_index];
-    
+
     /* Check that this secure context is for this thread. */
     if (info_ptr -> tx_thread_ptr != thread_ptr)
     {
         return;
     }
-    
+
     /* Set stack pointer and limit. */
     __set_PSPLIM((ULONG)info_ptr -> tx_thread_secure_stack_limit);
     __set_PSP   ((ULONG)info_ptr -> tx_thread_secure_stack_ptr);
-    
+
     return;
 }
 

ports/cortex_m23/iar/src/tx_thread_secure_stack_initialize.s

@@ -27,7 +27,7 @@
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_stack_initialize                Cortex-M23/IAR    */
-/*                                                           6.1.7        */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -50,13 +50,17 @@
 /*                                                                        */
 /*  CALLED BY                                                             */
 /*                                                                        */
-/*    TX_INITIALIZE_KERNEL_ENTER_EXTENSION                                */
+/*    TX_PORT_SPECIFIC_PRE_INITIALIZATION                                 */
 /*                                                                        */
 /*  RELEASE HISTORY                                                       */
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
 /*  06-02-2021      Scott Larson            Initial Version 6.1.7         */
+/*  07-29-2022      Scott Larson            Modified comments and changed */
+/*                                            secure stack initialization */
+/*                                            macro to port-specific,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 // VOID   _tx_thread_secure_stack_initialize(VOID)

ports/cortex_m3/ac5/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                         Cortex-M3/AC5     */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -59,6 +59,9 @@
 /*  04-25-2022      Scott Larson            Modified comments and added   */
 /*                                            volatile to registers,      */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Modified comments and         */
+/*                                            described BASEPRI usage,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -146,6 +149,12 @@ typedef unsigned short                          USHORT;
 #define TX_TIMER_THREAD_PRIORITY                0           /* Default timer thread priority    */
 #endif
 
+/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts.
+If using BASEPRI is desired, define the following two symbols for both c and assembly files:
+TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK.
+TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask.
+Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run.
+*/
 
 /* Define various constants for the ThreadX Cortex-M port.  */
 
@@ -707,7 +716,7 @@ void    tx_thread_fpu_disable(void);
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] =
-                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M3/AC5 Version 6.1.11 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M3/AC5 Version 6.1.12 *";
 #else
 #ifdef TX_MISRA_ENABLE
 extern  CHAR                    _tx_version_id[100];

ports/cortex_m3/ac6/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                         Cortex-M3/AC6     */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -59,6 +59,9 @@
 /*  04-25-2022      Scott Larson            Modified comments and added   */
 /*                                            volatile to registers,      */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Modified comments and         */
+/*                                            described BASEPRI usage,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -146,6 +149,12 @@ typedef unsigned short                          USHORT;
 #define TX_TIMER_THREAD_PRIORITY                0           /* Default timer thread priority    */
 #endif
 
+/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts.
+If using BASEPRI is desired, define the following two symbols for both c and assembly files:
+TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK.
+TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask.
+Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run.
+*/
 
 /* Define various constants for the ThreadX Cortex-M port.  */
 
@@ -707,7 +716,7 @@ void    tx_thread_fpu_disable(void);
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] =
-                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M3/AC6 Version 6.1.11 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M3/AC6 Version 6.1.12 *";
 #else
 #ifdef TX_MISRA_ENABLE
 extern  CHAR                    _tx_version_id[100];

ports/cortex_m3/ac6/src/tx_misra.S

@@ -103,6 +103,14 @@
         .global _tx_misra_vfp_touch
 #endif
 
+        .global _tx_misra_event_flags_group_not_used
+        .global _tx_misra_event_flags_set_notify_not_used
+        .global _tx_misra_queue_not_used
+        .global _tx_misra_queue_send_notify_not_used
+        .global _tx_misra_semaphore_not_used
+        .global _tx_misra_semaphore_put_notify_not_used
+        .global _tx_misra_thread_entry_exit_notify_not_used
+        .global _tx_misra_thread_not_used
 
 /**************************************************************************/
 /**************************************************************************/
@@ -172,17 +180,93 @@ _tx_misra_uchar_pointer_dif:
         BX       LR               // return
 
 
-/**************************************************************************/
+/************************************************************************************************************************************/
-/**************************************************************************/
+/************************************************************************************************************************************/
-/**                                                                       */
+/**                                                                                                                                 */
-/**  ULONG  _tx_misra_pointer_to_ulong_convert(VOID *ptr);                */
+/**  This single function serves all of the below prototypes.                                                                       */
-/**                                                                       */
+/**                                                                                                                                 */
-/**************************************************************************/
+/**  ULONG  _tx_misra_pointer_to_ulong_convert(VOID *ptr);                                                                          */
-/**************************************************************************/
+/**  VOID  *_tx_misra_ulong_to_pointer_convert(ULONG input);                                                                        */
-
+/**  UCHAR  **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr);                                                  */
+/**  UCHAR  **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer);                                                    */
+/**  UCHAR  *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool);                                                    */
+/**  TX_BLOCK_POOL  *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer);                                                   */
+/**  UCHAR  *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer);                                                                */
+/**  TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer);                                                  */
+/**  UCHAR  **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer);                                                      */
+/**  TX_BYTE_POOL  *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer);                                                     */
+/**  UCHAR  *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool);                                                      */
+/**  ALIGN_TYPE  *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer);                                                    */
+/**  TX_BYTE_POOL  **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer);                                         */
+/**  TX_EVENT_FLAGS_GROUP  *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer);                                           */
+/**  ULONG  *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer);                                                                */
+/**  TX_MUTEX  *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer);                                                             */
+/**  TX_QUEUE  *_tx_misra_void_to_queue_pointer_convert(VOID *pointer);                                                             */
+/**  TX_SEMAPHORE  *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer);                                                     */
+/**  VOID  *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer);                                                                */
+/**  TX_THREAD  *_tx_misra_ulong_to_thread_pointer_convert(ULONG value);                                                            */
+/**  VOID  *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer);                                          */
+/**  CHAR  *_tx_misra_const_char_to_char_pointer_convert(const char *pointer);                                                      */
+/**  TX_THREAD  *_tx_misra_void_to_thread_pointer_convert(void *pointer);                                                           */
+/**  UCHAR  *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer);                                             */
+/**  TX_TRACE_OBJECT_ENTRY  *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer);                                             */
+/**  TX_TRACE_HEADER  *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer);                                                   */
+/**  TX_TRACE_BUFFER_ENTRY  *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer);                                              */
+/**  UCHAR  *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer);                                              */
+/**  UCHAR  *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer);                                                                */
+/**  VOID    _tx_misra_event_flags_group_not_used(TX_EVENT_FLAGS_GROUP *group_ptr);                                                 */
+/**  VOID    _tx_misra_event_flags_set_notify_not_used(VOID (*events_set_notify)(TX_EVENT_FLAGS_GROUP *notify_group_ptr));          */
+/**  VOID    _tx_misra_queue_not_used(TX_QUEUE *queue_ptr);                                                                         */
+/**  VOID    _tx_misra_queue_send_notify_not_used(VOID (*queue_send_notify)(TX_QUEUE *notify_queue_ptr));                           */
+/**  VOID    _tx_misra_semaphore_not_used(TX_SEMAPHORE *semaphore_ptr);                                                             */
+/**  VOID    _tx_misra_semaphore_put_notify_not_used(VOID (*semaphore_put_notify)(TX_SEMAPHORE *notify_semaphore_ptr));             */
+/**  VOID    _tx_misra_thread_not_used(TX_THREAD *thread_ptr);                                                                      */
+/**  VOID    _tx_misra_thread_entry_exit_notify_not_used(VOID (*thread_entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT id));  */
+/**                                                                                                                                 */
+/************************************************************************************************************************************/
+/************************************************************************************************************************************/
         .text
         .thumb_func
 _tx_misra_pointer_to_ulong_convert:
+_tx_misra_ulong_to_pointer_convert:
+_tx_misra_indirect_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_indirect_uchar_pointer_convert:
+_tx_misra_block_pool_to_uchar_pointer_convert:
+_tx_misra_void_to_block_pool_pointer_convert:
+_tx_misra_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_block_pool_pointer_convert:
+_tx_misra_void_to_indirect_uchar_pointer_convert:
+_tx_misra_void_to_byte_pool_pointer_convert:
+_tx_misra_byte_pool_to_uchar_pointer_convert:
+_tx_misra_uchar_to_align_type_pointer_convert:
+_tx_misra_uchar_to_indirect_byte_pool_pointer_convert:
+_tx_misra_void_to_event_flags_pointer_convert:
+_tx_misra_void_to_ulong_pointer_convert:
+_tx_misra_void_to_mutex_pointer_convert:
+_tx_misra_void_to_queue_pointer_convert:
+_tx_misra_void_to_semaphore_pointer_convert:
+_tx_misra_uchar_to_void_pointer_convert:
+_tx_misra_ulong_to_thread_pointer_convert:
+_tx_misra_timer_indirect_to_void_pointer_convert:
+_tx_misra_const_char_to_char_pointer_convert:
+_tx_misra_void_to_thread_pointer_convert:
+#ifdef TX_ENABLE_EVENT_TRACE
+_tx_misra_object_to_uchar_pointer_convert:
+_tx_misra_uchar_to_object_pointer_convert:
+_tx_misra_uchar_to_header_pointer_convert:
+_tx_misra_uchar_to_entry_pointer_convert:
+_tx_misra_entry_to_uchar_pointer_convert:
+#endif
+_tx_misra_char_to_uchar_pointer_convert:
+_tx_misra_event_flags_group_not_used:
+_tx_misra_event_flags_set_notify_not_used:
+_tx_misra_queue_not_used:
+_tx_misra_queue_send_notify_not_used:
+_tx_misra_semaphore_not_used:
+_tx_misra_semaphore_put_notify_not_used:
+_tx_misra_thread_entry_exit_notify_not_used:
+_tx_misra_thread_not_used:
+
         BX       LR               // return
 
 
@@ -234,20 +318,6 @@ _tx_misra_ulong_pointer_dif:
         BX       LR               // return
 
 
-/**************************************************************************/
-/**************************************************************************/
-/**                                                                       */
-/**  VOID  *_tx_misra_ulong_to_pointer_convert(ULONG input);              */
-/**                                                                       */
-/**************************************************************************/
-/**************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_ulong_to_pointer_convert:
-        BX       LR               // return
-
-
 /**************************************************************************/
 /**************************************************************************/
 /**                                                                       */
@@ -332,12 +402,9 @@ _tx_misra_timer_pointer_add:
         .text
         .thumb_func
 _tx_misra_user_timer_pointer_get:
-        ADDS     R2,R0,#+8
+        SUBS    R0,#8
-        SUBS     R2,R2,R0
+        STR     R0,[R1, #+0]
-        RSBS     R2,R2,#+0
+        BX      LR               // return
-        ADD      R0,R0,R2
-        STR      R0,[R1, #+0]
-        BX       LR               // return
 
 
 /**************************************************************************/
@@ -553,202 +620,6 @@ _tx_misra_always_true:
         BX       LR               // return
 
 
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  UCHAR  **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr);        */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_indirect_void_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  UCHAR  **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer);       */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_indirect_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/***********************************************************************************/
-/***********************************************************************************/
-/**                                                                                */
-/**  UCHAR  *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool);   */
-/**                                                                                */
-/***********************************************************************************/
-/***********************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_block_pool_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  TX_BLOCK_POOL  *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer);         */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_block_pool_pointer_convert:
-        BX       LR               // return
-
-
-/*****************************************************************************/
-/*****************************************************************************/
-/**                                                                          */
-/**  UCHAR  *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer);         */
-/**                                                                          */
-/*****************************************************************************/
-/*****************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/************************************************************************************/
-/************************************************************************************/
-/**                                                                                 */
-/**  TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer);  */
-/**                                                                                 */
-/************************************************************************************/
-/************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_block_pool_pointer_convert:
-        BX       LR               // return
-
-
-/**************************************************************************************/
-/**************************************************************************************/
-/**                                                                                   */
-/**  UCHAR  **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer);        */
-/**                                                                                   */
-/**************************************************************************************/
-/**************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_indirect_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/*****************************************************************************************/
-/*****************************************************************************************/
-/**                                                                                      */
-/**  TX_BYTE_POOL  *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer);          */
-/**                                                                                      */
-/*****************************************************************************************/
-/*****************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_byte_pool_pointer_convert:
-        BX       LR               // return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  UCHAR  *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool);         */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_byte_pool_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/*****************************************************************************************/
-/*****************************************************************************************/
-/**                                                                                      */
-/**  ALIGN_TYPE  *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer);         */
-/**                                                                                      */
-/*****************************************************************************************/
-/*****************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_align_type_pointer_convert:
-        BX       LR               // return
-
-
-/****************************************************************************************************/
-/****************************************************************************************************/
-/**                                                                                                 */
-/**  TX_BYTE_POOL  **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer);         */
-/**                                                                                                 */
-/****************************************************************************************************/
-/****************************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_indirect_byte_pool_pointer_convert:
-        BX       LR               // return
-
-
-/**************************************************************************************************/
-/**************************************************************************************************/
-/**                                                                                               */
-/**  TX_EVENT_FLAGS_GROUP  *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer);         */
-/**                                                                                               */
-/**************************************************************************************************/
-/**************************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_event_flags_pointer_convert:
-        BX       LR               // return
-
-
-/*****************************************************************************/
-/*****************************************************************************/
-/**                                                                          */
-/**  ULONG  *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer);         */
-/**                                                                          */
-/*****************************************************************************/
-/*****************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_ulong_pointer_convert:
-        BX       LR               // return
-
-
-/********************************************************************************/
-/********************************************************************************/
-/**                                                                             */
-/**  TX_MUTEX  *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer);         */
-/**                                                                             */
-/********************************************************************************/
-/********************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_mutex_pointer_convert:
-        BX       LR               // return
-
-
 /**************************************************************************/
 /**************************************************************************/
 /**                                                                       */
@@ -764,191 +635,6 @@ _tx_misra_status_get:
         BX       LR               // return
 
 
-/********************************************************************************/
-/********************************************************************************/
-/**                                                                             */
-/**  TX_QUEUE  *_tx_misra_void_to_queue_pointer_convert(VOID *pointer);         */
-/**                                                                             */
-/********************************************************************************/
-/********************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_queue_pointer_convert:
-        BX       LR               // return
-
-
-/****************************************************************************************/
-/****************************************************************************************/
-/**                                                                                     */
-/**  TX_SEMAPHORE  *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer);         */
-/**                                                                                     */
-/****************************************************************************************/
-/****************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_semaphore_pointer_convert:
-        BX       LR               // return
-
-
-/**************************************************************************/
-/**************************************************************************/
-/**                                                                       */
-/**  VOID  *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer);      */
-/**                                                                       */
-/**************************************************************************/
-/**************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_void_pointer_convert:
-        BX       LR               // return
-
-
-/*********************************************************************************/
-/*********************************************************************************/
-/**                                                                              */
-/**  TX_THREAD  *_tx_misra_ulong_to_thread_pointer_convert(ULONG value);         */
-/**                                                                              */
-/*********************************************************************************/
-/*********************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_ulong_to_thread_pointer_convert:
-        BX       LR               // return
-
-
-/***************************************************************************************************/
-/***************************************************************************************************/
-/**                                                                                                */
-/**  VOID  *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer);         */
-/**                                                                                                */
-/***************************************************************************************************/
-/***************************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_timer_indirect_to_void_pointer_convert:
-        BX       LR               // return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  CHAR  *_tx_misra_const_char_to_char_pointer_convert(const char *pointer);         */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_const_char_to_char_pointer_convert:
-        BX       LR               // return
-
-
-/**********************************************************************************/
-/**********************************************************************************/
-/**                                                                               */
-/**  TX_THREAD  *_tx_misra_void_to_thread_pointer_convert(void *pointer);         */
-/**                                                                               */
-/**********************************************************************************/
-/**********************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_thread_pointer_convert:
-        BX       LR               // return
-
-
-#ifdef TX_ENABLE_EVENT_TRACE
-
-/************************************************************************************************/
-/************************************************************************************************/
-/**                                                                                             */
-/**  UCHAR  *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer);         */
-/**                                                                                             */
-/************************************************************************************************/
-/************************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_object_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/************************************************************************************************/
-/************************************************************************************************/
-/**                                                                                             */
-/**  TX_TRACE_OBJECT_ENTRY  *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer);         */
-/**                                                                                             */
-/************************************************************************************************/
-/************************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_object_pointer_convert:
-        BX       LR               // return
-
-
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  TX_TRACE_HEADER  *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer);         */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_header_pointer_convert:
-        BX       LR               // return
-
-
-/***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
-/**  TX_TRACE_BUFFER_ENTRY  *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer);         */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_entry_pointer_convert:
-        BX       LR               // return
-
-
-/***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
-/**  UCHAR  *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer);         */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_entry_to_uchar_pointer_convert:
-        BX       LR               // return
-#endif
-
-
-/***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
-/**  UCHAR  *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer);                           */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_char_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
 /***********************************************************************************************/
 /***********************************************************************************************/
 /**                                                                                            */

ports/cortex_m3/gnu/example_build/build_threadx.bat

@@ -1,5 +1,4 @@
 del tx.a
-arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb tx_initialize_low_level.S
 arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb ../src/tx_thread_stack_build.S
 arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb ../src/tx_thread_schedule.S
 arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb ../src/tx_thread_system_return.S
@@ -7,7 +6,7 @@ arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb ../src/tx_thread_context_save.S
 arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb ../src/tx_thread_context_restore.S
 arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb ../src/tx_thread_interrupt_control.S
 arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb ../src/tx_timer_interrupt.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb ../src/tx_thread_interrupt_control.S
+
 arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_allocate.c
 arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_cleanup.c
 arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_create.c
@@ -192,8 +191,8 @@ arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I../../../../common/inc -I../in
 arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_deactivate.c
 arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_delete.c
 arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_info_get.c
+
 arm-none-eabi-ar -r tx.a tx_thread_stack_build.o tx_thread_schedule.o tx_thread_system_return.o tx_thread_context_save.o tx_thread_context_restore.o tx_timer_interrupt.o tx_thread_interrupt_control.o
-arm-none-eabi-ar -r tx.a tx_thread_interrupt_control.o tx_initialize_low_level.o
 arm-none-eabi-ar -r tx.a tx_block_allocate.o tx_block_pool_cleanup.o tx_block_pool_create.o tx_block_pool_delete.o tx_block_pool_info_get.o
 arm-none-eabi-ar -r tx.a tx_block_pool_initialize.o tx_block_pool_performance_info_get.o tx_block_pool_performance_system_info_get.o tx_block_pool_prioritize.o
 arm-none-eabi-ar -r tx.a tx_block_release.o tx_byte_allocate.o tx_byte_pool_cleanup.o tx_byte_pool_create.o tx_byte_pool_delete.o tx_byte_pool_info_get.o

ports/cortex_m3/gnu/example_build/build_threadx_sample.bat

@@ -1,7 +1,5 @@
-arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb tx_simulator_startup.S
+arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb cortexm3_vectors.S
 arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb cortexm3_crt0.S
 arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb tx_initialize_low_level.S
 arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I../../../../common/inc -I../inc sample_threadx.c
-arm-none-eabi-ld -A cortex-m3 -ereset_handler -T sample_threadx.ld tx_simulator_startup.o cortexm3_crt0.o tx_initialize_low_level.o sample_threadx.o tx.a  libc.a -o sample_threadx.out -M > sample_threadx.map
+arm-none-eabi-gcc -g -mcpu=cortex-m3 -mthumb -T sample_threadx.ld -ereset_handler -nostartfiles -o sample_threadx.out -Wl,-Map=sample_threadx.map cortexm3_vectors.o cortexm3_crt0.o tx_initialize_low_level.o sample_threadx.o tx.a
-
-

ports/cortex_m3/gnu/example_build/cortexm3_crt0.S

@@ -1,45 +1,20 @@
- .global _start
+  .syntax	unified
-  .extern main
-
-
   .section .init, "ax"
   .code 16
   .align 2
   .thumb_func
 
-
+ .global _start
 _start:
   CPSID   i
   ldr r1, =__stack_end__
   mov sp, r1
 
-
   /* Copy initialised sections into RAM if required. */
   ldr r0, =__data_load_start__
   ldr r1, =__data_start__
   ldr r2, =__data_end__
   bl crt0_memory_copy
-  ldr r0, =__text_load_start__
-  ldr r1, =__text_start__
-  ldr r2, =__text_end__
-  bl crt0_memory_copy
-  ldr r0, =__fast_load_start__
-  ldr r1, =__fast_start__
-  ldr r2, =__fast_end__
-  bl crt0_memory_copy
-  ldr r0, =__ctors_load_start__
-  ldr r1, =__ctors_start__
-  ldr r2, =__ctors_end__
-  bl crt0_memory_copy
-  ldr r0, =__dtors_load_start__
-  ldr r1, =__dtors_start__
-  ldr r2, =__dtors_end__
-  bl crt0_memory_copy
-  ldr r0, =__rodata_load_start__
-  ldr r1, =__rodata_start__
-  ldr r2, =__rodata_end__
-  bl crt0_memory_copy
-
 
   /* Zero bss. */
   ldr r0, =__bss_start__
@@ -47,7 +22,6 @@ _start:
   mov r2, #0
   bl crt0_memory_set
 
-
   /* Setup heap - not recommended for Threadx but here for compatibility reasons */
   ldr r0, = __heap_start__
   ldr r1, = __heap_end__
@@ -57,7 +31,6 @@ _start:
   add r0, r0, #4
   str r1, [r0]
 
-
   /* constructors in case of using C++ */
   ldr r0, =__ctors_start__
   ldr r1, =__ctors_end__
@@ -72,13 +45,11 @@ crt0_ctor_loop:
   b crt0_ctor_loop
 crt0_ctor_end:
 
-
   /* Setup call frame for main() */
   mov r0, #0
   mov lr, r0
   mov r12, sp
 
-
 start:
   /* Jump to main() */
   mov r0, #0
@@ -88,28 +59,22 @@ start:
   /*  when main returns, loop forever. */
 crt0_exit_loop:
   b crt0_exit_loop
-  
-
 
   /* Startup helper functions. */
 
-
 crt0_memory_copy:
   cmp r0, r1
   beq memory_copy_done
-  sub r2, r2, r1
-  beq memory_copy_done
 memory_copy_loop:
   ldrb r3, [r0]
   add r0, r0, #1
   strb r3, [r1]
   add r1, r1, #1
-  sub r2, r2, #1
+  cmp r1, r2
   bne memory_copy_loop
 memory_copy_done:
   bx lr
 
-
 crt0_memory_set:
   cmp r0, r1
   beq memory_set_done
@@ -119,7 +84,6 @@ crt0_memory_set:
 memory_set_done:
   bx lr
 
-
   /* Setup attibutes of stack and heap sections so they don't take up room in the elf file */
   .section .stack, "wa", %nobits
   .section .stack_process, "wa", %nobits

ports/cortex_m3/gnu/example_build/cortexm3_vectors.S

@@ -1,5 +1,3 @@
-
-
   .global reset_handler
 
   .global __tx_NMIHandler
@@ -10,7 +8,6 @@
   .global __tx_SysTickHandler 
   .global __tx_BadHandler
 
-
   .syntax unified
   .section .vectors, "ax"
   .code 16
@@ -29,7 +26,7 @@ _vectors:
   .word 0 // Reserved
   .word 0 // Reserved
   .word 0 // Reserved
-  .word __tx_SVCallHandler //_SVC_Handler - used by Threadx scheduler //
+  .word __tx_SVCallHandler    //_SVC_Handler - used by Threadx scheduler //
   .word __tx_DBGHandler
   .word 0 // Reserved
   .word __tx_PendSVHandler 
@@ -70,14 +67,10 @@ _vectors:
   .word __tx_BadHandler
   .word __tx_BadHandler
 
-
+  .section .init, "ax"
-
+  .thumb_func
-    .section .init, "ax"
-    .thumb_func
 reset_handler:
-
+  // low level hardware config, such as PLL setup goes here
-// low level hardware config, such as PLL setup goes here
-
   b _start
 
 

ports/cortex_m3/gnu/example_build/sample_threadx.ld

@@ -1,206 +1,125 @@
 MEMORY
 {
-  UNPLACED_SECTIONS (wx) : ORIGIN = 0x100000000, LENGTH = 0
+  RAM (wx) : ORIGIN = 0x20000000, LENGTH = 0x00800000
-  CM3_System_Control_Space (wx) : ORIGIN = 0xe000e000, LENGTH = 0x00001000
+  FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00400000
-  AHB_Peripherals (wx) : ORIGIN = 0x50000000, LENGTH = 0x00200000
-  APB1_Peripherals (wx) : ORIGIN = 0x40080000, LENGTH = 0x00080000
-  APB0_Peripherals (wx) : ORIGIN = 0x40000000, LENGTH = 0x00080000
-  GPIO (wx) : ORIGIN = 0x2009c000, LENGTH = 0x00004000
-  AHBSRAM1 (wx) : ORIGIN = 0x20080000, LENGTH = 0x00004000
-  AHBSRAM0 (wx) : ORIGIN = 0x2007c000, LENGTH = 0x00004000
-  RAM (wx) : ORIGIN = 0x10000000, LENGTH = 0x00008000
-  FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00080000
 }
 
+__STACKSIZE__ = 1024;
+__STACKSIZE_PROCESS__ = 0;
+__HEAPSIZE__ = 128;
 
 SECTIONS
 {
-  __CM3_System_Control_Space_segment_start__ = 0xe000e000;
+  .vectors : 
-  __CM3_System_Control_Space_segment_end__ = 0xe000f000;
-  __AHB_Peripherals_segment_start__ = 0x50000000;
-  __AHB_Peripherals_segment_end__ = 0x50200000;
-  __APB1_Peripherals_segment_start__ = 0x40080000;
-  __APB1_Peripherals_segment_end__ = 0x40100000;
-  __APB0_Peripherals_segment_start__ = 0x40000000;
-  __APB0_Peripherals_segment_end__ = 0x40080000;
-  __GPIO_segment_start__ = 0x2009c000;
-  __GPIO_segment_end__ = 0x200a0000;
-  __AHBSRAM1_segment_start__ = 0x20080000;
-  __AHBSRAM1_segment_end__ = 0x20084000;
-  __AHBSRAM0_segment_start__ = 0x2007c000;
-  __AHBSRAM0_segment_end__ = 0x20080000;
-  __RAM_segment_start__ = 0x10000000;
-  __RAM_segment_end__ = 0x10008000;
-  __FLASH_segment_start__ = 0x00000000;
-  __FLASH_segment_end__ = 0x00080000;
-
-  __STACKSIZE__ = 1024;
-  __STACKSIZE_PROCESS__ = 0;
-  __STACKSIZE_IRQ__ = 0;
-  __STACKSIZE_FIQ__ = 0;
-  __STACKSIZE_SVC__ = 0;
-  __STACKSIZE_ABT__ = 0;
-  __STACKSIZE_UND__ = 0;
-  __HEAPSIZE__ = 128;
-
-  __vectors_load_start__ = __FLASH_segment_start__;
-  .vectors __FLASH_segment_start__ : AT(__FLASH_segment_start__)
   {
-    __vectors_start__ = .;
+    KEEP(*(.vectors .vectors.*))
-    *(.vectors .vectors.*)
+  } > FLASH
-  }
-  __vectors_end__ = __vectors_start__ + SIZEOF(.vectors);
 
-  . = ASSERT(__vectors_end__ >= __FLASH_segment_start__ && __vectors_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .vectors is too large to fit in FLASH memory segment");
+	.text :
+	{
+		*(.text*)
 
-  __init_load_start__ = ALIGN(__vectors_end__ , 4);
+		KEEP(*(.init))
-  .init ALIGN(__vectors_end__ , 4) : AT(ALIGN(__vectors_end__ , 4))
+		KEEP(*(.fini))
-  {
-    __init_start__ = .;
-    *(.init .init.*)
-  }
-  __init_end__ = __init_start__ + SIZEOF(.init);
 
-  . = ASSERT(__init_end__ >= __FLASH_segment_start__ && __init_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .init is too large to fit in FLASH memory segment");
+		/* .ctors */
+		*crtbegin.o(.ctors)
+		*crtbegin?.o(.ctors)
+		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+    __ctors_start__ = ALIGN(4);
+		*(SORT(.ctors.*))
+		*(.ctors)
+    __ctors_end__ = ALIGN(4);
 
-  __text_load_start__ = ALIGN(__init_end__ , 4);
+		/* .dtors */
-  .text ALIGN(__init_end__ , 4) : AT(ALIGN(__init_end__ , 4))
+ 		*crtbegin.o(.dtors)
-  {
+ 		*crtbegin?.o(.dtors)
-    __text_start__ = .;
+ 		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
-    *(.text .text.* .glue_7t .glue_7 .gnu.linkonce.t.* .gcc_except_table)
+    __dtors_start__ = ALIGN(4);
-  }
+ 		*(SORT(.dtors.*))
-  __text_end__ = __text_start__ + SIZEOF(.text);
+ 		*(.dtors)
+    __dtors_end__ = ALIGN(4);
 
-  . = ASSERT(__text_end__ >= __FLASH_segment_start__ && __text_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .text is too large to fit in FLASH memory segment");
+		*(.rodata*)
 
-  __dtors_load_start__ = ALIGN(__text_end__ , 4);
+		KEEP(*(.eh_frame*))
-  .dtors ALIGN(__text_end__ , 4) : AT(ALIGN(__text_end__ , 4))
+	} > FLASH
-  {
-    __dtors_start__ = .;
-    KEEP (*(SORT(.dtors.*))) KEEP (*(.dtors))
-  }
-  __dtors_end__ = __dtors_start__ + SIZEOF(.dtors);
 
-  . = ASSERT(__dtors_end__ >= __FLASH_segment_start__ && __dtors_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .dtors is too large to fit in FLASH memory segment");
+	.ARM.extab : 
+	{
+		*(.ARM.extab* .gnu.linkonce.armextab.*)
+	} > FLASH
 
-  __ctors_load_start__ = ALIGN(__dtors_end__ , 4);
+	__exidx_start = .;
-  .ctors ALIGN(__dtors_end__ , 4) : AT(ALIGN(__dtors_end__ , 4))
+	.ARM.exidx :
-  {
+	{
-    __ctors_start__ = .;
+		*(.ARM.exidx* .gnu.linkonce.armexidx.*)
-    KEEP (*(SORT(.ctors.*))) KEEP (*(.ctors))
+	} > FLASH
-  }
+	__exidx_end = .;
-  __ctors_end__ = __ctors_start__ + SIZEOF(.ctors);
 
-  . = ASSERT(__ctors_end__ >= __FLASH_segment_start__ && __ctors_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .ctors is too large to fit in FLASH memory segment");
+	__data_load_start__ = ALIGN (4);
 
-  __rodata_load_start__ = ALIGN(__ctors_end__ , 4);
+	.data : AT (__data_load_start__) 
-  .rodata ALIGN(__ctors_end__ , 4) : AT(ALIGN(__ctors_end__ , 4))
+	{
-  {
+		__data_start__ = .;
-    __rodata_start__ = .;
-    *(.rodata .rodata.* .gnu.linkonce.r.*)
-  }
-  __rodata_end__ = __rodata_start__ + SIZEOF(.rodata);
 
-  . = ASSERT(__rodata_end__ >= __FLASH_segment_start__ && __rodata_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .rodata is too large to fit in FLASH memory segment");
+		*(vtable)
+		*(.data*)
 
-  __fast_load_start__ = ALIGN(__rodata_end__ , 4);
+		. = ALIGN(4);
-  .fast ALIGN(__RAM_segment_start__ , 4) : AT(ALIGN(__rodata_end__ , 4))
+		/* preinit data */
-  {
+		PROVIDE_HIDDEN (__preinit_array_start = .);
-    __fast_start__ = .;
+		KEEP(*(.preinit_array))
-    *(.fast .fast.*)
+		PROVIDE_HIDDEN (__preinit_array_end = .);
-  }
-  __fast_end__ = __fast_start__ + SIZEOF(.fast);
 
-  __fast_load_end__ = __fast_load_start__ + SIZEOF(.fast);
+		. = ALIGN(4);
+		/* init data */
+		PROVIDE_HIDDEN (__init_array_start = .);
+		KEEP(*(SORT(.init_array.*)))
+		KEEP(*(.init_array))
+		PROVIDE_HIDDEN (__init_array_end = .);
 
-  . = ASSERT((__fast_load_start__ + SIZEOF(.fast)) >= __FLASH_segment_start__ && (__fast_load_start__ + SIZEOF(.fast)) <= (__FLASH_segment_start__ + 0x00080000) , "error: .fast is too large to fit in FLASH memory segment");
+		. = ALIGN(4);
+		/* finit data */
+		PROVIDE_HIDDEN (__fini_array_start = .);
+		KEEP(*(SORT(.fini_array.*)))
+		KEEP(*(.fini_array))
+		PROVIDE_HIDDEN (__fini_array_end = .);
 
-  .fast_run ALIGN(__RAM_segment_start__ , 4) (NOLOAD) :
+		KEEP(*(.jcr*))
-  {
+		. = ALIGN(4);
-    __fast_run_start__ = .;
+		/* All data end */
-    . = MAX(__fast_run_start__ + SIZEOF(.fast), .);
+		
-  }
+    __data_end__ = .;
-  __fast_run_end__ = __fast_run_start__ + SIZEOF(.fast_run);
 
-  . = ASSERT(__fast_run_end__ >= __RAM_segment_start__ && __fast_run_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .fast_run is too large to fit in RAM memory segment");
+	} > RAM
 
-  __data_load_start__ = ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4);
+	.bss :
-  .data ALIGN(__fast_run_end__ , 4) : AT(ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4))
+	{
-  {
+		. = ALIGN(4);
-    __data_start__ = .;
+		__bss_start__ = .;
-    *(.data .data.* .gnu.linkonce.d.*)
+		*(.bss*)
-  }
+		*(COMMON)
-  __data_end__ = __data_start__ + SIZEOF(.data);
+		. = ALIGN(4);
+		__bss_end__ = .;
 
-  __data_load_end__ = __data_load_start__ + SIZEOF(.data);
+	} > RAM
-
+	
-  __FLASH_segment_used_end__ = ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4) + SIZEOF(.data);
+	.heap (COPY):
-
+	{
-  . = ASSERT((__data_load_start__ + SIZEOF(.data)) >= __FLASH_segment_start__ && (__data_load_start__ + SIZEOF(.data)) <= (__FLASH_segment_start__ + 0x00080000) , "error: .data is too large to fit in FLASH memory segment");
+    __heap_start__ = ALIGN(4);
-
-  .data_run ALIGN(__fast_run_end__ , 4) (NOLOAD) :
-  {
-    __data_run_start__ = .;
-    . = MAX(__data_run_start__ + SIZEOF(.data), .);
-  }
-  __data_run_end__ = __data_run_start__ + SIZEOF(.data_run);
-
-  . = ASSERT(__data_run_end__ >= __RAM_segment_start__ && __data_run_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .data_run is too large to fit in RAM memory segment");
-
-  __bss_load_start__ = ALIGN(__data_run_end__ , 4);
-  .bss ALIGN(__data_run_end__ , 4) (NOLOAD) : AT(ALIGN(__data_run_end__ , 4))
-  {
-    __bss_start__ = .;
-    *(.bss .bss.* .gnu.linkonce.b.*) *(COMMON)
-  }
-  __bss_end__ = __bss_start__ + SIZEOF(.bss);
-
-  . = ASSERT(__bss_end__ >= __RAM_segment_start__ && __bss_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .bss is too large to fit in RAM memory segment");
-
-  __non_init_load_start__ = ALIGN(__bss_end__ , 4);
-  .non_init ALIGN(__bss_end__ , 4) (NOLOAD) : AT(ALIGN(__bss_end__ , 4))
-  {
-    __non_init_start__ = .;
-    *(.non_init .non_init.*)
-  }
-  __non_init_end__ = __non_init_start__ + SIZEOF(.non_init);
-
-  . = ASSERT(__non_init_end__ >= __RAM_segment_start__ && __non_init_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .non_init is too large to fit in RAM memory segment");
-
-  __heap_load_start__ = ALIGN(__non_init_end__ , 4);
-  .heap ALIGN(__non_init_end__ , 4) (NOLOAD) : AT(ALIGN(__non_init_end__ , 4))
-  {
-    __heap_start__ = .;
     *(.heap)
-    . = ALIGN(MAX(__heap_start__ + __HEAPSIZE__ , .), 4);
+    . = ALIGN(. + __HEAPSIZE__, 4);
-  }
+    __heap_end__ = ALIGN(4);
-  __heap_end__ = __heap_start__ + SIZEOF(.heap);
+	} > RAM
 
-  . = ASSERT(__heap_end__ >= __RAM_segment_start__ && __heap_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .heap is too large to fit in RAM memory segment");
+  .stack ALIGN(4) (NOLOAD) :
-
-  __stack_load_start__ = ALIGN(__heap_end__ , 4);
-  .stack ALIGN(__heap_end__ , 4) (NOLOAD) : AT(ALIGN(__heap_end__ , 4))
   {
-    __stack_start__ = .;
+    __stack_start__ = ALIGN(4);
     *(.stack)
-    . = ALIGN(MAX(__stack_start__ + __STACKSIZE__ , .), 4);
+    . = ALIGN(. + __STACKSIZE__, 4);
-  }
+    __stack_end__ = ALIGN(4);
-  __stack_end__ = __stack_start__ + SIZEOF(.stack);
+  } > RAM
-
-  . = ASSERT(__stack_end__ >= __RAM_segment_start__ && __stack_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .stack is too large to fit in RAM memory segment");
-
-  __stack_process_load_start__ = ALIGN(__stack_end__ , 4);
-  .stack_process ALIGN(__stack_end__ , 4) (NOLOAD) : AT(ALIGN(__stack_end__ , 4))
-  {
-    __stack_process_start__ = .;
-    *(.stack_process)
-    . = ALIGN(MAX(__stack_process_start__ + __STACKSIZE_PROCESS__ , .), 4);
-  }
-  __stack_process_end__ = __stack_process_start__ + SIZEOF(.stack_process);
-
-  __RAM_segment_used_end__ = ALIGN(__stack_end__ , 4) + SIZEOF(.stack_process);
-
-  . = ASSERT(__stack_process_end__ >= __RAM_segment_start__ && __stack_process_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .stack_process is too large to fit in RAM memory segment");
 
+  __RAM_segment_used_end__ = .;
 }
-

ports/cortex_m3/gnu/example_build/tx_initialize_low_level.S

@@ -1,226 +1,201 @@
-@/**************************************************************************/
+/**************************************************************************/
-@/*                                                                        */
+/*                                                                        */
-@/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
-@/*                                                                        */
+/*                                                                        */
-@/*       This software is licensed under the Microsoft Software License   */
+/*       This software is licensed under the Microsoft Software License   */
-@/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
-@/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
-@/*       and in the root directory of this software.                      */
+/*       and in the root directory of this software.                      */
-@/*                                                                        */
+/*                                                                        */
-@/**************************************************************************/
+/**************************************************************************/
-@
+
-@
+/**************************************************************************/
-@/**************************************************************************/
+/**************************************************************************/
-@/**************************************************************************/
+/**                                                                       */
-@/**                                                                       */
+/** ThreadX Component                                                     */
-@/** ThreadX Component                                                     */
+/**                                                                       */
-@/**                                                                       */
+/**   Initialize                                                          */
-@/**   Initialize                                                          */
+/**                                                                       */
-@/**                                                                       */
+/**************************************************************************/
-@/**************************************************************************/
+/**************************************************************************/
-@/**************************************************************************/
+
-@
-@
     .global     _tx_thread_system_stack_ptr
     .global     _tx_initialize_unused_memory
     .global     __RAM_segment_used_end__
     .global     _tx_timer_interrupt
     .global     __main
-    .global     __tx_SVCallHandler
-    .global     __tx_PendSVHandler
     .global     _vectors
-    .global     __tx_NMIHandler                     @ NMI
+    .global     __tx_NMIHandler                     // NMI
-    .global     __tx_BadHandler                     @ HardFault
+    .global     __tx_BadHandler                     // HardFault
-    .global     __tx_SVCallHandler                  @ SVCall
+    .global     __tx_SVCallHandler                  // SVCall
-    .global     __tx_DBGHandler                     @ Monitor
+    .global     __tx_DBGHandler                     // Monitor
-    .global     __tx_PendSVHandler                  @ PendSV
+    .global     __tx_PendSVHandler                  // PendSV
-    .global     __tx_SysTickHandler                 @ SysTick
+    .global     __tx_SysTickHandler                 // SysTick
-    .global     __tx_IntHandler                     @ Int 0
+    .global     __tx_IntHandler                     // Int 0
-@
+
-@
 SYSTEM_CLOCK      =   6000000
 SYSTICK_CYCLES    =   ((SYSTEM_CLOCK / 100) -1)
 
     .text 32
     .align 4
     .syntax unified
-@/**************************************************************************/
+/**************************************************************************/
-@/*                                                                        */
+/*                                                                        */
-@/*  FUNCTION                                               RELEASE        */
+/*  FUNCTION                                               RELEASE        */
-@/*                                                                        */
+/*                                                                        */
-@/*    _tx_initialize_low_level                          Cortex-M3/GNU     */
+/*    _tx_initialize_low_level                          Cortex-M3/GNU     */
-@/*                                                           6.1          */
+/*                                                           6.1          */
-@/*  AUTHOR                                                                */
+/*  AUTHOR                                                                */
-@/*                                                                        */
+/*                                                                        */
-@/*    William E. Lamie, Microsoft Corporation                             */
+/*    William E. Lamie, Microsoft Corporation                             */
-@/*                                                                        */
+/*                                                                        */
-@/*  DESCRIPTION                                                           */
+/*  DESCRIPTION                                                           */
-@/*                                                                        */
+/*                                                                        */
-@/*    This function is responsible for any low-level processor            */
+/*    This function is responsible for any low-level processor            */
-@/*    initialization, including setting up interrupt vectors, setting     */
+/*    initialization, including setting up interrupt vectors, setting     */
-@/*    up a periodic timer interrupt source, saving the system stack       */
+/*    up a periodic timer interrupt source, saving the system stack       */
-@/*    pointer for use in ISR processing later, and finding the first      */
+/*    pointer for use in ISR processing later, and finding the first      */
-@/*    available RAM memory address for tx_application_define.             */
+/*    available RAM memory address for tx_application_define.             */
-@/*                                                                        */
+/*                                                                        */
-@/*  INPUT                                                                 */
+/*  INPUT                                                                 */
-@/*                                                                        */
+/*                                                                        */
-@/*    None                                                                */
+/*    None                                                                */
-@/*                                                                        */
+/*                                                                        */
-@/*  OUTPUT                                                                */
+/*  OUTPUT                                                                */
-@/*                                                                        */
+/*                                                                        */
-@/*    None                                                                */
+/*    None                                                                */
-@/*                                                                        */
+/*                                                                        */
-@/*  CALLS                                                                 */
+/*  CALLS                                                                 */
-@/*                                                                        */
+/*                                                                        */
-@/*    None                                                                */
+/*    None                                                                */
-@/*                                                                        */
+/*                                                                        */
-@/*  CALLED BY                                                             */
+/*  CALLED BY                                                             */
-@/*                                                                        */
+/*                                                                        */
-@/*    _tx_initialize_kernel_enter           ThreadX entry function        */
+/*    _tx_initialize_kernel_enter           ThreadX entry function        */
-@/*                                                                        */
+/*                                                                        */
-@/*  RELEASE HISTORY                                                       */
+/*  RELEASE HISTORY                                                       */
-@/*                                                                        */
+/*                                                                        */
-@/*    DATE              NAME                      DESCRIPTION             */
+/*    DATE              NAME                      DESCRIPTION             */
-@/*                                                                        */
+/*                                                                        */
-@/*  05-19-2020     William E. Lamie         Initial Version 6.0           */
+/*  05-19-2020     William E. Lamie         Initial Version 6.0           */
-@/*  09-30-2020     William E. Lamie         Modified Comment(s), fixed    */
+/*  09-30-2020     William E. Lamie         Modified Comment(s), fixed    */
-@/*                                            GNU assembly comment, clean */
+/*                                            GNU assembly comment, clean */
-@/*                                            up whitespace, resulting    */
+/*                                            up whitespace, resulting    */
-@/*                                            in version 6.1              */
+/*                                            in version 6.1              */
-@/*                                                                        */
+/*                                                                        */
-@/**************************************************************************/
+/**************************************************************************/
-@VOID   _tx_initialize_low_level(VOID)
+// VOID   _tx_initialize_low_level(VOID)
-@{
+// {
     .global  _tx_initialize_low_level
     .thumb_func
 _tx_initialize_low_level:
-@
+
-@    /* Disable interrupts during ThreadX initialization.  */
+    /* Disable interrupts during ThreadX initialization.  */
-@
     CPSID   i
-@
+
-@    /* Set base of available memory to end of non-initialised RAM area.  */
+    /* Set base of available memory to end of non-initialised RAM area.  */
-@
+    LDR     r0, =_tx_initialize_unused_memory       // Build address of unused memory pointer
-    LDR     r0, =_tx_initialize_unused_memory       @ Build address of unused memory pointer
+    LDR     r1, =__RAM_segment_used_end__           // Build first free address
-    LDR     r1, =__RAM_segment_used_end__           @ Build first free address
+    ADD     r1, r1, #4                              //
-    ADD     r1, r1, #4                              @
+    STR     r1, [r0]                                // Setup first unused memory pointer
-    STR     r1, [r0]                                @ Setup first unused memory pointer
+
-@
+    /* Setup Vector Table Offset Register.  */
-@    /* Setup Vector Table Offset Register.  */
+    MOV     r0, #0xE000E000                         // Build address of NVIC registers
-@
+    LDR     r1, =_vectors                           // Pickup address of vector table
-    MOV     r0, #0xE000E000                         @ Build address of NVIC registers
+    STR     r1, [r0, #0xD08]                        // Set vector table address
-    LDR     r1, =_vectors                           @ Pickup address of vector table
+
-    STR     r1, [r0, #0xD08]                        @ Set vector table address
+    /* Set system stack pointer from vector value.  */
-@
+    LDR     r0, =_tx_thread_system_stack_ptr        // Build address of system stack pointer
-@    /* Set system stack pointer from vector value.  */
+    LDR     r1, =_vectors                           // Pickup address of vector table
-@
+    LDR     r1, [r1]                                // Pickup reset stack pointer
-    LDR     r0, =_tx_thread_system_stack_ptr        @ Build address of system stack pointer
+    STR     r1, [r0]                                // Save system stack pointer
-    LDR     r1, =_vectors                           @ Pickup address of vector table
+
-    LDR     r1, [r1]                                @ Pickup reset stack pointer
+    /* Enable the cycle count register.  */
-    STR     r1, [r0]                                @ Save system stack pointer
+    LDR     r0, =0xE0001000                         // Build address of DWT register
-@
+    LDR     r1, [r0]                                // Pickup the current value
-@    /* Enable the cycle count register.  */
+    ORR     r1, r1, #1                              // Set the CYCCNTENA bit
-@
+    STR     r1, [r0]                                // Enable the cycle count register
-    LDR     r0, =0xE0001000                         @ Build address of DWT register
+
-    LDR     r1, [r0]                                @ Pickup the current value
+    /* Configure SysTick.  */
-    ORR     r1, r1, #1                              @ Set the CYCCNTENA bit
+    MOV     r0, #0xE000E000                         // Build address of NVIC registers
-    STR     r1, [r0]                                @ Enable the cycle count register
-@
-@    /* Configure SysTick for 100Hz clock, or 16384 cycles if no reference.  */
-@
-    MOV     r0, #0xE000E000                         @ Build address of NVIC registers
     LDR     r1, =SYSTICK_CYCLES
-    STR     r1, [r0, #0x14]                         @ Setup SysTick Reload Value
+    STR     r1, [r0, #0x14]                         // Setup SysTick Reload Value
-    MOV     r1, #0x7                                @ Build SysTick Control Enable Value
+    MOV     r1, #0x7                                // Build SysTick Control Enable Value
-    STR     r1, [r0, #0x10]                         @ Setup SysTick Control
+    STR     r1, [r0, #0x10]                         // Setup SysTick Control
-@
-@    /* Configure handler priorities.  */
-@
-    LDR     r1, =0x00000000                         @ Rsrv, UsgF, BusF, MemM
-    STR     r1, [r0, #0xD18]                        @ Setup System Handlers 4-7 Priority Registers
 
-    LDR     r1, =0xFF000000                         @ SVCl, Rsrv, Rsrv, Rsrv
+    /* Configure handler priorities.  */
-    STR     r1, [r0, #0xD1C]                        @ Setup System Handlers 8-11 Priority Registers
+    LDR     r1, =0x00000000                         // Rsrv, UsgF, BusF, MemM
-                                                    @ Note: SVC must be lowest priority, which is 0xFF
+    STR     r1, [r0, #0xD18]                        // Setup System Handlers 4-7 Priority Registers
+    LDR     r1, =0xFF000000                         // SVCl, Rsrv, Rsrv, Rsrv
+    STR     r1, [r0, #0xD1C]                        // Setup System Handlers 8-11 Priority Registers
+                                                    // Note: SVC must be lowest priority, which is 0xFF
+    LDR     r1, =0x40FF0000                         // SysT, PnSV, Rsrv, DbgM
+    STR     r1, [r0, #0xD20]                        // Setup System Handlers 12-15 Priority Registers
+                                                    // Note: PnSV must be lowest priority, which is 0xFF
 
-    LDR     r1, =0x40FF0000                         @ SysT, PnSV, Rsrv, DbgM
+    /* Return to caller.  */
-    STR     r1, [r0, #0xD20]                        @ Setup System Handlers 12-15 Priority Registers
-                                                    @ Note: PnSV must be lowest priority, which is 0xFF
-@
-@    /* Return to caller.  */
-@
     BX      lr
-@}
+// }
-@
 
-@/* Define shells for each of the unused vectors.  */
+/* Define shells for each of the unused vectors.  */
-@
     .global  __tx_BadHandler
     .thumb_func
 __tx_BadHandler:
     B       __tx_BadHandler
 
-@ /* added to catch the hardfault */
+/* added to catch the hardfault */
-
     .global  __tx_HardfaultHandler
     .thumb_func
 __tx_HardfaultHandler:
     B       __tx_HardfaultHandler
 
-
+/* added to catch the SVC */
-@ /* added to catch the SVC */
-
     .global  __tx_SVCallHandler
     .thumb_func
 __tx_SVCallHandler:
     B       __tx_SVCallHandler
 
-
+/* Generic interrupt handler template */
-@ /* Generic interrupt handler template */
     .global  __tx_IntHandler
     .thumb_func
 __tx_IntHandler:
-@ VOID InterruptHandler (VOID)
+// VOID InterruptHandler (VOID)
-@ {
+// {
     PUSH    {r0, lr}
 #ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
-    BL      _tx_execution_isr_enter             @ Call the ISR enter function
+    BL      _tx_execution_isr_enter             // Call the ISR enter function
 #endif
-
+    /* Do interrupt handler work here */
-@    /* Do interrupt handler work here */
+    /* BL <your C Function>.... */
-@    /* BL <your C Function>.... */
-
 #ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
-    BL      _tx_execution_isr_exit              @ Call the ISR exit function
+    BL      _tx_execution_isr_exit              // Call the ISR exit function
 #endif
     POP     {r0, lr}
     BX      LR
-@ }
+// }
 
-@ /* System Tick timer interrupt handler */
+/* System Tick timer interrupt handler */
     .global  __tx_SysTickHandler
     .global  SysTick_Handler
     .thumb_func
 __tx_SysTickHandler:
     .thumb_func
 SysTick_Handler:
-@ VOID TimerInterruptHandler (VOID)
+// VOID SysTick_Handler (VOID)
-@ {
+// {
-@
     PUSH    {r0, lr}
 #ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
-    BL      _tx_execution_isr_enter             @ Call the ISR enter function
+    BL      _tx_execution_isr_enter             // Call the ISR enter function
 #endif
     BL      _tx_timer_interrupt
 #ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
-    BL      _tx_execution_isr_exit              @ Call the ISR exit function
+    BL      _tx_execution_isr_exit              // Call the ISR exit function
 #endif
     POP     {r0, lr}
-    BX      LR
+    BX      lr
-@ }
+// }
 
-
+/* NMI, DBG handlers */
-@ /* NMI, DBG handlers */
     .global  __tx_NMIHandler
     .thumb_func
 __tx_NMIHandler:

ports/cortex_m3/gnu/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                         Cortex-M3/GNU     */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -59,6 +59,9 @@
 /*  04-25-2022      Scott Larson            Modified comments and added   */
 /*                                            volatile to registers,      */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Modified comments and         */
+/*                                            described BASEPRI usage,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -146,6 +149,12 @@ typedef unsigned short                          USHORT;
 #define TX_TIMER_THREAD_PRIORITY                0           /* Default timer thread priority    */
 #endif
 
+/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts.
+If using BASEPRI is desired, define the following two symbols for both c and assembly files:
+TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK.
+TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask.
+Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run.
+*/
 
 /* Define various constants for the ThreadX Cortex-M port.  */
 
@@ -707,7 +716,7 @@ void    tx_thread_fpu_disable(void);
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] =
-                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M3/GNU Version 6.1.11 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M3/GNU Version 6.1.12 *";
 #else
 #ifdef TX_MISRA_ENABLE
 extern  CHAR                    _tx_version_id[100];

ports/cortex_m3/gnu/src/tx_misra.S

@@ -103,6 +103,14 @@
         .global _tx_misra_vfp_touch
 #endif
 
+        .global _tx_misra_event_flags_group_not_used
+        .global _tx_misra_event_flags_set_notify_not_used
+        .global _tx_misra_queue_not_used
+        .global _tx_misra_queue_send_notify_not_used
+        .global _tx_misra_semaphore_not_used
+        .global _tx_misra_semaphore_put_notify_not_used
+        .global _tx_misra_thread_entry_exit_notify_not_used
+        .global _tx_misra_thread_not_used
 
 /**************************************************************************/
 /**************************************************************************/
@@ -172,17 +180,93 @@ _tx_misra_uchar_pointer_dif:
         BX       LR               // return
 
 
-/**************************************************************************/
+/************************************************************************************************************************************/
-/**************************************************************************/
+/************************************************************************************************************************************/
-/**                                                                       */
+/**                                                                                                                                 */
-/**  ULONG  _tx_misra_pointer_to_ulong_convert(VOID *ptr);                */
+/**  This single function serves all of the below prototypes.                                                                       */
-/**                                                                       */
+/**                                                                                                                                 */
-/**************************************************************************/
+/**  ULONG  _tx_misra_pointer_to_ulong_convert(VOID *ptr);                                                                          */
-/**************************************************************************/
+/**  VOID  *_tx_misra_ulong_to_pointer_convert(ULONG input);                                                                        */
-
+/**  UCHAR  **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr);                                                  */
+/**  UCHAR  **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer);                                                    */
+/**  UCHAR  *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool);                                                    */
+/**  TX_BLOCK_POOL  *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer);                                                   */
+/**  UCHAR  *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer);                                                                */
+/**  TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer);                                                  */
+/**  UCHAR  **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer);                                                      */
+/**  TX_BYTE_POOL  *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer);                                                     */
+/**  UCHAR  *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool);                                                      */
+/**  ALIGN_TYPE  *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer);                                                    */
+/**  TX_BYTE_POOL  **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer);                                         */
+/**  TX_EVENT_FLAGS_GROUP  *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer);                                           */
+/**  ULONG  *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer);                                                                */
+/**  TX_MUTEX  *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer);                                                             */
+/**  TX_QUEUE  *_tx_misra_void_to_queue_pointer_convert(VOID *pointer);                                                             */
+/**  TX_SEMAPHORE  *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer);                                                     */
+/**  VOID  *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer);                                                                */
+/**  TX_THREAD  *_tx_misra_ulong_to_thread_pointer_convert(ULONG value);                                                            */
+/**  VOID  *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer);                                          */
+/**  CHAR  *_tx_misra_const_char_to_char_pointer_convert(const char *pointer);                                                      */
+/**  TX_THREAD  *_tx_misra_void_to_thread_pointer_convert(void *pointer);                                                           */
+/**  UCHAR  *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer);                                             */
+/**  TX_TRACE_OBJECT_ENTRY  *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer);                                             */
+/**  TX_TRACE_HEADER  *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer);                                                   */
+/**  TX_TRACE_BUFFER_ENTRY  *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer);                                              */
+/**  UCHAR  *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer);                                              */
+/**  UCHAR  *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer);                                                                */
+/**  VOID    _tx_misra_event_flags_group_not_used(TX_EVENT_FLAGS_GROUP *group_ptr);                                                 */
+/**  VOID    _tx_misra_event_flags_set_notify_not_used(VOID (*events_set_notify)(TX_EVENT_FLAGS_GROUP *notify_group_ptr));          */
+/**  VOID    _tx_misra_queue_not_used(TX_QUEUE *queue_ptr);                                                                         */
+/**  VOID    _tx_misra_queue_send_notify_not_used(VOID (*queue_send_notify)(TX_QUEUE *notify_queue_ptr));                           */
+/**  VOID    _tx_misra_semaphore_not_used(TX_SEMAPHORE *semaphore_ptr);                                                             */
+/**  VOID    _tx_misra_semaphore_put_notify_not_used(VOID (*semaphore_put_notify)(TX_SEMAPHORE *notify_semaphore_ptr));             */
+/**  VOID    _tx_misra_thread_not_used(TX_THREAD *thread_ptr);                                                                      */
+/**  VOID    _tx_misra_thread_entry_exit_notify_not_used(VOID (*thread_entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT id));  */
+/**                                                                                                                                 */
+/************************************************************************************************************************************/
+/************************************************************************************************************************************/
         .text
         .thumb_func
 _tx_misra_pointer_to_ulong_convert:
+_tx_misra_ulong_to_pointer_convert:
+_tx_misra_indirect_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_indirect_uchar_pointer_convert:
+_tx_misra_block_pool_to_uchar_pointer_convert:
+_tx_misra_void_to_block_pool_pointer_convert:
+_tx_misra_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_block_pool_pointer_convert:
+_tx_misra_void_to_indirect_uchar_pointer_convert:
+_tx_misra_void_to_byte_pool_pointer_convert:
+_tx_misra_byte_pool_to_uchar_pointer_convert:
+_tx_misra_uchar_to_align_type_pointer_convert:
+_tx_misra_uchar_to_indirect_byte_pool_pointer_convert:
+_tx_misra_void_to_event_flags_pointer_convert:
+_tx_misra_void_to_ulong_pointer_convert:
+_tx_misra_void_to_mutex_pointer_convert:
+_tx_misra_void_to_queue_pointer_convert:
+_tx_misra_void_to_semaphore_pointer_convert:
+_tx_misra_uchar_to_void_pointer_convert:
+_tx_misra_ulong_to_thread_pointer_convert:
+_tx_misra_timer_indirect_to_void_pointer_convert:
+_tx_misra_const_char_to_char_pointer_convert:
+_tx_misra_void_to_thread_pointer_convert:
+#ifdef TX_ENABLE_EVENT_TRACE
+_tx_misra_object_to_uchar_pointer_convert:
+_tx_misra_uchar_to_object_pointer_convert:
+_tx_misra_uchar_to_header_pointer_convert:
+_tx_misra_uchar_to_entry_pointer_convert:
+_tx_misra_entry_to_uchar_pointer_convert:
+#endif
+_tx_misra_char_to_uchar_pointer_convert:
+_tx_misra_event_flags_group_not_used:
+_tx_misra_event_flags_set_notify_not_used:
+_tx_misra_queue_not_used:
+_tx_misra_queue_send_notify_not_used:
+_tx_misra_semaphore_not_used:
+_tx_misra_semaphore_put_notify_not_used:
+_tx_misra_thread_entry_exit_notify_not_used:
+_tx_misra_thread_not_used:
+
         BX       LR               // return
 
 
@@ -234,20 +318,6 @@ _tx_misra_ulong_pointer_dif:
         BX       LR               // return
 
 
-/**************************************************************************/
-/**************************************************************************/
-/**                                                                       */
-/**  VOID  *_tx_misra_ulong_to_pointer_convert(ULONG input);              */
-/**                                                                       */
-/**************************************************************************/
-/**************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_ulong_to_pointer_convert:
-        BX       LR               // return
-
-
 /**************************************************************************/
 /**************************************************************************/
 /**                                                                       */
@@ -332,12 +402,9 @@ _tx_misra_timer_pointer_add:
         .text
         .thumb_func
 _tx_misra_user_timer_pointer_get:
-        ADDS     R2,R0,#+8
+        SUBS    R0,#8
-        SUBS     R2,R2,R0
+        STR     R0,[R1, #+0]
-        RSBS     R2,R2,#+0
+        BX      LR               // return
-        ADD      R0,R0,R2
-        STR      R0,[R1, #+0]
-        BX       LR               // return
 
 
 /**************************************************************************/
@@ -553,202 +620,6 @@ _tx_misra_always_true:
         BX       LR               // return
 
 
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  UCHAR  **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr);        */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_indirect_void_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  UCHAR  **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer);       */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_indirect_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/***********************************************************************************/
-/***********************************************************************************/
-/**                                                                                */
-/**  UCHAR  *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool);   */
-/**                                                                                */
-/***********************************************************************************/
-/***********************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_block_pool_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  TX_BLOCK_POOL  *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer);         */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_block_pool_pointer_convert:
-        BX       LR               // return
-
-
-/*****************************************************************************/
-/*****************************************************************************/
-/**                                                                          */
-/**  UCHAR  *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer);         */
-/**                                                                          */
-/*****************************************************************************/
-/*****************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/************************************************************************************/
-/************************************************************************************/
-/**                                                                                 */
-/**  TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer);  */
-/**                                                                                 */
-/************************************************************************************/
-/************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_block_pool_pointer_convert:
-        BX       LR               // return
-
-
-/**************************************************************************************/
-/**************************************************************************************/
-/**                                                                                   */
-/**  UCHAR  **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer);        */
-/**                                                                                   */
-/**************************************************************************************/
-/**************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_indirect_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/*****************************************************************************************/
-/*****************************************************************************************/
-/**                                                                                      */
-/**  TX_BYTE_POOL  *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer);          */
-/**                                                                                      */
-/*****************************************************************************************/
-/*****************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_byte_pool_pointer_convert:
-        BX       LR               // return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  UCHAR  *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool);         */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_byte_pool_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/*****************************************************************************************/
-/*****************************************************************************************/
-/**                                                                                      */
-/**  ALIGN_TYPE  *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer);         */
-/**                                                                                      */
-/*****************************************************************************************/
-/*****************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_align_type_pointer_convert:
-        BX       LR               // return
-
-
-/****************************************************************************************************/
-/****************************************************************************************************/
-/**                                                                                                 */
-/**  TX_BYTE_POOL  **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer);         */
-/**                                                                                                 */
-/****************************************************************************************************/
-/****************************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_indirect_byte_pool_pointer_convert:
-        BX       LR               // return
-
-
-/**************************************************************************************************/
-/**************************************************************************************************/
-/**                                                                                               */
-/**  TX_EVENT_FLAGS_GROUP  *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer);         */
-/**                                                                                               */
-/**************************************************************************************************/
-/**************************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_event_flags_pointer_convert:
-        BX       LR               // return
-
-
-/*****************************************************************************/
-/*****************************************************************************/
-/**                                                                          */
-/**  ULONG  *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer);         */
-/**                                                                          */
-/*****************************************************************************/
-/*****************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_ulong_pointer_convert:
-        BX       LR               // return
-
-
-/********************************************************************************/
-/********************************************************************************/
-/**                                                                             */
-/**  TX_MUTEX  *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer);         */
-/**                                                                             */
-/********************************************************************************/
-/********************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_mutex_pointer_convert:
-        BX       LR               // return
-
-
 /**************************************************************************/
 /**************************************************************************/
 /**                                                                       */
@@ -764,191 +635,6 @@ _tx_misra_status_get:
         BX       LR               // return
 
 
-/********************************************************************************/
-/********************************************************************************/
-/**                                                                             */
-/**  TX_QUEUE  *_tx_misra_void_to_queue_pointer_convert(VOID *pointer);         */
-/**                                                                             */
-/********************************************************************************/
-/********************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_queue_pointer_convert:
-        BX       LR               // return
-
-
-/****************************************************************************************/
-/****************************************************************************************/
-/**                                                                                     */
-/**  TX_SEMAPHORE  *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer);         */
-/**                                                                                     */
-/****************************************************************************************/
-/****************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_semaphore_pointer_convert:
-        BX       LR               // return
-
-
-/**************************************************************************/
-/**************************************************************************/
-/**                                                                       */
-/**  VOID  *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer);      */
-/**                                                                       */
-/**************************************************************************/
-/**************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_void_pointer_convert:
-        BX       LR               // return
-
-
-/*********************************************************************************/
-/*********************************************************************************/
-/**                                                                              */
-/**  TX_THREAD  *_tx_misra_ulong_to_thread_pointer_convert(ULONG value);         */
-/**                                                                              */
-/*********************************************************************************/
-/*********************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_ulong_to_thread_pointer_convert:
-        BX       LR               // return
-
-
-/***************************************************************************************************/
-/***************************************************************************************************/
-/**                                                                                                */
-/**  VOID  *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer);         */
-/**                                                                                                */
-/***************************************************************************************************/
-/***************************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_timer_indirect_to_void_pointer_convert:
-        BX       LR               // return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  CHAR  *_tx_misra_const_char_to_char_pointer_convert(const char *pointer);         */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_const_char_to_char_pointer_convert:
-        BX       LR               // return
-
-
-/**********************************************************************************/
-/**********************************************************************************/
-/**                                                                               */
-/**  TX_THREAD  *_tx_misra_void_to_thread_pointer_convert(void *pointer);         */
-/**                                                                               */
-/**********************************************************************************/
-/**********************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_thread_pointer_convert:
-        BX       LR               // return
-
-
-#ifdef TX_ENABLE_EVENT_TRACE
-
-/************************************************************************************************/
-/************************************************************************************************/
-/**                                                                                             */
-/**  UCHAR  *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer);         */
-/**                                                                                             */
-/************************************************************************************************/
-/************************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_object_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/************************************************************************************************/
-/************************************************************************************************/
-/**                                                                                             */
-/**  TX_TRACE_OBJECT_ENTRY  *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer);         */
-/**                                                                                             */
-/************************************************************************************************/
-/************************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_object_pointer_convert:
-        BX       LR               // return
-
-
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  TX_TRACE_HEADER  *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer);         */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_header_pointer_convert:
-        BX       LR               // return
-
-
-/***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
-/**  TX_TRACE_BUFFER_ENTRY  *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer);         */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_entry_pointer_convert:
-        BX       LR               // return
-
-
-/***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
-/**  UCHAR  *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer);         */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_entry_to_uchar_pointer_convert:
-        BX       LR               // return
-#endif
-
-
-/***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
-/**  UCHAR  *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer);                           */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_char_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
 /***********************************************************************************************/
 /***********************************************************************************************/
 /**                                                                                            */

ports/cortex_m3/iar/CMakeLists.txt

@@ -0,0 +1,21 @@
+
+target_sources(${PROJECT_NAME}
+    PRIVATE
+    # {{BEGIN_TARGET_SOURCES}}
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_iar.c
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_restore.S
+	${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_save.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_control.S
+	${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_disable.S
+	${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_restore.S    
+	${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_schedule.S
+	${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_stack_build.S
+	${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_system_return.S
+	${CMAKE_CURRENT_LIST_DIR}/src/tx_timer_interrupt.S
+    # {{END_TARGET_SOURCES}}
+)
+
+target_include_directories(${PROJECT_NAME}
+    PUBLIC
+    ${CMAKE_CURRENT_LIST_DIR}/inc
+)

ports/cortex_m3/iar/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                         Cortex-M3/IAR     */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -59,6 +59,9 @@
 /*  04-25-2022      Scott Larson            Modified comments and added   */
 /*                                            volatile to registers,      */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Modified comments and         */
+/*                                            described BASEPRI usage,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -146,6 +149,12 @@ typedef unsigned short                          USHORT;
 #define TX_TIMER_THREAD_PRIORITY                0           /* Default timer thread priority    */
 #endif
 
+/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts.
+If using BASEPRI is desired, define the following two symbols for both c and assembly files:
+TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK.
+TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask.
+Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run.
+*/
 
 /* Define various constants for the ThreadX Cortex-M port.  */
 
@@ -707,7 +716,7 @@ void    tx_thread_fpu_disable(void);
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] =
-                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M3/IAR Version 6.1.11 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M3/IAR Version 6.1.12 *";
 #else
 #ifdef TX_MISRA_ENABLE
 extern  CHAR                    _tx_version_id[100];

ports/cortex_m3/iar/src/tx_misra.s

@@ -102,6 +102,16 @@
         PUBLIC _tx_misra_fpccr_get
         PUBLIC _tx_misra_vfp_touch
 #endif
+
+        PUBLIC _tx_misra_event_flags_group_not_used
+        PUBLIC _tx_misra_event_flags_set_notify_not_used
+        PUBLIC _tx_misra_queue_not_used
+        PUBLIC _tx_misra_queue_send_notify_not_used
+        PUBLIC _tx_misra_semaphore_not_used
+        PUBLIC _tx_misra_semaphore_put_notify_not_used
+        PUBLIC _tx_misra_thread_entry_exit_notify_not_used
+        PUBLIC _tx_misra_thread_not_used
+        
         PUBLIC _tx_version_id
 
 
@@ -115,7 +125,7 @@ _tx_version_id:
         DC8 45H, 78H, 70H, 72H, 65H, 73H, 73H, 20H
         DC8 4CH, 6FH, 67H, 69H, 63H, 20H, 49H, 6EH
         DC8 63H, 2EH, 20H, 2AH, 20H, 54H, 68H, 72H
-        DC8 65H, 61H, 64H, 58H, 20H, 35H, 2EH, 38H
+        DC8 65H, 61H, 64H, 58H, 20H, 36H, 2EH, 31H
         DC8 20H, 4DH, 49H, 53H, 52H, 41H, 20H, 43H
         DC8 20H, 43H, 6FH, 6DH, 70H, 6CH, 69H, 61H
         DC8 6EH, 74H, 20H, 2AH, 0
@@ -139,7 +149,7 @@ _tx_misra_memset:
         MOVS     R1,R0
         MOVS     R0,R4
         BL       __aeabi_memset
-        POP      {R4,PC}          ;; return
+        POP      {R4,PC}          // return
 
 /**************************************************************************/
 /**************************************************************************/
@@ -153,7 +163,7 @@ _tx_misra_memset:
         THUMB
 _tx_misra_uchar_pointer_add:
         ADD      R0,R0,R1
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -169,7 +179,7 @@ _tx_misra_uchar_pointer_add:
 _tx_misra_uchar_pointer_sub:
         RSBS     R1,R1,#+0
         ADD      R0,R0,R1
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -184,21 +194,97 @@ _tx_misra_uchar_pointer_sub:
         THUMB
 _tx_misra_uchar_pointer_dif:
         SUBS     R0,R0,R1
-        BX       LR               ;; return
+        BX       LR               // return
 
 
-/**************************************************************************/
+/************************************************************************************************************************************/
-/**************************************************************************/
+/************************************************************************************************************************************/
-/**                                                                       */
+/**                                                                                                                                 */
-/**  ULONG  _tx_misra_pointer_to_ulong_convert(VOID *ptr);                */
+/**  This single function serves all of the below prototypes.                                                                       */
-/**                                                                       */
+/**                                                                                                                                 */
-/**************************************************************************/
+/**  ULONG  _tx_misra_pointer_to_ulong_convert(VOID *ptr);                                                                          */
-/**************************************************************************/
+/**  VOID  *_tx_misra_ulong_to_pointer_convert(ULONG input);                                                                        */
-
+/**  UCHAR  **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr);                                                  */
+/**  UCHAR  **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer);                                                    */
+/**  UCHAR  *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool);                                                    */
+/**  TX_BLOCK_POOL  *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer);                                                   */
+/**  UCHAR  *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer);                                                                */
+/**  TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer);                                                  */
+/**  UCHAR  **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer);                                                      */
+/**  TX_BYTE_POOL  *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer);                                                     */
+/**  UCHAR  *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool);                                                      */
+/**  ALIGN_TYPE  *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer);                                                    */
+/**  TX_BYTE_POOL  **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer);                                         */
+/**  TX_EVENT_FLAGS_GROUP  *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer);                                           */
+/**  ULONG  *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer);                                                                */
+/**  TX_MUTEX  *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer);                                                             */
+/**  TX_QUEUE  *_tx_misra_void_to_queue_pointer_convert(VOID *pointer);                                                             */
+/**  TX_SEMAPHORE  *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer);                                                     */
+/**  VOID  *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer);                                                                */
+/**  TX_THREAD  *_tx_misra_ulong_to_thread_pointer_convert(ULONG value);                                                            */
+/**  VOID  *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer);                                          */
+/**  CHAR  *_tx_misra_const_char_to_char_pointer_convert(const char *pointer);                                                      */
+/**  TX_THREAD  *_tx_misra_void_to_thread_pointer_convert(void *pointer);                                                           */
+/**  UCHAR  *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer);                                             */
+/**  TX_TRACE_OBJECT_ENTRY  *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer);                                             */
+/**  TX_TRACE_HEADER  *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer);                                                   */
+/**  TX_TRACE_BUFFER_ENTRY  *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer);                                              */
+/**  UCHAR  *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer);                                              */
+/**  UCHAR  *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer);                                                                */
+/**  VOID    _tx_misra_event_flags_group_not_used(TX_EVENT_FLAGS_GROUP *group_ptr);                                                 */
+/**  VOID    _tx_misra_event_flags_set_notify_not_used(VOID (*events_set_notify)(TX_EVENT_FLAGS_GROUP *notify_group_ptr));          */
+/**  VOID    _tx_misra_queue_not_used(TX_QUEUE *queue_ptr);                                                                         */
+/**  VOID    _tx_misra_queue_send_notify_not_used(VOID (*queue_send_notify)(TX_QUEUE *notify_queue_ptr));                           */
+/**  VOID    _tx_misra_semaphore_not_used(TX_SEMAPHORE *semaphore_ptr);                                                             */
+/**  VOID    _tx_misra_semaphore_put_notify_not_used(VOID (*semaphore_put_notify)(TX_SEMAPHORE *notify_semaphore_ptr));             */
+/**  VOID    _tx_misra_thread_not_used(TX_THREAD *thread_ptr);                                                                      */
+/**  VOID    _tx_misra_thread_entry_exit_notify_not_used(VOID (*thread_entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT id));  */
+/**                                                                                                                                 */
+/************************************************************************************************************************************/
+/************************************************************************************************************************************/
         SECTION `.text`:CODE:NOROOT(1)
         THUMB
 _tx_misra_pointer_to_ulong_convert:
-        BX       LR               ;; return
+_tx_misra_ulong_to_pointer_convert:
+_tx_misra_indirect_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_indirect_uchar_pointer_convert:
+_tx_misra_block_pool_to_uchar_pointer_convert:
+_tx_misra_void_to_block_pool_pointer_convert:
+_tx_misra_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_block_pool_pointer_convert:
+_tx_misra_void_to_indirect_uchar_pointer_convert:
+_tx_misra_void_to_byte_pool_pointer_convert:
+_tx_misra_byte_pool_to_uchar_pointer_convert:
+_tx_misra_uchar_to_align_type_pointer_convert:
+_tx_misra_uchar_to_indirect_byte_pool_pointer_convert:
+_tx_misra_void_to_event_flags_pointer_convert:
+_tx_misra_void_to_ulong_pointer_convert:
+_tx_misra_void_to_mutex_pointer_convert:
+_tx_misra_void_to_queue_pointer_convert:
+_tx_misra_void_to_semaphore_pointer_convert:
+_tx_misra_uchar_to_void_pointer_convert:
+_tx_misra_ulong_to_thread_pointer_convert:
+_tx_misra_timer_indirect_to_void_pointer_convert:
+_tx_misra_const_char_to_char_pointer_convert:
+_tx_misra_void_to_thread_pointer_convert:
+#ifdef TX_ENABLE_EVENT_TRACE
+_tx_misra_object_to_uchar_pointer_convert:
+_tx_misra_uchar_to_object_pointer_convert:
+_tx_misra_uchar_to_header_pointer_convert:
+_tx_misra_uchar_to_entry_pointer_convert:
+_tx_misra_entry_to_uchar_pointer_convert:
+#endif
+_tx_misra_char_to_uchar_pointer_convert:
+_tx_misra_event_flags_group_not_used:
+_tx_misra_event_flags_set_notify_not_used:
+_tx_misra_queue_not_used:
+_tx_misra_queue_send_notify_not_used:
+_tx_misra_semaphore_not_used:
+_tx_misra_semaphore_put_notify_not_used:
+_tx_misra_thread_entry_exit_notify_not_used:
+_tx_misra_thread_not_used:
+
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -213,7 +299,7 @@ _tx_misra_pointer_to_ulong_convert:
         THUMB
 _tx_misra_ulong_pointer_add:
         ADD      R0,R0,R1, LSL #+2
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -230,7 +316,7 @@ _tx_misra_ulong_pointer_sub:
         MVNS     R2,#+3
         MULS     R1,R2,R1
         ADD      R0,R0,R1
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -246,21 +332,7 @@ _tx_misra_ulong_pointer_sub:
 _tx_misra_ulong_pointer_dif:
         SUBS     R0,R0,R1
         ASRS     R0,R0,#+2
-        BX       LR               ;; return
+        BX       LR               // return
-
-
-/**************************************************************************/
-/**************************************************************************/
-/**                                                                       */
-/**  VOID  *_tx_misra_ulong_to_pointer_convert(ULONG input);              */
-/**                                                                       */
-/**************************************************************************/
-/**************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_ulong_to_pointer_convert:
-        BX       LR               ;; return
 
 
 /**************************************************************************/
@@ -299,7 +371,7 @@ _tx_misra_message_copy:
         STR      R3,[R0, #+0]
         STR      R4,[R1, #+0]
         POP      {R4,R5}
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -316,7 +388,7 @@ _tx_misra_message_copy:
 _tx_misra_timer_pointer_dif:
         SUBS     R0,R0,R1
         ASRS     R0,R0,#+2
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -332,7 +404,7 @@ _tx_misra_timer_pointer_dif:
         THUMB
 _tx_misra_timer_pointer_add:
         ADD      R0,R0,R1, LSL #+2
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -347,12 +419,9 @@ _tx_misra_timer_pointer_add:
         SECTION `.text`:CODE:NOROOT(1)
         THUMB
 _tx_misra_user_timer_pointer_get:
-        ADDS     R2,R0,#+8
+        SUBS    R0,#8
-        SUBS     R2,R2,R0
+        STR     R0,[R1, #+0]
-        RSBS     R2,R2,#+0
+        BX      LR               // return
-        ADD      R0,R0,R2
-        STR      R0,[R1, #+0]
-        BX       LR               ;; return
 
 
 /**************************************************************************/
@@ -374,7 +443,7 @@ _tx_misra_thread_stack_check:
         CMP      R4,#+0
         BEQ.N    ??_tx_misra_thread_stack_check_0
         LDR      R1,[R4, #+0]
-        LDR.N    R2,??DataTable2  ;; 0x54485244
+        LDR.N    R2,??DataTable2  // 0x54485244
         CMP      R1,R2
         BNE.N    ??_tx_misra_thread_stack_check_0
         LDR      R1,[R4, #+8]
@@ -412,7 +481,7 @@ _tx_misra_thread_stack_check:
         BL       _tx_thread_interrupt_disable
 ??_tx_misra_thread_stack_check_0:
         BL       _tx_thread_interrupt_restore
-        POP      {R0,R4,R5,PC}    ;; return
+        POP      {R0,R4,R5,PC}    // return
 
 #ifdef TX_ENABLE_EVENT_TRACE
 
@@ -500,7 +569,7 @@ _tx_misra_trace_event_insert:
         LDR      R0,[R0, #+0]
         STR      R4,[R0, #+32]
 ??_tx_misra_trace_event_insert_0:
-        POP      {R0,R4-R7,PC}    ;; return
+        POP      {R0,R4-R7,PC}    // return
 
 
         SECTION `.text`:CODE:NOROOT(2)
@@ -552,7 +621,7 @@ _tx_misra_trace_event_insert:
         THUMB
 _tx_misra_time_stamp_get:
         MOVS     R0,#+0
-        BX       LR               ;; return
+        BX       LR               // return
 
 #endif
 
@@ -587,203 +656,7 @@ _tx_misra_time_stamp_get:
         THUMB
 _tx_misra_always_true:
         MOVS     R0,#+1
-        BX       LR               ;; return
+        BX       LR               // return
-
-
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  UCHAR  **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr);        */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_indirect_void_to_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  UCHAR  **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer);       */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_indirect_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/***********************************************************************************/
-/***********************************************************************************/
-/**                                                                                */
-/**  UCHAR  *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool);   */
-/**                                                                                */
-/***********************************************************************************/
-/***********************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_block_pool_to_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  TX_BLOCK_POOL  *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer);         */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_block_pool_pointer_convert:
-        BX       LR               ;; return
-
-
-/*****************************************************************************/
-/*****************************************************************************/
-/**                                                                          */
-/**  UCHAR  *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer);         */
-/**                                                                          */
-/*****************************************************************************/
-/*****************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/************************************************************************************/
-/************************************************************************************/
-/**                                                                                 */
-/**  TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer);  */
-/**                                                                                 */
-/************************************************************************************/
-/************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_block_pool_pointer_convert:
-        BX       LR               ;; return
-
-
-/**************************************************************************************/
-/**************************************************************************************/
-/**                                                                                   */
-/**  UCHAR  **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer);        */
-/**                                                                                   */
-/**************************************************************************************/
-/**************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_indirect_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/*****************************************************************************************/
-/*****************************************************************************************/
-/**                                                                                      */
-/**  TX_BYTE_POOL  *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer);          */
-/**                                                                                      */
-/*****************************************************************************************/
-/*****************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_byte_pool_pointer_convert:
-        BX       LR               ;; return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  UCHAR  *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool);         */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_byte_pool_to_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/*****************************************************************************************/
-/*****************************************************************************************/
-/**                                                                                      */
-/**  ALIGN_TYPE  *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer);         */
-/**                                                                                      */
-/*****************************************************************************************/
-/*****************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_align_type_pointer_convert:
-        BX       LR               ;; return
-
-
-/****************************************************************************************************/
-/****************************************************************************************************/
-/**                                                                                                 */
-/**  TX_BYTE_POOL  **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer);         */
-/**                                                                                                 */
-/****************************************************************************************************/
-/****************************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_indirect_byte_pool_pointer_convert:
-        BX       LR               ;; return
-
-
-/**************************************************************************************************/
-/**************************************************************************************************/
-/**                                                                                               */
-/**  TX_EVENT_FLAGS_GROUP  *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer);         */
-/**                                                                                               */
-/**************************************************************************************************/
-/**************************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_event_flags_pointer_convert:
-        BX       LR               ;; return
-
-
-/*****************************************************************************/
-/*****************************************************************************/
-/**                                                                          */
-/**  ULONG  *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer);         */
-/**                                                                          */
-/*****************************************************************************/
-/*****************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_ulong_pointer_convert:
-        BX       LR               ;; return
-
-
-/********************************************************************************/
-/********************************************************************************/
-/**                                                                             */
-/**  TX_MUTEX  *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer);         */
-/**                                                                             */
-/********************************************************************************/
-/********************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_mutex_pointer_convert:
-        BX       LR               ;; return
 
 
 /**************************************************************************/
@@ -798,192 +671,7 @@ _tx_misra_void_to_mutex_pointer_convert:
         THUMB
 _tx_misra_status_get:
         MOVS     R0,#+0
-        BX       LR               ;; return
+        BX       LR               // return
-
-
-/********************************************************************************/
-/********************************************************************************/
-/**                                                                             */
-/**  TX_QUEUE  *_tx_misra_void_to_queue_pointer_convert(VOID *pointer);         */
-/**                                                                             */
-/********************************************************************************/
-/********************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_queue_pointer_convert:
-        BX       LR               ;; return
-
-
-/****************************************************************************************/
-/****************************************************************************************/
-/**                                                                                     */
-/**  TX_SEMAPHORE  *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer);         */
-/**                                                                                     */
-/****************************************************************************************/
-/****************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_semaphore_pointer_convert:
-        BX       LR               ;; return
-
-
-/**************************************************************************/
-/**************************************************************************/
-/**                                                                       */
-/**  VOID  *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer);      */
-/**                                                                       */
-/**************************************************************************/
-/**************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_void_pointer_convert:
-        BX       LR               ;; return
-
-
-/*********************************************************************************/
-/*********************************************************************************/
-/**                                                                              */
-/**  TX_THREAD  *_tx_misra_ulong_to_thread_pointer_convert(ULONG value);         */
-/**                                                                              */
-/*********************************************************************************/
-/*********************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_ulong_to_thread_pointer_convert:
-        BX       LR               ;; return
-
-
-/***************************************************************************************************/
-/***************************************************************************************************/
-/**                                                                                                */
-/**  VOID  *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer);         */
-/**                                                                                                */
-/***************************************************************************************************/
-/***************************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_timer_indirect_to_void_pointer_convert:
-        BX       LR               ;; return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  CHAR  *_tx_misra_const_char_to_char_pointer_convert(const char *pointer);         */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_const_char_to_char_pointer_convert:
-        BX       LR               ;; return
-
-
-/**********************************************************************************/
-/**********************************************************************************/
-/**                                                                               */
-/**  TX_THREAD  *_tx_misra_void_to_thread_pointer_convert(void *pointer);         */
-/**                                                                               */
-/**********************************************************************************/
-/**********************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_thread_pointer_convert:
-        BX       LR               ;; return
-
-
-#ifdef TX_ENABLE_EVENT_TRACE
-
-/************************************************************************************************/
-/************************************************************************************************/
-/**                                                                                             */
-/**  UCHAR  *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer);         */
-/**                                                                                             */
-/************************************************************************************************/
-/************************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_object_to_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/************************************************************************************************/
-/************************************************************************************************/
-/**                                                                                             */
-/**  TX_TRACE_OBJECT_ENTRY  *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer);         */
-/**                                                                                             */
-/************************************************************************************************/
-/************************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_object_pointer_convert:
-        BX       LR               ;; return
-
-
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  TX_TRACE_HEADER  *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer);         */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_header_pointer_convert:
-        BX       LR               ;; return
-
-
-/***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
-/**  TX_TRACE_BUFFER_ENTRY  *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer);         */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_entry_pointer_convert:
-        BX       LR               ;; return
-
-
-/***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
-/**  UCHAR  *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer);         */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_entry_to_uchar_pointer_convert:
-        BX       LR               ;; return
-#endif
-
-
-/***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
-/**  UCHAR  *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer);                           */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_char_to_uchar_pointer_convert:
-        BX       LR               ;; return
 
 
 /***********************************************************************************************/
@@ -998,7 +686,7 @@ _tx_misra_char_to_uchar_pointer_convert:
         THUMB
 _tx_misra_ipsr_get:
         MRS      R0, IPSR
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /***********************************************************************************************/
@@ -1013,7 +701,7 @@ _tx_misra_ipsr_get:
         THUMB
 _tx_misra_control_get:
         MRS      R0, CONTROL
-        BX       LR               ;; return
+        BX       LR               // return
 
         
 /***********************************************************************************************/
@@ -1028,7 +716,7 @@ _tx_misra_control_get:
         THUMB
 _tx_misra_control_set:
         MSR      CONTROL, R0
-        BX       LR               ;; return
+        BX       LR               // return
 
         
 #ifdef __ARMVFP__
@@ -1044,9 +732,9 @@ _tx_misra_control_set:
         SECTION `.text`:CODE:NOROOT(2)
         THUMB
 _tx_misra_fpccr_get:
-        LDR      r0, =0xE000EF34  ; Build FPCCR address
+        LDR      r0, =0xE000EF34  // Build FPCCR address
-        LDR      r0, [r0]         ; Load FPCCR value
+        LDR      r0, [r0]         // Load FPCCR value
-        BX       LR               ;; return
+        BX       LR               // return
         
         
 /***********************************************************************************************/
@@ -1061,7 +749,7 @@ _tx_misra_fpccr_get:
         THUMB
 _tx_misra_vfp_touch:
         vmov.f32 s0, s0
-        BX       LR               ;; return
+        BX       LR               // return
         
 #endif
         

ports/cortex_m3/keil/example_build/ThreadX_Demo.uvopt

@@ -10,7 +10,7 @@
     <aExt>*.s*; *.src; *.a*</aExt>
     <oExt>*.obj</oExt>
     <lExt>*.lib</lExt>
-    <tExt>*.txt; *.h; *.inc</tExt>
+    <tExt>*.txt; *.h; *.inc; *.md</tExt>
     <pExt>*.plm</pExt>
     <CppX>*.cpp</CppX>
     <nMigrate>0</nMigrate>

ports/cortex_m3/keil/example_build/ThreadX_Demo.uvproj

@@ -555,19 +555,4 @@
     </Target>
   </Targets>
 
-  <LayerInfo>
-    <Layers>
-      <Layer>
-        <LayName>&lt;Project Info&gt;</LayName>
-        <LayDesc></LayDesc>
-        <LayUrl></LayUrl>
-        <LayKeys></LayKeys>
-        <LayCat></LayCat>
-        <LayLic></LayLic>
-        <LayTarg>0</LayTarg>
-        <LayPrjMark>1</LayPrjMark>
-      </Layer>
-    </Layers>
-  </LayerInfo>
-
 </Project>

ports/cortex_m3/keil/example_build/ThreadX_Library.uvopt

@@ -10,7 +10,7 @@
     <aExt>*.s*; *.src; *.a*</aExt>
     <oExt>*.obj; *.o</oExt>
     <lExt>*.lib</lExt>
-    <tExt>*.txt; *.h; *.inc</tExt>
+    <tExt>*.txt; *.h; *.inc; *.md</tExt>
     <pExt>*.plm</pExt>
     <CppX>*.cpp</CppX>
     <nMigrate>0</nMigrate>

ports/cortex_m3/keil/example_build/ThreadX_Library.uvproj

@@ -1532,19 +1532,4 @@
     </Target>
   </Targets>
 
-  <LayerInfo>
-    <Layers>
-      <Layer>
-        <LayName>&lt;Project Info&gt;</LayName>
-        <LayDesc></LayDesc>
-        <LayUrl></LayUrl>
-        <LayKeys></LayKeys>
-        <LayCat></LayCat>
-        <LayLic></LayLic>
-        <LayTarg>0</LayTarg>
-        <LayPrjMark>1</LayPrjMark>
-      </Layer>
-    </Layers>
-  </LayerInfo>
-
 </Project>

ports/cortex_m3/keil/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                         Cortex-M3/Keil    */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -59,6 +59,9 @@
 /*  04-25-2022      Scott Larson            Modified comments and added   */
 /*                                            volatile to registers,      */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Modified comments and         */
+/*                                            described BASEPRI usage,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -146,6 +149,12 @@ typedef unsigned short                          USHORT;
 #define TX_TIMER_THREAD_PRIORITY                0           /* Default timer thread priority    */
 #endif
 
+/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts.
+If using BASEPRI is desired, define the following two symbols for both c and assembly files:
+TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK.
+TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask.
+Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run.
+*/
 
 /* Define various constants for the ThreadX Cortex-M port.  */
 
@@ -707,7 +716,7 @@ void    tx_thread_fpu_disable(void);
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] =
-                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M3/Keil Version 6.1.11 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M3/Keil Version 6.1.12 *";
 #else
 #ifdef TX_MISRA_ENABLE
 extern  CHAR                    _tx_version_id[100];

ports/cortex_m33/ac6/CMakeLists.txt

@@ -0,0 +1,21 @@
+target_sources(${PROJECT_NAME} PRIVATE
+    ${CMAKE_CURRENT_LIST_DIR}/src/txe_thread_secure_stack_allocate.c
+    ${CMAKE_CURRENT_LIST_DIR}/src/txe_thread_secure_stack_free.c
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_initialize_low_level.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_restore.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_save.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_control.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_disable.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_restore.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_schedule.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_secure_stack.c
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_secure_stack_allocate.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_secure_stack_free.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_stack_build.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_system_return.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_timer_interrupt.S
+)
+
+target_include_directories(${PROJECT_NAME} PUBLIC
+    inc
+)

ports/cortex_m33/ac6/inc/tx_port.h

@@ -25,8 +25,8 @@
 /*                                                                        */
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
-/*    tx_port.h                                          Cortex-M33       */
+/*    tx_port.h                                         Cortex-M33/AC6    */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -61,16 +61,21 @@
 /*                                            added symbol to enable      */
 /*                                            stack error handler,        */
 /*                                            resulting in version 6.1.7  */
-/*  10-15-2021     Scott Larson             Modified comment(s), improved */
+/*  10-15-2021      Scott Larson            Modified comment(s), improved */
 /*                                            stack check error handling, */
 /*                                            resulting in version 6.1.9  */
-/*  01-31-2022     Scott Larson             Modified comment(s), unified  */
+/*  01-31-2022      Scott Larson            Modified comment(s), unified  */
 /*                                            this file across compilers, */
 /*                                            fixed predefined macro,     */
 /*                                            resulting in version 6.1.10 */
 /*  04-25-2022      Scott Larson            Modified comments and added   */
 /*                                            volatile to registers,      */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Modified comments and changed */
+/*                                            secure stack initialization */
+/*                                            macro to port-specific,     */
+/*                                            described BASEPRI usage,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -188,6 +193,12 @@ UINT    _tx_thread_secure_stack_free(struct TX_THREAD_STRUCT *tx_thread);
 #define TX_TIMER_THREAD_PRIORITY                0           /* Default timer thread priority    */
 #endif
 
+/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts.
+If using BASEPRI is desired, define the following two symbols for both c and assembly files:
+TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK.
+TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask.
+Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run.
+*/
 
 /* Define various constants for the ThreadX Cortex-M port.  */
 
@@ -524,7 +535,7 @@ ULONG   _tx_misra_ipsr_get(VOID);
 #if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
 /* Initialize secure stacks for threads calling secure functions. */
 extern void    _tx_thread_secure_stack_initialize(void);
-#define TX_INITIALIZE_KERNEL_ENTER_EXTENSION            _tx_thread_secure_stack_initialize();
+#define TX_PORT_SPECIFIC_PRE_INITIALIZATION             _tx_thread_secure_stack_initialize();
 #endif
 
 /* Define the macro to ensure _tx_thread_preempt_disable is set early in initialization in order to
@@ -637,7 +648,7 @@ VOID                                            _tx_thread_interrupt_restore(UIN
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] =
-                                    "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M33 Version 6.1.10 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M33/AC6 Version 6.1.12 *";
 #else
 #ifdef TX_MISRA_ENABLE
 extern  CHAR                    _tx_version_id[100];

ports/cortex_m33/ac6/src/tx_initialize_low_level.S

@@ -0,0 +1,278 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Initialize                                                          */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+
+SYSTEM_CLOCK        =     6000000
+SYSTICK_CYCLES      =     ((SYSTEM_CLOCK / 100) -1)
+
+/* Setup the stack and heap areas.  */
+
+STACK_SIZE          =     0x00000400
+HEAP_SIZE           =     0x00000000
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_initialize_low_level                          Cortex-M33/AC6    */
+/*                                                           6.1          */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function is responsible for any low-level processor            */
+/*    initialization, including setting up interrupt vectors, setting     */
+/*    up a periodic timer interrupt source, saving the system stack       */
+/*    pointer for use in ISR processing later, and finding the first      */
+/*    available RAM memory address for tx_application_define.             */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    _tx_initialize_kernel_enter           ThreadX entry function        */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
+/*                                                                        */
+/**************************************************************************/
+// VOID   _tx_initialize_low_level(VOID)
+// {
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  _tx_initialize_low_level
+    .thumb_func
+.type _tx_initialize_low_level, function
+_tx_initialize_low_level:
+
+    /* Disable interrupts during ThreadX initialization.  */
+    CPSID   i
+
+    /* Set base of available memory to end of non-initialised RAM area.  */
+    LDR     r0, =_tx_initialize_unused_memory       // Build address of unused memory pointer
+    LDR     r1, =Image$$ARM_LIB_STACK$$ZI$$Limit    // Build first free address
+    ADD     r1, r1, #4                              //
+    STR     r1, [r0]                                // Setup first unused memory pointer
+
+    /* Setup Vector Table Offset Register.  */
+    MOV     r0, #0xE000E000                         // Build address of NVIC registers
+    LDR     r1, =__Vectors                          // Pickup address of vector table
+    STR     r1, [r0, #0xD08]                        // Set vector table address
+
+    /* Enable the cycle count register.  */
+    LDR     r0, =0xE0001000                         // Build address of DWT register
+    LDR     r1, [r0]                                // Pickup the current value
+    ORR     r1, r1, #1                              // Set the CYCCNTENA bit
+    STR     r1, [r0]                                // Enable the cycle count register
+
+    /* Set system stack pointer from vector value.  */
+    LDR     r0, =_tx_thread_system_stack_ptr        // Build address of system stack pointer
+    LDR     r1, =__Vectors                          // Pickup address of vector table
+    LDR     r1, [r1]                                // Pickup reset stack pointer
+    STR     r1, [r0]                                // Save system stack pointer
+
+    /* Configure SysTick.  */
+    MOV     r0, #0xE000E000                         // Build address of NVIC registers
+    LDR     r1, =SYSTICK_CYCLES
+    STR     r1, [r0, #0x14]                         // Setup SysTick Reload Value
+    MOV     r1, #0x7                                // Build SysTick Control Enable Value
+    STR     r1, [r0, #0x10]                         // Setup SysTick Control
+
+    /* Configure handler priorities.  */
+    LDR     r1, =0x00000000                         // Rsrv, UsgF, BusF, MemM
+    STR     r1, [r0, #0xD18]                        // Setup System Handlers 4-7 Priority Registers
+
+    LDR     r1, =0xFF000000                         // SVCl, Rsrv, Rsrv, Rsrv
+    STR     r1, [r0, #0xD1C]                        // Setup System Handlers 8-11 Priority Registers
+                                                    // Note: SVC must be lowest priority, which is 0xFF
+
+    LDR     r1, =0x40FF0000                         // SysT, PnSV, Rsrv, DbgM
+    STR     r1, [r0, #0xD20]                        // Setup System Handlers 12-15 Priority Registers
+                                                    // Note: PnSV must be lowest priority, which is 0xFF
+
+    /* Return to caller.  */
+    BX      lr
+// }
+
+
+/* Define shells for each of the unused vectors.  */
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  __tx_BadHandler
+    .thumb_func
+.type __tx_BadHandler, function
+__tx_BadHandler:
+    B       __tx_BadHandler
+
+
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  __tx_IntHandler
+    .thumb_func
+.type __tx_IntHandler, function
+__tx_IntHandler:
+// VOID InterruptHandler (VOID)
+// {
+    PUSH    {r0,lr}     // Save LR (and dummy r0 to maintain stack alignment)
+#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
+    BL      _tx_execution_isr_enter             // Call the ISR enter function
+#endif
+    /* Do interrupt handler work here */
+    /* .... */
+#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
+    BL      _tx_execution_isr_exit              // Call the ISR exit function
+#endif
+    POP     {r0,lr}
+    BX      LR
+// }
+
+
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  SysTick_Handler
+    .thumb_func
+.type SysTick_Handler, function
+SysTick_Handler:
+// VOID TimerInterruptHandler (VOID)
+// {
+    PUSH    {r0,lr}     // Save LR (and dummy r0 to maintain stack alignment)
+#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
+    BL      _tx_execution_isr_enter             // Call the ISR enter function
+#endif
+    BL      _tx_timer_interrupt
+#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
+    BL      _tx_execution_isr_exit              // Call the ISR exit function
+#endif
+    POP     {r0,lr}
+    BX      LR
+// }
+
+
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  HardFault_Handler
+    .thumb_func
+.type HardFault_Handler, function
+HardFault_Handler:
+    B       HardFault_Handler
+
+
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  UsageFault_Handler
+    .thumb_func
+.type UsageFault_Handler, function
+UsageFault_Handler:
+    CPSID   i                                       // Disable interrupts
+    // Check for stack limit fault
+    LDR     r0, =0xE000ED28                         // CFSR address
+    LDR     r1,[r0]                                 // Pick up CFSR
+    TST     r1, #0x00100000                         // Check for Stack Overflow
+_unhandled_usage_loop:
+    BEQ     _unhandled_usage_loop                   // If not stack overflow then loop
+
+    // Handle stack overflow
+    STR     r1, [r0]                                // Clear CFSR flag(s)
+
+#ifdef __ARM_PCS_VFP
+    LDR     r0, =0xE000EF34                         // Cleanup FPU context: Load FPCCR address
+    LDR     r1, [r0]                                // Load FPCCR
+    BIC     r1, r1, #1                              // Clear the lazy preservation active bit
+    STR     r1, [r0]                                // Store the value
+#endif
+
+    LDR     r0, =_tx_thread_current_ptr             // Build current thread pointer address
+    LDR     r0,[r0]                                 // Pick up current thread pointer
+    PUSH    {r0,lr}                                 // Save LR (and r0 to maintain stack alignment)
+    BL      _tx_thread_stack_error_handler          // Call ThreadX/user handler
+    POP     {r0,lr}                                 // Restore LR and dummy reg
+
+#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
+    // Call the thread exit function to indicate the thread is no longer executing.
+    PUSH    {r0, lr}                                // Save LR (and r0 just for alignment)
+    BL      _tx_execution_thread_exit               // Call the thread exit function
+    POP     {r0, lr}                                // Recover LR
+#endif
+
+    MOV     r1, #0                                  // Build NULL value
+    LDR     r0, =_tx_thread_current_ptr             // Pickup address of current thread pointer
+    STR     r1, [r0]                                // Clear current thread pointer
+
+    // Return from UsageFault_Handler exception
+    LDR     r0, =0xE000ED04                         // Load ICSR
+    LDR     r1, =0x10000000                         // Set PENDSVSET bit
+    STR     r1, [r0]                                // Store ICSR
+    DSB                                             // Wait for memory access to complete
+    CPSIE   i                                       // Enable interrupts
+    BX      lr                                      // Return from exception
+
+
+
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  __tx_NMIHandler
+    .thumb_func
+.type __tx_NMIHandler, function
+__tx_NMIHandler:
+    B       __tx_NMIHandler
+
+
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  __tx_DBGHandler
+    .thumb_func
+.type __tx_DBGHandler, function
+__tx_DBGHandler:
+    B       __tx_DBGHandler
+
+    .end

ports/cortex_m33/ac6/src/tx_misra.S

@@ -0,0 +1,719 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   ThreadX MISRA Compliance                                            */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        #define SHT_PROGBITS 0x1
+
+        .global __aeabi_memset
+        .global _tx_thread_current_ptr
+        .global _tx_thread_interrupt_disable
+        .global _tx_thread_interrupt_restore
+        .global _tx_thread_stack_analyze
+        .global _tx_thread_stack_error_handler
+        .global _tx_thread_system_state
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_trace_buffer_current_ptr
+        .global _tx_trace_buffer_end_ptr
+        .global _tx_trace_buffer_start_ptr
+        .global _tx_trace_event_enable_bits
+        .global _tx_trace_full_notify_function
+        .global _tx_trace_header_ptr
+#endif
+
+        .global _tx_misra_always_true
+        .global _tx_misra_block_pool_to_uchar_pointer_convert
+        .global _tx_misra_byte_pool_to_uchar_pointer_convert
+        .global _tx_misra_char_to_uchar_pointer_convert
+        .global _tx_misra_const_char_to_char_pointer_convert
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_entry_to_uchar_pointer_convert
+#endif
+        .global _tx_misra_indirect_void_to_uchar_pointer_convert
+        .global _tx_misra_memset
+        .global _tx_misra_message_copy
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_object_to_uchar_pointer_convert
+#endif
+        .global _tx_misra_pointer_to_ulong_convert
+        .global _tx_misra_status_get
+        .global _tx_misra_thread_stack_check
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_time_stamp_get
+#endif
+        .global _tx_misra_timer_indirect_to_void_pointer_convert
+        .global _tx_misra_timer_pointer_add
+        .global _tx_misra_timer_pointer_dif
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_trace_event_insert
+#endif
+        .global _tx_misra_uchar_pointer_add
+        .global _tx_misra_uchar_pointer_dif
+        .global _tx_misra_uchar_pointer_sub
+        .global _tx_misra_uchar_to_align_type_pointer_convert
+        .global _tx_misra_uchar_to_block_pool_pointer_convert
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_uchar_to_entry_pointer_convert
+        .global _tx_misra_uchar_to_header_pointer_convert
+#endif
+        .global _tx_misra_uchar_to_indirect_byte_pool_pointer_convert
+        .global _tx_misra_uchar_to_indirect_uchar_pointer_convert
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_uchar_to_object_pointer_convert
+#endif
+        .global _tx_misra_uchar_to_void_pointer_convert
+        .global _tx_misra_ulong_pointer_add
+        .global _tx_misra_ulong_pointer_dif
+        .global _tx_misra_ulong_pointer_sub
+        .global _tx_misra_ulong_to_pointer_convert
+        .global _tx_misra_ulong_to_thread_pointer_convert
+        .global _tx_misra_user_timer_pointer_get
+        .global _tx_misra_void_to_block_pool_pointer_convert
+        .global _tx_misra_void_to_byte_pool_pointer_convert
+        .global _tx_misra_void_to_event_flags_pointer_convert
+        .global _tx_misra_void_to_indirect_uchar_pointer_convert
+        .global _tx_misra_void_to_mutex_pointer_convert
+        .global _tx_misra_void_to_queue_pointer_convert
+        .global _tx_misra_void_to_semaphore_pointer_convert
+        .global _tx_misra_void_to_thread_pointer_convert
+        .global _tx_misra_void_to_uchar_pointer_convert
+        .global _tx_misra_void_to_ulong_pointer_convert
+        .global _tx_misra_ipsr_get
+        .global _tx_misra_control_get
+        .global _tx_misra_control_set
+#ifdef __ARM_FP
+        .global _tx_misra_fpccr_get
+        .global _tx_misra_vfp_touch
+#endif
+
+        .global _tx_misra_event_flags_group_not_used
+        .global _tx_misra_event_flags_set_notify_not_used
+        .global _tx_misra_queue_not_used
+        .global _tx_misra_queue_send_notify_not_used
+        .global _tx_misra_semaphore_not_used
+        .global _tx_misra_semaphore_put_notify_not_used
+        .global _tx_misra_thread_entry_exit_notify_not_used
+        .global _tx_misra_thread_not_used
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_memset(VOID *ptr, UINT value, UINT size);            */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .align 4
+        .syntax unified
+        .thumb_func
+_tx_misra_memset:
+        PUSH     {R4,LR}
+        MOVS     R4,R0
+        MOVS     R0,R2
+        MOVS     R2,R1
+        MOVS     R1,R0
+        MOVS     R0,R4
+        BL       __aeabi_memset
+        POP      {R4,PC}          // return
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  UCHAR  *_tx_misra_uchar_pointer_add(UCHAR *ptr, ULONG amount);       */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_uchar_pointer_add:
+        ADD      R0,R0,R1
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  UCHAR  *_tx_misra_uchar_pointer_sub(UCHAR *ptr, ULONG amount);       */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_uchar_pointer_sub:
+        RSBS     R1,R1,#+0
+        ADD      R0,R0,R1
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  _tx_misra_uchar_pointer_dif(UCHAR *ptr1, UCHAR *ptr2);        */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_uchar_pointer_dif:
+        SUBS     R0,R0,R1
+        BX       LR               // return
+
+
+/************************************************************************************************************************************/
+/************************************************************************************************************************************/
+/**                                                                                                                                 */
+/**  This single function serves all of the below prototypes.                                                                       */
+/**                                                                                                                                 */
+/**  ULONG  _tx_misra_pointer_to_ulong_convert(VOID *ptr);                                                                          */
+/**  VOID  *_tx_misra_ulong_to_pointer_convert(ULONG input);                                                                        */
+/**  UCHAR  **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr);                                                  */
+/**  UCHAR  **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer);                                                    */
+/**  UCHAR  *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool);                                                    */
+/**  TX_BLOCK_POOL  *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer);                                                   */
+/**  UCHAR  *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer);                                                                */
+/**  TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer);                                                  */
+/**  UCHAR  **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer);                                                      */
+/**  TX_BYTE_POOL  *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer);                                                     */
+/**  UCHAR  *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool);                                                      */
+/**  ALIGN_TYPE  *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer);                                                    */
+/**  TX_BYTE_POOL  **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer);                                         */
+/**  TX_EVENT_FLAGS_GROUP  *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer);                                           */
+/**  ULONG  *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer);                                                                */
+/**  TX_MUTEX  *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer);                                                             */
+/**  TX_QUEUE  *_tx_misra_void_to_queue_pointer_convert(VOID *pointer);                                                             */
+/**  TX_SEMAPHORE  *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer);                                                     */
+/**  VOID  *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer);                                                                */
+/**  TX_THREAD  *_tx_misra_ulong_to_thread_pointer_convert(ULONG value);                                                            */
+/**  VOID  *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer);                                          */
+/**  CHAR  *_tx_misra_const_char_to_char_pointer_convert(const char *pointer);                                                      */
+/**  TX_THREAD  *_tx_misra_void_to_thread_pointer_convert(void *pointer);                                                           */
+/**  UCHAR  *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer);                                             */
+/**  TX_TRACE_OBJECT_ENTRY  *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer);                                             */
+/**  TX_TRACE_HEADER  *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer);                                                   */
+/**  TX_TRACE_BUFFER_ENTRY  *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer);                                              */
+/**  UCHAR  *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer);                                              */
+/**  UCHAR  *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer);                                                                */
+/**  VOID    _tx_misra_event_flags_group_not_used(TX_EVENT_FLAGS_GROUP *group_ptr);                                                 */
+/**  VOID    _tx_misra_event_flags_set_notify_not_used(VOID (*events_set_notify)(TX_EVENT_FLAGS_GROUP *notify_group_ptr));          */
+/**  VOID    _tx_misra_queue_not_used(TX_QUEUE *queue_ptr);                                                                         */
+/**  VOID    _tx_misra_queue_send_notify_not_used(VOID (*queue_send_notify)(TX_QUEUE *notify_queue_ptr));                           */
+/**  VOID    _tx_misra_semaphore_not_used(TX_SEMAPHORE *semaphore_ptr);                                                             */
+/**  VOID    _tx_misra_semaphore_put_notify_not_used(VOID (*semaphore_put_notify)(TX_SEMAPHORE *notify_semaphore_ptr));             */
+/**  VOID    _tx_misra_thread_not_used(TX_THREAD *thread_ptr);                                                                      */
+/**  VOID    _tx_misra_thread_entry_exit_notify_not_used(VOID (*thread_entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT id));  */
+/**                                                                                                                                 */
+/************************************************************************************************************************************/
+/************************************************************************************************************************************/
+        .text
+        .thumb_func
+_tx_misra_pointer_to_ulong_convert:
+_tx_misra_ulong_to_pointer_convert:
+_tx_misra_indirect_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_indirect_uchar_pointer_convert:
+_tx_misra_block_pool_to_uchar_pointer_convert:
+_tx_misra_void_to_block_pool_pointer_convert:
+_tx_misra_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_block_pool_pointer_convert:
+_tx_misra_void_to_indirect_uchar_pointer_convert:
+_tx_misra_void_to_byte_pool_pointer_convert:
+_tx_misra_byte_pool_to_uchar_pointer_convert:
+_tx_misra_uchar_to_align_type_pointer_convert:
+_tx_misra_uchar_to_indirect_byte_pool_pointer_convert:
+_tx_misra_void_to_event_flags_pointer_convert:
+_tx_misra_void_to_ulong_pointer_convert:
+_tx_misra_void_to_mutex_pointer_convert:
+_tx_misra_void_to_queue_pointer_convert:
+_tx_misra_void_to_semaphore_pointer_convert:
+_tx_misra_uchar_to_void_pointer_convert:
+_tx_misra_ulong_to_thread_pointer_convert:
+_tx_misra_timer_indirect_to_void_pointer_convert:
+_tx_misra_const_char_to_char_pointer_convert:
+_tx_misra_void_to_thread_pointer_convert:
+#ifdef TX_ENABLE_EVENT_TRACE
+_tx_misra_object_to_uchar_pointer_convert:
+_tx_misra_uchar_to_object_pointer_convert:
+_tx_misra_uchar_to_header_pointer_convert:
+_tx_misra_uchar_to_entry_pointer_convert:
+_tx_misra_entry_to_uchar_pointer_convert:
+#endif
+_tx_misra_char_to_uchar_pointer_convert:
+_tx_misra_event_flags_group_not_used:
+_tx_misra_event_flags_set_notify_not_used:
+_tx_misra_queue_not_used:
+_tx_misra_queue_send_notify_not_used:
+_tx_misra_semaphore_not_used:
+_tx_misra_semaphore_put_notify_not_used:
+_tx_misra_thread_entry_exit_notify_not_used:
+_tx_misra_thread_not_used:
+
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  *_tx_misra_ulong_pointer_add(ULONG *ptr, ULONG amount);       */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_ulong_pointer_add:
+        ADD      R0,R0,R1, LSL #+2
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  *_tx_misra_ulong_pointer_sub(ULONG *ptr, ULONG amount);       */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_ulong_pointer_sub:
+        MVNS     R2,#+3
+        MULS     R1,R2,R1
+        ADD      R0,R0,R1
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  _tx_misra_ulong_pointer_dif(ULONG *ptr1, ULONG *ptr2);        */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_ulong_pointer_dif:
+        SUBS     R0,R0,R1
+        ASRS     R0,R0,#+2
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_message_copy(ULONG **source, ULONG **destination,    */
+/**                                                           UINT size); */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_message_copy:
+        PUSH     {R4,R5}
+        LDR      R3,[R0, #+0]
+        LDR      R4,[R1, #+0]
+        LDR      R5,[R3, #+0]
+        STR      R5,[R4, #+0]
+        ADDS     R4,R4,#+4
+        ADDS     R3,R3,#+4
+        CMP      R2,#+2
+        BCC.N    _tx_misra_message_copy_0
+        SUBS     R2,R2,#+1
+        B.N      _tx_misra_message_copy_1
+_tx_misra_message_copy_2:
+        LDR      R5,[R3, #+0]
+        STR      R5,[R4, #+0]
+        ADDS     R4,R4,#+4
+        ADDS     R3,R3,#+4
+        SUBS     R2,R2,#+1
+_tx_misra_message_copy_1:
+        CMP      R2,#+0
+        BNE.N    _tx_misra_message_copy_2
+_tx_misra_message_copy_0:
+        STR      R3,[R0, #+0]
+        STR      R4,[R1, #+0]
+        POP      {R4,R5}
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  _tx_misra_timer_pointer_dif(TX_TIMER_INTERNAL **ptr1,         */
+/**                                           TX_TIMER_INTERNAL **ptr2);  */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_timer_pointer_dif:
+        SUBS     R0,R0,R1
+        ASRS     R0,R0,#+2
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  TX_TIMER_INTERNAL **_tx_misra_timer_pointer_add(TX_TIMER_INTERNAL    */
+/**                                                  **ptr1, ULONG size); */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_timer_pointer_add:
+        ADD      R0,R0,R1, LSL #+2
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_user_timer_pointer_get(TX_TIMER_INTERNAL             */
+/**                              *internal_timer, TX_TIMER **user_timer); */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_user_timer_pointer_get:
+        SUBS    R0,#8
+        STR     R0,[R1, #+0]
+        BX      LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_thread_stack_check(TX_THREAD *thread_ptr,            */
+/**                                              VOID **highest_stack);   */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_thread_stack_check:
+        PUSH     {R3-R5,LR}
+        MOVS     R4,R0
+        MOVS     R5,R1
+        BL       _tx_thread_interrupt_disable
+        CMP      R4,#+0
+        BEQ.N    _tx_misra_thread_stack_check_0
+        LDR      R1,[R4, #+0]
+        LDR      R2,=0x54485244
+        CMP      R1,R2
+        BNE.N    _tx_misra_thread_stack_check_0
+        LDR      R1,[R4, #+8]
+        LDR      R2,[R5, #+0]
+        CMP      R1,R2
+        BCS.N    _tx_misra_thread_stack_check_1
+        LDR      R1,[R4, #+8]
+        STR      R1,[R5, #+0]
+_tx_misra_thread_stack_check_1:
+        LDR      R1,[R4, #+12]
+        LDR      R1,[R1, #+0]
+        CMP      R1,#-269488145
+        BNE.N    _tx_misra_thread_stack_check_2
+        LDR      R1,[R4, #+16]
+        LDR      R1,[R1, #+1]
+        CMP      R1,#-269488145
+        BNE.N    _tx_misra_thread_stack_check_2
+        LDR      R1,[R5, #+0]
+        LDR      R2,[R4, #+12]
+        CMP      R1,R2
+        BCS.N    _tx_misra_thread_stack_check_3
+_tx_misra_thread_stack_check_2:
+        BL       _tx_thread_interrupt_restore
+        MOVS     R0,R4
+        BL       _tx_thread_stack_error_handler
+        BL       _tx_thread_interrupt_disable
+_tx_misra_thread_stack_check_3:
+        LDR      R1,[R5, #+0]
+        LDR      R1,[R1, #-4]
+        CMP      R1,#-269488145
+        BEQ.N    _tx_misra_thread_stack_check_0
+        BL       _tx_thread_interrupt_restore
+        MOVS     R0,R4
+        BL       _tx_thread_stack_analyze
+        BL       _tx_thread_interrupt_disable
+_tx_misra_thread_stack_check_0:
+        BL       _tx_thread_interrupt_restore
+        POP      {R0,R4,R5,PC}    // return
+
+#ifdef TX_ENABLE_EVENT_TRACE
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_trace_event_insert(ULONG event_id,                   */
+/**           VOID *info_field_1, ULONG info_field_2, ULONG info_field_3, */
+/**           ULONG info_field_4, ULONG filter, ULONG time_stamp);        */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_trace_event_insert:
+        PUSH     {R3-R7,LR}
+        LDR.N    R4,DataTable2_1
+        LDR      R4,[R4, #+0]
+        CMP      R4,#+0
+        BEQ.N    _tx_misra_trace_event_insert_0
+        LDR.N    R5,DataTable2_2
+        LDR      R5,[R5, #+0]
+        LDR      R6,[SP, #+28]
+        TST      R5,R6
+        BEQ.N    _tx_misra_trace_event_insert_0
+        LDR.N    R5,DataTable2_3
+        LDR      R5,[R5, #+0]
+        LDR.N    R6,DataTable2_4
+        LDR      R6,[R6, #+0]
+        CMP      R5,#+0
+        BNE.N    _tx_misra_trace_event_insert_1
+        LDR      R5,[R6, #+44]
+        LDR      R7,[R6, #+60]
+        LSLS     R7,R7,#+16
+        ORRS     R7,R7,#0x80000000
+        ORRS     R5,R7,R5
+        B.N      _tx_misra_trace_event_insert_2
+_tx_misra_trace_event_insert_1:
+        CMP      R5,#-252645136
+        BCS.N    _tx_misra_trace_event_insert_3
+        MOVS     R5,R6
+        MOVS     R6,#-1
+        B.N      _tx_misra_trace_event_insert_2
+_tx_misra_trace_event_insert_3:
+        MOVS     R6,#-252645136
+        MOVS     R5,#+0
+_tx_misra_trace_event_insert_2:
+        STR      R6,[R4, #+0]
+        STR      R5,[R4, #+4]
+        STR      R0,[R4, #+8]
+        LDR      R0,[SP, #+32]
+        STR      R0,[R4, #+12]
+        STR      R1,[R4, #+16]
+        STR      R2,[R4, #+20]
+        STR      R3,[R4, #+24]
+        LDR      R0,[SP, #+24]
+        STR      R0,[R4, #+28]
+        ADDS     R4,R4,#+32
+        LDR.N    R0,DataTable2_5
+        LDR      R0,[R0, #+0]
+        CMP      R4,R0
+        BCC.N    _tx_misra_trace_event_insert_4
+        LDR.N    R0,DataTable2_6
+        LDR      R4,[R0, #+0]
+        LDR.N    R0,DataTable2_1
+        STR      R4,[R0, #+0]
+        LDR.N    R0,DataTable2_7
+        LDR      R0,[R0, #+0]
+        STR      R4,[R0, #+32]
+        LDR.N    R0,DataTable2_8
+        LDR      R0,[R0, #+0]
+        CMP      R0,#+0
+        BEQ.N    _tx_misra_trace_event_insert_0
+        LDR.N    R0,DataTable2_7
+        LDR      R0,[R0, #+0]
+        LDR.N    R1,DataTable2_8
+        LDR      R1,[R1, #+0]
+        BLX      R1
+        B.N      _tx_misra_trace_event_insert_0
+_tx_misra_trace_event_insert_4:
+        LDR.N    R0,DataTable2_1
+        STR      R4,[R0, #+0]
+        LDR.N    R0,DataTable2_7
+        LDR      R0,[R0, #+0]
+        STR      R4,[R0, #+32]
+_tx_misra_trace_event_insert_0:
+        POP      {R0,R4-R7,PC}    // return
+
+
+        .data
+DataTable2_1:
+        .word     _tx_trace_buffer_current_ptr
+
+        .data
+DataTable2_2:
+        .word     _tx_trace_event_enable_bits
+
+        .data
+DataTable2_5:
+        .word     _tx_trace_buffer_end_ptr
+
+        .data
+DataTable2_6:
+        .word     _tx_trace_buffer_start_ptr
+
+        .data
+DataTable2_7:
+        .word     _tx_trace_header_ptr
+
+        .data
+DataTable2_8:
+        .word     _tx_trace_full_notify_function
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  _tx_misra_time_stamp_get(VOID);                               */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_time_stamp_get:
+        MOVS     R0,#+0
+        BX       LR               // return
+
+#endif
+
+        .data
+DataTable2_3:
+        .word     _tx_thread_system_state
+
+        .data
+DataTable2_4:
+        .word     _tx_thread_current_ptr
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  UINT  _tx_misra_always_true(void);                                   */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_always_true:
+        MOVS     R0,#+1
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  UINT  _tx_misra_status_get(UINT status);                             */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_status_get:
+        MOVS     R0,#+0
+        BX       LR               // return
+
+
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  ULONG  _tx_misra_ipsr_get(void);                                                          */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_ipsr_get:
+        MRS      R0, IPSR
+        BX       LR               // return
+
+
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  ULONG  _tx_misra_control_get(void);                                                       */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_control_get:
+        MRS      R0, CONTROL
+        BX       LR               // return
+
+        
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  void   _tx_misra_control_set(ULONG value);                                                */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_control_set:
+        MSR      CONTROL, R0
+        BX       LR               // return
+
+        
+#ifdef __ARM_FP
+
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  ULONG  _tx_misra_fpccr_get(void);                                                         */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_fpccr_get:
+        LDR      r0, =0xE000EF34  // Build FPCCR address
+        LDR      r0, [r0]         // Load FPCCR value
+        BX       LR               // return
+        
+        
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  void   _tx_misra_vfp_touch(void);                                                         */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_vfp_touch:
+        vmov.f32 s0, s0
+        BX       LR               // return
+        
+#endif
+        
+
+        .data
+        .word 0

ports/cortex_m33/ac6/src/tx_thread_secure_stack.c

@@ -219,7 +219,7 @@ TX_INTERRUPT_SAVE_AREA
 UINT    status;
 TX_THREAD_SECURE_STACK_INFO *info_ptr;
 UCHAR   *stack_mem;
-INT      secure_context_index;
+INT     secure_context_index;
 
     status = TX_SUCCESS;
 
@@ -241,7 +241,6 @@ INT      secure_context_index;
 
     else
     {
-
         TX_DISABLE
 
         /* Allocate free index for secure stack info. */

ports/cortex_m33/ac6/src/tx_thread_secure_stack_initialize.S

@@ -26,7 +26,7 @@
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_stack_initialize                Cortex-M33/AC6    */
-/*                                                           6.1.7        */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -49,13 +49,17 @@
 /*                                                                        */
 /*  CALLED BY                                                             */
 /*                                                                        */
-/*    TX_INITIALIZE_KERNEL_ENTER_EXTENSION                                */
+/*    TX_PORT_SPECIFIC_PRE_INITIALIZATION                                 */
 /*                                                                        */
 /*  RELEASE HISTORY                                                       */
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
 /*  06-02-2021      Scott Larson            Initial Version 6.1.7         */
+/*  07-29-2022      Scott Larson            Modified comments and changed */
+/*                                            secure stack initialization */
+/*                                            macro to port-specific,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 // VOID   _tx_thread_secure_stack_initialize(VOID)

ports/cortex_m33/gnu/CMakeLists.txt

@@ -0,0 +1,21 @@
+target_sources(${PROJECT_NAME} PRIVATE
+    ${CMAKE_CURRENT_LIST_DIR}/src/txe_thread_secure_stack_allocate.c
+    ${CMAKE_CURRENT_LIST_DIR}/src/txe_thread_secure_stack_free.c
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_initialize_low_level.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_restore.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_save.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_control.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_disable.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_restore.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_schedule.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_secure_stack.c
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_secure_stack_allocate.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_secure_stack_free.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_stack_build.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_system_return.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_timer_interrupt.S
+)
+
+target_include_directories(${PROJECT_NAME} PUBLIC
+    inc
+)

ports/cortex_m33/gnu/inc/tx_port.h

@@ -25,8 +25,8 @@
 /*                                                                        */
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
-/*    tx_port.h                                          Cortex-M33       */
+/*    tx_port.h                                         Cortex-M33/GNU    */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -61,16 +61,21 @@
 /*                                            added symbol to enable      */
 /*                                            stack error handler,        */
 /*                                            resulting in version 6.1.7  */
-/*  10-15-2021     Scott Larson             Modified comment(s), improved */
+/*  10-15-2021      Scott Larson            Modified comment(s), improved */
 /*                                            stack check error handling, */
 /*                                            resulting in version 6.1.9  */
-/*  01-31-2022     Scott Larson             Modified comment(s), unified  */
+/*  01-31-2022      Scott Larson            Modified comment(s), unified  */
 /*                                            this file across compilers, */
 /*                                            fixed predefined macro,     */
 /*                                            resulting in version 6.1.10 */
 /*  04-25-2022      Scott Larson            Modified comments and added   */
 /*                                            volatile to registers,      */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Modified comments and changed */
+/*                                            secure stack initialization */
+/*                                            macro to port-specific,     */
+/*                                            described BASEPRI usage,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -188,6 +193,12 @@ UINT    _tx_thread_secure_stack_free(struct TX_THREAD_STRUCT *tx_thread);
 #define TX_TIMER_THREAD_PRIORITY                0           /* Default timer thread priority    */
 #endif
 
+/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts.
+If using BASEPRI is desired, define the following two symbols for both c and assembly files:
+TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK.
+TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask.
+Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run.
+*/
 
 /* Define various constants for the ThreadX Cortex-M port.  */
 
@@ -524,7 +535,7 @@ ULONG   _tx_misra_ipsr_get(VOID);
 #if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
 /* Initialize secure stacks for threads calling secure functions. */
 extern void    _tx_thread_secure_stack_initialize(void);
-#define TX_INITIALIZE_KERNEL_ENTER_EXTENSION            _tx_thread_secure_stack_initialize();
+#define TX_PORT_SPECIFIC_PRE_INITIALIZATION             _tx_thread_secure_stack_initialize();
 #endif
 
 /* Define the macro to ensure _tx_thread_preempt_disable is set early in initialization in order to
@@ -637,7 +648,7 @@ VOID                                            _tx_thread_interrupt_restore(UIN
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] =
-                                    "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M33 Version 6.1.10 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M33/GNU Version 6.1.12 *";
 #else
 #ifdef TX_MISRA_ENABLE
 extern  CHAR                    _tx_version_id[100];

ports/cortex_m33/gnu/src/tx_misra.S

@@ -0,0 +1,719 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   ThreadX MISRA Compliance                                            */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        #define SHT_PROGBITS 0x1
+
+        .global __aeabi_memset
+        .global _tx_thread_current_ptr
+        .global _tx_thread_interrupt_disable
+        .global _tx_thread_interrupt_restore
+        .global _tx_thread_stack_analyze
+        .global _tx_thread_stack_error_handler
+        .global _tx_thread_system_state
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_trace_buffer_current_ptr
+        .global _tx_trace_buffer_end_ptr
+        .global _tx_trace_buffer_start_ptr
+        .global _tx_trace_event_enable_bits
+        .global _tx_trace_full_notify_function
+        .global _tx_trace_header_ptr
+#endif
+
+        .global _tx_misra_always_true
+        .global _tx_misra_block_pool_to_uchar_pointer_convert
+        .global _tx_misra_byte_pool_to_uchar_pointer_convert
+        .global _tx_misra_char_to_uchar_pointer_convert
+        .global _tx_misra_const_char_to_char_pointer_convert
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_entry_to_uchar_pointer_convert
+#endif
+        .global _tx_misra_indirect_void_to_uchar_pointer_convert
+        .global _tx_misra_memset
+        .global _tx_misra_message_copy
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_object_to_uchar_pointer_convert
+#endif
+        .global _tx_misra_pointer_to_ulong_convert
+        .global _tx_misra_status_get
+        .global _tx_misra_thread_stack_check
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_time_stamp_get
+#endif
+        .global _tx_misra_timer_indirect_to_void_pointer_convert
+        .global _tx_misra_timer_pointer_add
+        .global _tx_misra_timer_pointer_dif
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_trace_event_insert
+#endif
+        .global _tx_misra_uchar_pointer_add
+        .global _tx_misra_uchar_pointer_dif
+        .global _tx_misra_uchar_pointer_sub
+        .global _tx_misra_uchar_to_align_type_pointer_convert
+        .global _tx_misra_uchar_to_block_pool_pointer_convert
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_uchar_to_entry_pointer_convert
+        .global _tx_misra_uchar_to_header_pointer_convert
+#endif
+        .global _tx_misra_uchar_to_indirect_byte_pool_pointer_convert
+        .global _tx_misra_uchar_to_indirect_uchar_pointer_convert
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_uchar_to_object_pointer_convert
+#endif
+        .global _tx_misra_uchar_to_void_pointer_convert
+        .global _tx_misra_ulong_pointer_add
+        .global _tx_misra_ulong_pointer_dif
+        .global _tx_misra_ulong_pointer_sub
+        .global _tx_misra_ulong_to_pointer_convert
+        .global _tx_misra_ulong_to_thread_pointer_convert
+        .global _tx_misra_user_timer_pointer_get
+        .global _tx_misra_void_to_block_pool_pointer_convert
+        .global _tx_misra_void_to_byte_pool_pointer_convert
+        .global _tx_misra_void_to_event_flags_pointer_convert
+        .global _tx_misra_void_to_indirect_uchar_pointer_convert
+        .global _tx_misra_void_to_mutex_pointer_convert
+        .global _tx_misra_void_to_queue_pointer_convert
+        .global _tx_misra_void_to_semaphore_pointer_convert
+        .global _tx_misra_void_to_thread_pointer_convert
+        .global _tx_misra_void_to_uchar_pointer_convert
+        .global _tx_misra_void_to_ulong_pointer_convert
+        .global _tx_misra_ipsr_get
+        .global _tx_misra_control_get
+        .global _tx_misra_control_set
+#ifdef __ARM_FP
+        .global _tx_misra_fpccr_get
+        .global _tx_misra_vfp_touch
+#endif
+
+        .global _tx_misra_event_flags_group_not_used
+        .global _tx_misra_event_flags_set_notify_not_used
+        .global _tx_misra_queue_not_used
+        .global _tx_misra_queue_send_notify_not_used
+        .global _tx_misra_semaphore_not_used
+        .global _tx_misra_semaphore_put_notify_not_used
+        .global _tx_misra_thread_entry_exit_notify_not_used
+        .global _tx_misra_thread_not_used
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_memset(VOID *ptr, UINT value, UINT size);            */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .align 4
+        .syntax unified
+        .thumb_func
+_tx_misra_memset:
+        PUSH     {R4,LR}
+        MOVS     R4,R0
+        MOVS     R0,R2
+        MOVS     R2,R1
+        MOVS     R1,R0
+        MOVS     R0,R4
+        BL       __aeabi_memset
+        POP      {R4,PC}          // return
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  UCHAR  *_tx_misra_uchar_pointer_add(UCHAR *ptr, ULONG amount);       */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_uchar_pointer_add:
+        ADD      R0,R0,R1
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  UCHAR  *_tx_misra_uchar_pointer_sub(UCHAR *ptr, ULONG amount);       */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_uchar_pointer_sub:
+        RSBS     R1,R1,#+0
+        ADD      R0,R0,R1
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  _tx_misra_uchar_pointer_dif(UCHAR *ptr1, UCHAR *ptr2);        */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_uchar_pointer_dif:
+        SUBS     R0,R0,R1
+        BX       LR               // return
+
+
+/************************************************************************************************************************************/
+/************************************************************************************************************************************/
+/**                                                                                                                                 */
+/**  This single function serves all of the below prototypes.                                                                       */
+/**                                                                                                                                 */
+/**  ULONG  _tx_misra_pointer_to_ulong_convert(VOID *ptr);                                                                          */
+/**  VOID  *_tx_misra_ulong_to_pointer_convert(ULONG input);                                                                        */
+/**  UCHAR  **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr);                                                  */
+/**  UCHAR  **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer);                                                    */
+/**  UCHAR  *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool);                                                    */
+/**  TX_BLOCK_POOL  *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer);                                                   */
+/**  UCHAR  *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer);                                                                */
+/**  TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer);                                                  */
+/**  UCHAR  **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer);                                                      */
+/**  TX_BYTE_POOL  *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer);                                                     */
+/**  UCHAR  *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool);                                                      */
+/**  ALIGN_TYPE  *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer);                                                    */
+/**  TX_BYTE_POOL  **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer);                                         */
+/**  TX_EVENT_FLAGS_GROUP  *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer);                                           */
+/**  ULONG  *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer);                                                                */
+/**  TX_MUTEX  *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer);                                                             */
+/**  TX_QUEUE  *_tx_misra_void_to_queue_pointer_convert(VOID *pointer);                                                             */
+/**  TX_SEMAPHORE  *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer);                                                     */
+/**  VOID  *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer);                                                                */
+/**  TX_THREAD  *_tx_misra_ulong_to_thread_pointer_convert(ULONG value);                                                            */
+/**  VOID  *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer);                                          */
+/**  CHAR  *_tx_misra_const_char_to_char_pointer_convert(const char *pointer);                                                      */
+/**  TX_THREAD  *_tx_misra_void_to_thread_pointer_convert(void *pointer);                                                           */
+/**  UCHAR  *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer);                                             */
+/**  TX_TRACE_OBJECT_ENTRY  *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer);                                             */
+/**  TX_TRACE_HEADER  *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer);                                                   */
+/**  TX_TRACE_BUFFER_ENTRY  *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer);                                              */
+/**  UCHAR  *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer);                                              */
+/**  UCHAR  *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer);                                                                */
+/**  VOID    _tx_misra_event_flags_group_not_used(TX_EVENT_FLAGS_GROUP *group_ptr);                                                 */
+/**  VOID    _tx_misra_event_flags_set_notify_not_used(VOID (*events_set_notify)(TX_EVENT_FLAGS_GROUP *notify_group_ptr));          */
+/**  VOID    _tx_misra_queue_not_used(TX_QUEUE *queue_ptr);                                                                         */
+/**  VOID    _tx_misra_queue_send_notify_not_used(VOID (*queue_send_notify)(TX_QUEUE *notify_queue_ptr));                           */
+/**  VOID    _tx_misra_semaphore_not_used(TX_SEMAPHORE *semaphore_ptr);                                                             */
+/**  VOID    _tx_misra_semaphore_put_notify_not_used(VOID (*semaphore_put_notify)(TX_SEMAPHORE *notify_semaphore_ptr));             */
+/**  VOID    _tx_misra_thread_not_used(TX_THREAD *thread_ptr);                                                                      */
+/**  VOID    _tx_misra_thread_entry_exit_notify_not_used(VOID (*thread_entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT id));  */
+/**                                                                                                                                 */
+/************************************************************************************************************************************/
+/************************************************************************************************************************************/
+        .text
+        .thumb_func
+_tx_misra_pointer_to_ulong_convert:
+_tx_misra_ulong_to_pointer_convert:
+_tx_misra_indirect_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_indirect_uchar_pointer_convert:
+_tx_misra_block_pool_to_uchar_pointer_convert:
+_tx_misra_void_to_block_pool_pointer_convert:
+_tx_misra_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_block_pool_pointer_convert:
+_tx_misra_void_to_indirect_uchar_pointer_convert:
+_tx_misra_void_to_byte_pool_pointer_convert:
+_tx_misra_byte_pool_to_uchar_pointer_convert:
+_tx_misra_uchar_to_align_type_pointer_convert:
+_tx_misra_uchar_to_indirect_byte_pool_pointer_convert:
+_tx_misra_void_to_event_flags_pointer_convert:
+_tx_misra_void_to_ulong_pointer_convert:
+_tx_misra_void_to_mutex_pointer_convert:
+_tx_misra_void_to_queue_pointer_convert:
+_tx_misra_void_to_semaphore_pointer_convert:
+_tx_misra_uchar_to_void_pointer_convert:
+_tx_misra_ulong_to_thread_pointer_convert:
+_tx_misra_timer_indirect_to_void_pointer_convert:
+_tx_misra_const_char_to_char_pointer_convert:
+_tx_misra_void_to_thread_pointer_convert:
+#ifdef TX_ENABLE_EVENT_TRACE
+_tx_misra_object_to_uchar_pointer_convert:
+_tx_misra_uchar_to_object_pointer_convert:
+_tx_misra_uchar_to_header_pointer_convert:
+_tx_misra_uchar_to_entry_pointer_convert:
+_tx_misra_entry_to_uchar_pointer_convert:
+#endif
+_tx_misra_char_to_uchar_pointer_convert:
+_tx_misra_event_flags_group_not_used:
+_tx_misra_event_flags_set_notify_not_used:
+_tx_misra_queue_not_used:
+_tx_misra_queue_send_notify_not_used:
+_tx_misra_semaphore_not_used:
+_tx_misra_semaphore_put_notify_not_used:
+_tx_misra_thread_entry_exit_notify_not_used:
+_tx_misra_thread_not_used:
+
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  *_tx_misra_ulong_pointer_add(ULONG *ptr, ULONG amount);       */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_ulong_pointer_add:
+        ADD      R0,R0,R1, LSL #+2
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  *_tx_misra_ulong_pointer_sub(ULONG *ptr, ULONG amount);       */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_ulong_pointer_sub:
+        MVNS     R2,#+3
+        MULS     R1,R2,R1
+        ADD      R0,R0,R1
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  _tx_misra_ulong_pointer_dif(ULONG *ptr1, ULONG *ptr2);        */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_ulong_pointer_dif:
+        SUBS     R0,R0,R1
+        ASRS     R0,R0,#+2
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_message_copy(ULONG **source, ULONG **destination,    */
+/**                                                           UINT size); */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_message_copy:
+        PUSH     {R4,R5}
+        LDR      R3,[R0, #+0]
+        LDR      R4,[R1, #+0]
+        LDR      R5,[R3, #+0]
+        STR      R5,[R4, #+0]
+        ADDS     R4,R4,#+4
+        ADDS     R3,R3,#+4
+        CMP      R2,#+2
+        BCC.N    _tx_misra_message_copy_0
+        SUBS     R2,R2,#+1
+        B.N      _tx_misra_message_copy_1
+_tx_misra_message_copy_2:
+        LDR      R5,[R3, #+0]
+        STR      R5,[R4, #+0]
+        ADDS     R4,R4,#+4
+        ADDS     R3,R3,#+4
+        SUBS     R2,R2,#+1
+_tx_misra_message_copy_1:
+        CMP      R2,#+0
+        BNE.N    _tx_misra_message_copy_2
+_tx_misra_message_copy_0:
+        STR      R3,[R0, #+0]
+        STR      R4,[R1, #+0]
+        POP      {R4,R5}
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  _tx_misra_timer_pointer_dif(TX_TIMER_INTERNAL **ptr1,         */
+/**                                           TX_TIMER_INTERNAL **ptr2);  */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_timer_pointer_dif:
+        SUBS     R0,R0,R1
+        ASRS     R0,R0,#+2
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  TX_TIMER_INTERNAL **_tx_misra_timer_pointer_add(TX_TIMER_INTERNAL    */
+/**                                                  **ptr1, ULONG size); */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_timer_pointer_add:
+        ADD      R0,R0,R1, LSL #+2
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_user_timer_pointer_get(TX_TIMER_INTERNAL             */
+/**                              *internal_timer, TX_TIMER **user_timer); */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_user_timer_pointer_get:
+        SUBS    R0,#8
+        STR     R0,[R1, #+0]
+        BX      LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_thread_stack_check(TX_THREAD *thread_ptr,            */
+/**                                              VOID **highest_stack);   */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_thread_stack_check:
+        PUSH     {R3-R5,LR}
+        MOVS     R4,R0
+        MOVS     R5,R1
+        BL       _tx_thread_interrupt_disable
+        CMP      R4,#+0
+        BEQ.N    _tx_misra_thread_stack_check_0
+        LDR      R1,[R4, #+0]
+        LDR      R2,=0x54485244
+        CMP      R1,R2
+        BNE.N    _tx_misra_thread_stack_check_0
+        LDR      R1,[R4, #+8]
+        LDR      R2,[R5, #+0]
+        CMP      R1,R2
+        BCS.N    _tx_misra_thread_stack_check_1
+        LDR      R1,[R4, #+8]
+        STR      R1,[R5, #+0]
+_tx_misra_thread_stack_check_1:
+        LDR      R1,[R4, #+12]
+        LDR      R1,[R1, #+0]
+        CMP      R1,#-269488145
+        BNE.N    _tx_misra_thread_stack_check_2
+        LDR      R1,[R4, #+16]
+        LDR      R1,[R1, #+1]
+        CMP      R1,#-269488145
+        BNE.N    _tx_misra_thread_stack_check_2
+        LDR      R1,[R5, #+0]
+        LDR      R2,[R4, #+12]
+        CMP      R1,R2
+        BCS.N    _tx_misra_thread_stack_check_3
+_tx_misra_thread_stack_check_2:
+        BL       _tx_thread_interrupt_restore
+        MOVS     R0,R4
+        BL       _tx_thread_stack_error_handler
+        BL       _tx_thread_interrupt_disable
+_tx_misra_thread_stack_check_3:
+        LDR      R1,[R5, #+0]
+        LDR      R1,[R1, #-4]
+        CMP      R1,#-269488145
+        BEQ.N    _tx_misra_thread_stack_check_0
+        BL       _tx_thread_interrupt_restore
+        MOVS     R0,R4
+        BL       _tx_thread_stack_analyze
+        BL       _tx_thread_interrupt_disable
+_tx_misra_thread_stack_check_0:
+        BL       _tx_thread_interrupt_restore
+        POP      {R0,R4,R5,PC}    // return
+
+#ifdef TX_ENABLE_EVENT_TRACE
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_trace_event_insert(ULONG event_id,                   */
+/**           VOID *info_field_1, ULONG info_field_2, ULONG info_field_3, */
+/**           ULONG info_field_4, ULONG filter, ULONG time_stamp);        */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_trace_event_insert:
+        PUSH     {R3-R7,LR}
+        LDR.N    R4,DataTable2_1
+        LDR      R4,[R4, #+0]
+        CMP      R4,#+0
+        BEQ.N    _tx_misra_trace_event_insert_0
+        LDR.N    R5,DataTable2_2
+        LDR      R5,[R5, #+0]
+        LDR      R6,[SP, #+28]
+        TST      R5,R6
+        BEQ.N    _tx_misra_trace_event_insert_0
+        LDR.N    R5,DataTable2_3
+        LDR      R5,[R5, #+0]
+        LDR.N    R6,DataTable2_4
+        LDR      R6,[R6, #+0]
+        CMP      R5,#+0
+        BNE.N    _tx_misra_trace_event_insert_1
+        LDR      R5,[R6, #+44]
+        LDR      R7,[R6, #+60]
+        LSLS     R7,R7,#+16
+        ORRS     R7,R7,#0x80000000
+        ORRS     R5,R7,R5
+        B.N      _tx_misra_trace_event_insert_2
+_tx_misra_trace_event_insert_1:
+        CMP      R5,#-252645136
+        BCS.N    _tx_misra_trace_event_insert_3
+        MOVS     R5,R6
+        MOVS     R6,#-1
+        B.N      _tx_misra_trace_event_insert_2
+_tx_misra_trace_event_insert_3:
+        MOVS     R6,#-252645136
+        MOVS     R5,#+0
+_tx_misra_trace_event_insert_2:
+        STR      R6,[R4, #+0]
+        STR      R5,[R4, #+4]
+        STR      R0,[R4, #+8]
+        LDR      R0,[SP, #+32]
+        STR      R0,[R4, #+12]
+        STR      R1,[R4, #+16]
+        STR      R2,[R4, #+20]
+        STR      R3,[R4, #+24]
+        LDR      R0,[SP, #+24]
+        STR      R0,[R4, #+28]
+        ADDS     R4,R4,#+32
+        LDR.N    R0,DataTable2_5
+        LDR      R0,[R0, #+0]
+        CMP      R4,R0
+        BCC.N    _tx_misra_trace_event_insert_4
+        LDR.N    R0,DataTable2_6
+        LDR      R4,[R0, #+0]
+        LDR.N    R0,DataTable2_1
+        STR      R4,[R0, #+0]
+        LDR.N    R0,DataTable2_7
+        LDR      R0,[R0, #+0]
+        STR      R4,[R0, #+32]
+        LDR.N    R0,DataTable2_8
+        LDR      R0,[R0, #+0]
+        CMP      R0,#+0
+        BEQ.N    _tx_misra_trace_event_insert_0
+        LDR.N    R0,DataTable2_7
+        LDR      R0,[R0, #+0]
+        LDR.N    R1,DataTable2_8
+        LDR      R1,[R1, #+0]
+        BLX      R1
+        B.N      _tx_misra_trace_event_insert_0
+_tx_misra_trace_event_insert_4:
+        LDR.N    R0,DataTable2_1
+        STR      R4,[R0, #+0]
+        LDR.N    R0,DataTable2_7
+        LDR      R0,[R0, #+0]
+        STR      R4,[R0, #+32]
+_tx_misra_trace_event_insert_0:
+        POP      {R0,R4-R7,PC}    // return
+
+
+        .data
+DataTable2_1:
+        .word     _tx_trace_buffer_current_ptr
+
+        .data
+DataTable2_2:
+        .word     _tx_trace_event_enable_bits
+
+        .data
+DataTable2_5:
+        .word     _tx_trace_buffer_end_ptr
+
+        .data
+DataTable2_6:
+        .word     _tx_trace_buffer_start_ptr
+
+        .data
+DataTable2_7:
+        .word     _tx_trace_header_ptr
+
+        .data
+DataTable2_8:
+        .word     _tx_trace_full_notify_function
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  _tx_misra_time_stamp_get(VOID);                               */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_time_stamp_get:
+        MOVS     R0,#+0
+        BX       LR               // return
+
+#endif
+
+        .data
+DataTable2_3:
+        .word     _tx_thread_system_state
+
+        .data
+DataTable2_4:
+        .word     _tx_thread_current_ptr
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  UINT  _tx_misra_always_true(void);                                   */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_always_true:
+        MOVS     R0,#+1
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  UINT  _tx_misra_status_get(UINT status);                             */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_status_get:
+        MOVS     R0,#+0
+        BX       LR               // return
+
+
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  ULONG  _tx_misra_ipsr_get(void);                                                          */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_ipsr_get:
+        MRS      R0, IPSR
+        BX       LR               // return
+
+
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  ULONG  _tx_misra_control_get(void);                                                       */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_control_get:
+        MRS      R0, CONTROL
+        BX       LR               // return
+
+        
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  void   _tx_misra_control_set(ULONG value);                                                */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_control_set:
+        MSR      CONTROL, R0
+        BX       LR               // return
+
+        
+#ifdef __ARM_FP
+
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  ULONG  _tx_misra_fpccr_get(void);                                                         */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_fpccr_get:
+        LDR      r0, =0xE000EF34  // Build FPCCR address
+        LDR      r0, [r0]         // Load FPCCR value
+        BX       LR               // return
+        
+        
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  void   _tx_misra_vfp_touch(void);                                                         */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_vfp_touch:
+        vmov.f32 s0, s0
+        BX       LR               // return
+        
+#endif
+        
+
+        .data
+        .word 0

ports/cortex_m33/gnu/src/tx_thread_secure_stack.c

@@ -167,7 +167,7 @@ INT     index;
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_mode_stack_allocate             Cortex-M33/GNU    */
-/*                                                           6.1.10       */
+/*                                                           6.1.11a      */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -207,11 +207,15 @@ INT     index;
 /*  01-31-2022      Himanshu Gupta          Modified comments(s), updated */
 /*                                            secure stack allocation,    */
 /*                                            resulting in version 6.1.10 */
+/*  05-02-2022      Scott Larson            Modified comment(s), added    */
+/*                                            TX_INTERRUPT_SAVE_AREA,     */
+/*                                            resulting in version 6.1.11a*/
 /*                                                                        */
 /**************************************************************************/
 __attribute__((cmse_nonsecure_entry))
 UINT    _tx_thread_secure_mode_stack_allocate(TX_THREAD *thread_ptr, ULONG stack_size)
 {
+TX_INTERRUPT_SAVE_AREA
 UINT    status;
 TX_THREAD_SECURE_STACK_INFO *info_ptr;
 UCHAR   *stack_mem;

ports/cortex_m33/gnu/src/tx_thread_secure_stack_initialize.S

@@ -26,7 +26,7 @@
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_stack_initialize                Cortex-M33/GNU    */
-/*                                                           6.1.7        */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -49,13 +49,17 @@
 /*                                                                        */
 /*  CALLED BY                                                             */
 /*                                                                        */
-/*    TX_INITIALIZE_KERNEL_ENTER_EXTENSION                                */
+/*    TX_PORT_SPECIFIC_PRE_INITIALIZATION                                 */
 /*                                                                        */
 /*  RELEASE HISTORY                                                       */
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
 /*  06-02-2021      Scott Larson            Initial Version 6.1.7         */
+/*  07-29-2022      Scott Larson            Modified comments and changed */
+/*                                            secure stack initialization */
+/*                                            macro to port-specific,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 // VOID   _tx_thread_secure_stack_initialize(VOID)

ports/cortex_m33/iar/inc/tx_port.h

@@ -25,8 +25,8 @@
 /*                                                                        */
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
-/*    tx_port.h                                          Cortex-M33       */
+/*    tx_port.h                                         Cortex-M33/IAR    */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -61,16 +61,21 @@
 /*                                            added symbol to enable      */
 /*                                            stack error handler,        */
 /*                                            resulting in version 6.1.7  */
-/*  10-15-2021     Scott Larson             Modified comment(s), improved */
+/*  10-15-2021      Scott Larson            Modified comment(s), improved */
 /*                                            stack check error handling, */
 /*                                            resulting in version 6.1.9  */
-/*  01-31-2022     Scott Larson             Modified comment(s), unified  */
+/*  01-31-2022      Scott Larson            Modified comment(s), unified  */
 /*                                            this file across compilers, */
 /*                                            fixed predefined macro,     */
 /*                                            resulting in version 6.1.10 */
 /*  04-25-2022      Scott Larson            Modified comments and added   */
 /*                                            volatile to registers,      */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Modified comments and changed */
+/*                                            secure stack initialization */
+/*                                            macro to port-specific,     */
+/*                                            described BASEPRI usage,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -188,6 +193,12 @@ UINT    _tx_thread_secure_stack_free(struct TX_THREAD_STRUCT *tx_thread);
 #define TX_TIMER_THREAD_PRIORITY                0           /* Default timer thread priority    */
 #endif
 
+/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts.
+If using BASEPRI is desired, define the following two symbols for both c and assembly files:
+TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK.
+TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask.
+Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run.
+*/
 
 /* Define various constants for the ThreadX Cortex-M port.  */
 
@@ -524,7 +535,7 @@ ULONG   _tx_misra_ipsr_get(VOID);
 #if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
 /* Initialize secure stacks for threads calling secure functions. */
 extern void    _tx_thread_secure_stack_initialize(void);
-#define TX_INITIALIZE_KERNEL_ENTER_EXTENSION            _tx_thread_secure_stack_initialize();
+#define TX_PORT_SPECIFIC_PRE_INITIALIZATION             _tx_thread_secure_stack_initialize();
 #endif
 
 /* Define the macro to ensure _tx_thread_preempt_disable is set early in initialization in order to
@@ -637,7 +648,7 @@ VOID                                            _tx_thread_interrupt_restore(UIN
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] =
-                                    "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M33 Version 6.1.10 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M33/IAR Version 6.1.12 *";
 #else
 #ifdef TX_MISRA_ENABLE
 extern  CHAR                    _tx_version_id[100];

ports/cortex_m33/iar/src/tx_misra.s

@@ -96,6 +96,22 @@
         PUBLIC _tx_misra_void_to_uchar_pointer_convert
         PUBLIC _tx_misra_void_to_ulong_pointer_convert
         PUBLIC _tx_misra_ipsr_get
+        PUBLIC _tx_misra_control_get
+        PUBLIC _tx_misra_control_set
+#ifdef __ARMVFP__
+        PUBLIC _tx_misra_fpccr_get
+        PUBLIC _tx_misra_vfp_touch
+#endif
+
+        PUBLIC _tx_misra_event_flags_group_not_used
+        PUBLIC _tx_misra_event_flags_set_notify_not_used
+        PUBLIC _tx_misra_queue_not_used
+        PUBLIC _tx_misra_queue_send_notify_not_used
+        PUBLIC _tx_misra_semaphore_not_used
+        PUBLIC _tx_misra_semaphore_put_notify_not_used
+        PUBLIC _tx_misra_thread_entry_exit_notify_not_used
+        PUBLIC _tx_misra_thread_not_used
+        
         PUBLIC _tx_version_id
 
 
@@ -109,7 +125,7 @@ _tx_version_id:
         DC8 45H, 78H, 70H, 72H, 65H, 73H, 73H, 20H
         DC8 4CH, 6FH, 67H, 69H, 63H, 20H, 49H, 6EH
         DC8 63H, 2EH, 20H, 2AH, 20H, 54H, 68H, 72H
-        DC8 65H, 61H, 64H, 58H, 20H, 36H, 2EH, 30H
+        DC8 65H, 61H, 64H, 58H, 20H, 36H, 2EH, 31H
         DC8 20H, 4DH, 49H, 53H, 52H, 41H, 20H, 43H
         DC8 20H, 43H, 6FH, 6DH, 70H, 6CH, 69H, 61H
         DC8 6EH, 74H, 20H, 2AH, 0
@@ -133,7 +149,7 @@ _tx_misra_memset:
         MOVS     R1,R0
         MOVS     R0,R4
         BL       __aeabi_memset
-        POP      {R4,PC}          ;; return
+        POP      {R4,PC}          // return
 
 /**************************************************************************/
 /**************************************************************************/
@@ -147,7 +163,7 @@ _tx_misra_memset:
         THUMB
 _tx_misra_uchar_pointer_add:
         ADD      R0,R0,R1
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -163,7 +179,7 @@ _tx_misra_uchar_pointer_add:
 _tx_misra_uchar_pointer_sub:
         RSBS     R1,R1,#+0
         ADD      R0,R0,R1
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -178,21 +194,97 @@ _tx_misra_uchar_pointer_sub:
         THUMB
 _tx_misra_uchar_pointer_dif:
         SUBS     R0,R0,R1
-        BX       LR               ;; return
+        BX       LR               // return
 
 
-/**************************************************************************/
+/************************************************************************************************************************************/
-/**************************************************************************/
+/************************************************************************************************************************************/
-/**                                                                       */
+/**                                                                                                                                 */
-/**  ULONG  _tx_misra_pointer_to_ulong_convert(VOID *ptr);                */
+/**  This single function serves all of the below prototypes.                                                                       */
-/**                                                                       */
+/**                                                                                                                                 */
-/**************************************************************************/
+/**  ULONG  _tx_misra_pointer_to_ulong_convert(VOID *ptr);                                                                          */
-/**************************************************************************/
+/**  VOID  *_tx_misra_ulong_to_pointer_convert(ULONG input);                                                                        */
-
+/**  UCHAR  **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr);                                                  */
+/**  UCHAR  **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer);                                                    */
+/**  UCHAR  *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool);                                                    */
+/**  TX_BLOCK_POOL  *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer);                                                   */
+/**  UCHAR  *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer);                                                                */
+/**  TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer);                                                  */
+/**  UCHAR  **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer);                                                      */
+/**  TX_BYTE_POOL  *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer);                                                     */
+/**  UCHAR  *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool);                                                      */
+/**  ALIGN_TYPE  *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer);                                                    */
+/**  TX_BYTE_POOL  **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer);                                         */
+/**  TX_EVENT_FLAGS_GROUP  *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer);                                           */
+/**  ULONG  *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer);                                                                */
+/**  TX_MUTEX  *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer);                                                             */
+/**  TX_QUEUE  *_tx_misra_void_to_queue_pointer_convert(VOID *pointer);                                                             */
+/**  TX_SEMAPHORE  *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer);                                                     */
+/**  VOID  *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer);                                                                */
+/**  TX_THREAD  *_tx_misra_ulong_to_thread_pointer_convert(ULONG value);                                                            */
+/**  VOID  *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer);                                          */
+/**  CHAR  *_tx_misra_const_char_to_char_pointer_convert(const char *pointer);                                                      */
+/**  TX_THREAD  *_tx_misra_void_to_thread_pointer_convert(void *pointer);                                                           */
+/**  UCHAR  *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer);                                             */
+/**  TX_TRACE_OBJECT_ENTRY  *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer);                                             */
+/**  TX_TRACE_HEADER  *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer);                                                   */
+/**  TX_TRACE_BUFFER_ENTRY  *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer);                                              */
+/**  UCHAR  *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer);                                              */
+/**  UCHAR  *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer);                                                                */
+/**  VOID    _tx_misra_event_flags_group_not_used(TX_EVENT_FLAGS_GROUP *group_ptr);                                                 */
+/**  VOID    _tx_misra_event_flags_set_notify_not_used(VOID (*events_set_notify)(TX_EVENT_FLAGS_GROUP *notify_group_ptr));          */
+/**  VOID    _tx_misra_queue_not_used(TX_QUEUE *queue_ptr);                                                                         */
+/**  VOID    _tx_misra_queue_send_notify_not_used(VOID (*queue_send_notify)(TX_QUEUE *notify_queue_ptr));                           */
+/**  VOID    _tx_misra_semaphore_not_used(TX_SEMAPHORE *semaphore_ptr);                                                             */
+/**  VOID    _tx_misra_semaphore_put_notify_not_used(VOID (*semaphore_put_notify)(TX_SEMAPHORE *notify_semaphore_ptr));             */
+/**  VOID    _tx_misra_thread_not_used(TX_THREAD *thread_ptr);                                                                      */
+/**  VOID    _tx_misra_thread_entry_exit_notify_not_used(VOID (*thread_entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT id));  */
+/**                                                                                                                                 */
+/************************************************************************************************************************************/
+/************************************************************************************************************************************/
         SECTION `.text`:CODE:NOROOT(1)
         THUMB
 _tx_misra_pointer_to_ulong_convert:
-        BX       LR               ;; return
+_tx_misra_ulong_to_pointer_convert:
+_tx_misra_indirect_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_indirect_uchar_pointer_convert:
+_tx_misra_block_pool_to_uchar_pointer_convert:
+_tx_misra_void_to_block_pool_pointer_convert:
+_tx_misra_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_block_pool_pointer_convert:
+_tx_misra_void_to_indirect_uchar_pointer_convert:
+_tx_misra_void_to_byte_pool_pointer_convert:
+_tx_misra_byte_pool_to_uchar_pointer_convert:
+_tx_misra_uchar_to_align_type_pointer_convert:
+_tx_misra_uchar_to_indirect_byte_pool_pointer_convert:
+_tx_misra_void_to_event_flags_pointer_convert:
+_tx_misra_void_to_ulong_pointer_convert:
+_tx_misra_void_to_mutex_pointer_convert:
+_tx_misra_void_to_queue_pointer_convert:
+_tx_misra_void_to_semaphore_pointer_convert:
+_tx_misra_uchar_to_void_pointer_convert:
+_tx_misra_ulong_to_thread_pointer_convert:
+_tx_misra_timer_indirect_to_void_pointer_convert:
+_tx_misra_const_char_to_char_pointer_convert:
+_tx_misra_void_to_thread_pointer_convert:
+#ifdef TX_ENABLE_EVENT_TRACE
+_tx_misra_object_to_uchar_pointer_convert:
+_tx_misra_uchar_to_object_pointer_convert:
+_tx_misra_uchar_to_header_pointer_convert:
+_tx_misra_uchar_to_entry_pointer_convert:
+_tx_misra_entry_to_uchar_pointer_convert:
+#endif
+_tx_misra_char_to_uchar_pointer_convert:
+_tx_misra_event_flags_group_not_used:
+_tx_misra_event_flags_set_notify_not_used:
+_tx_misra_queue_not_used:
+_tx_misra_queue_send_notify_not_used:
+_tx_misra_semaphore_not_used:
+_tx_misra_semaphore_put_notify_not_used:
+_tx_misra_thread_entry_exit_notify_not_used:
+_tx_misra_thread_not_used:
+
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -207,7 +299,7 @@ _tx_misra_pointer_to_ulong_convert:
         THUMB
 _tx_misra_ulong_pointer_add:
         ADD      R0,R0,R1, LSL #+2
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -224,7 +316,7 @@ _tx_misra_ulong_pointer_sub:
         MVNS     R2,#+3
         MULS     R1,R2,R1
         ADD      R0,R0,R1
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -240,21 +332,7 @@ _tx_misra_ulong_pointer_sub:
 _tx_misra_ulong_pointer_dif:
         SUBS     R0,R0,R1
         ASRS     R0,R0,#+2
-        BX       LR               ;; return
+        BX       LR               // return
-
-
-/**************************************************************************/
-/**************************************************************************/
-/**                                                                       */
-/**  VOID  *_tx_misra_ulong_to_pointer_convert(ULONG input);              */
-/**                                                                       */
-/**************************************************************************/
-/**************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_ulong_to_pointer_convert:
-        BX       LR               ;; return
 
 
 /**************************************************************************/
@@ -293,7 +371,7 @@ _tx_misra_message_copy:
         STR      R3,[R0, #+0]
         STR      R4,[R1, #+0]
         POP      {R4,R5}
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -310,7 +388,7 @@ _tx_misra_message_copy:
 _tx_misra_timer_pointer_dif:
         SUBS     R0,R0,R1
         ASRS     R0,R0,#+2
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -326,7 +404,7 @@ _tx_misra_timer_pointer_dif:
         THUMB
 _tx_misra_timer_pointer_add:
         ADD      R0,R0,R1, LSL #+2
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -341,12 +419,9 @@ _tx_misra_timer_pointer_add:
         SECTION `.text`:CODE:NOROOT(1)
         THUMB
 _tx_misra_user_timer_pointer_get:
-        ADDS     R2,R0,#+8
+        SUBS    R0,#8
-        SUBS     R2,R2,R0
+        STR     R0,[R1, #+0]
-        RSBS     R2,R2,#+0
+        BX      LR               // return
-        ADD      R0,R0,R2
-        STR      R0,[R1, #+0]
-        BX       LR               ;; return
 
 
 /**************************************************************************/
@@ -368,7 +443,7 @@ _tx_misra_thread_stack_check:
         CMP      R4,#+0
         BEQ.N    ??_tx_misra_thread_stack_check_0
         LDR      R1,[R4, #+0]
-        LDR.N    R2,??DataTable2  ;; 0x54485244
+        LDR.N    R2,??DataTable2  // 0x54485244
         CMP      R1,R2
         BNE.N    ??_tx_misra_thread_stack_check_0
         LDR      R1,[R4, #+8]
@@ -406,7 +481,7 @@ _tx_misra_thread_stack_check:
         BL       _tx_thread_interrupt_disable
 ??_tx_misra_thread_stack_check_0:
         BL       _tx_thread_interrupt_restore
-        POP      {R0,R4,R5,PC}    ;; return
+        POP      {R0,R4,R5,PC}    // return
 
 #ifdef TX_ENABLE_EVENT_TRACE
 
@@ -494,7 +569,7 @@ _tx_misra_trace_event_insert:
         LDR      R0,[R0, #+0]
         STR      R4,[R0, #+32]
 ??_tx_misra_trace_event_insert_0:
-        POP      {R0,R4-R7,PC}    ;; return
+        POP      {R0,R4-R7,PC}    // return
 
 
         SECTION `.text`:CODE:NOROOT(2)
@@ -546,7 +621,7 @@ _tx_misra_trace_event_insert:
         THUMB
 _tx_misra_time_stamp_get:
         MOVS     R0,#+0
-        BX       LR               ;; return
+        BX       LR               // return
 
 #endif
 
@@ -581,203 +656,7 @@ _tx_misra_time_stamp_get:
         THUMB
 _tx_misra_always_true:
         MOVS     R0,#+1
-        BX       LR               ;; return
+        BX       LR               // return
-
-
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  UCHAR  **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr);        */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_indirect_void_to_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  UCHAR  **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer);       */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_indirect_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/***********************************************************************************/
-/***********************************************************************************/
-/**                                                                                */
-/**  UCHAR  *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool);   */
-/**                                                                                */
-/***********************************************************************************/
-/***********************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_block_pool_to_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  TX_BLOCK_POOL  *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer);         */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_block_pool_pointer_convert:
-        BX       LR               ;; return
-
-
-/*****************************************************************************/
-/*****************************************************************************/
-/**                                                                          */
-/**  UCHAR  *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer);         */
-/**                                                                          */
-/*****************************************************************************/
-/*****************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/************************************************************************************/
-/************************************************************************************/
-/**                                                                                 */
-/**  TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer);  */
-/**                                                                                 */
-/************************************************************************************/
-/************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_block_pool_pointer_convert:
-        BX       LR               ;; return
-
-
-/**************************************************************************************/
-/**************************************************************************************/
-/**                                                                                   */
-/**  UCHAR  **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer);        */
-/**                                                                                   */
-/**************************************************************************************/
-/**************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_indirect_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/*****************************************************************************************/
-/*****************************************************************************************/
-/**                                                                                      */
-/**  TX_BYTE_POOL  *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer);          */
-/**                                                                                      */
-/*****************************************************************************************/
-/*****************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_byte_pool_pointer_convert:
-        BX       LR               ;; return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  UCHAR  *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool);         */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_byte_pool_to_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/*****************************************************************************************/
-/*****************************************************************************************/
-/**                                                                                      */
-/**  ALIGN_TYPE  *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer);         */
-/**                                                                                      */
-/*****************************************************************************************/
-/*****************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_align_type_pointer_convert:
-        BX       LR               ;; return
-
-
-/****************************************************************************************************/
-/****************************************************************************************************/
-/**                                                                                                 */
-/**  TX_BYTE_POOL  **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer);         */
-/**                                                                                                 */
-/****************************************************************************************************/
-/****************************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_indirect_byte_pool_pointer_convert:
-        BX       LR               ;; return
-
-
-/**************************************************************************************************/
-/**************************************************************************************************/
-/**                                                                                               */
-/**  TX_EVENT_FLAGS_GROUP  *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer);         */
-/**                                                                                               */
-/**************************************************************************************************/
-/**************************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_event_flags_pointer_convert:
-        BX       LR               ;; return
-
-
-/*****************************************************************************/
-/*****************************************************************************/
-/**                                                                          */
-/**  ULONG  *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer);         */
-/**                                                                          */
-/*****************************************************************************/
-/*****************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_ulong_pointer_convert:
-        BX       LR               ;; return
-
-
-/********************************************************************************/
-/********************************************************************************/
-/**                                                                             */
-/**  TX_MUTEX  *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer);         */
-/**                                                                             */
-/********************************************************************************/
-/********************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_mutex_pointer_convert:
-        BX       LR               ;; return
 
 
 /**************************************************************************/
@@ -792,197 +671,12 @@ _tx_misra_void_to_mutex_pointer_convert:
         THUMB
 _tx_misra_status_get:
         MOVS     R0,#+0
-        BX       LR               ;; return
+        BX       LR               // return
-
-
-/********************************************************************************/
-/********************************************************************************/
-/**                                                                             */
-/**  TX_QUEUE  *_tx_misra_void_to_queue_pointer_convert(VOID *pointer);         */
-/**                                                                             */
-/********************************************************************************/
-/********************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_queue_pointer_convert:
-        BX       LR               ;; return
-
-
-/****************************************************************************************/
-/****************************************************************************************/
-/**                                                                                     */
-/**  TX_SEMAPHORE  *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer);         */
-/**                                                                                     */
-/****************************************************************************************/
-/****************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_semaphore_pointer_convert:
-        BX       LR               ;; return
-
-
-/**************************************************************************/
-/**************************************************************************/
-/**                                                                       */
-/**  VOID  *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer);      */
-/**                                                                       */
-/**************************************************************************/
-/**************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_void_pointer_convert:
-        BX       LR               ;; return
-
-
-/*********************************************************************************/
-/*********************************************************************************/
-/**                                                                              */
-/**  TX_THREAD  *_tx_misra_ulong_to_thread_pointer_convert(ULONG value);         */
-/**                                                                              */
-/*********************************************************************************/
-/*********************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_ulong_to_thread_pointer_convert:
-        BX       LR               ;; return
-
-
-/***************************************************************************************************/
-/***************************************************************************************************/
-/**                                                                                                */
-/**  VOID  *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer);         */
-/**                                                                                                */
-/***************************************************************************************************/
-/***************************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_timer_indirect_to_void_pointer_convert:
-        BX       LR               ;; return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  CHAR  *_tx_misra_const_char_to_char_pointer_convert(const char *pointer);         */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_const_char_to_char_pointer_convert:
-        BX       LR               ;; return
-
-
-/**********************************************************************************/
-/**********************************************************************************/
-/**                                                                               */
-/**  TX_THREAD  *_tx_misra_void_to_thread_pointer_convert(void *pointer);         */
-/**                                                                               */
-/**********************************************************************************/
-/**********************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_thread_pointer_convert:
-        BX       LR               ;; return
-
-
-#ifdef TX_ENABLE_EVENT_TRACE
-
-/************************************************************************************************/
-/************************************************************************************************/
-/**                                                                                             */
-/**  UCHAR  *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer);         */
-/**                                                                                             */
-/************************************************************************************************/
-/************************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_object_to_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/************************************************************************************************/
-/************************************************************************************************/
-/**                                                                                             */
-/**  TX_TRACE_OBJECT_ENTRY  *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer);         */
-/**                                                                                             */
-/************************************************************************************************/
-/************************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_object_pointer_convert:
-        BX       LR               ;; return
-
-
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  TX_TRACE_HEADER  *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer);         */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_header_pointer_convert:
-        BX       LR               ;; return
 
 
 /***********************************************************************************************/
 /***********************************************************************************************/
 /**                                                                                            */
-/**  TX_TRACE_BUFFER_ENTRY  *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer);         */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_entry_pointer_convert:
-        BX       LR               ;; return
-
-
-/***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
-/**  UCHAR  *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer);         */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_entry_to_uchar_pointer_convert:
-        BX       LR               ;; return
-#endif
-
-
-/***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
-/**  UCHAR  *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer);                           */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_char_to_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
 /**  ULONG  _tx_misra_ipsr_get(void);                                                          */
 /**                                                                                            */
 /***********************************************************************************************/
@@ -992,9 +686,74 @@ _tx_misra_char_to_uchar_pointer_convert:
         THUMB
 _tx_misra_ipsr_get:
         MRS      R0, IPSR
-        BX       LR               ;; return
+        BX       LR               // return
 
 
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  ULONG  _tx_misra_control_get(void);                                                       */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        SECTION `.text`:CODE:NOROOT(1)
+        THUMB
+_tx_misra_control_get:
+        MRS      R0, CONTROL
+        BX       LR               // return
+
+        
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  void   _tx_misra_control_set(ULONG value);                                                */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        SECTION `.text`:CODE:NOROOT(1)
+        THUMB
+_tx_misra_control_set:
+        MSR      CONTROL, R0
+        BX       LR               // return
+
+        
+#ifdef __ARMVFP__
+
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  ULONG  _tx_misra_fpccr_get(void);                                                         */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        SECTION `.text`:CODE:NOROOT(2)
+        THUMB
+_tx_misra_fpccr_get:
+        LDR      r0, =0xE000EF34  // Build FPCCR address
+        LDR      r0, [r0]         // Load FPCCR value
+        BX       LR               // return
+        
+        
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  void   _tx_misra_vfp_touch(void);                                                         */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        SECTION `.text`:CODE:NOROOT(1)
+        THUMB
+_tx_misra_vfp_touch:
+        vmov.f32 s0, s0
+        BX       LR               // return
+        
+#endif
+        
+        
         SECTION `.iar_vfe_header`:DATA:NOALLOC:NOROOT(2)
         SECTION_TYPE SHT_PROGBITS, 0
         DATA

ports/cortex_m33/iar/src/tx_thread_secure_stack.c

@@ -165,7 +165,7 @@ INT     index;
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_mode_stack_allocate             Cortex-M33/IAR    */
-/*                                                           6.1.10       */
+/*                                                           6.1.11a      */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -209,11 +209,15 @@ INT     index;
 /*  01-31-2022      Himanshu Gupta          Modified comments(s), updated */
 /*                                            secure stack allocation,    */
 /*                                            resulting in version 6.1.10 */
+/*  05-02-2022      Scott Larson            Modified comment(s), added    */
+/*                                            TX_INTERRUPT_SAVE_AREA,     */
+/*                                            resulting in version 6.1.11a*/
 /*                                                                        */
 /**************************************************************************/
 __attribute__((cmse_nonsecure_entry))
 UINT    _tx_thread_secure_mode_stack_allocate(TX_THREAD *thread_ptr, ULONG stack_size)
 {
+TX_INTERRUPT_SAVE_AREA
 UINT    status;
 TX_THREAD_SECURE_STACK_INFO *info_ptr;
 UCHAR   *stack_mem;
@@ -314,7 +318,7 @@ INT     secure_context_index;
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_mode_stack_free                 Cortex-M33/IAR    */
-/*                                                           6.1.10       */
+/*                                                           6.1.11a      */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -352,11 +356,15 @@ INT     secure_context_index;
 /*  01-31-2022      Himanshu Gupta          Modified comments(s), updated */
 /*                                            secure stack allocation,    */
 /*                                            resulting in version 6.1.10 */
+/*  05-02-2022      Scott Larson            Modified comment(s), added    */
+/*                                            TX_INTERRUPT_SAVE_AREA,     */
+/*                                            resulting in version 6.1.11a*/
 /*                                                                        */
 /**************************************************************************/
 __attribute__((cmse_nonsecure_entry))
 UINT    _tx_thread_secure_mode_stack_free(TX_THREAD *thread_ptr)
 {
+TX_INTERRUPT_SAVE_AREA
 UINT    status;
 TX_THREAD_SECURE_STACK_INFO *info_ptr;
 INT     secure_context_index;

ports/cortex_m33/iar/src/tx_thread_secure_stack_initialize.s

@@ -27,7 +27,7 @@
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_stack_initialize                Cortex-M33/IAR    */
-/*                                                           6.1.7        */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -50,13 +50,17 @@
 /*                                                                        */
 /*  CALLED BY                                                             */
 /*                                                                        */
-/*    TX_INITIALIZE_KERNEL_ENTER_EXTENSION                                */
+/*    TX_PORT_SPECIFIC_PRE_INITIALIZATION                                 */
 /*                                                                        */
 /*  RELEASE HISTORY                                                       */
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
 /*  06-02-2021      Scott Larson            Initial Version 6.1.7         */
+/*  07-29-2022      Scott Larson            Modified comments and changed */
+/*                                            secure stack initialization */
+/*                                            macro to port-specific,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 // VOID   _tx_thread_secure_stack_initialize(VOID)

ports/cortex_m4/ac5/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                         Cortex-M4/AC5     */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -59,6 +59,9 @@
 /*  04-25-2022      Scott Larson            Modified comments and added   */
 /*                                            volatile to registers,      */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Modified comments and         */
+/*                                            described BASEPRI usage,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -146,6 +149,12 @@ typedef unsigned short                          USHORT;
 #define TX_TIMER_THREAD_PRIORITY                0           /* Default timer thread priority    */
 #endif
 
+/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts.
+If using BASEPRI is desired, define the following two symbols for both c and assembly files:
+TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK.
+TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask.
+Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run.
+*/
 
 /* Define various constants for the ThreadX Cortex-M port.  */
 
@@ -707,7 +716,7 @@ void    tx_thread_fpu_disable(void);
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] =
-                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M4/AC5 Version 6.1.11 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M4/AC5 Version 6.1.12 *";
 #else
 #ifdef TX_MISRA_ENABLE
 extern  CHAR                    _tx_version_id[100];

ports/cortex_m4/ac6/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                         Cortex-M4/AC6     */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -59,6 +59,9 @@
 /*  04-25-2022      Scott Larson            Modified comments and added   */
 /*                                            volatile to registers,      */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Modified comments and         */
+/*                                            described BASEPRI usage,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -146,6 +149,12 @@ typedef unsigned short                          USHORT;
 #define TX_TIMER_THREAD_PRIORITY                0           /* Default timer thread priority    */
 #endif
 
+/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts.
+If using BASEPRI is desired, define the following two symbols for both c and assembly files:
+TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK.
+TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask.
+Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run.
+*/
 
 /* Define various constants for the ThreadX Cortex-M port.  */
 
@@ -707,7 +716,7 @@ void    tx_thread_fpu_disable(void);
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] =
-                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M4/AC6 Version 6.1.11 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M4/AC6 Version 6.1.12 *";
 #else
 #ifdef TX_MISRA_ENABLE
 extern  CHAR                    _tx_version_id[100];

ports/cortex_m4/ac6/src/tx_misra.S

@@ -103,6 +103,14 @@
         .global _tx_misra_vfp_touch
 #endif
 
+        .global _tx_misra_event_flags_group_not_used
+        .global _tx_misra_event_flags_set_notify_not_used
+        .global _tx_misra_queue_not_used
+        .global _tx_misra_queue_send_notify_not_used
+        .global _tx_misra_semaphore_not_used
+        .global _tx_misra_semaphore_put_notify_not_used
+        .global _tx_misra_thread_entry_exit_notify_not_used
+        .global _tx_misra_thread_not_used
 
 /**************************************************************************/
 /**************************************************************************/
@@ -172,17 +180,93 @@ _tx_misra_uchar_pointer_dif:
         BX       LR               // return
 
 
-/**************************************************************************/
+/************************************************************************************************************************************/
-/**************************************************************************/
+/************************************************************************************************************************************/
-/**                                                                       */
+/**                                                                                                                                 */
-/**  ULONG  _tx_misra_pointer_to_ulong_convert(VOID *ptr);                */
+/**  This single function serves all of the below prototypes.                                                                       */
-/**                                                                       */
+/**                                                                                                                                 */
-/**************************************************************************/
+/**  ULONG  _tx_misra_pointer_to_ulong_convert(VOID *ptr);                                                                          */
-/**************************************************************************/
+/**  VOID  *_tx_misra_ulong_to_pointer_convert(ULONG input);                                                                        */
-
+/**  UCHAR  **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr);                                                  */
+/**  UCHAR  **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer);                                                    */
+/**  UCHAR  *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool);                                                    */
+/**  TX_BLOCK_POOL  *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer);                                                   */
+/**  UCHAR  *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer);                                                                */
+/**  TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer);                                                  */
+/**  UCHAR  **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer);                                                      */
+/**  TX_BYTE_POOL  *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer);                                                     */
+/**  UCHAR  *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool);                                                      */
+/**  ALIGN_TYPE  *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer);                                                    */
+/**  TX_BYTE_POOL  **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer);                                         */
+/**  TX_EVENT_FLAGS_GROUP  *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer);                                           */
+/**  ULONG  *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer);                                                                */
+/**  TX_MUTEX  *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer);                                                             */
+/**  TX_QUEUE  *_tx_misra_void_to_queue_pointer_convert(VOID *pointer);                                                             */
+/**  TX_SEMAPHORE  *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer);                                                     */
+/**  VOID  *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer);                                                                */
+/**  TX_THREAD  *_tx_misra_ulong_to_thread_pointer_convert(ULONG value);                                                            */
+/**  VOID  *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer);                                          */
+/**  CHAR  *_tx_misra_const_char_to_char_pointer_convert(const char *pointer);                                                      */
+/**  TX_THREAD  *_tx_misra_void_to_thread_pointer_convert(void *pointer);                                                           */
+/**  UCHAR  *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer);                                             */
+/**  TX_TRACE_OBJECT_ENTRY  *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer);                                             */
+/**  TX_TRACE_HEADER  *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer);                                                   */
+/**  TX_TRACE_BUFFER_ENTRY  *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer);                                              */
+/**  UCHAR  *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer);                                              */
+/**  UCHAR  *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer);                                                                */
+/**  VOID    _tx_misra_event_flags_group_not_used(TX_EVENT_FLAGS_GROUP *group_ptr);                                                 */
+/**  VOID    _tx_misra_event_flags_set_notify_not_used(VOID (*events_set_notify)(TX_EVENT_FLAGS_GROUP *notify_group_ptr));          */
+/**  VOID    _tx_misra_queue_not_used(TX_QUEUE *queue_ptr);                                                                         */
+/**  VOID    _tx_misra_queue_send_notify_not_used(VOID (*queue_send_notify)(TX_QUEUE *notify_queue_ptr));                           */
+/**  VOID    _tx_misra_semaphore_not_used(TX_SEMAPHORE *semaphore_ptr);                                                             */
+/**  VOID    _tx_misra_semaphore_put_notify_not_used(VOID (*semaphore_put_notify)(TX_SEMAPHORE *notify_semaphore_ptr));             */
+/**  VOID    _tx_misra_thread_not_used(TX_THREAD *thread_ptr);                                                                      */
+/**  VOID    _tx_misra_thread_entry_exit_notify_not_used(VOID (*thread_entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT id));  */
+/**                                                                                                                                 */
+/************************************************************************************************************************************/
+/************************************************************************************************************************************/
         .text
         .thumb_func
 _tx_misra_pointer_to_ulong_convert:
+_tx_misra_ulong_to_pointer_convert:
+_tx_misra_indirect_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_indirect_uchar_pointer_convert:
+_tx_misra_block_pool_to_uchar_pointer_convert:
+_tx_misra_void_to_block_pool_pointer_convert:
+_tx_misra_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_block_pool_pointer_convert:
+_tx_misra_void_to_indirect_uchar_pointer_convert:
+_tx_misra_void_to_byte_pool_pointer_convert:
+_tx_misra_byte_pool_to_uchar_pointer_convert:
+_tx_misra_uchar_to_align_type_pointer_convert:
+_tx_misra_uchar_to_indirect_byte_pool_pointer_convert:
+_tx_misra_void_to_event_flags_pointer_convert:
+_tx_misra_void_to_ulong_pointer_convert:
+_tx_misra_void_to_mutex_pointer_convert:
+_tx_misra_void_to_queue_pointer_convert:
+_tx_misra_void_to_semaphore_pointer_convert:
+_tx_misra_uchar_to_void_pointer_convert:
+_tx_misra_ulong_to_thread_pointer_convert:
+_tx_misra_timer_indirect_to_void_pointer_convert:
+_tx_misra_const_char_to_char_pointer_convert:
+_tx_misra_void_to_thread_pointer_convert:
+#ifdef TX_ENABLE_EVENT_TRACE
+_tx_misra_object_to_uchar_pointer_convert:
+_tx_misra_uchar_to_object_pointer_convert:
+_tx_misra_uchar_to_header_pointer_convert:
+_tx_misra_uchar_to_entry_pointer_convert:
+_tx_misra_entry_to_uchar_pointer_convert:
+#endif
+_tx_misra_char_to_uchar_pointer_convert:
+_tx_misra_event_flags_group_not_used:
+_tx_misra_event_flags_set_notify_not_used:
+_tx_misra_queue_not_used:
+_tx_misra_queue_send_notify_not_used:
+_tx_misra_semaphore_not_used:
+_tx_misra_semaphore_put_notify_not_used:
+_tx_misra_thread_entry_exit_notify_not_used:
+_tx_misra_thread_not_used:
+
         BX       LR               // return
 
 
@@ -234,20 +318,6 @@ _tx_misra_ulong_pointer_dif:
         BX       LR               // return
 
 
-/**************************************************************************/
-/**************************************************************************/
-/**                                                                       */
-/**  VOID  *_tx_misra_ulong_to_pointer_convert(ULONG input);              */
-/**                                                                       */
-/**************************************************************************/
-/**************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_ulong_to_pointer_convert:
-        BX       LR               // return
-
-
 /**************************************************************************/
 /**************************************************************************/
 /**                                                                       */
@@ -332,12 +402,9 @@ _tx_misra_timer_pointer_add:
         .text
         .thumb_func
 _tx_misra_user_timer_pointer_get:
-        ADDS     R2,R0,#+8
+        SUBS    R0,#8
-        SUBS     R2,R2,R0
+        STR     R0,[R1, #+0]
-        RSBS     R2,R2,#+0
+        BX      LR               // return
-        ADD      R0,R0,R2
-        STR      R0,[R1, #+0]
-        BX       LR               // return
 
 
 /**************************************************************************/
@@ -553,202 +620,6 @@ _tx_misra_always_true:
         BX       LR               // return
 
 
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  UCHAR  **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr);        */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_indirect_void_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  UCHAR  **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer);       */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_indirect_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/***********************************************************************************/
-/***********************************************************************************/
-/**                                                                                */
-/**  UCHAR  *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool);   */
-/**                                                                                */
-/***********************************************************************************/
-/***********************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_block_pool_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  TX_BLOCK_POOL  *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer);         */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_block_pool_pointer_convert:
-        BX       LR               // return
-
-
-/*****************************************************************************/
-/*****************************************************************************/
-/**                                                                          */
-/**  UCHAR  *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer);         */
-/**                                                                          */
-/*****************************************************************************/
-/*****************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/************************************************************************************/
-/************************************************************************************/
-/**                                                                                 */
-/**  TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer);  */
-/**                                                                                 */
-/************************************************************************************/
-/************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_block_pool_pointer_convert:
-        BX       LR               // return
-
-
-/**************************************************************************************/
-/**************************************************************************************/
-/**                                                                                   */
-/**  UCHAR  **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer);        */
-/**                                                                                   */
-/**************************************************************************************/
-/**************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_indirect_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/*****************************************************************************************/
-/*****************************************************************************************/
-/**                                                                                      */
-/**  TX_BYTE_POOL  *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer);          */
-/**                                                                                      */
-/*****************************************************************************************/
-/*****************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_byte_pool_pointer_convert:
-        BX       LR               // return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  UCHAR  *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool);         */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_byte_pool_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/*****************************************************************************************/
-/*****************************************************************************************/
-/**                                                                                      */
-/**  ALIGN_TYPE  *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer);         */
-/**                                                                                      */
-/*****************************************************************************************/
-/*****************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_align_type_pointer_convert:
-        BX       LR               // return
-
-
-/****************************************************************************************************/
-/****************************************************************************************************/
-/**                                                                                                 */
-/**  TX_BYTE_POOL  **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer);         */
-/**                                                                                                 */
-/****************************************************************************************************/
-/****************************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_indirect_byte_pool_pointer_convert:
-        BX       LR               // return
-
-
-/**************************************************************************************************/
-/**************************************************************************************************/
-/**                                                                                               */
-/**  TX_EVENT_FLAGS_GROUP  *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer);         */
-/**                                                                                               */
-/**************************************************************************************************/
-/**************************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_event_flags_pointer_convert:
-        BX       LR               // return
-
-
-/*****************************************************************************/
-/*****************************************************************************/
-/**                                                                          */
-/**  ULONG  *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer);         */
-/**                                                                          */
-/*****************************************************************************/
-/*****************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_ulong_pointer_convert:
-        BX       LR               // return
-
-
-/********************************************************************************/
-/********************************************************************************/
-/**                                                                             */
-/**  TX_MUTEX  *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer);         */
-/**                                                                             */
-/********************************************************************************/
-/********************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_mutex_pointer_convert:
-        BX       LR               // return
-
-
 /**************************************************************************/
 /**************************************************************************/
 /**                                                                       */
@@ -764,191 +635,6 @@ _tx_misra_status_get:
         BX       LR               // return
 
 
-/********************************************************************************/
-/********************************************************************************/
-/**                                                                             */
-/**  TX_QUEUE  *_tx_misra_void_to_queue_pointer_convert(VOID *pointer);         */
-/**                                                                             */
-/********************************************************************************/
-/********************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_queue_pointer_convert:
-        BX       LR               // return
-
-
-/****************************************************************************************/
-/****************************************************************************************/
-/**                                                                                     */
-/**  TX_SEMAPHORE  *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer);         */
-/**                                                                                     */
-/****************************************************************************************/
-/****************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_semaphore_pointer_convert:
-        BX       LR               // return
-
-
-/**************************************************************************/
-/**************************************************************************/
-/**                                                                       */
-/**  VOID  *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer);      */
-/**                                                                       */
-/**************************************************************************/
-/**************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_void_pointer_convert:
-        BX       LR               // return
-
-
-/*********************************************************************************/
-/*********************************************************************************/
-/**                                                                              */
-/**  TX_THREAD  *_tx_misra_ulong_to_thread_pointer_convert(ULONG value);         */
-/**                                                                              */
-/*********************************************************************************/
-/*********************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_ulong_to_thread_pointer_convert:
-        BX       LR               // return
-
-
-/***************************************************************************************************/
-/***************************************************************************************************/
-/**                                                                                                */
-/**  VOID  *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer);         */
-/**                                                                                                */
-/***************************************************************************************************/
-/***************************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_timer_indirect_to_void_pointer_convert:
-        BX       LR               // return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  CHAR  *_tx_misra_const_char_to_char_pointer_convert(const char *pointer);         */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_const_char_to_char_pointer_convert:
-        BX       LR               // return
-
-
-/**********************************************************************************/
-/**********************************************************************************/
-/**                                                                               */
-/**  TX_THREAD  *_tx_misra_void_to_thread_pointer_convert(void *pointer);         */
-/**                                                                               */
-/**********************************************************************************/
-/**********************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_thread_pointer_convert:
-        BX       LR               // return
-
-
-#ifdef TX_ENABLE_EVENT_TRACE
-
-/************************************************************************************************/
-/************************************************************************************************/
-/**                                                                                             */
-/**  UCHAR  *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer);         */
-/**                                                                                             */
-/************************************************************************************************/
-/************************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_object_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/************************************************************************************************/
-/************************************************************************************************/
-/**                                                                                             */
-/**  TX_TRACE_OBJECT_ENTRY  *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer);         */
-/**                                                                                             */
-/************************************************************************************************/
-/************************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_object_pointer_convert:
-        BX       LR               // return
-
-
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  TX_TRACE_HEADER  *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer);         */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_header_pointer_convert:
-        BX       LR               // return
-
-
-/***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
-/**  TX_TRACE_BUFFER_ENTRY  *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer);         */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_entry_pointer_convert:
-        BX       LR               // return
-
-
-/***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
-/**  UCHAR  *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer);         */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_entry_to_uchar_pointer_convert:
-        BX       LR               // return
-#endif
-
-
-/***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
-/**  UCHAR  *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer);                           */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_char_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
 /***********************************************************************************************/
 /***********************************************************************************************/
 /**                                                                                            */

ports/cortex_m4/gnu/example_build/build_threadx.bat

@@ -1,199 +1,198 @@
 del tx.a
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb tx_initialize_low_level.S
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb ../src/tx_thread_stack_build.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb ../src/tx_thread_stack_build.S
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb ../src/tx_thread_schedule.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb ../src/tx_thread_schedule.S
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb ../src/tx_thread_system_return.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb ../src/tx_thread_system_return.S
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb ../src/tx_thread_context_save.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb ../src/tx_thread_context_save.S
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb ../src/tx_thread_context_restore.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb ../src/tx_thread_context_restore.S
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb ../src/tx_thread_interrupt_control.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb ../src/tx_thread_interrupt_control.S
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb ../src/tx_timer_interrupt.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb ../src/tx_timer_interrupt.S
+
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb ../src/tx_thread_interrupt_control.S
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_allocate.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_allocate.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_cleanup.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_cleanup.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_create.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_create.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_delete.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_delete.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_initialize.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_initialize.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_performance_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_performance_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_performance_system_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_performance_system_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_prioritize.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_prioritize.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_release.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_release.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_allocate.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_allocate.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_cleanup.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_cleanup.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_create.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_create.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_delete.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_delete.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_initialize.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_initialize.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_performance_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_performance_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_performance_system_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_performance_system_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_prioritize.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_prioritize.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_search.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_search.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_release.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_release.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_cleanup.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_cleanup.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_create.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_create.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_delete.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_delete.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_initialize.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_initialize.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_performance_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_performance_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_performance_system_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_performance_system_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_set.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_set.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_set_notify.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_set_notify.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_initialize_high_level.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_initialize_high_level.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_initialize_kernel_enter.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_initialize_kernel_enter.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_initialize_kernel_setup.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_initialize_kernel_setup.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_cleanup.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_cleanup.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_create.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_create.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_delete.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_delete.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_initialize.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_initialize.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_performance_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_performance_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_performance_system_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_performance_system_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_prioritize.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_prioritize.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_priority_change.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_priority_change.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_put.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_put.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_cleanup.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_cleanup.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_create.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_create.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_delete.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_delete.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_flush.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_flush.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_front_send.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_front_send.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_initialize.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_initialize.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_performance_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_performance_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_performance_system_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_performance_system_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_prioritize.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_prioritize.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_receive.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_receive.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_send.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_send.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_send_notify.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_send_notify.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_ceiling_put.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_ceiling_put.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_cleanup.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_cleanup.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_create.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_create.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_delete.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_delete.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_initialize.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_initialize.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_performance_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_performance_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_performance_system_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_performance_system_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_prioritize.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_prioritize.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_put.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_put.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_put_notify.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_put_notify.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_create.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_create.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_delete.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_delete.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_entry_exit_notify.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_entry_exit_notify.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_identify.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_identify.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_initialize.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_initialize.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_performance_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_performance_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_performance_system_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_performance_system_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_preemption_change.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_preemption_change.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_priority_change.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_priority_change.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_relinquish.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_relinquish.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_reset.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_reset.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_resume.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_resume.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_shell_entry.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_shell_entry.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_sleep.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_sleep.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_stack_analyze.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_stack_analyze.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_stack_error_handler.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_stack_error_handler.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_stack_error_notify.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_stack_error_notify.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_suspend.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_suspend.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_system_preempt_check.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_system_preempt_check.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_system_resume.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_system_resume.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_system_suspend.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_system_suspend.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_terminate.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_terminate.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_time_slice.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_time_slice.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_time_slice_change.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_time_slice_change.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_timeout.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_timeout.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_wait_abort.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_wait_abort.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_time_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_time_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_time_set.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_time_set.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_activate.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_activate.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_change.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_change.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_create.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_create.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_deactivate.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_deactivate.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_delete.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_delete.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_expiration_process.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_expiration_process.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_initialize.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_initialize.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_performance_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_performance_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_performance_system_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_performance_system_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_system_activate.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_system_activate.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_system_deactivate.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_system_deactivate.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_thread_entry.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_thread_entry.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_buffer_full_notify.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_buffer_full_notify.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_enable.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_enable.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_event_filter.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_event_filter.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_event_unfilter.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_event_unfilter.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_disable.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_disable.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_initialize.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_initialize.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_interrupt_control.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_interrupt_control.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_isr_enter_insert.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_isr_enter_insert.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_isr_exit_insert.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_isr_exit_insert.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_object_register.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_object_register.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_object_unregister.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_object_unregister.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_user_event_insert.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_user_event_insert.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_block_allocate.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_block_allocate.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_block_pool_create.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_block_pool_create.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_block_pool_delete.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_block_pool_delete.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_block_pool_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_block_pool_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_block_pool_prioritize.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_block_pool_prioritize.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_block_release.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_block_release.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_allocate.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_allocate.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_pool_create.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_pool_create.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_pool_delete.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_pool_delete.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_pool_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_pool_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_pool_prioritize.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_pool_prioritize.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_release.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_release.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_create.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_create.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_delete.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_delete.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_set.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_set.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_set_notify.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_set_notify.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_create.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_create.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_delete.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_delete.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_prioritize.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_prioritize.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_put.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_put.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_create.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_create.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_delete.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_delete.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_flush.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_flush.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_front_send.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_front_send.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_prioritize.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_prioritize.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_receive.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_receive.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_send.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_send.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_send_notify.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_send_notify.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_ceiling_put.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_ceiling_put.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_create.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_create.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_delete.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_delete.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_prioritize.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_prioritize.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_put.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_put.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_put_notify.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_put_notify.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_create.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_create.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_delete.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_delete.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_entry_exit_notify.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_entry_exit_notify.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_preemption_change.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_preemption_change.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_priority_change.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_priority_change.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_relinquish.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_relinquish.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_reset.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_reset.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_resume.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_resume.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_suspend.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_suspend.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_terminate.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_terminate.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_time_slice_change.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_time_slice_change.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_wait_abort.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_wait_abort.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_activate.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_activate.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_change.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_change.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_create.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_create.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_deactivate.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_deactivate.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_delete.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_delete.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_info_get.c
+
 arm-none-eabi-ar -r tx.a tx_thread_stack_build.o tx_thread_schedule.o tx_thread_system_return.o tx_thread_context_save.o tx_thread_context_restore.o tx_timer_interrupt.o tx_thread_interrupt_control.o
-arm-none-eabi-ar -r tx.a tx_thread_interrupt_control.o tx_initialize_low_level.o
 arm-none-eabi-ar -r tx.a tx_block_allocate.o tx_block_pool_cleanup.o tx_block_pool_create.o tx_block_pool_delete.o tx_block_pool_info_get.o
 arm-none-eabi-ar -r tx.a tx_block_pool_initialize.o tx_block_pool_performance_info_get.o tx_block_pool_performance_system_info_get.o tx_block_pool_prioritize.o
 arm-none-eabi-ar -r tx.a tx_block_release.o tx_byte_allocate.o tx_byte_pool_cleanup.o tx_byte_pool_create.o tx_byte_pool_delete.o tx_byte_pool_info_get.o

ports/cortex_m4/gnu/example_build/build_threadx_sample.bat

@@ -1,7 +1,5 @@
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb tx_simulator_startup.S
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb cortexm4_vectors.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb cortexm4_crt0.S
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb cortexm4_crt0.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb tx_initialize_low_level.S
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb tx_initialize_low_level.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc sample_threadx.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc sample_threadx.c
-arm-none-eabi-ld -A cortex-m4 -ereset_handler -T sample_threadx.ld tx_simulator_startup.o cortexm4_crt0.o tx_initialize_low_level.o sample_threadx.o tx.a  libc.a -o sample_threadx.out -M > sample_threadx.map
+arm-none-eabi-gcc -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -T sample_threadx.ld -ereset_handler -nostartfiles -o sample_threadx.out -Wl,-Map=sample_threadx.map cortexm4_vectors.o cortexm4_crt0.o tx_initialize_low_level.o sample_threadx.o tx.a
-
-

ports/cortex_m4/gnu/example_build/cortexm4_crt0.S

@@ -13,7 +13,6 @@ _start:
   ldr r1, =__stack_end__
   mov sp, r1
 
-
   /* Copy initialised sections into RAM if required. */
   ldr r0, =__data_load_start__
   ldr r1, =__data_start__
@@ -47,7 +46,6 @@ _start:
   mov r2, #0
   bl crt0_memory_set
 
-
   /* Setup heap - not recommended for Threadx but here for compatibility reasons */
   ldr r0, = __heap_start__
   ldr r1, = __heap_end__
@@ -57,7 +55,6 @@ _start:
   add r0, r0, #4
   str r1, [r0]
 
-
   /* constructors in case of using C++ */
   ldr r0, =__ctors_start__
   ldr r1, =__ctors_end__
@@ -72,13 +69,11 @@ crt0_ctor_loop:
   b crt0_ctor_loop
 crt0_ctor_end:
 
-
   /* Setup call frame for main() */
   mov r0, #0
   mov lr, r0
   mov r12, sp
 
-
 start:
   /* Jump to main() */
   mov r0, #0
@@ -93,7 +88,6 @@ crt0_exit_loop:
 
   /* Startup helper functions. */
 
-
 crt0_memory_copy:
   cmp r0, r1
   beq memory_copy_done
@@ -109,7 +103,6 @@ memory_copy_loop:
 memory_copy_done:
   bx lr
 
-
 crt0_memory_set:
   cmp r0, r1
   beq memory_set_done
@@ -119,7 +112,6 @@ crt0_memory_set:
 memory_set_done:
   bx lr
 
-
   /* Setup attibutes of stack and heap sections so they don't take up room in the elf file */
   .section .stack, "wa", %nobits
   .section .stack_process, "wa", %nobits

ports/cortex_m4/gnu/example_build/cortexm4_vectors.S

@@ -1,5 +1,3 @@
-
-
   .global reset_handler
 
   .global __tx_NMIHandler
@@ -10,7 +8,6 @@
   .global __tx_SysTickHandler 
   .global __tx_BadHandler
 
-
   .syntax unified
   .section .vectors, "ax"
   .code 16
@@ -29,7 +26,7 @@ _vectors:
   .word 0 // Reserved
   .word 0 // Reserved
   .word 0 // Reserved
-  .word __tx_SVCallHandler //_SVC_Handler - used by Threadx scheduler //
+  .word __tx_SVCallHandler    //_SVC_Handler - used by Threadx scheduler //
   .word __tx_DBGHandler
   .word 0 // Reserved
   .word __tx_PendSVHandler 
@@ -70,14 +67,10 @@ _vectors:
   .word __tx_BadHandler
   .word __tx_BadHandler
 
-
+  .section .init, "ax"
-
+  .thumb_func
-    .section .init, "ax"
-    .thumb_func
 reset_handler:
-
+  // low level hardware config, such as PLL setup goes here
-// low level hardware config, such as PLL setup goes here
-
   b _start
 
 

ports/cortex_m4/gnu/example_build/sample_threadx.ld

@@ -1,206 +1,125 @@
 MEMORY
 {
-  UNPLACED_SECTIONS (wx) : ORIGIN = 0x100000000, LENGTH = 0
+  RAM (wx) : ORIGIN = 0x20000000, LENGTH = 0x00800000
-  CM3_System_Control_Space (wx) : ORIGIN = 0xe000e000, LENGTH = 0x00001000
+  FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00400000
-  AHB_Peripherals (wx) : ORIGIN = 0x50000000, LENGTH = 0x00200000
-  APB1_Peripherals (wx) : ORIGIN = 0x40080000, LENGTH = 0x00080000
-  APB0_Peripherals (wx) : ORIGIN = 0x40000000, LENGTH = 0x00080000
-  GPIO (wx) : ORIGIN = 0x2009c000, LENGTH = 0x00004000
-  AHBSRAM1 (wx) : ORIGIN = 0x20080000, LENGTH = 0x00004000
-  AHBSRAM0 (wx) : ORIGIN = 0x2007c000, LENGTH = 0x00004000
-  RAM (wx) : ORIGIN = 0x10000000, LENGTH = 0x00008000
-  FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00080000
 }
 
+__STACKSIZE__ = 1024;
+__STACKSIZE_PROCESS__ = 0;
+__HEAPSIZE__ = 128;
 
 SECTIONS
 {
-  __CM3_System_Control_Space_segment_start__ = 0xe000e000;
+  .vectors : 
-  __CM3_System_Control_Space_segment_end__ = 0xe000f000;
-  __AHB_Peripherals_segment_start__ = 0x50000000;
-  __AHB_Peripherals_segment_end__ = 0x50200000;
-  __APB1_Peripherals_segment_start__ = 0x40080000;
-  __APB1_Peripherals_segment_end__ = 0x40100000;
-  __APB0_Peripherals_segment_start__ = 0x40000000;
-  __APB0_Peripherals_segment_end__ = 0x40080000;
-  __GPIO_segment_start__ = 0x2009c000;
-  __GPIO_segment_end__ = 0x200a0000;
-  __AHBSRAM1_segment_start__ = 0x20080000;
-  __AHBSRAM1_segment_end__ = 0x20084000;
-  __AHBSRAM0_segment_start__ = 0x2007c000;
-  __AHBSRAM0_segment_end__ = 0x20080000;
-  __RAM_segment_start__ = 0x10000000;
-  __RAM_segment_end__ = 0x10008000;
-  __FLASH_segment_start__ = 0x00000000;
-  __FLASH_segment_end__ = 0x00080000;
-
-  __STACKSIZE__ = 1024;
-  __STACKSIZE_PROCESS__ = 0;
-  __STACKSIZE_IRQ__ = 0;
-  __STACKSIZE_FIQ__ = 0;
-  __STACKSIZE_SVC__ = 0;
-  __STACKSIZE_ABT__ = 0;
-  __STACKSIZE_UND__ = 0;
-  __HEAPSIZE__ = 128;
-
-  __vectors_load_start__ = __FLASH_segment_start__;
-  .vectors __FLASH_segment_start__ : AT(__FLASH_segment_start__)
   {
-    __vectors_start__ = .;
+    KEEP(*(.vectors .vectors.*))
-    *(.vectors .vectors.*)
+  } > FLASH
-  }
-  __vectors_end__ = __vectors_start__ + SIZEOF(.vectors);
 
-  . = ASSERT(__vectors_end__ >= __FLASH_segment_start__ && __vectors_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .vectors is too large to fit in FLASH memory segment");
+	.text :
+	{
+		*(.text*)
 
-  __init_load_start__ = ALIGN(__vectors_end__ , 4);
+		KEEP(*(.init))
-  .init ALIGN(__vectors_end__ , 4) : AT(ALIGN(__vectors_end__ , 4))
+		KEEP(*(.fini))
-  {
-    __init_start__ = .;
-    *(.init .init.*)
-  }
-  __init_end__ = __init_start__ + SIZEOF(.init);
 
-  . = ASSERT(__init_end__ >= __FLASH_segment_start__ && __init_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .init is too large to fit in FLASH memory segment");
+		/* .ctors */
+		*crtbegin.o(.ctors)
+		*crtbegin?.o(.ctors)
+		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+    __ctors_start__ = ALIGN(4);
+		*(SORT(.ctors.*))
+		*(.ctors)
+    __ctors_end__ = ALIGN(4);
 
-  __text_load_start__ = ALIGN(__init_end__ , 4);
+		/* .dtors */
-  .text ALIGN(__init_end__ , 4) : AT(ALIGN(__init_end__ , 4))
+ 		*crtbegin.o(.dtors)
-  {
+ 		*crtbegin?.o(.dtors)
-    __text_start__ = .;
+ 		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
-    *(.text .text.* .glue_7t .glue_7 .gnu.linkonce.t.* .gcc_except_table)
+    __dtors_start__ = ALIGN(4);
-  }
+ 		*(SORT(.dtors.*))
-  __text_end__ = __text_start__ + SIZEOF(.text);
+ 		*(.dtors)
+    __dtors_end__ = ALIGN(4);
 
-  . = ASSERT(__text_end__ >= __FLASH_segment_start__ && __text_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .text is too large to fit in FLASH memory segment");
+		*(.rodata*)
 
-  __dtors_load_start__ = ALIGN(__text_end__ , 4);
+		KEEP(*(.eh_frame*))
-  .dtors ALIGN(__text_end__ , 4) : AT(ALIGN(__text_end__ , 4))
+	} > FLASH
-  {
-    __dtors_start__ = .;
-    KEEP (*(SORT(.dtors.*))) KEEP (*(.dtors))
-  }
-  __dtors_end__ = __dtors_start__ + SIZEOF(.dtors);
 
-  . = ASSERT(__dtors_end__ >= __FLASH_segment_start__ && __dtors_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .dtors is too large to fit in FLASH memory segment");
+	.ARM.extab : 
+	{
+		*(.ARM.extab* .gnu.linkonce.armextab.*)
+	} > FLASH
 
-  __ctors_load_start__ = ALIGN(__dtors_end__ , 4);
+	__exidx_start = .;
-  .ctors ALIGN(__dtors_end__ , 4) : AT(ALIGN(__dtors_end__ , 4))
+	.ARM.exidx :
-  {
+	{
-    __ctors_start__ = .;
+		*(.ARM.exidx* .gnu.linkonce.armexidx.*)
-    KEEP (*(SORT(.ctors.*))) KEEP (*(.ctors))
+	} > FLASH
-  }
+	__exidx_end = .;
-  __ctors_end__ = __ctors_start__ + SIZEOF(.ctors);
 
-  . = ASSERT(__ctors_end__ >= __FLASH_segment_start__ && __ctors_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .ctors is too large to fit in FLASH memory segment");
+	__data_load_start__ = ALIGN (4);
 
-  __rodata_load_start__ = ALIGN(__ctors_end__ , 4);
+	.data : AT (__data_load_start__) 
-  .rodata ALIGN(__ctors_end__ , 4) : AT(ALIGN(__ctors_end__ , 4))
+	{
-  {
+		__data_start__ = .;
-    __rodata_start__ = .;
-    *(.rodata .rodata.* .gnu.linkonce.r.*)
-  }
-  __rodata_end__ = __rodata_start__ + SIZEOF(.rodata);
 
-  . = ASSERT(__rodata_end__ >= __FLASH_segment_start__ && __rodata_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .rodata is too large to fit in FLASH memory segment");
+		*(vtable)
+		*(.data*)
 
-  __fast_load_start__ = ALIGN(__rodata_end__ , 4);
+		. = ALIGN(4);
-  .fast ALIGN(__RAM_segment_start__ , 4) : AT(ALIGN(__rodata_end__ , 4))
+		/* preinit data */
-  {
+		PROVIDE_HIDDEN (__preinit_array_start = .);
-    __fast_start__ = .;
+		KEEP(*(.preinit_array))
-    *(.fast .fast.*)
+		PROVIDE_HIDDEN (__preinit_array_end = .);
-  }
-  __fast_end__ = __fast_start__ + SIZEOF(.fast);
 
-  __fast_load_end__ = __fast_load_start__ + SIZEOF(.fast);
+		. = ALIGN(4);
+		/* init data */
+		PROVIDE_HIDDEN (__init_array_start = .);
+		KEEP(*(SORT(.init_array.*)))
+		KEEP(*(.init_array))
+		PROVIDE_HIDDEN (__init_array_end = .);
 
-  . = ASSERT((__fast_load_start__ + SIZEOF(.fast)) >= __FLASH_segment_start__ && (__fast_load_start__ + SIZEOF(.fast)) <= (__FLASH_segment_start__ + 0x00080000) , "error: .fast is too large to fit in FLASH memory segment");
+		. = ALIGN(4);
+		/* finit data */
+		PROVIDE_HIDDEN (__fini_array_start = .);
+		KEEP(*(SORT(.fini_array.*)))
+		KEEP(*(.fini_array))
+		PROVIDE_HIDDEN (__fini_array_end = .);
 
-  .fast_run ALIGN(__RAM_segment_start__ , 4) (NOLOAD) :
+		KEEP(*(.jcr*))
-  {
+		. = ALIGN(4);
-    __fast_run_start__ = .;
+		/* All data end */
-    . = MAX(__fast_run_start__ + SIZEOF(.fast), .);
+		
-  }
+    __data_end__ = .;
-  __fast_run_end__ = __fast_run_start__ + SIZEOF(.fast_run);
 
-  . = ASSERT(__fast_run_end__ >= __RAM_segment_start__ && __fast_run_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .fast_run is too large to fit in RAM memory segment");
+	} > RAM
 
-  __data_load_start__ = ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4);
+	.bss :
-  .data ALIGN(__fast_run_end__ , 4) : AT(ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4))
+	{
-  {
+		. = ALIGN(4);
-    __data_start__ = .;
+		__bss_start__ = .;
-    *(.data .data.* .gnu.linkonce.d.*)
+		*(.bss*)
-  }
+		*(COMMON)
-  __data_end__ = __data_start__ + SIZEOF(.data);
+		. = ALIGN(4);
+		__bss_end__ = .;
 
-  __data_load_end__ = __data_load_start__ + SIZEOF(.data);
+	} > RAM
-
+	
-  __FLASH_segment_used_end__ = ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4) + SIZEOF(.data);
+	.heap (COPY):
-
+	{
-  . = ASSERT((__data_load_start__ + SIZEOF(.data)) >= __FLASH_segment_start__ && (__data_load_start__ + SIZEOF(.data)) <= (__FLASH_segment_start__ + 0x00080000) , "error: .data is too large to fit in FLASH memory segment");
+    __heap_start__ = ALIGN(4);
-
-  .data_run ALIGN(__fast_run_end__ , 4) (NOLOAD) :
-  {
-    __data_run_start__ = .;
-    . = MAX(__data_run_start__ + SIZEOF(.data), .);
-  }
-  __data_run_end__ = __data_run_start__ + SIZEOF(.data_run);
-
-  . = ASSERT(__data_run_end__ >= __RAM_segment_start__ && __data_run_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .data_run is too large to fit in RAM memory segment");
-
-  __bss_load_start__ = ALIGN(__data_run_end__ , 4);
-  .bss ALIGN(__data_run_end__ , 4) (NOLOAD) : AT(ALIGN(__data_run_end__ , 4))
-  {
-    __bss_start__ = .;
-    *(.bss .bss.* .gnu.linkonce.b.*) *(COMMON)
-  }
-  __bss_end__ = __bss_start__ + SIZEOF(.bss);
-
-  . = ASSERT(__bss_end__ >= __RAM_segment_start__ && __bss_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .bss is too large to fit in RAM memory segment");
-
-  __non_init_load_start__ = ALIGN(__bss_end__ , 4);
-  .non_init ALIGN(__bss_end__ , 4) (NOLOAD) : AT(ALIGN(__bss_end__ , 4))
-  {
-    __non_init_start__ = .;
-    *(.non_init .non_init.*)
-  }
-  __non_init_end__ = __non_init_start__ + SIZEOF(.non_init);
-
-  . = ASSERT(__non_init_end__ >= __RAM_segment_start__ && __non_init_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .non_init is too large to fit in RAM memory segment");
-
-  __heap_load_start__ = ALIGN(__non_init_end__ , 4);
-  .heap ALIGN(__non_init_end__ , 4) (NOLOAD) : AT(ALIGN(__non_init_end__ , 4))
-  {
-    __heap_start__ = .;
     *(.heap)
-    . = ALIGN(MAX(__heap_start__ + __HEAPSIZE__ , .), 4);
+    . = ALIGN(. + __HEAPSIZE__, 4);
-  }
+    __heap_end__ = ALIGN(4);
-  __heap_end__ = __heap_start__ + SIZEOF(.heap);
+	} > RAM
 
-  . = ASSERT(__heap_end__ >= __RAM_segment_start__ && __heap_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .heap is too large to fit in RAM memory segment");
+  .stack ALIGN(4) (NOLOAD) :
-
-  __stack_load_start__ = ALIGN(__heap_end__ , 4);
-  .stack ALIGN(__heap_end__ , 4) (NOLOAD) : AT(ALIGN(__heap_end__ , 4))
   {
-    __stack_start__ = .;
+    __stack_start__ = ALIGN(4);
     *(.stack)
-    . = ALIGN(MAX(__stack_start__ + __STACKSIZE__ , .), 4);
+    . = ALIGN(. + __STACKSIZE__, 4);
-  }
+    __stack_end__ = ALIGN(4);
-  __stack_end__ = __stack_start__ + SIZEOF(.stack);
+  } > RAM
-
-  . = ASSERT(__stack_end__ >= __RAM_segment_start__ && __stack_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .stack is too large to fit in RAM memory segment");
-
-  __stack_process_load_start__ = ALIGN(__stack_end__ , 4);
-  .stack_process ALIGN(__stack_end__ , 4) (NOLOAD) : AT(ALIGN(__stack_end__ , 4))
-  {
-    __stack_process_start__ = .;
-    *(.stack_process)
-    . = ALIGN(MAX(__stack_process_start__ + __STACKSIZE_PROCESS__ , .), 4);
-  }
-  __stack_process_end__ = __stack_process_start__ + SIZEOF(.stack_process);
-
-  __RAM_segment_used_end__ = ALIGN(__stack_end__ , 4) + SIZEOF(.stack_process);
-
-  . = ASSERT(__stack_process_end__ >= __RAM_segment_start__ && __stack_process_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .stack_process is too large to fit in RAM memory segment");
 
+  __RAM_segment_used_end__ = .;
 }
-

ports/cortex_m4/gnu/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                         Cortex-M4/GNU     */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -59,6 +59,9 @@
 /*  04-25-2022      Scott Larson            Modified comments and added   */
 /*                                            volatile to registers,      */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Modified comments and         */
+/*                                            described BASEPRI usage,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -146,6 +149,12 @@ typedef unsigned short                          USHORT;
 #define TX_TIMER_THREAD_PRIORITY                0           /* Default timer thread priority    */
 #endif
 
+/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts.
+If using BASEPRI is desired, define the following two symbols for both c and assembly files:
+TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK.
+TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask.
+Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run.
+*/
 
 /* Define various constants for the ThreadX Cortex-M port.  */
 
@@ -707,7 +716,7 @@ void    tx_thread_fpu_disable(void);
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] =
-                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M4/GNU Version 6.1.11 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M4/GNU Version 6.1.12 *";
 #else
 #ifdef TX_MISRA_ENABLE
 extern  CHAR                    _tx_version_id[100];

ports/cortex_m4/gnu/src/tx_misra.S

@@ -103,6 +103,14 @@
         .global _tx_misra_vfp_touch
 #endif
 
+        .global _tx_misra_event_flags_group_not_used
+        .global _tx_misra_event_flags_set_notify_not_used
+        .global _tx_misra_queue_not_used
+        .global _tx_misra_queue_send_notify_not_used
+        .global _tx_misra_semaphore_not_used
+        .global _tx_misra_semaphore_put_notify_not_used
+        .global _tx_misra_thread_entry_exit_notify_not_used
+        .global _tx_misra_thread_not_used
 
 /**************************************************************************/
 /**************************************************************************/
@@ -172,17 +180,93 @@ _tx_misra_uchar_pointer_dif:
         BX       LR               // return
 
 
-/**************************************************************************/
+/************************************************************************************************************************************/
-/**************************************************************************/
+/************************************************************************************************************************************/
-/**                                                                       */
+/**                                                                                                                                 */
-/**  ULONG  _tx_misra_pointer_to_ulong_convert(VOID *ptr);                */
+/**  This single function serves all of the below prototypes.                                                                       */
-/**                                                                       */
+/**                                                                                                                                 */
-/**************************************************************************/
+/**  ULONG  _tx_misra_pointer_to_ulong_convert(VOID *ptr);                                                                          */
-/**************************************************************************/
+/**  VOID  *_tx_misra_ulong_to_pointer_convert(ULONG input);                                                                        */
-
+/**  UCHAR  **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr);                                                  */
+/**  UCHAR  **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer);                                                    */
+/**  UCHAR  *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool);                                                    */
+/**  TX_BLOCK_POOL  *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer);                                                   */
+/**  UCHAR  *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer);                                                                */
+/**  TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer);                                                  */
+/**  UCHAR  **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer);                                                      */
+/**  TX_BYTE_POOL  *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer);                                                     */
+/**  UCHAR  *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool);                                                      */
+/**  ALIGN_TYPE  *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer);                                                    */
+/**  TX_BYTE_POOL  **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer);                                         */
+/**  TX_EVENT_FLAGS_GROUP  *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer);                                           */
+/**  ULONG  *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer);                                                                */
+/**  TX_MUTEX  *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer);                                                             */
+/**  TX_QUEUE  *_tx_misra_void_to_queue_pointer_convert(VOID *pointer);                                                             */
+/**  TX_SEMAPHORE  *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer);                                                     */
+/**  VOID  *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer);                                                                */
+/**  TX_THREAD  *_tx_misra_ulong_to_thread_pointer_convert(ULONG value);                                                            */
+/**  VOID  *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer);                                          */
+/**  CHAR  *_tx_misra_const_char_to_char_pointer_convert(const char *pointer);                                                      */
+/**  TX_THREAD  *_tx_misra_void_to_thread_pointer_convert(void *pointer);                                                           */
+/**  UCHAR  *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer);                                             */
+/**  TX_TRACE_OBJECT_ENTRY  *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer);                                             */
+/**  TX_TRACE_HEADER  *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer);                                                   */
+/**  TX_TRACE_BUFFER_ENTRY  *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer);                                              */
+/**  UCHAR  *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer);                                              */
+/**  UCHAR  *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer);                                                                */
+/**  VOID    _tx_misra_event_flags_group_not_used(TX_EVENT_FLAGS_GROUP *group_ptr);                                                 */
+/**  VOID    _tx_misra_event_flags_set_notify_not_used(VOID (*events_set_notify)(TX_EVENT_FLAGS_GROUP *notify_group_ptr));          */
+/**  VOID    _tx_misra_queue_not_used(TX_QUEUE *queue_ptr);                                                                         */
+/**  VOID    _tx_misra_queue_send_notify_not_used(VOID (*queue_send_notify)(TX_QUEUE *notify_queue_ptr));                           */
+/**  VOID    _tx_misra_semaphore_not_used(TX_SEMAPHORE *semaphore_ptr);                                                             */
+/**  VOID    _tx_misra_semaphore_put_notify_not_used(VOID (*semaphore_put_notify)(TX_SEMAPHORE *notify_semaphore_ptr));             */
+/**  VOID    _tx_misra_thread_not_used(TX_THREAD *thread_ptr);                                                                      */
+/**  VOID    _tx_misra_thread_entry_exit_notify_not_used(VOID (*thread_entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT id));  */
+/**                                                                                                                                 */
+/************************************************************************************************************************************/
+/************************************************************************************************************************************/
         .text
         .thumb_func
 _tx_misra_pointer_to_ulong_convert:
+_tx_misra_ulong_to_pointer_convert:
+_tx_misra_indirect_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_indirect_uchar_pointer_convert:
+_tx_misra_block_pool_to_uchar_pointer_convert:
+_tx_misra_void_to_block_pool_pointer_convert:
+_tx_misra_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_block_pool_pointer_convert:
+_tx_misra_void_to_indirect_uchar_pointer_convert:
+_tx_misra_void_to_byte_pool_pointer_convert:
+_tx_misra_byte_pool_to_uchar_pointer_convert:
+_tx_misra_uchar_to_align_type_pointer_convert:
+_tx_misra_uchar_to_indirect_byte_pool_pointer_convert:
+_tx_misra_void_to_event_flags_pointer_convert:
+_tx_misra_void_to_ulong_pointer_convert:
+_tx_misra_void_to_mutex_pointer_convert:
+_tx_misra_void_to_queue_pointer_convert:
+_tx_misra_void_to_semaphore_pointer_convert:
+_tx_misra_uchar_to_void_pointer_convert:
+_tx_misra_ulong_to_thread_pointer_convert:
+_tx_misra_timer_indirect_to_void_pointer_convert:
+_tx_misra_const_char_to_char_pointer_convert:
+_tx_misra_void_to_thread_pointer_convert:
+#ifdef TX_ENABLE_EVENT_TRACE
+_tx_misra_object_to_uchar_pointer_convert:
+_tx_misra_uchar_to_object_pointer_convert:
+_tx_misra_uchar_to_header_pointer_convert:
+_tx_misra_uchar_to_entry_pointer_convert:
+_tx_misra_entry_to_uchar_pointer_convert:
+#endif
+_tx_misra_char_to_uchar_pointer_convert:
+_tx_misra_event_flags_group_not_used:
+_tx_misra_event_flags_set_notify_not_used:
+_tx_misra_queue_not_used:
+_tx_misra_queue_send_notify_not_used:
+_tx_misra_semaphore_not_used:
+_tx_misra_semaphore_put_notify_not_used:
+_tx_misra_thread_entry_exit_notify_not_used:
+_tx_misra_thread_not_used:
+
         BX       LR               // return
 
 
@@ -234,20 +318,6 @@ _tx_misra_ulong_pointer_dif:
         BX       LR               // return
 
 
-/**************************************************************************/
-/**************************************************************************/
-/**                                                                       */
-/**  VOID  *_tx_misra_ulong_to_pointer_convert(ULONG input);              */
-/**                                                                       */
-/**************************************************************************/
-/**************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_ulong_to_pointer_convert:
-        BX       LR               // return
-
-
 /**************************************************************************/
 /**************************************************************************/
 /**                                                                       */
@@ -332,12 +402,9 @@ _tx_misra_timer_pointer_add:
         .text
         .thumb_func
 _tx_misra_user_timer_pointer_get:
-        ADDS     R2,R0,#+8
+        SUBS    R0,#8
-        SUBS     R2,R2,R0
+        STR     R0,[R1, #+0]
-        RSBS     R2,R2,#+0
+        BX      LR               // return
-        ADD      R0,R0,R2
-        STR      R0,[R1, #+0]
-        BX       LR               // return
 
 
 /**************************************************************************/
@@ -553,202 +620,6 @@ _tx_misra_always_true:
         BX       LR               // return
 
 
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  UCHAR  **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr);        */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_indirect_void_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  UCHAR  **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer);       */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_indirect_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/***********************************************************************************/
-/***********************************************************************************/
-/**                                                                                */
-/**  UCHAR  *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool);   */
-/**                                                                                */
-/***********************************************************************************/
-/***********************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_block_pool_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  TX_BLOCK_POOL  *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer);         */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_block_pool_pointer_convert:
-        BX       LR               // return
-
-
-/*****************************************************************************/
-/*****************************************************************************/
-/**                                                                          */
-/**  UCHAR  *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer);         */
-/**                                                                          */
-/*****************************************************************************/
-/*****************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/************************************************************************************/
-/************************************************************************************/
-/**                                                                                 */
-/**  TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer);  */
-/**                                                                                 */
-/************************************************************************************/
-/************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_block_pool_pointer_convert:
-        BX       LR               // return
-
-
-/**************************************************************************************/
-/**************************************************************************************/
-/**                                                                                   */
-/**  UCHAR  **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer);        */
-/**                                                                                   */
-/**************************************************************************************/
-/**************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_indirect_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/*****************************************************************************************/
-/*****************************************************************************************/
-/**                                                                                      */
-/**  TX_BYTE_POOL  *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer);          */
-/**                                                                                      */
-/*****************************************************************************************/
-/*****************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_byte_pool_pointer_convert:
-        BX       LR               // return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  UCHAR  *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool);         */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_byte_pool_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/*****************************************************************************************/
-/*****************************************************************************************/
-/**                                                                                      */
-/**  ALIGN_TYPE  *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer);         */
-/**                                                                                      */
-/*****************************************************************************************/
-/*****************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_align_type_pointer_convert:
-        BX       LR               // return
-
-
-/****************************************************************************************************/
-/****************************************************************************************************/
-/**                                                                                                 */
-/**  TX_BYTE_POOL  **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer);         */
-/**                                                                                                 */
-/****************************************************************************************************/
-/****************************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_indirect_byte_pool_pointer_convert:
-        BX       LR               // return
-
-
-/**************************************************************************************************/
-/**************************************************************************************************/
-/**                                                                                               */
-/**  TX_EVENT_FLAGS_GROUP  *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer);         */
-/**                                                                                               */
-/**************************************************************************************************/
-/**************************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_event_flags_pointer_convert:
-        BX       LR               // return
-
-
-/*****************************************************************************/
-/*****************************************************************************/
-/**                                                                          */
-/**  ULONG  *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer);         */
-/**                                                                          */
-/*****************************************************************************/
-/*****************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_ulong_pointer_convert:
-        BX       LR               // return
-
-
-/********************************************************************************/
-/********************************************************************************/
-/**                                                                             */
-/**  TX_MUTEX  *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer);         */
-/**                                                                             */
-/********************************************************************************/
-/********************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_mutex_pointer_convert:
-        BX       LR               // return
-
-
 /**************************************************************************/
 /**************************************************************************/
 /**                                                                       */
@@ -764,191 +635,6 @@ _tx_misra_status_get:
         BX       LR               // return
 
 
-/********************************************************************************/
-/********************************************************************************/
-/**                                                                             */
-/**  TX_QUEUE  *_tx_misra_void_to_queue_pointer_convert(VOID *pointer);         */
-/**                                                                             */
-/********************************************************************************/
-/********************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_queue_pointer_convert:
-        BX       LR               // return
-
-
-/****************************************************************************************/
-/****************************************************************************************/
-/**                                                                                     */
-/**  TX_SEMAPHORE  *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer);         */
-/**                                                                                     */
-/****************************************************************************************/
-/****************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_semaphore_pointer_convert:
-        BX       LR               // return
-
-
-/**************************************************************************/
-/**************************************************************************/
-/**                                                                       */
-/**  VOID  *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer);      */
-/**                                                                       */
-/**************************************************************************/
-/**************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_void_pointer_convert:
-        BX       LR               // return
-
-
-/*********************************************************************************/
-/*********************************************************************************/
-/**                                                                              */
-/**  TX_THREAD  *_tx_misra_ulong_to_thread_pointer_convert(ULONG value);         */
-/**                                                                              */
-/*********************************************************************************/
-/*********************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_ulong_to_thread_pointer_convert:
-        BX       LR               // return
-
-
-/***************************************************************************************************/
-/***************************************************************************************************/
-/**                                                                                                */
-/**  VOID  *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer);         */
-/**                                                                                                */
-/***************************************************************************************************/
-/***************************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_timer_indirect_to_void_pointer_convert:
-        BX       LR               // return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  CHAR  *_tx_misra_const_char_to_char_pointer_convert(const char *pointer);         */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_const_char_to_char_pointer_convert:
-        BX       LR               // return
-
-
-/**********************************************************************************/
-/**********************************************************************************/
-/**                                                                               */
-/**  TX_THREAD  *_tx_misra_void_to_thread_pointer_convert(void *pointer);         */
-/**                                                                               */
-/**********************************************************************************/
-/**********************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_thread_pointer_convert:
-        BX       LR               // return
-
-
-#ifdef TX_ENABLE_EVENT_TRACE
-
-/************************************************************************************************/
-/************************************************************************************************/
-/**                                                                                             */
-/**  UCHAR  *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer);         */
-/**                                                                                             */
-/************************************************************************************************/
-/************************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_object_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/************************************************************************************************/
-/************************************************************************************************/
-/**                                                                                             */
-/**  TX_TRACE_OBJECT_ENTRY  *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer);         */
-/**                                                                                             */
-/************************************************************************************************/
-/************************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_object_pointer_convert:
-        BX       LR               // return
-
-
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  TX_TRACE_HEADER  *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer);         */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_header_pointer_convert:
-        BX       LR               // return
-
-
-/***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
-/**  TX_TRACE_BUFFER_ENTRY  *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer);         */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_entry_pointer_convert:
-        BX       LR               // return
-
-
-/***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
-/**  UCHAR  *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer);         */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_entry_to_uchar_pointer_convert:
-        BX       LR               // return
-#endif
-
-
-/***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
-/**  UCHAR  *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer);                           */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_char_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
 /***********************************************************************************************/
 /***********************************************************************************************/
 /**                                                                                            */

ports/cortex_m4/iar/CMakeLists.txt

@@ -0,0 +1,21 @@
+
+target_sources(${PROJECT_NAME}
+    PRIVATE
+    # {{BEGIN_TARGET_SOURCES}}
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_iar.c
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_restore.S
+	${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_save.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_control.S
+	${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_disable.S
+	${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_restore.S    
+	${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_schedule.S
+	${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_stack_build.S
+	${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_system_return.S
+	${CMAKE_CURRENT_LIST_DIR}/src/tx_timer_interrupt.S
+    # {{END_TARGET_SOURCES}}
+)
+
+target_include_directories(${PROJECT_NAME}
+    PUBLIC
+    ${CMAKE_CURRENT_LIST_DIR}/inc
+)

ports/cortex_m4/iar/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                         Cortex-M4/IAR     */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -59,6 +59,9 @@
 /*  04-25-2022      Scott Larson            Modified comments and added   */
 /*                                            volatile to registers,      */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Modified comments and         */
+/*                                            described BASEPRI usage,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -146,6 +149,12 @@ typedef unsigned short                          USHORT;
 #define TX_TIMER_THREAD_PRIORITY                0           /* Default timer thread priority    */
 #endif
 
+/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts.
+If using BASEPRI is desired, define the following two symbols for both c and assembly files:
+TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK.
+TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask.
+Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run.
+*/
 
 /* Define various constants for the ThreadX Cortex-M port.  */
 
@@ -707,7 +716,7 @@ void    tx_thread_fpu_disable(void);
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] =
-                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M4/IAR Version 6.1.11 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M4/IAR Version 6.1.12 *";
 #else
 #ifdef TX_MISRA_ENABLE
 extern  CHAR                    _tx_version_id[100];

ports/cortex_m4/iar/src/tx_misra.s

@@ -102,6 +102,16 @@
         PUBLIC _tx_misra_fpccr_get
         PUBLIC _tx_misra_vfp_touch
 #endif
+
+        PUBLIC _tx_misra_event_flags_group_not_used
+        PUBLIC _tx_misra_event_flags_set_notify_not_used
+        PUBLIC _tx_misra_queue_not_used
+        PUBLIC _tx_misra_queue_send_notify_not_used
+        PUBLIC _tx_misra_semaphore_not_used
+        PUBLIC _tx_misra_semaphore_put_notify_not_used
+        PUBLIC _tx_misra_thread_entry_exit_notify_not_used
+        PUBLIC _tx_misra_thread_not_used
+        
         PUBLIC _tx_version_id
 
 
@@ -115,7 +125,7 @@ _tx_version_id:
         DC8 45H, 78H, 70H, 72H, 65H, 73H, 73H, 20H
         DC8 4CH, 6FH, 67H, 69H, 63H, 20H, 49H, 6EH
         DC8 63H, 2EH, 20H, 2AH, 20H, 54H, 68H, 72H
-        DC8 65H, 61H, 64H, 58H, 20H, 35H, 2EH, 38H
+        DC8 65H, 61H, 64H, 58H, 20H, 36H, 2EH, 31H
         DC8 20H, 4DH, 49H, 53H, 52H, 41H, 20H, 43H
         DC8 20H, 43H, 6FH, 6DH, 70H, 6CH, 69H, 61H
         DC8 6EH, 74H, 20H, 2AH, 0
@@ -139,7 +149,7 @@ _tx_misra_memset:
         MOVS     R1,R0
         MOVS     R0,R4
         BL       __aeabi_memset
-        POP      {R4,PC}          ;; return
+        POP      {R4,PC}          // return
 
 /**************************************************************************/
 /**************************************************************************/
@@ -153,7 +163,7 @@ _tx_misra_memset:
         THUMB
 _tx_misra_uchar_pointer_add:
         ADD      R0,R0,R1
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -169,7 +179,7 @@ _tx_misra_uchar_pointer_add:
 _tx_misra_uchar_pointer_sub:
         RSBS     R1,R1,#+0
         ADD      R0,R0,R1
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -184,21 +194,97 @@ _tx_misra_uchar_pointer_sub:
         THUMB
 _tx_misra_uchar_pointer_dif:
         SUBS     R0,R0,R1
-        BX       LR               ;; return
+        BX       LR               // return
 
 
-/**************************************************************************/
+/************************************************************************************************************************************/
-/**************************************************************************/
+/************************************************************************************************************************************/
-/**                                                                       */
+/**                                                                                                                                 */
-/**  ULONG  _tx_misra_pointer_to_ulong_convert(VOID *ptr);                */
+/**  This single function serves all of the below prototypes.                                                                       */
-/**                                                                       */
+/**                                                                                                                                 */
-/**************************************************************************/
+/**  ULONG  _tx_misra_pointer_to_ulong_convert(VOID *ptr);                                                                          */
-/**************************************************************************/
+/**  VOID  *_tx_misra_ulong_to_pointer_convert(ULONG input);                                                                        */
-
+/**  UCHAR  **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr);                                                  */
+/**  UCHAR  **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer);                                                    */
+/**  UCHAR  *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool);                                                    */
+/**  TX_BLOCK_POOL  *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer);                                                   */
+/**  UCHAR  *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer);                                                                */
+/**  TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer);                                                  */
+/**  UCHAR  **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer);                                                      */
+/**  TX_BYTE_POOL  *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer);                                                     */
+/**  UCHAR  *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool);                                                      */
+/**  ALIGN_TYPE  *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer);                                                    */
+/**  TX_BYTE_POOL  **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer);                                         */
+/**  TX_EVENT_FLAGS_GROUP  *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer);                                           */
+/**  ULONG  *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer);                                                                */
+/**  TX_MUTEX  *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer);                                                             */
+/**  TX_QUEUE  *_tx_misra_void_to_queue_pointer_convert(VOID *pointer);                                                             */
+/**  TX_SEMAPHORE  *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer);                                                     */
+/**  VOID  *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer);                                                                */
+/**  TX_THREAD  *_tx_misra_ulong_to_thread_pointer_convert(ULONG value);                                                            */
+/**  VOID  *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer);                                          */
+/**  CHAR  *_tx_misra_const_char_to_char_pointer_convert(const char *pointer);                                                      */
+/**  TX_THREAD  *_tx_misra_void_to_thread_pointer_convert(void *pointer);                                                           */
+/**  UCHAR  *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer);                                             */
+/**  TX_TRACE_OBJECT_ENTRY  *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer);                                             */
+/**  TX_TRACE_HEADER  *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer);                                                   */
+/**  TX_TRACE_BUFFER_ENTRY  *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer);                                              */
+/**  UCHAR  *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer);                                              */
+/**  UCHAR  *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer);                                                                */
+/**  VOID    _tx_misra_event_flags_group_not_used(TX_EVENT_FLAGS_GROUP *group_ptr);                                                 */
+/**  VOID    _tx_misra_event_flags_set_notify_not_used(VOID (*events_set_notify)(TX_EVENT_FLAGS_GROUP *notify_group_ptr));          */
+/**  VOID    _tx_misra_queue_not_used(TX_QUEUE *queue_ptr);                                                                         */
+/**  VOID    _tx_misra_queue_send_notify_not_used(VOID (*queue_send_notify)(TX_QUEUE *notify_queue_ptr));                           */
+/**  VOID    _tx_misra_semaphore_not_used(TX_SEMAPHORE *semaphore_ptr);                                                             */
+/**  VOID    _tx_misra_semaphore_put_notify_not_used(VOID (*semaphore_put_notify)(TX_SEMAPHORE *notify_semaphore_ptr));             */
+/**  VOID    _tx_misra_thread_not_used(TX_THREAD *thread_ptr);                                                                      */
+/**  VOID    _tx_misra_thread_entry_exit_notify_not_used(VOID (*thread_entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT id));  */
+/**                                                                                                                                 */
+/************************************************************************************************************************************/
+/************************************************************************************************************************************/
         SECTION `.text`:CODE:NOROOT(1)
         THUMB
 _tx_misra_pointer_to_ulong_convert:
-        BX       LR               ;; return
+_tx_misra_ulong_to_pointer_convert:
+_tx_misra_indirect_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_indirect_uchar_pointer_convert:
+_tx_misra_block_pool_to_uchar_pointer_convert:
+_tx_misra_void_to_block_pool_pointer_convert:
+_tx_misra_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_block_pool_pointer_convert:
+_tx_misra_void_to_indirect_uchar_pointer_convert:
+_tx_misra_void_to_byte_pool_pointer_convert:
+_tx_misra_byte_pool_to_uchar_pointer_convert:
+_tx_misra_uchar_to_align_type_pointer_convert:
+_tx_misra_uchar_to_indirect_byte_pool_pointer_convert:
+_tx_misra_void_to_event_flags_pointer_convert:
+_tx_misra_void_to_ulong_pointer_convert:
+_tx_misra_void_to_mutex_pointer_convert:
+_tx_misra_void_to_queue_pointer_convert:
+_tx_misra_void_to_semaphore_pointer_convert:
+_tx_misra_uchar_to_void_pointer_convert:
+_tx_misra_ulong_to_thread_pointer_convert:
+_tx_misra_timer_indirect_to_void_pointer_convert:
+_tx_misra_const_char_to_char_pointer_convert:
+_tx_misra_void_to_thread_pointer_convert:
+#ifdef TX_ENABLE_EVENT_TRACE
+_tx_misra_object_to_uchar_pointer_convert:
+_tx_misra_uchar_to_object_pointer_convert:
+_tx_misra_uchar_to_header_pointer_convert:
+_tx_misra_uchar_to_entry_pointer_convert:
+_tx_misra_entry_to_uchar_pointer_convert:
+#endif
+_tx_misra_char_to_uchar_pointer_convert:
+_tx_misra_event_flags_group_not_used:
+_tx_misra_event_flags_set_notify_not_used:
+_tx_misra_queue_not_used:
+_tx_misra_queue_send_notify_not_used:
+_tx_misra_semaphore_not_used:
+_tx_misra_semaphore_put_notify_not_used:
+_tx_misra_thread_entry_exit_notify_not_used:
+_tx_misra_thread_not_used:
+
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -213,7 +299,7 @@ _tx_misra_pointer_to_ulong_convert:
         THUMB
 _tx_misra_ulong_pointer_add:
         ADD      R0,R0,R1, LSL #+2
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -230,7 +316,7 @@ _tx_misra_ulong_pointer_sub:
         MVNS     R2,#+3
         MULS     R1,R2,R1
         ADD      R0,R0,R1
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -246,21 +332,7 @@ _tx_misra_ulong_pointer_sub:
 _tx_misra_ulong_pointer_dif:
         SUBS     R0,R0,R1
         ASRS     R0,R0,#+2
-        BX       LR               ;; return
+        BX       LR               // return
-
-
-/**************************************************************************/
-/**************************************************************************/
-/**                                                                       */
-/**  VOID  *_tx_misra_ulong_to_pointer_convert(ULONG input);              */
-/**                                                                       */
-/**************************************************************************/
-/**************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_ulong_to_pointer_convert:
-        BX       LR               ;; return
 
 
 /**************************************************************************/
@@ -299,7 +371,7 @@ _tx_misra_message_copy:
         STR      R3,[R0, #+0]
         STR      R4,[R1, #+0]
         POP      {R4,R5}
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -316,7 +388,7 @@ _tx_misra_message_copy:
 _tx_misra_timer_pointer_dif:
         SUBS     R0,R0,R1
         ASRS     R0,R0,#+2
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -332,7 +404,7 @@ _tx_misra_timer_pointer_dif:
         THUMB
 _tx_misra_timer_pointer_add:
         ADD      R0,R0,R1, LSL #+2
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -347,12 +419,9 @@ _tx_misra_timer_pointer_add:
         SECTION `.text`:CODE:NOROOT(1)
         THUMB
 _tx_misra_user_timer_pointer_get:
-        ADDS     R2,R0,#+8
+        SUBS    R0,#8
-        SUBS     R2,R2,R0
+        STR     R0,[R1, #+0]
-        RSBS     R2,R2,#+0
+        BX      LR               // return
-        ADD      R0,R0,R2
-        STR      R0,[R1, #+0]
-        BX       LR               ;; return
 
 
 /**************************************************************************/
@@ -374,7 +443,7 @@ _tx_misra_thread_stack_check:
         CMP      R4,#+0
         BEQ.N    ??_tx_misra_thread_stack_check_0
         LDR      R1,[R4, #+0]
-        LDR.N    R2,??DataTable2  ;; 0x54485244
+        LDR.N    R2,??DataTable2  // 0x54485244
         CMP      R1,R2
         BNE.N    ??_tx_misra_thread_stack_check_0
         LDR      R1,[R4, #+8]
@@ -412,7 +481,7 @@ _tx_misra_thread_stack_check:
         BL       _tx_thread_interrupt_disable
 ??_tx_misra_thread_stack_check_0:
         BL       _tx_thread_interrupt_restore
-        POP      {R0,R4,R5,PC}    ;; return
+        POP      {R0,R4,R5,PC}    // return
 
 #ifdef TX_ENABLE_EVENT_TRACE
 
@@ -500,7 +569,7 @@ _tx_misra_trace_event_insert:
         LDR      R0,[R0, #+0]
         STR      R4,[R0, #+32]
 ??_tx_misra_trace_event_insert_0:
-        POP      {R0,R4-R7,PC}    ;; return
+        POP      {R0,R4-R7,PC}    // return
 
 
         SECTION `.text`:CODE:NOROOT(2)
@@ -552,7 +621,7 @@ _tx_misra_trace_event_insert:
         THUMB
 _tx_misra_time_stamp_get:
         MOVS     R0,#+0
-        BX       LR               ;; return
+        BX       LR               // return
 
 #endif
 
@@ -587,203 +656,7 @@ _tx_misra_time_stamp_get:
         THUMB
 _tx_misra_always_true:
         MOVS     R0,#+1
-        BX       LR               ;; return
+        BX       LR               // return
-
-
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  UCHAR  **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr);        */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_indirect_void_to_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  UCHAR  **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer);       */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_indirect_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/***********************************************************************************/
-/***********************************************************************************/
-/**                                                                                */
-/**  UCHAR  *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool);   */
-/**                                                                                */
-/***********************************************************************************/
-/***********************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_block_pool_to_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  TX_BLOCK_POOL  *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer);         */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_block_pool_pointer_convert:
-        BX       LR               ;; return
-
-
-/*****************************************************************************/
-/*****************************************************************************/
-/**                                                                          */
-/**  UCHAR  *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer);         */
-/**                                                                          */
-/*****************************************************************************/
-/*****************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/************************************************************************************/
-/************************************************************************************/
-/**                                                                                 */
-/**  TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer);  */
-/**                                                                                 */
-/************************************************************************************/
-/************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_block_pool_pointer_convert:
-        BX       LR               ;; return
-
-
-/**************************************************************************************/
-/**************************************************************************************/
-/**                                                                                   */
-/**  UCHAR  **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer);        */
-/**                                                                                   */
-/**************************************************************************************/
-/**************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_indirect_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/*****************************************************************************************/
-/*****************************************************************************************/
-/**                                                                                      */
-/**  TX_BYTE_POOL  *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer);          */
-/**                                                                                      */
-/*****************************************************************************************/
-/*****************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_byte_pool_pointer_convert:
-        BX       LR               ;; return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  UCHAR  *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool);         */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_byte_pool_to_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/*****************************************************************************************/
-/*****************************************************************************************/
-/**                                                                                      */
-/**  ALIGN_TYPE  *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer);         */
-/**                                                                                      */
-/*****************************************************************************************/
-/*****************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_align_type_pointer_convert:
-        BX       LR               ;; return
-
-
-/****************************************************************************************************/
-/****************************************************************************************************/
-/**                                                                                                 */
-/**  TX_BYTE_POOL  **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer);         */
-/**                                                                                                 */
-/****************************************************************************************************/
-/****************************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_indirect_byte_pool_pointer_convert:
-        BX       LR               ;; return
-
-
-/**************************************************************************************************/
-/**************************************************************************************************/
-/**                                                                                               */
-/**  TX_EVENT_FLAGS_GROUP  *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer);         */
-/**                                                                                               */
-/**************************************************************************************************/
-/**************************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_event_flags_pointer_convert:
-        BX       LR               ;; return
-
-
-/*****************************************************************************/
-/*****************************************************************************/
-/**                                                                          */
-/**  ULONG  *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer);         */
-/**                                                                          */
-/*****************************************************************************/
-/*****************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_ulong_pointer_convert:
-        BX       LR               ;; return
-
-
-/********************************************************************************/
-/********************************************************************************/
-/**                                                                             */
-/**  TX_MUTEX  *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer);         */
-/**                                                                             */
-/********************************************************************************/
-/********************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_mutex_pointer_convert:
-        BX       LR               ;; return
 
 
 /**************************************************************************/
@@ -798,192 +671,7 @@ _tx_misra_void_to_mutex_pointer_convert:
         THUMB
 _tx_misra_status_get:
         MOVS     R0,#+0
-        BX       LR               ;; return
+        BX       LR               // return
-
-
-/********************************************************************************/
-/********************************************************************************/
-/**                                                                             */
-/**  TX_QUEUE  *_tx_misra_void_to_queue_pointer_convert(VOID *pointer);         */
-/**                                                                             */
-/********************************************************************************/
-/********************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_queue_pointer_convert:
-        BX       LR               ;; return
-
-
-/****************************************************************************************/
-/****************************************************************************************/
-/**                                                                                     */
-/**  TX_SEMAPHORE  *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer);         */
-/**                                                                                     */
-/****************************************************************************************/
-/****************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_semaphore_pointer_convert:
-        BX       LR               ;; return
-
-
-/**************************************************************************/
-/**************************************************************************/
-/**                                                                       */
-/**  VOID  *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer);      */
-/**                                                                       */
-/**************************************************************************/
-/**************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_void_pointer_convert:
-        BX       LR               ;; return
-
-
-/*********************************************************************************/
-/*********************************************************************************/
-/**                                                                              */
-/**  TX_THREAD  *_tx_misra_ulong_to_thread_pointer_convert(ULONG value);         */
-/**                                                                              */
-/*********************************************************************************/
-/*********************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_ulong_to_thread_pointer_convert:
-        BX       LR               ;; return
-
-
-/***************************************************************************************************/
-/***************************************************************************************************/
-/**                                                                                                */
-/**  VOID  *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer);         */
-/**                                                                                                */
-/***************************************************************************************************/
-/***************************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_timer_indirect_to_void_pointer_convert:
-        BX       LR               ;; return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  CHAR  *_tx_misra_const_char_to_char_pointer_convert(const char *pointer);         */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_const_char_to_char_pointer_convert:
-        BX       LR               ;; return
-
-
-/**********************************************************************************/
-/**********************************************************************************/
-/**                                                                               */
-/**  TX_THREAD  *_tx_misra_void_to_thread_pointer_convert(void *pointer);         */
-/**                                                                               */
-/**********************************************************************************/
-/**********************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_thread_pointer_convert:
-        BX       LR               ;; return
-
-
-#ifdef TX_ENABLE_EVENT_TRACE
-
-/************************************************************************************************/
-/************************************************************************************************/
-/**                                                                                             */
-/**  UCHAR  *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer);         */
-/**                                                                                             */
-/************************************************************************************************/
-/************************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_object_to_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/************************************************************************************************/
-/************************************************************************************************/
-/**                                                                                             */
-/**  TX_TRACE_OBJECT_ENTRY  *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer);         */
-/**                                                                                             */
-/************************************************************************************************/
-/************************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_object_pointer_convert:
-        BX       LR               ;; return
-
-
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  TX_TRACE_HEADER  *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer);         */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_header_pointer_convert:
-        BX       LR               ;; return
-
-
-/***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
-/**  TX_TRACE_BUFFER_ENTRY  *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer);         */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_entry_pointer_convert:
-        BX       LR               ;; return
-
-
-/***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
-/**  UCHAR  *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer);         */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_entry_to_uchar_pointer_convert:
-        BX       LR               ;; return
-#endif
-
-
-/***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
-/**  UCHAR  *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer);                           */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_char_to_uchar_pointer_convert:
-        BX       LR               ;; return
 
 
 /***********************************************************************************************/
@@ -998,7 +686,7 @@ _tx_misra_char_to_uchar_pointer_convert:
         THUMB
 _tx_misra_ipsr_get:
         MRS      R0, IPSR
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /***********************************************************************************************/
@@ -1013,7 +701,7 @@ _tx_misra_ipsr_get:
         THUMB
 _tx_misra_control_get:
         MRS      R0, CONTROL
-        BX       LR               ;; return
+        BX       LR               // return
 
         
 /***********************************************************************************************/
@@ -1028,7 +716,7 @@ _tx_misra_control_get:
         THUMB
 _tx_misra_control_set:
         MSR      CONTROL, R0
-        BX       LR               ;; return
+        BX       LR               // return
 
         
 #ifdef __ARMVFP__
@@ -1044,9 +732,9 @@ _tx_misra_control_set:
         SECTION `.text`:CODE:NOROOT(2)
         THUMB
 _tx_misra_fpccr_get:
-        LDR      r0, =0xE000EF34  ; Build FPCCR address
+        LDR      r0, =0xE000EF34  // Build FPCCR address
-        LDR      r0, [r0]         ; Load FPCCR value
+        LDR      r0, [r0]         // Load FPCCR value
-        BX       LR               ;; return
+        BX       LR               // return
         
         
 /***********************************************************************************************/
@@ -1061,7 +749,7 @@ _tx_misra_fpccr_get:
         THUMB
 _tx_misra_vfp_touch:
         vmov.f32 s0, s0
-        BX       LR               ;; return
+        BX       LR               // return
         
 #endif
         

ports/cortex_m4/keil/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                         Cortex-M4/Keil    */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -59,6 +59,9 @@
 /*  04-25-2022      Scott Larson            Modified comments and added   */
 /*                                            volatile to registers,      */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Modified comments and         */
+/*                                            described BASEPRI usage,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -146,6 +149,12 @@ typedef unsigned short                          USHORT;
 #define TX_TIMER_THREAD_PRIORITY                0           /* Default timer thread priority    */
 #endif
 
+/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts.
+If using BASEPRI is desired, define the following two symbols for both c and assembly files:
+TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK.
+TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask.
+Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run.
+*/
 
 /* Define various constants for the ThreadX Cortex-M port.  */
 
@@ -707,7 +716,7 @@ void    tx_thread_fpu_disable(void);
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] =
-                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M4/Keil Version 6.1.11 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M4/Keil Version 6.1.12 *";
 #else
 #ifdef TX_MISRA_ENABLE
 extern  CHAR                    _tx_version_id[100];

ports/cortex_m55/ac6/CMakeLists.txt

@@ -0,0 +1,21 @@
+target_sources(${PROJECT_NAME} PRIVATE
+    ${CMAKE_CURRENT_LIST_DIR}/src/txe_thread_secure_stack_allocate.c
+    ${CMAKE_CURRENT_LIST_DIR}/src/txe_thread_secure_stack_free.c
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_initialize_low_level.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_restore.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_save.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_control.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_disable.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_restore.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_schedule.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_secure_stack.c
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_secure_stack_allocate.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_secure_stack_free.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_stack_build.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_system_return.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_timer_interrupt.S
+)
+
+target_include_directories(${PROJECT_NAME} PUBLIC
+    inc
+)

ports/cortex_m55/ac6/inc/tx_port.h

@@ -0,0 +1,660 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Port Specific                                                       */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+
+/**************************************************************************/
+/*                                                                        */
+/*  PORT SPECIFIC C INFORMATION                            RELEASE        */
+/*                                                                        */
+/*    tx_port.h                                         Cortex-M55/AC6    */
+/*                                                           6.1.12       */
+/*                                                                        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This file contains data type definitions that make the ThreadX      */
+/*    real-time kernel function identically on a variety of different     */
+/*    processor architectures.  For example, the size or number of bits   */
+/*    in an "int" data type vary between microprocessor architectures and */
+/*    even C compilers for the same microprocessor.  ThreadX does not     */
+/*    directly use native C data types.  Instead, ThreadX creates its     */
+/*    own special types that can be mapped to actual data types by this   */
+/*    file to guarantee consistency in the interface and functionality.   */
+/*                                                                        */
+/*    This file replaces the previous Cortex-M55 files. It unifies        */
+/*    the Cortex-M55 compilers into one common file.                      */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
+/*  03-02-2021      Scott Larson            Modified comment(s), added    */
+/*                                            ULONG64_DEFINED,            */
+/*                                            resulting in version 6.1.5  */
+/*  06-02-2021      Scott Larson            Modified comment(s), removed  */
+/*                                            unneeded header file, funcs */
+/*                                            set_control and get_control */
+/*                                            changed to inline,          */
+/*                                            added symbol to enable      */
+/*                                            stack error handler,        */
+/*                                            resulting in version 6.1.7  */
+/*  10-15-2021      Scott Larson            Modified comment(s), improved */
+/*                                            stack check error handling, */
+/*                                            resulting in version 6.1.9  */
+/*  01-31-2022      Scott Larson            Modified comment(s), unified  */
+/*                                            this file across compilers, */
+/*                                            fixed predefined macro,     */
+/*                                            resulting in version 6.1.10 */
+/*  04-25-2022      Scott Larson            Modified comments and added   */
+/*                                            volatile to registers,      */
+/*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Modified comments and changed */
+/*                                            secure stack initialization */
+/*                                            macro to port-specific,     */
+/*                                            described BASEPRI usage,    */
+/*                                            resulting in version 6.1.12 */
+/*                                                                        */
+/**************************************************************************/
+
+#ifndef TX_PORT_H
+#define TX_PORT_H
+
+/* Determine if the optional ThreadX user define file should be used.  */
+#ifdef TX_INCLUDE_USER_DEFINE_FILE
+
+/* Yes, include the user defines in tx_user.h. The defines in this file may
+   alternately be defined on the command line.  */
+
+#include "tx_user.h"
+#endif /* TX_INCLUDE_USER_DEFINE_FILE */
+
+/* Define compiler library include files.  */
+
+#include <stdlib.h>
+#include <string.h>
+
+#ifdef __ICCARM__
+#include <intrinsics.h>                         /* IAR Intrinsics */
+#define __asm__                 __asm           /* Define to make all inline asm from each compiler look similar */
+#define _tx_control_get         __get_CONTROL
+#define _tx_control_set         __set_CONTROL
+#define _tx_ipsr_get            __get_IPSR
+#ifdef  TX_ENABLE_IAR_LIBRARY_SUPPORT
+#include <yvals.h>
+#endif /* TX_ENABLE_IAR_LIBRARY_SUPPORT */
+#endif /* __ICCARM__ */
+
+#ifdef __ARMCOMPILER_VERSION
+#include <arm_compat.h>
+#endif
+
+
+/* Define ThreadX basic types for this port.  */
+
+#define VOID                                    void
+typedef char                                    CHAR;
+typedef unsigned char                           UCHAR;
+typedef int                                     INT;
+typedef unsigned int                            UINT;
+typedef long                                    LONG;
+typedef unsigned long                           ULONG;
+typedef unsigned long long                      ULONG64;
+typedef short                                   SHORT;
+typedef unsigned short                          USHORT;
+#define ULONG64_DEFINED
+
+/* Function prototypes for this port. */
+struct  TX_THREAD_STRUCT;
+UINT    _txe_thread_secure_stack_allocate(struct TX_THREAD_STRUCT *thread_ptr, ULONG stack_size);
+UINT    _txe_thread_secure_stack_free(struct TX_THREAD_STRUCT *thread_ptr);
+UINT    _tx_thread_secure_stack_allocate(struct TX_THREAD_STRUCT *tx_thread, ULONG stack_size);
+UINT    _tx_thread_secure_stack_free(struct TX_THREAD_STRUCT *tx_thread);
+
+/* Define the system API mappings based on the error checking
+   selected by the user.  Note: this section is only applicable to
+   application source code, hence the conditional that turns off this
+   stuff when the include file is processed by the ThreadX source. */
+
+#ifndef TX_SOURCE_CODE
+
+
+/* Determine if error checking is desired.  If so, map API functions
+   to the appropriate error checking front-ends.  Otherwise, map API
+   functions to the core functions that actually perform the work.
+   Note: error checking is enabled by default.  */
+
+#ifdef TX_DISABLE_ERROR_CHECKING
+
+/* Services without error checking.  */
+
+#define tx_thread_secure_stack_allocate   _tx_thread_secure_stack_allocate
+#define tx_thread_secure_stack_free       _tx_thread_secure_stack_free
+
+#else
+
+/* Services with error checking.  */
+
+#define tx_thread_secure_stack_allocate   _txe_thread_secure_stack_allocate
+#define tx_thread_secure_stack_free       _txe_thread_secure_stack_free
+
+#endif  /* TX_DISABLE_ERROR_CHECKING */
+#endif  /* TX_SOURCE_CODE */
+
+/* This port has a usage fault handler in _tx_initialize_low_level for stack exceptions.  */
+#define TX_PORT_THREAD_STACK_ERROR_HANDLING
+
+/* Define the priority levels for ThreadX.  Legal values range
+   from 32 to 1024 and MUST be evenly divisible by 32.  */
+
+#ifndef TX_MAX_PRIORITIES
+#define TX_MAX_PRIORITIES                       32
+#endif
+
+
+/* Define the minimum stack for a ThreadX thread on this processor. If the size supplied during
+   thread creation is less than this value, the thread create call will return an error.  */
+
+#ifndef TX_MINIMUM_STACK
+#define TX_MINIMUM_STACK                        200         /* Minimum stack size for this port  */
+#endif
+
+
+/* Define the system timer thread's default stack size and priority.  These are only applicable
+   if TX_TIMER_PROCESS_IN_ISR is not defined.  */
+
+#ifndef TX_TIMER_THREAD_STACK_SIZE
+#define TX_TIMER_THREAD_STACK_SIZE              1024        /* Default timer thread stack size  */
+#endif
+
+#ifndef TX_TIMER_THREAD_PRIORITY
+#define TX_TIMER_THREAD_PRIORITY                0           /* Default timer thread priority    */
+#endif
+
+/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts.
+If using BASEPRI is desired, define the following two symbols for both c and assembly files:
+TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK.
+TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask.
+Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run.
+*/
+
+/* Define various constants for the ThreadX Cortex-M port.  */
+
+#define TX_INT_DISABLE                          1           /* Disable interrupts               */
+#define TX_INT_ENABLE                           0           /* Enable interrupts                */
+
+
+/* Define the clock source for trace event entry time stamp. The following two item are port specific.
+   For example, if the time source is at the address 0x0a800024 and is 16-bits in size, the clock
+   source constants would be:
+
+#define TX_TRACE_TIME_SOURCE                    *((volatile ULONG *) 0x0a800024)
+#define TX_TRACE_TIME_MASK                      0x0000FFFFUL
+
+*/
+
+#ifndef TX_MISRA_ENABLE
+#ifndef TX_TRACE_TIME_SOURCE
+#define TX_TRACE_TIME_SOURCE                    *((volatile ULONG *) 0xE0001004)
+#endif
+#else
+ULONG   _tx_misra_time_stamp_get(VOID);
+#define TX_TRACE_TIME_SOURCE                    _tx_misra_time_stamp_get()
+#endif
+
+#ifndef TX_TRACE_TIME_MASK
+#define TX_TRACE_TIME_MASK                      0xFFFFFFFFUL
+#endif
+
+
+/* Define the port specific options for the _tx_build_options variable. This variable indicates
+   how the ThreadX library was built.  */
+
+#define TX_PORT_SPECIFIC_BUILD_OPTIONS          (0)
+
+
+/* Define the in-line initialization constant so that modules with in-line
+   initialization capabilities can prevent their initialization from being
+   a function call.  */
+
+#ifdef TX_MISRA_ENABLE
+#define TX_DISABLE_INLINE
+#else
+#define TX_INLINE_INITIALIZATION
+#endif
+
+
+/* Determine whether or not stack checking is enabled. By default, ThreadX stack checking is
+   disabled. When the following is defined, ThreadX thread stack checking is enabled.  If stack
+   checking is enabled (TX_ENABLE_STACK_CHECKING is defined), the TX_DISABLE_STACK_FILLING
+   define is negated, thereby forcing the stack fill which is necessary for the stack checking
+   logic.  */
+
+#ifndef TX_MISRA_ENABLE
+#ifdef TX_ENABLE_STACK_CHECKING
+#undef TX_DISABLE_STACK_FILLING
+#endif
+#endif
+
+
+/* Define the TX_THREAD control block extensions for this port. The main reason
+   for the multiple macros is so that backward compatibility can be maintained with
+   existing ThreadX kernel awareness modules.  */
+
+#define TX_THREAD_EXTENSION_0
+#define TX_THREAD_EXTENSION_1
+
+#ifdef  TX_ENABLE_IAR_LIBRARY_SUPPORT
+/* IAR library support */
+#if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
+/* ThreadX in non-secure zone with calls to secure zone. */
+#define TX_THREAD_EXTENSION_2           VOID    *tx_thread_secure_stack_context;    \
+                                        VOID    *tx_thread_iar_tls_pointer;
+#else
+/* ThreadX in only one zone. */
+#define TX_THREAD_EXTENSION_2           VOID    *tx_thread_iar_tls_pointer;
+#endif
+
+#else
+/* No IAR library support */
+#if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
+/* ThreadX in non-secure zone with calls to secure zone. */
+#define TX_THREAD_EXTENSION_2           VOID    *tx_thread_secure_stack_context;
+#else
+/* ThreadX in only one zone. */
+#define TX_THREAD_EXTENSION_2
+#endif
+
+#endif  /* TX_ENABLE_IAR_LIBRARY_SUPPORT */
+
+#define TX_THREAD_EXTENSION_3
+
+
+/* Define the port extensions of the remaining ThreadX objects.  */
+
+#define TX_BLOCK_POOL_EXTENSION
+#define TX_BYTE_POOL_EXTENSION
+#define TX_EVENT_FLAGS_GROUP_EXTENSION
+#define TX_MUTEX_EXTENSION
+#define TX_QUEUE_EXTENSION
+#define TX_SEMAPHORE_EXTENSION
+#define TX_TIMER_EXTENSION
+
+
+/* Define the user extension field of the thread control block.  Nothing
+   additional is needed for this port so it is defined as white space.  */
+
+#ifndef TX_THREAD_USER_EXTENSION
+#define TX_THREAD_USER_EXTENSION
+#endif
+
+
+/* Define the macros for processing extensions in tx_thread_create, tx_thread_delete,
+   tx_thread_shell_entry, and tx_thread_terminate.  */
+#ifdef  TX_ENABLE_IAR_LIBRARY_SUPPORT
+void    *_tx_iar_create_per_thread_tls_area(void);
+void    _tx_iar_destroy_per_thread_tls_area(void *tls_ptr);
+void    __iar_Initlocks(void);
+#define TX_THREAD_CREATE_EXTENSION(thread_ptr)                      thread_ptr -> tx_thread_iar_tls_pointer = _tx_iar_create_per_thread_tls_area();
+
+#if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
+#define TX_THREAD_DELETE_EXTENSION(thread_ptr)                      do {_tx_iar_destroy_per_thread_tls_area(thread_ptr -> tx_thread_iar_tls_pointer);   \
+                                                                        thread_ptr -> tx_thread_iar_tls_pointer = TX_NULL; } while(0);                  \
+                                                                    if(thread_ptr -> tx_thread_secure_stack_context){_tx_thread_secure_stack_free(thread_ptr);}
+#else
+#define TX_THREAD_DELETE_EXTENSION(thread_ptr)                      do {_tx_iar_destroy_per_thread_tls_area(thread_ptr -> tx_thread_iar_tls_pointer);   \
+                                                                        thread_ptr -> tx_thread_iar_tls_pointer = TX_NULL; } while(0);
+#endif
+#define TX_PORT_SPECIFIC_PRE_SCHEDULER_INITIALIZATION               do {__iar_Initlocks();} while(0);
+
+#else   /* No IAR library support. */
+#define TX_THREAD_CREATE_EXTENSION(thread_ptr)
+#if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
+#define TX_THREAD_DELETE_EXTENSION(thread_ptr)                      if(thread_ptr -> tx_thread_secure_stack_context){_tx_thread_secure_stack_free(thread_ptr);}
+#else
+#define TX_THREAD_DELETE_EXTENSION(thread_ptr)
+#endif
+#endif  /* TX_ENABLE_IAR_LIBRARY_SUPPORT */
+
+#if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
+/* Define the size of the secure stack for the timer thread and use the extension to allocate the secure stack. */
+#define TX_TIMER_THREAD_SECURE_STACK_SIZE       256
+#define TX_TIMER_INITIALIZE_EXTENSION(status)   _tx_thread_secure_stack_allocate(&_tx_timer_thread, TX_TIMER_THREAD_SECURE_STACK_SIZE);
+#endif
+
+
+#if defined(__ARMVFP__) || defined(__ARM_PCS_VFP) || defined(__ARM_FP) || defined(__TARGET_FPU_VFP) || defined(__VFP__)
+
+#ifdef TX_MISRA_ENABLE
+
+ULONG  _tx_misra_control_get(void);
+void   _tx_misra_control_set(ULONG value);
+ULONG  _tx_misra_fpccr_get(void);
+void   _tx_misra_vfp_touch(void);
+
+#else   /* TX_MISRA_ENABLE not defined */
+
+#ifdef __GNUC__ /* GCC and ARM Compiler 6 */
+
+__attribute__( ( always_inline ) ) static inline ULONG _tx_control_get(void)
+{
+ULONG  control_value;
+
+    __asm__ volatile (" MRS  %0,CONTROL ": "=r" (control_value) );
+    return(control_value);
+}
+
+__attribute__( ( always_inline ) ) static inline void _tx_control_set(ULONG control_value)
+{
+    __asm__ volatile (" MSR  CONTROL,%0": : "r" (control_value): "memory" );
+}
+
+#endif  /* __GNUC__ */
+
+/* Touch VFP register in order to flush. Works for AC6/GCC/IAR compilers. */
+#define TX_VFP_TOUCH()  __asm__ volatile ("VMOV.F32 s0, s0");
+
+#endif  /* TX_MISRA_ENABLE */
+
+/* A completed thread falls into _thread_shell_entry and we can simply deactivate the FPU via CONTROL.FPCA
+   in order to ensure no lazy stacking will occur. */
+
+#ifndef TX_MISRA_ENABLE
+
+#define TX_THREAD_COMPLETED_EXTENSION(thread_ptr)   {                                                       \
+                                                    ULONG  _tx_vfp_state;                                   \
+                                                        _tx_vfp_state = _tx_control_get();                  \
+                                                        _tx_vfp_state = _tx_vfp_state & ~((ULONG) 0x4);     \
+                                                        _tx_control_set(_tx_vfp_state);                     \
+                                                    }
+#else
+
+#define TX_THREAD_COMPLETED_EXTENSION(thread_ptr)   {                                                       \
+                                                    ULONG  _tx_vfp_state;                                   \
+                                                        _tx_vfp_state = _tx_misra_control_get();            \
+                                                        _tx_vfp_state = _tx_vfp_state & ~((ULONG) 0x4);     \
+                                                        _tx_misra_control_set(_tx_vfp_state);               \
+                                                    }
+#endif
+
+/* A thread can be terminated by another thread, so we first check if it's self-terminating and not in an ISR.
+   If so, deactivate the FPU via CONTROL.FPCA. Otherwise we are in an interrupt or another thread is terminating
+   this one, so if the FPCCR.LSPACT bit is set, we need to save the CONTROL.FPCA state, touch the FPU to flush
+   the lazy FPU save, then restore the CONTROL.FPCA state. */
+
+#ifndef TX_MISRA_ENABLE
+
+#define TX_THREAD_TERMINATED_EXTENSION(thread_ptr)  {                                                                                       \
+                                                    ULONG  _tx_system_state;                                                                \
+                                                        _tx_system_state = TX_THREAD_GET_SYSTEM_STATE();                                    \
+                                                        if ((_tx_system_state == ((ULONG) 0)) && ((thread_ptr) == _tx_thread_current_ptr))  \
+                                                        {                                                                                   \
+                                                        ULONG  _tx_vfp_state;                                                               \
+                                                            _tx_vfp_state = _tx_control_get();                                              \
+                                                            _tx_vfp_state = _tx_vfp_state & ~((ULONG) 0x4);                                 \
+                                                            _tx_control_set(_tx_vfp_state);                                                 \
+                                                        }                                                                                   \
+                                                        else                                                                                \
+                                                        {                                                                                   \
+                                                        ULONG  _tx_fpccr;                                                                   \
+                                                            _tx_fpccr = *((volatile ULONG *) 0xE000EF34);                                   \
+                                                            _tx_fpccr = _tx_fpccr & ((ULONG) 0x01);                                         \
+                                                            if (_tx_fpccr == ((ULONG) 0x01))                                                \
+                                                            {                                                                               \
+                                                            ULONG _tx_vfp_state;                                                            \
+                                                                _tx_vfp_state = _tx_control_get();                                          \
+                                                                _tx_vfp_state = _tx_vfp_state & ((ULONG) 0x4);                              \
+                                                                TX_VFP_TOUCH();                                                             \
+                                                                if (_tx_vfp_state == ((ULONG) 0))                                           \
+                                                                {                                                                           \
+                                                                    _tx_vfp_state = _tx_control_get();                                      \
+                                                                    _tx_vfp_state = _tx_vfp_state & ~((ULONG) 0x4);                         \
+                                                                    _tx_control_set(_tx_vfp_state);                                         \
+                                                                }                                                                           \
+                                                            }                                                                               \
+                                                        }                                                                                   \
+                                                    }
+#else
+
+#define TX_THREAD_TERMINATED_EXTENSION(thread_ptr)  {                                                                                       \
+                                                    ULONG  _tx_system_state;                                                                \
+                                                        _tx_system_state = TX_THREAD_GET_SYSTEM_STATE();                                    \
+                                                        if ((_tx_system_state == ((ULONG) 0)) && ((thread_ptr) == _tx_thread_current_ptr))  \
+                                                        {                                                                                   \
+                                                        ULONG  _tx_vfp_state;                                                               \
+                                                            _tx_vfp_state = _tx_misra_control_get();                                        \
+                                                            _tx_vfp_state = _tx_vfp_state & ~((ULONG) 0x4);                                 \
+                                                            _tx_misra_control_set(_tx_vfp_state);                                           \
+                                                        }                                                                                   \
+                                                        else                                                                                \
+                                                        {                                                                                   \
+                                                        ULONG  _tx_fpccr;                                                                   \
+                                                            _tx_fpccr = _tx_misra_fpccr_get();                                              \
+                                                            _tx_fpccr = _tx_fpccr & ((ULONG) 0x01);                                         \
+                                                            if (_tx_fpccr == ((ULONG) 0x01))                                                \
+                                                            {                                                                               \
+                                                            ULONG _tx_vfp_state;                                                            \
+                                                                _tx_vfp_state = _tx_misra_control_get();                                    \
+                                                                _tx_vfp_state = _tx_vfp_state & ((ULONG) 0x4);                              \
+                                                                _tx_misra_vfp_touch();                                                      \
+                                                                if (_tx_vfp_state == ((ULONG) 0))                                           \
+                                                                {                                                                           \
+                                                                    _tx_vfp_state = _tx_misra_control_get();                                \
+                                                                    _tx_vfp_state = _tx_vfp_state & ~((ULONG) 0x4);                         \
+                                                                    _tx_misra_control_set(_tx_vfp_state);                                   \
+                                                                }                                                                           \
+                                                            }                                                                               \
+                                                        }                                                                                   \
+                                                    }
+#endif
+
+#else   /* No VFP in use */
+
+#define TX_THREAD_COMPLETED_EXTENSION(thread_ptr)
+#define TX_THREAD_TERMINATED_EXTENSION(thread_ptr)
+
+#endif  /* defined(__ARMVFP__) || defined(__ARM_PCS_VFP) || defined(__ARM_FP) || defined(__TARGET_FPU_VFP) || defined(__VFP__) */
+
+
+/* Define the ThreadX object creation extensions for the remaining objects.  */
+
+#define TX_BLOCK_POOL_CREATE_EXTENSION(pool_ptr)
+#define TX_BYTE_POOL_CREATE_EXTENSION(pool_ptr)
+#define TX_EVENT_FLAGS_GROUP_CREATE_EXTENSION(group_ptr)
+#define TX_MUTEX_CREATE_EXTENSION(mutex_ptr)
+#define TX_QUEUE_CREATE_EXTENSION(queue_ptr)
+#define TX_SEMAPHORE_CREATE_EXTENSION(semaphore_ptr)
+#define TX_TIMER_CREATE_EXTENSION(timer_ptr)
+
+
+/* Define the ThreadX object deletion extensions for the remaining objects.  */
+
+#define TX_BLOCK_POOL_DELETE_EXTENSION(pool_ptr)
+#define TX_BYTE_POOL_DELETE_EXTENSION(pool_ptr)
+#define TX_EVENT_FLAGS_GROUP_DELETE_EXTENSION(group_ptr)
+#define TX_MUTEX_DELETE_EXTENSION(mutex_ptr)
+#define TX_QUEUE_DELETE_EXTENSION(queue_ptr)
+#define TX_SEMAPHORE_DELETE_EXTENSION(semaphore_ptr)
+#define TX_TIMER_DELETE_EXTENSION(timer_ptr)
+
+
+/* Define the get system state macro.  */
+
+#ifndef TX_THREAD_GET_SYSTEM_STATE
+#ifndef TX_MISRA_ENABLE
+
+#if defined(__GNUC__) /* GCC and AC6 */
+__attribute__( ( always_inline ) ) static inline UINT _tx_ipsr_get(void)
+{
+UINT ipsr_value;
+    __asm__ volatile (" MRS  %0,IPSR ": "=r" (ipsr_value) );
+    return(ipsr_value);
+}
+#endif  /* GCC and AC6 IPSR_get function. */
+
+#define TX_THREAD_GET_SYSTEM_STATE()        (_tx_thread_system_state | _tx_ipsr_get())
+
+#else   /* TX_MISRA_ENABLE is defined, use MISRA function. */
+ULONG   _tx_misra_ipsr_get(VOID);
+#define TX_THREAD_GET_SYSTEM_STATE()        (_tx_thread_system_state | _tx_misra_ipsr_get())
+#endif  /* TX_MISRA_ENABLE */
+#endif  /* TX_THREAD_GET_SYSTEM_STATE */
+
+
+/* Define the check for whether or not to call the _tx_thread_system_return function.  A non-zero value
+   indicates that _tx_thread_system_return should not be called. This overrides the definition in tx_thread.h
+   for Cortex-M since so we don't waste time checking the _tx_thread_system_state variable that is always
+   zero after initialization for Cortex-M ports. */
+
+#ifndef TX_THREAD_SYSTEM_RETURN_CHECK
+#define TX_THREAD_SYSTEM_RETURN_CHECK(c)    (c) = ((ULONG) _tx_thread_preempt_disable);
+#endif
+
+#if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
+/* Initialize secure stacks for threads calling secure functions. */
+extern void    _tx_thread_secure_stack_initialize(void);
+#define TX_PORT_SPECIFIC_PRE_INITIALIZATION             _tx_thread_secure_stack_initialize();
+#endif
+
+/* Define the macro to ensure _tx_thread_preempt_disable is set early in initialization in order to
+   prevent early scheduling on Cortex-M parts.  */
+
+#define TX_PORT_SPECIFIC_POST_INITIALIZATION    _tx_thread_preempt_disable++;
+
+
+
+
+#ifndef TX_DISABLE_INLINE
+
+/* Define the TX_LOWEST_SET_BIT_CALCULATE macro for each compiler. */
+#ifdef __ICCARM__       /* IAR Compiler */
+#define TX_LOWEST_SET_BIT_CALCULATE(m, b)       (b) = (UINT) __CLZ(__RBIT((m)));
+#elif defined(__GNUC__) /* GCC and AC6 Compiler */
+#define TX_LOWEST_SET_BIT_CALCULATE(m, b)       __asm__ volatile (" RBIT %0,%1 ": "=r" (m) : "r" (m) ); \
+                                                __asm__ volatile (" CLZ  %0,%1 ": "=r" (b) : "r" (m) );
+#else
+#error "Compiler not supported."
+#endif
+
+
+
+/* Define the interrupt disable/restore macros. */
+
+__attribute__( ( always_inline ) ) static inline UINT __get_interrupt_posture(void)
+{
+UINT posture;
+#ifdef TX_PORT_USE_BASEPRI
+    __asm__ volatile ("MRS  %0, BASEPRI ": "=r" (posture));
+#else
+    __asm__ volatile ("MRS  %0, PRIMASK ": "=r" (posture));
+#endif
+    return(posture);
+}
+
+#ifdef TX_PORT_USE_BASEPRI
+__attribute__( ( always_inline ) ) static inline void __set_basepri_value(UINT basepri_value)
+{
+    __asm__ volatile ("MSR  BASEPRI,%0 ": : "r" (basepri_value));
+}
+#else
+__attribute__( ( always_inline ) ) static inline void __enable_interrupts(void)
+{
+    __asm__ volatile ("CPSIE  i": : : "memory");
+}
+#endif
+
+__attribute__( ( always_inline ) ) static inline void __restore_interrupt(UINT int_posture)
+{
+#ifdef TX_PORT_USE_BASEPRI
+    __set_basepri_value(int_posture);
+#else
+    __asm__ volatile ("MSR  PRIMASK,%0": : "r" (int_posture): "memory");
+#endif
+}
+
+__attribute__( ( always_inline ) ) static inline UINT __disable_interrupts(void)
+{
+UINT int_posture;
+
+    int_posture = __get_interrupt_posture();
+
+#ifdef TX_PORT_USE_BASEPRI
+    __set_basepri_value(TX_PORT_BASEPRI);
+#else
+    __asm__ volatile ("CPSID i" : : : "memory");
+#endif
+    return(int_posture);
+}
+
+__attribute__( ( always_inline ) ) static inline void _tx_thread_system_return_inline(void)
+{
+UINT interrupt_save;
+
+    /* Set PendSV to invoke ThreadX scheduler.  */
+    *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
+    if (_tx_ipsr_get() == 0)
+    {
+        interrupt_save = __get_interrupt_posture();
+#ifdef TX_PORT_USE_BASEPRI
+        __set_basepri_value(0);
+#else
+        __enable_interrupts();
+#endif
+        __restore_interrupt(interrupt_save);
+    }
+}
+
+#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save;
+#define TX_DISABLE                              interrupt_save =  __disable_interrupts();
+#define TX_RESTORE                              __restore_interrupt(interrupt_save);
+
+/* Redefine _tx_thread_system_return for improved performance.  */
+#define _tx_thread_system_return                _tx_thread_system_return_inline
+
+#else   /* TX_DISABLE_INLINE is defined */
+
+UINT                                            _tx_thread_interrupt_disable(VOID);
+VOID                                            _tx_thread_interrupt_restore(UINT previous_posture);
+
+#define TX_INTERRUPT_SAVE_AREA                  register UINT interrupt_save;
+
+#define TX_DISABLE                              interrupt_save = _tx_thread_interrupt_disable();
+#define TX_RESTORE                              _tx_thread_interrupt_restore(interrupt_save);
+#endif  /* TX_DISABLE_INLINE */
+
+/* Define the version ID of ThreadX.  This may be utilized by the application.  */
+
+#ifdef TX_THREAD_INIT
+CHAR                            _tx_version_id[] =
+                                    "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M55/AC6 Version 6.1.12 *";
+#else
+#ifdef TX_MISRA_ENABLE
+extern  CHAR                    _tx_version_id[100];
+#else
+extern  CHAR                    _tx_version_id[];
+#endif
+#endif
+
+#endif

ports/cortex_m55/ac6/inc/tx_secure_interface.h

@@ -0,0 +1,61 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Thread                                                              */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+
+/**************************************************************************/
+/*                                                                        */
+/*  COMPONENT DEFINITION                                   RELEASE        */
+/*                                                                        */
+/*    tx_secure_interface.h                               PORTABLE C      */
+/*                                                            6.1         */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This file defines the ThreadX secure thread stack components,       */
+/*    including data types and external references.                       */
+/*    It is assumed that tx_api.h and tx_port.h have already been         */
+/*    included.                                                           */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
+/*                                                                        */
+/**************************************************************************/
+
+#ifndef TX_SECURE_INTERFACE_H
+#define TX_SECURE_INTERFACE_H
+
+/* Define internal secure thread stack function prototypes.  */
+
+extern UINT    _tx_thread_secure_mode_stack_initialize(void);
+extern UINT    _tx_thread_secure_mode_stack_allocate(TX_THREAD *thread_ptr, ULONG stack_size);
+extern UINT    _tx_thread_secure_mode_stack_free(TX_THREAD *thread_ptr);
+extern void    _tx_thread_secure_stack_initialize(void);
+extern void    _tx_thread_secure_stack_context_save(TX_THREAD *thread_ptr);
+extern void    _tx_thread_secure_stack_context_restore(TX_THREAD *thread_ptr);
+
+#endif

ports/cortex_m55/ac6/readme_threadx.txt

@@ -0,0 +1,228 @@
+                     Microsoft's Azure RTOS ThreadX for Cortex-M55 
+
+                              Using the AC6 Tools in Keil uVision
+
+1. Import the ThreadX Projects
+
+In order to build the ThreadX library and the ThreadX demonstration, first open 
+the AzureRTOS.uvmpw workspace (located in the "example_build" directory) 
+into Keil.
+
+
+2.  Building the ThreadX run-time Library
+
+Building the ThreadX library is easy; simply set the ThreadX_Library project
+as active, then then build the library. You should now observe the compilation 
+and assembly of the ThreadX library. This project build produces the ThreadX
+library file ThreadX_Library.lib.
+Files tx_thread_stack_error_handler.c and tx_thread_stack_error_notify.c 
+replace the common files of the same name. 
+
+3.  Demonstration System
+
+The ThreadX demonstration is designed to execute under the Keil debugger on the
+FVP_MPS2_Cortex-M55_MDK simulator.
+
+Building the demonstration is easy; simply select the "Batch Build" button. 
+You should now observe the compilation and assembly of the ThreadX demonstration of 
+both the demo_secure_zone and demo_threadx_non-secure_zone projects. 
+Then click the Start/Stop Debug Session button to start the simulator and begin debugging.
+You are now ready to execute the ThreadX demonstration.
+
+
+4.  System Initialization
+
+The entry point in ThreadX for the Cortex-M55 using AC6 tools uses the standard AC6 
+Cortex-M55 reset sequence. From the reset vector the C runtime will be initialized.
+
+The ThreadX tx_initialize_low_level.s file is responsible for setting up 
+various system data structures, the vector area, and a periodic timer interrupt 
+source. 
+
+In addition, _tx_initialize_low_level determines the first available 
+address for use by the application, which is supplied as the sole input 
+parameter to your application definition function, tx_application_define.
+
+
+5.  Register Usage and Stack Frames
+
+The following defines the saved context stack frames for context switches
+that occur as a result of interrupt handling or from thread-level API calls.
+All suspended threads have the same stack frame in the Cortex-M55 version of
+ThreadX. The top of the suspended thread's stack is pointed to by 
+tx_thread_stack_ptr in the associated thread control block TX_THREAD.
+
+Non-FPU Stack Frame:
+
+    Stack Offset    Stack Contents
+
+    0x00            LR          Interrupted LR (LR at time of PENDSV)
+    0x04            r4          Software stacked GP registers
+    0x08            r5
+    0x0C            r6
+    0x10            r7
+    0x14            r8
+    0x18            r9
+    0x1C            r10
+    0x20            r11
+    0x24            r0          Hardware stacked registers
+    0x28            r1
+    0x2C            r2
+    0x30            r3
+    0x34            r12
+    0x38            lr
+    0x3C            pc
+    0x40            xPSR
+
+FPU Stack Frame (only interrupted thread with FPU enabled):
+
+    Stack Offset    Stack Contents
+
+    0x00            LR          Interrupted LR (LR at time of PENDSV)
+    0x04            s16         Software stacked FPU registers
+    0x08            s17
+    0x0C            s18
+    0x10            s19
+    0x14            s20
+    0x18            s21
+    0x1C            s22
+    0x20            s23
+    0x24            s24
+    0x28            s25
+    0x2C            s26
+    0x30            s27
+    0x34            s28
+    0x38            s29
+    0x3C            s30
+    0x40            s31
+    0x44            r4          Software stacked registers
+    0x48            r5
+    0x4C            r6
+    0x50            r7
+    0x54            r8
+    0x58            r9
+    0x5C            r10
+    0x60            r11
+    0x64            r0          Hardware stacked registers
+    0x68            r1
+    0x6C            r2
+    0x70            r3
+    0x74            r12
+    0x78            lr
+    0x7C            pc
+    0x80            xPSR
+    0x84            s0          Hardware stacked FPU registers
+    0x88            s1
+    0x8C            s2
+    0x90            s3
+    0x94            s4
+    0x98            s5
+    0x9C            s6
+    0xA0            s7
+    0xA4            s8
+    0xA8            s9
+    0xAC            s10
+    0xB0            s11
+    0xB4            s12
+    0xB8            s13
+    0xBC            s14
+    0xC0            s15
+    0xC4            fpscr
+
+
+6.  Improving Performance
+
+To make ThreadX and the application(s) run faster, you can enable 
+all compiler optimizations. 
+
+In addition, you can eliminate the ThreadX basic API error checking by 
+compiling your application code with the symbol TX_DISABLE_ERROR_CHECKING 
+defined. 
+
+
+7.  Interrupt Handling
+
+ThreadX provides complete and high-performance interrupt handling for Cortex-M55
+targets. There are a certain set of requirements that are defined in the 
+following sub-sections:
+
+
+7.1  Vector Area
+
+The Cortex-M55 vectors start at the label __Vectors or similar. The application may modify
+the vector area according to its needs. There is code in tx_initialize_low_level() that will 
+configure the vector base register. 
+
+
+7.2 Managed Interrupts
+
+ISRs can be written completely in C (or assembly language) without any calls to
+_tx_thread_context_save or _tx_thread_context_restore. These ISRs are allowed access to the
+ThreadX API that is available to ISRs.
+
+ISRs written in C will take the form (where "your_C_isr" is an entry in the vector table):
+
+void    your_C_isr(void)
+{
+
+    /* ISR processing goes here, including any needed function calls.  */
+}
+
+ISRs written in assembly language will take the form:
+
+
+    .global  your_assembly_isr
+    .thumb_func
+your_assembly_isr:
+; VOID your_assembly_isr(VOID)
+; {
+    PUSH    {r0, lr}
+;       
+;    /* Do interrupt handler work here */
+;    /* BL <your interrupt routine in C> */
+
+    POP     {r0, lr}
+    BX      lr
+; }
+
+Note: the Cortex-M55 requires exception handlers to be thumb labels, this implies bit 0 set.
+To accomplish this, the declaration of the label has to be preceded by the assembler directive
+.thumb_func to instruct the linker to create thumb labels. The label __tx_IntHandler needs to 
+be inserted in the correct location in the interrupt vector table. This table is typically 
+located in either your runtime startup file or in the tx_initialize_low_level.s file.
+
+
+8. FPU Support
+
+ThreadX for Cortex-M55 supports automatic ("lazy") VFP support, which means that applications threads 
+can simply use the VFP and ThreadX automatically maintains the VFP registers as part of the thread 
+context.
+
+
+9.  Revision History
+
+For generic code revision information, please refer to the readme_threadx_generic.txt
+file, which is included in your distribution. The following details the revision
+information associated with this specific port of ThreadX:
+
+06-02-2021  Release 6.1.7 changes:
+            tx_port.h                           Remove unneeded include file
+            tx_thread_secure_stack_initialize.S New file
+            tx_thread_schedule.S                Added secure stack initialize to SVC hander
+            tx_thread_secure_stack.c            Fixed stack pointer save, initialize in handler mode
+
+04-02-2021  Release 6.1.6 changes:
+            tx_port.h                           Updated macro definition
+            tx_thread_schedule.s                Added low power support
+
+03-02-2021  The following files were changed/added for version 6.1.5:
+            tx_port.h                       Added ULONG64_DEFINED
+
+09-30-2020  Initial ThreadX 6.1 version for Cortex-M55 using AC6 tools.
+
+
+Copyright(c) 1996-2020 Microsoft Corporation
+
+
+https://azure.com/rtos
+

ports/cortex_m55/ac6/src/tx_initialize_low_level.S

@@ -0,0 +1,278 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Initialize                                                          */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+
+SYSTEM_CLOCK        =     6000000
+SYSTICK_CYCLES      =     ((SYSTEM_CLOCK / 100) -1)
+
+/* Setup the stack and heap areas.  */
+
+STACK_SIZE          =     0x00000400
+HEAP_SIZE           =     0x00000000
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_initialize_low_level                          Cortex-M55/AC6    */
+/*                                                           6.1          */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function is responsible for any low-level processor            */
+/*    initialization, including setting up interrupt vectors, setting     */
+/*    up a periodic timer interrupt source, saving the system stack       */
+/*    pointer for use in ISR processing later, and finding the first      */
+/*    available RAM memory address for tx_application_define.             */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    _tx_initialize_kernel_enter           ThreadX entry function        */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
+/*                                                                        */
+/**************************************************************************/
+// VOID   _tx_initialize_low_level(VOID)
+// {
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  _tx_initialize_low_level
+    .thumb_func
+.type _tx_initialize_low_level, function
+_tx_initialize_low_level:
+
+    /* Disable interrupts during ThreadX initialization.  */
+    CPSID   i
+
+    /* Set base of available memory to end of non-initialised RAM area.  */
+    LDR     r0, =_tx_initialize_unused_memory       // Build address of unused memory pointer
+    LDR     r1, =Image$$ARM_LIB_STACK$$ZI$$Limit    // Build first free address
+    ADD     r1, r1, #4                              //
+    STR     r1, [r0]                                // Setup first unused memory pointer
+
+    /* Setup Vector Table Offset Register.  */
+    MOV     r0, #0xE000E000                         // Build address of NVIC registers
+    LDR     r1, =__Vectors                          // Pickup address of vector table
+    STR     r1, [r0, #0xD08]                        // Set vector table address
+
+    /* Enable the cycle count register.  */
+    LDR     r0, =0xE0001000                         // Build address of DWT register
+    LDR     r1, [r0]                                // Pickup the current value
+    ORR     r1, r1, #1                              // Set the CYCCNTENA bit
+    STR     r1, [r0]                                // Enable the cycle count register
+
+    /* Set system stack pointer from vector value.  */
+    LDR     r0, =_tx_thread_system_stack_ptr        // Build address of system stack pointer
+    LDR     r1, =__Vectors                          // Pickup address of vector table
+    LDR     r1, [r1]                                // Pickup reset stack pointer
+    STR     r1, [r0]                                // Save system stack pointer
+
+    /* Configure SysTick.  */
+    MOV     r0, #0xE000E000                         // Build address of NVIC registers
+    LDR     r1, =SYSTICK_CYCLES
+    STR     r1, [r0, #0x14]                         // Setup SysTick Reload Value
+    MOV     r1, #0x7                                // Build SysTick Control Enable Value
+    STR     r1, [r0, #0x10]                         // Setup SysTick Control
+
+    /* Configure handler priorities.  */
+    LDR     r1, =0x00000000                         // Rsrv, UsgF, BusF, MemM
+    STR     r1, [r0, #0xD18]                        // Setup System Handlers 4-7 Priority Registers
+
+    LDR     r1, =0xFF000000                         // SVCl, Rsrv, Rsrv, Rsrv
+    STR     r1, [r0, #0xD1C]                        // Setup System Handlers 8-11 Priority Registers
+                                                    // Note: SVC must be lowest priority, which is 0xFF
+
+    LDR     r1, =0x40FF0000                         // SysT, PnSV, Rsrv, DbgM
+    STR     r1, [r0, #0xD20]                        // Setup System Handlers 12-15 Priority Registers
+                                                    // Note: PnSV must be lowest priority, which is 0xFF
+
+    /* Return to caller.  */
+    BX      lr
+// }
+
+
+/* Define shells for each of the unused vectors.  */
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  __tx_BadHandler
+    .thumb_func
+.type __tx_BadHandler, function
+__tx_BadHandler:
+    B       __tx_BadHandler
+
+
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  __tx_IntHandler
+    .thumb_func
+.type __tx_IntHandler, function
+__tx_IntHandler:
+// VOID InterruptHandler (VOID)
+// {
+    PUSH    {r0,lr}     // Save LR (and dummy r0 to maintain stack alignment)
+#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
+    BL      _tx_execution_isr_enter             // Call the ISR enter function
+#endif
+    /* Do interrupt handler work here */
+    /* .... */
+#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
+    BL      _tx_execution_isr_exit              // Call the ISR exit function
+#endif
+    POP     {r0,lr}
+    BX      LR
+// }
+
+
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  SysTick_Handler
+    .thumb_func
+.type SysTick_Handler, function
+SysTick_Handler:
+// VOID TimerInterruptHandler (VOID)
+// {
+    PUSH    {r0,lr}     // Save LR (and dummy r0 to maintain stack alignment)
+#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
+    BL      _tx_execution_isr_enter             // Call the ISR enter function
+#endif
+    BL      _tx_timer_interrupt
+#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
+    BL      _tx_execution_isr_exit              // Call the ISR exit function
+#endif
+    POP     {r0,lr}
+    BX      LR
+// }
+
+
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  HardFault_Handler
+    .thumb_func
+.type HardFault_Handler, function
+HardFault_Handler:
+    B       HardFault_Handler
+
+
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  UsageFault_Handler
+    .thumb_func
+.type UsageFault_Handler, function
+UsageFault_Handler:
+    CPSID   i                                       // Disable interrupts
+    // Check for stack limit fault
+    LDR     r0, =0xE000ED28                         // CFSR address
+    LDR     r1,[r0]                                 // Pick up CFSR
+    TST     r1, #0x00100000                         // Check for Stack Overflow
+_unhandled_usage_loop:
+    BEQ     _unhandled_usage_loop                   // If not stack overflow then loop
+
+    // Handle stack overflow
+    STR     r1, [r0]                                // Clear CFSR flag(s)
+
+#ifdef __ARM_PCS_VFP
+    LDR     r0, =0xE000EF34                         // Cleanup FPU context: Load FPCCR address
+    LDR     r1, [r0]                                // Load FPCCR
+    BIC     r1, r1, #1                              // Clear the lazy preservation active bit
+    STR     r1, [r0]                                // Store the value
+#endif
+
+    LDR     r0, =_tx_thread_current_ptr             // Build current thread pointer address
+    LDR     r0,[r0]                                 // Pick up current thread pointer
+    PUSH    {r0,lr}                                 // Save LR (and r0 to maintain stack alignment)
+    BL      _tx_thread_stack_error_handler          // Call ThreadX/user handler
+    POP     {r0,lr}                                 // Restore LR and dummy reg
+
+#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
+    // Call the thread exit function to indicate the thread is no longer executing.
+    PUSH    {r0, lr}                                // Save LR (and r0 just for alignment)
+    BL      _tx_execution_thread_exit               // Call the thread exit function
+    POP     {r0, lr}                                // Recover LR
+#endif
+
+    MOV     r1, #0                                  // Build NULL value
+    LDR     r0, =_tx_thread_current_ptr             // Pickup address of current thread pointer
+    STR     r1, [r0]                                // Clear current thread pointer
+
+    // Return from UsageFault_Handler exception
+    LDR     r0, =0xE000ED04                         // Load ICSR
+    LDR     r1, =0x10000000                         // Set PENDSVSET bit
+    STR     r1, [r0]                                // Store ICSR
+    DSB                                             // Wait for memory access to complete
+    CPSIE   i                                       // Enable interrupts
+    BX      lr                                      // Return from exception
+
+
+
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  __tx_NMIHandler
+    .thumb_func
+.type __tx_NMIHandler, function
+__tx_NMIHandler:
+    B       __tx_NMIHandler
+
+
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  __tx_DBGHandler
+    .thumb_func
+.type __tx_DBGHandler, function
+__tx_DBGHandler:
+    B       __tx_DBGHandler
+
+    .end

ports/cortex_m55/ac6/src/tx_misra.S

@@ -0,0 +1,719 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   ThreadX MISRA Compliance                                            */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        #define SHT_PROGBITS 0x1
+
+        .global __aeabi_memset
+        .global _tx_thread_current_ptr
+        .global _tx_thread_interrupt_disable
+        .global _tx_thread_interrupt_restore
+        .global _tx_thread_stack_analyze
+        .global _tx_thread_stack_error_handler
+        .global _tx_thread_system_state
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_trace_buffer_current_ptr
+        .global _tx_trace_buffer_end_ptr
+        .global _tx_trace_buffer_start_ptr
+        .global _tx_trace_event_enable_bits
+        .global _tx_trace_full_notify_function
+        .global _tx_trace_header_ptr
+#endif
+
+        .global _tx_misra_always_true
+        .global _tx_misra_block_pool_to_uchar_pointer_convert
+        .global _tx_misra_byte_pool_to_uchar_pointer_convert
+        .global _tx_misra_char_to_uchar_pointer_convert
+        .global _tx_misra_const_char_to_char_pointer_convert
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_entry_to_uchar_pointer_convert
+#endif
+        .global _tx_misra_indirect_void_to_uchar_pointer_convert
+        .global _tx_misra_memset
+        .global _tx_misra_message_copy
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_object_to_uchar_pointer_convert
+#endif
+        .global _tx_misra_pointer_to_ulong_convert
+        .global _tx_misra_status_get
+        .global _tx_misra_thread_stack_check
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_time_stamp_get
+#endif
+        .global _tx_misra_timer_indirect_to_void_pointer_convert
+        .global _tx_misra_timer_pointer_add
+        .global _tx_misra_timer_pointer_dif
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_trace_event_insert
+#endif
+        .global _tx_misra_uchar_pointer_add
+        .global _tx_misra_uchar_pointer_dif
+        .global _tx_misra_uchar_pointer_sub
+        .global _tx_misra_uchar_to_align_type_pointer_convert
+        .global _tx_misra_uchar_to_block_pool_pointer_convert
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_uchar_to_entry_pointer_convert
+        .global _tx_misra_uchar_to_header_pointer_convert
+#endif
+        .global _tx_misra_uchar_to_indirect_byte_pool_pointer_convert
+        .global _tx_misra_uchar_to_indirect_uchar_pointer_convert
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_uchar_to_object_pointer_convert
+#endif
+        .global _tx_misra_uchar_to_void_pointer_convert
+        .global _tx_misra_ulong_pointer_add
+        .global _tx_misra_ulong_pointer_dif
+        .global _tx_misra_ulong_pointer_sub
+        .global _tx_misra_ulong_to_pointer_convert
+        .global _tx_misra_ulong_to_thread_pointer_convert
+        .global _tx_misra_user_timer_pointer_get
+        .global _tx_misra_void_to_block_pool_pointer_convert
+        .global _tx_misra_void_to_byte_pool_pointer_convert
+        .global _tx_misra_void_to_event_flags_pointer_convert
+        .global _tx_misra_void_to_indirect_uchar_pointer_convert
+        .global _tx_misra_void_to_mutex_pointer_convert
+        .global _tx_misra_void_to_queue_pointer_convert
+        .global _tx_misra_void_to_semaphore_pointer_convert
+        .global _tx_misra_void_to_thread_pointer_convert
+        .global _tx_misra_void_to_uchar_pointer_convert
+        .global _tx_misra_void_to_ulong_pointer_convert
+        .global _tx_misra_ipsr_get
+        .global _tx_misra_control_get
+        .global _tx_misra_control_set
+#ifdef __ARM_FP
+        .global _tx_misra_fpccr_get
+        .global _tx_misra_vfp_touch
+#endif
+
+        .global _tx_misra_event_flags_group_not_used
+        .global _tx_misra_event_flags_set_notify_not_used
+        .global _tx_misra_queue_not_used
+        .global _tx_misra_queue_send_notify_not_used
+        .global _tx_misra_semaphore_not_used
+        .global _tx_misra_semaphore_put_notify_not_used
+        .global _tx_misra_thread_entry_exit_notify_not_used
+        .global _tx_misra_thread_not_used
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_memset(VOID *ptr, UINT value, UINT size);            */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .align 4
+        .syntax unified
+        .thumb_func
+_tx_misra_memset:
+        PUSH     {R4,LR}
+        MOVS     R4,R0
+        MOVS     R0,R2
+        MOVS     R2,R1
+        MOVS     R1,R0
+        MOVS     R0,R4
+        BL       __aeabi_memset
+        POP      {R4,PC}          // return
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  UCHAR  *_tx_misra_uchar_pointer_add(UCHAR *ptr, ULONG amount);       */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_uchar_pointer_add:
+        ADD      R0,R0,R1
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  UCHAR  *_tx_misra_uchar_pointer_sub(UCHAR *ptr, ULONG amount);       */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_uchar_pointer_sub:
+        RSBS     R1,R1,#+0
+        ADD      R0,R0,R1
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  _tx_misra_uchar_pointer_dif(UCHAR *ptr1, UCHAR *ptr2);        */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_uchar_pointer_dif:
+        SUBS     R0,R0,R1
+        BX       LR               // return
+
+
+/************************************************************************************************************************************/
+/************************************************************************************************************************************/
+/**                                                                                                                                 */
+/**  This single function serves all of the below prototypes.                                                                       */
+/**                                                                                                                                 */
+/**  ULONG  _tx_misra_pointer_to_ulong_convert(VOID *ptr);                                                                          */
+/**  VOID  *_tx_misra_ulong_to_pointer_convert(ULONG input);                                                                        */
+/**  UCHAR  **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr);                                                  */
+/**  UCHAR  **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer);                                                    */
+/**  UCHAR  *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool);                                                    */
+/**  TX_BLOCK_POOL  *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer);                                                   */
+/**  UCHAR  *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer);                                                                */
+/**  TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer);                                                  */
+/**  UCHAR  **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer);                                                      */
+/**  TX_BYTE_POOL  *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer);                                                     */
+/**  UCHAR  *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool);                                                      */
+/**  ALIGN_TYPE  *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer);                                                    */
+/**  TX_BYTE_POOL  **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer);                                         */
+/**  TX_EVENT_FLAGS_GROUP  *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer);                                           */
+/**  ULONG  *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer);                                                                */
+/**  TX_MUTEX  *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer);                                                             */
+/**  TX_QUEUE  *_tx_misra_void_to_queue_pointer_convert(VOID *pointer);                                                             */
+/**  TX_SEMAPHORE  *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer);                                                     */
+/**  VOID  *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer);                                                                */
+/**  TX_THREAD  *_tx_misra_ulong_to_thread_pointer_convert(ULONG value);                                                            */
+/**  VOID  *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer);                                          */
+/**  CHAR  *_tx_misra_const_char_to_char_pointer_convert(const char *pointer);                                                      */
+/**  TX_THREAD  *_tx_misra_void_to_thread_pointer_convert(void *pointer);                                                           */
+/**  UCHAR  *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer);                                             */
+/**  TX_TRACE_OBJECT_ENTRY  *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer);                                             */
+/**  TX_TRACE_HEADER  *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer);                                                   */
+/**  TX_TRACE_BUFFER_ENTRY  *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer);                                              */
+/**  UCHAR  *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer);                                              */
+/**  UCHAR  *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer);                                                                */
+/**  VOID    _tx_misra_event_flags_group_not_used(TX_EVENT_FLAGS_GROUP *group_ptr);                                                 */
+/**  VOID    _tx_misra_event_flags_set_notify_not_used(VOID (*events_set_notify)(TX_EVENT_FLAGS_GROUP *notify_group_ptr));          */
+/**  VOID    _tx_misra_queue_not_used(TX_QUEUE *queue_ptr);                                                                         */
+/**  VOID    _tx_misra_queue_send_notify_not_used(VOID (*queue_send_notify)(TX_QUEUE *notify_queue_ptr));                           */
+/**  VOID    _tx_misra_semaphore_not_used(TX_SEMAPHORE *semaphore_ptr);                                                             */
+/**  VOID    _tx_misra_semaphore_put_notify_not_used(VOID (*semaphore_put_notify)(TX_SEMAPHORE *notify_semaphore_ptr));             */
+/**  VOID    _tx_misra_thread_not_used(TX_THREAD *thread_ptr);                                                                      */
+/**  VOID    _tx_misra_thread_entry_exit_notify_not_used(VOID (*thread_entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT id));  */
+/**                                                                                                                                 */
+/************************************************************************************************************************************/
+/************************************************************************************************************************************/
+        .text
+        .thumb_func
+_tx_misra_pointer_to_ulong_convert:
+_tx_misra_ulong_to_pointer_convert:
+_tx_misra_indirect_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_indirect_uchar_pointer_convert:
+_tx_misra_block_pool_to_uchar_pointer_convert:
+_tx_misra_void_to_block_pool_pointer_convert:
+_tx_misra_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_block_pool_pointer_convert:
+_tx_misra_void_to_indirect_uchar_pointer_convert:
+_tx_misra_void_to_byte_pool_pointer_convert:
+_tx_misra_byte_pool_to_uchar_pointer_convert:
+_tx_misra_uchar_to_align_type_pointer_convert:
+_tx_misra_uchar_to_indirect_byte_pool_pointer_convert:
+_tx_misra_void_to_event_flags_pointer_convert:
+_tx_misra_void_to_ulong_pointer_convert:
+_tx_misra_void_to_mutex_pointer_convert:
+_tx_misra_void_to_queue_pointer_convert:
+_tx_misra_void_to_semaphore_pointer_convert:
+_tx_misra_uchar_to_void_pointer_convert:
+_tx_misra_ulong_to_thread_pointer_convert:
+_tx_misra_timer_indirect_to_void_pointer_convert:
+_tx_misra_const_char_to_char_pointer_convert:
+_tx_misra_void_to_thread_pointer_convert:
+#ifdef TX_ENABLE_EVENT_TRACE
+_tx_misra_object_to_uchar_pointer_convert:
+_tx_misra_uchar_to_object_pointer_convert:
+_tx_misra_uchar_to_header_pointer_convert:
+_tx_misra_uchar_to_entry_pointer_convert:
+_tx_misra_entry_to_uchar_pointer_convert:
+#endif
+_tx_misra_char_to_uchar_pointer_convert:
+_tx_misra_event_flags_group_not_used:
+_tx_misra_event_flags_set_notify_not_used:
+_tx_misra_queue_not_used:
+_tx_misra_queue_send_notify_not_used:
+_tx_misra_semaphore_not_used:
+_tx_misra_semaphore_put_notify_not_used:
+_tx_misra_thread_entry_exit_notify_not_used:
+_tx_misra_thread_not_used:
+
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  *_tx_misra_ulong_pointer_add(ULONG *ptr, ULONG amount);       */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_ulong_pointer_add:
+        ADD      R0,R0,R1, LSL #+2
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  *_tx_misra_ulong_pointer_sub(ULONG *ptr, ULONG amount);       */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_ulong_pointer_sub:
+        MVNS     R2,#+3
+        MULS     R1,R2,R1
+        ADD      R0,R0,R1
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  _tx_misra_ulong_pointer_dif(ULONG *ptr1, ULONG *ptr2);        */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_ulong_pointer_dif:
+        SUBS     R0,R0,R1
+        ASRS     R0,R0,#+2
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_message_copy(ULONG **source, ULONG **destination,    */
+/**                                                           UINT size); */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_message_copy:
+        PUSH     {R4,R5}
+        LDR      R3,[R0, #+0]
+        LDR      R4,[R1, #+0]
+        LDR      R5,[R3, #+0]
+        STR      R5,[R4, #+0]
+        ADDS     R4,R4,#+4
+        ADDS     R3,R3,#+4
+        CMP      R2,#+2
+        BCC.N    _tx_misra_message_copy_0
+        SUBS     R2,R2,#+1
+        B.N      _tx_misra_message_copy_1
+_tx_misra_message_copy_2:
+        LDR      R5,[R3, #+0]
+        STR      R5,[R4, #+0]
+        ADDS     R4,R4,#+4
+        ADDS     R3,R3,#+4
+        SUBS     R2,R2,#+1
+_tx_misra_message_copy_1:
+        CMP      R2,#+0
+        BNE.N    _tx_misra_message_copy_2
+_tx_misra_message_copy_0:
+        STR      R3,[R0, #+0]
+        STR      R4,[R1, #+0]
+        POP      {R4,R5}
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  _tx_misra_timer_pointer_dif(TX_TIMER_INTERNAL **ptr1,         */
+/**                                           TX_TIMER_INTERNAL **ptr2);  */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_timer_pointer_dif:
+        SUBS     R0,R0,R1
+        ASRS     R0,R0,#+2
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  TX_TIMER_INTERNAL **_tx_misra_timer_pointer_add(TX_TIMER_INTERNAL    */
+/**                                                  **ptr1, ULONG size); */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_timer_pointer_add:
+        ADD      R0,R0,R1, LSL #+2
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_user_timer_pointer_get(TX_TIMER_INTERNAL             */
+/**                              *internal_timer, TX_TIMER **user_timer); */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_user_timer_pointer_get:
+        SUBS    R0,#8
+        STR     R0,[R1, #+0]
+        BX      LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_thread_stack_check(TX_THREAD *thread_ptr,            */
+/**                                              VOID **highest_stack);   */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_thread_stack_check:
+        PUSH     {R3-R5,LR}
+        MOVS     R4,R0
+        MOVS     R5,R1
+        BL       _tx_thread_interrupt_disable
+        CMP      R4,#+0
+        BEQ.N    _tx_misra_thread_stack_check_0
+        LDR      R1,[R4, #+0]
+        LDR      R2,=0x54485244
+        CMP      R1,R2
+        BNE.N    _tx_misra_thread_stack_check_0
+        LDR      R1,[R4, #+8]
+        LDR      R2,[R5, #+0]
+        CMP      R1,R2
+        BCS.N    _tx_misra_thread_stack_check_1
+        LDR      R1,[R4, #+8]
+        STR      R1,[R5, #+0]
+_tx_misra_thread_stack_check_1:
+        LDR      R1,[R4, #+12]
+        LDR      R1,[R1, #+0]
+        CMP      R1,#-269488145
+        BNE.N    _tx_misra_thread_stack_check_2
+        LDR      R1,[R4, #+16]
+        LDR      R1,[R1, #+1]
+        CMP      R1,#-269488145
+        BNE.N    _tx_misra_thread_stack_check_2
+        LDR      R1,[R5, #+0]
+        LDR      R2,[R4, #+12]
+        CMP      R1,R2
+        BCS.N    _tx_misra_thread_stack_check_3
+_tx_misra_thread_stack_check_2:
+        BL       _tx_thread_interrupt_restore
+        MOVS     R0,R4
+        BL       _tx_thread_stack_error_handler
+        BL       _tx_thread_interrupt_disable
+_tx_misra_thread_stack_check_3:
+        LDR      R1,[R5, #+0]
+        LDR      R1,[R1, #-4]
+        CMP      R1,#-269488145
+        BEQ.N    _tx_misra_thread_stack_check_0
+        BL       _tx_thread_interrupt_restore
+        MOVS     R0,R4
+        BL       _tx_thread_stack_analyze
+        BL       _tx_thread_interrupt_disable
+_tx_misra_thread_stack_check_0:
+        BL       _tx_thread_interrupt_restore
+        POP      {R0,R4,R5,PC}    // return
+
+#ifdef TX_ENABLE_EVENT_TRACE
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_trace_event_insert(ULONG event_id,                   */
+/**           VOID *info_field_1, ULONG info_field_2, ULONG info_field_3, */
+/**           ULONG info_field_4, ULONG filter, ULONG time_stamp);        */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_trace_event_insert:
+        PUSH     {R3-R7,LR}
+        LDR.N    R4,DataTable2_1
+        LDR      R4,[R4, #+0]
+        CMP      R4,#+0
+        BEQ.N    _tx_misra_trace_event_insert_0
+        LDR.N    R5,DataTable2_2
+        LDR      R5,[R5, #+0]
+        LDR      R6,[SP, #+28]
+        TST      R5,R6
+        BEQ.N    _tx_misra_trace_event_insert_0
+        LDR.N    R5,DataTable2_3
+        LDR      R5,[R5, #+0]
+        LDR.N    R6,DataTable2_4
+        LDR      R6,[R6, #+0]
+        CMP      R5,#+0
+        BNE.N    _tx_misra_trace_event_insert_1
+        LDR      R5,[R6, #+44]
+        LDR      R7,[R6, #+60]
+        LSLS     R7,R7,#+16
+        ORRS     R7,R7,#0x80000000
+        ORRS     R5,R7,R5
+        B.N      _tx_misra_trace_event_insert_2
+_tx_misra_trace_event_insert_1:
+        CMP      R5,#-252645136
+        BCS.N    _tx_misra_trace_event_insert_3
+        MOVS     R5,R6
+        MOVS     R6,#-1
+        B.N      _tx_misra_trace_event_insert_2
+_tx_misra_trace_event_insert_3:
+        MOVS     R6,#-252645136
+        MOVS     R5,#+0
+_tx_misra_trace_event_insert_2:
+        STR      R6,[R4, #+0]
+        STR      R5,[R4, #+4]
+        STR      R0,[R4, #+8]
+        LDR      R0,[SP, #+32]
+        STR      R0,[R4, #+12]
+        STR      R1,[R4, #+16]
+        STR      R2,[R4, #+20]
+        STR      R3,[R4, #+24]
+        LDR      R0,[SP, #+24]
+        STR      R0,[R4, #+28]
+        ADDS     R4,R4,#+32
+        LDR.N    R0,DataTable2_5
+        LDR      R0,[R0, #+0]
+        CMP      R4,R0
+        BCC.N    _tx_misra_trace_event_insert_4
+        LDR.N    R0,DataTable2_6
+        LDR      R4,[R0, #+0]
+        LDR.N    R0,DataTable2_1
+        STR      R4,[R0, #+0]
+        LDR.N    R0,DataTable2_7
+        LDR      R0,[R0, #+0]
+        STR      R4,[R0, #+32]
+        LDR.N    R0,DataTable2_8
+        LDR      R0,[R0, #+0]
+        CMP      R0,#+0
+        BEQ.N    _tx_misra_trace_event_insert_0
+        LDR.N    R0,DataTable2_7
+        LDR      R0,[R0, #+0]
+        LDR.N    R1,DataTable2_8
+        LDR      R1,[R1, #+0]
+        BLX      R1
+        B.N      _tx_misra_trace_event_insert_0
+_tx_misra_trace_event_insert_4:
+        LDR.N    R0,DataTable2_1
+        STR      R4,[R0, #+0]
+        LDR.N    R0,DataTable2_7
+        LDR      R0,[R0, #+0]
+        STR      R4,[R0, #+32]
+_tx_misra_trace_event_insert_0:
+        POP      {R0,R4-R7,PC}    // return
+
+
+        .data
+DataTable2_1:
+        .word     _tx_trace_buffer_current_ptr
+
+        .data
+DataTable2_2:
+        .word     _tx_trace_event_enable_bits
+
+        .data
+DataTable2_5:
+        .word     _tx_trace_buffer_end_ptr
+
+        .data
+DataTable2_6:
+        .word     _tx_trace_buffer_start_ptr
+
+        .data
+DataTable2_7:
+        .word     _tx_trace_header_ptr
+
+        .data
+DataTable2_8:
+        .word     _tx_trace_full_notify_function
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  _tx_misra_time_stamp_get(VOID);                               */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_time_stamp_get:
+        MOVS     R0,#+0
+        BX       LR               // return
+
+#endif
+
+        .data
+DataTable2_3:
+        .word     _tx_thread_system_state
+
+        .data
+DataTable2_4:
+        .word     _tx_thread_current_ptr
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  UINT  _tx_misra_always_true(void);                                   */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_always_true:
+        MOVS     R0,#+1
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  UINT  _tx_misra_status_get(UINT status);                             */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_status_get:
+        MOVS     R0,#+0
+        BX       LR               // return
+
+
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  ULONG  _tx_misra_ipsr_get(void);                                                          */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_ipsr_get:
+        MRS      R0, IPSR
+        BX       LR               // return
+
+
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  ULONG  _tx_misra_control_get(void);                                                       */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_control_get:
+        MRS      R0, CONTROL
+        BX       LR               // return
+
+        
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  void   _tx_misra_control_set(ULONG value);                                                */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_control_set:
+        MSR      CONTROL, R0
+        BX       LR               // return
+
+        
+#ifdef __ARM_FP
+
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  ULONG  _tx_misra_fpccr_get(void);                                                         */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_fpccr_get:
+        LDR      r0, =0xE000EF34  // Build FPCCR address
+        LDR      r0, [r0]         // Load FPCCR value
+        BX       LR               // return
+        
+        
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  void   _tx_misra_vfp_touch(void);                                                         */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_vfp_touch:
+        vmov.f32 s0, s0
+        BX       LR               // return
+        
+#endif
+        
+
+        .data
+        .word 0