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Release 6.1.6

Browse Source
This commit is contained in:
Yuxin Zhou
2021-04-03 01:03:21 +00:00
parent 6ffaf848a0
commit b12bd44faa
388 changed files with 33113 additions and 1136 deletions
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9
ports/arc_em/metaware/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h ARCv2_EM/MetaWare */
/* 6.1 */
/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -48,6 +48,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -288,7 +291,7 @@ ULONG _tx_misra_time_stamp_get(VOID);
macros. */
#define TX_INTERRUPT_SAVE_AREA register unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA register UINT interrupt_save;
#define TX_DISABLE interrupt_save = _clri();
#define TX_RESTORE _seti(interrupt_save);
@@ -308,7 +311,7 @@ ULONG _tx_misra_time_stamp_get(VOID);
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX ARCv2_EM/MetaWare Version 6.1 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX ARCv2_EM/MetaWare Version 6.1.6 *";
#else
#ifdef TX_MISRA_ENABLE
extern CHAR _tx_version_id[100];

12
ports/arc_em/metaware/readme_threadx.txt
View File

@@ -209,6 +209,18 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
tx_initialize_low_level.s Modified comments
tx_thread_context_restore.s r25/r30 are caller saved
tx_thread_context_save.s r25/r30 are caller saved
tx_thread_interrupt_control.s Modified comments
tx_thread_schedule.s fixed interrupt priority overwritting bug,
and fixed hardware stack checker disable and reenable logic
tx_thread_stack_build.s Modified comments
tx_thread_system_return.s Modified comments
tx_timer_interrupt.s remove unneeded load of _tx_thread_preempt_disable
09-30-2020 Initial ThreadX 6.1 for ARCv2 EM using MetaWare tools.

124
ports/arc_em/metaware/src/tx_initialize_low_level.s
View File

@@ -8,33 +8,32 @@
;/* and in the root directory of this software. */
;/* */
;/**************************************************************************/
;
;
;/**************************************************************************/
;/**************************************************************************/
;/** */
;/** ThreadX Component */
;/** */
;/** ThreadX Component */
;/** */
;/** Initialize */
;/** */
;/**************************************************************************/
;/**************************************************************************/
;
.equ IRQ_SELECT, 0x40B
.equ KSTACK_TOP, 0x264
.equ KSTACK_BASE, 0x265
.equ STATUS32_SC, 0x4000
;
;
; /* Define section for placement after all linker allocated RAM memory. This
; is used to calculate the first free address that is passed to
; is used to calculate the first free address that is passed to
; tx_appication_define, soley for the ThreadX application's use. */
;
.section ".free_memory","aw"
.align 4
.global _tx_first_free_address
_tx_first_free_address:
.space 4
.space 4
;
; /* Define section for placement before the main stack area for setting
; up the STACK_TOP address for hardware stack checking. */
@@ -53,54 +52,55 @@ _tx_system_stack_top_address:
.global _tx_system_stack_base_address
_tx_system_stack_base_address:
.space 4
;
;
.text
;/**************************************************************************/
;/* */
;/* FUNCTION RELEASE */
;/* */
;/**************************************************************************/
;/* */
;/* FUNCTION RELEASE */
;/* */
;/* _tx_initialize_low_level ARCv2_EM/MetaWare */
;/* 6.1 */
;/* 6.1.6 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
;/* */
;/* DESCRIPTION */
;/* */
;/* This function is responsible for any low-level processor */
;/* initialization, including setting up interrupt vectors, setting */
;/* up a periodic timer interrupt source, saving the system stack */
;/* pointer for use in ISR processing later, and finding the first */
;/* available RAM memory address for tx_application_define. */
;/* */
;/* INPUT */
;/* */
;/* None */
;/* */
;/* OUTPUT */
;/* */
;/* None */
;/* */
;/* CALLS */
;/* */
;/* None */
;/* */
;/* CALLED BY */
;/* */
;/* _tx_initialize_kernel_enter ThreadX entry function */
;/* */
;/* RELEASE HISTORY */
;/* */
;/* */
;/* This function is responsible for any low-level processor */
;/* initialization, including setting up interrupt vectors, setting */
;/* up a periodic timer interrupt source, saving the system stack */
;/* pointer for use in ISR processing later, and finding the first */
;/* available RAM memory address for tx_application_define. */
;/* */
;/* INPUT */
;/* */
;/* None */
;/* */
;/* OUTPUT */
;/* */
;/* None */
;/* */
;/* CALLS */
;/* */
;/* None */
;/* */
;/* CALLED BY */
;/* */
;/* _tx_initialize_kernel_enter ThreadX entry function */
;/* */
;/* RELEASE HISTORY */
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* 04-02-2021 Andres Mlinar Modified comments, */
;/* resulting in version 6.1.6 */
;/* */
;/**************************************************************************/
;VOID _tx_initialize_low_level(VOID)
;{
.global _tx_initialize_low_level
.type _tx_initialize_low_level, @function
.type _tx_initialize_low_level, @function
_tx_initialize_low_level:
.ifdef TX_ENABLE_HW_STACK_CHECKING
@@ -130,7 +130,7 @@ _tx_initialize_low_level:
;
;
; /* Setup Timer 0 for periodic interrupts at interrupt vector 16. */
;
;
mov r0, 0 ; Disable additional ISR reg saving/restoring
sr r0, [AUX_IRQ_CTRL] ;
@@ -171,7 +171,7 @@ _tx_initialize_low_level:
;
; /* Define default vector table entries. */
;
.global _tx_memory_error
.global _tx_memory_error
_tx_memory_error:
flag 1
nop
@@ -179,7 +179,7 @@ _tx_memory_error:
nop
b _tx_memory_error
.global _tx_instruction_error
.global _tx_instruction_error
_tx_instruction_error:
flag 1
nop
@@ -187,7 +187,7 @@ _tx_instruction_error:
nop
b _tx_instruction_error
.global _tx_ev_machine_check
.global _tx_ev_machine_check
_tx_ev_machine_check:
flag 1
nop
@@ -195,7 +195,7 @@ _tx_ev_machine_check:
nop
b _tx_ev_machine_check
.global _tx_ev_tblmiss_inst
.global _tx_ev_tblmiss_inst
_tx_ev_tblmiss_inst:
flag 1
nop
@@ -203,7 +203,7 @@ _tx_ev_tblmiss_inst:
nop
b _tx_ev_tblmiss_inst
.global _tx_ev_tblmiss_data
.global _tx_ev_tblmiss_data
_tx_ev_tblmiss_data:
flag 1
nop
@@ -211,7 +211,7 @@ _tx_ev_tblmiss_data:
nop
b _tx_ev_tblmiss_data
.global _tx_ev_protection_viol
.global _tx_ev_protection_viol
_tx_ev_protection_viol:
flag 1
nop
@@ -219,7 +219,7 @@ _tx_ev_protection_viol:
nop
b _tx_ev_protection_viol
.global _tx_ev_privilege_viol
.global _tx_ev_privilege_viol
_tx_ev_privilege_viol:
flag 1
nop
@@ -227,7 +227,7 @@ _tx_ev_privilege_viol:
nop
b _tx_ev_privilege_viol
.global _tx_ev_software_int
.global _tx_ev_software_int
_tx_ev_software_int:
flag 1
nop
@@ -235,7 +235,7 @@ _tx_ev_software_int:
nop
b _tx_ev_software_int
.global _tx_ev_trap
.global _tx_ev_trap
_tx_ev_trap:
flag 1
nop
@@ -243,7 +243,7 @@ _tx_ev_trap:
nop
b _tx_ev_trap
.global _tx_ev_extension
.global _tx_ev_extension
_tx_ev_extension:
flag 1
nop
@@ -251,7 +251,7 @@ _tx_ev_extension:
nop
b _tx_ev_extension
.global _tx_ev_divide_by_zero
.global _tx_ev_divide_by_zero
_tx_ev_divide_by_zero:
flag 1
nop
@@ -259,7 +259,7 @@ _tx_ev_divide_by_zero:
nop
b _tx_ev_divide_by_zero
.global _tx_ev_dc_error
.global _tx_ev_dc_error
_tx_ev_dc_error:
flag 1
nop
@@ -267,7 +267,7 @@ _tx_ev_dc_error:
nop
b _tx_ev_dc_error
.global _tx_ev_maligned
.global _tx_ev_maligned
_tx_ev_maligned:
flag 1
nop
@@ -275,7 +275,7 @@ _tx_ev_maligned:
nop
b _tx_ev_maligned
.global _tx_unsued_0
.global _tx_unsued_0
_tx_unsued_0:
flag 1
nop
@@ -283,7 +283,7 @@ _tx_unsued_0:
nop
b _tx_unsued_0
.global _tx_unused_1
.global _tx_unused_1
_tx_unused_1:
flag 1
nop
@@ -291,7 +291,7 @@ _tx_unused_1:
nop
b _tx_unused_1
.global _tx_timer_0
.global _tx_timer_0
_tx_timer_0:
;
; /* By default, setup Timer 0 as the ThreadX timer interrupt. */
@@ -311,7 +311,7 @@ _tx_timer_0:
; nop
; b _tx_timer_0
.global _tx_timer_1
.global _tx_timer_1
_tx_timer_1:
sub sp, sp, 160 ; Allocate an interrupt stack frame
st blink, [sp, 16] ; Save blink
@@ -333,7 +333,7 @@ _tx_timer_1:
; nop
; b _tx_timer_1
.global _tx_undefined_0
.global _tx_undefined_0
_tx_undefined_0:
flag 1
nop
@@ -341,7 +341,7 @@ _tx_undefined_0:
nop
b _tx_undefined_0
.global _tx_undefined_1
.global _tx_undefined_1
_tx_undefined_1:
flag 1
nop
@@ -349,7 +349,7 @@ _tx_undefined_1:
nop
b _tx_undefined_1
.global _tx_undefined_2
.global _tx_undefined_2
_tx_undefined_2:
flag 1
nop

99
ports/arc_em/metaware/src/tx_thread_context_restore.s
View File

@@ -8,77 +8,70 @@
;/* and in the root directory of this software. */
;/* */
;/**************************************************************************/
;
;
;/**************************************************************************/
;/**************************************************************************/
;/** */
;/** ThreadX Component */
;/** */
;/** ThreadX Component */
;/** */
;/** Thread */
;/** */
;/**************************************************************************/
;/**************************************************************************/
;
;
;#define TX_SOURCE_CODE
;
.equ BTA, 0x412
.equ KSTACK_TOP, 0x264
.equ KSTACK_BASE, 0x265
.equ STATUS32_SC, 0x4000
;
;/* Include necessary system files. */
;
;#include "tx_api.h"
;#include "tx_thread.h"
;#include "tx_timer.h"
;
;
;/**************************************************************************/
;/* */
;/* FUNCTION RELEASE */
;/* */
;/**************************************************************************/
;/* */
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_context_restore ARCv2_EM/MetaWare */
;/* 6.1 */
;/* 6.1.6 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
;/* */
;/* DESCRIPTION */
;/* */
;/* This function restores the interrupt context if it is processing a */
;/* nested interrupt. If not, it returns to the interrupt thread if no */
;/* preemption is necessary. Otherwise, if preemption is necessary or */
;/* if no thread was running, the function returns to the scheduler. */
;/* */
;/* INPUT */
;/* */
;/* None */
;/* */
;/* OUTPUT */
;/* */
;/* None */
;/* */
;/* CALLS */
;/* */
;/* _tx_thread_schedule Thread scheduling routine */
;/* */
;/* CALLED BY */
;/* */
;/* ISRs Interrupt Service Routines */
;/* */
;/* RELEASE HISTORY */
;/* */
;/* */
;/* This function restores the interrupt context if it is processing a */
;/* nested interrupt. If not, it returns to the interrupt thread if no */
;/* preemption is necessary. Otherwise, if preemption is necessary or */
;/* if no thread was running, the function returns to the scheduler. */
;/* */
;/* INPUT */
;/* */
;/* None */
;/* */
;/* OUTPUT */
;/* */
;/* None */
;/* */
;/* CALLS */
;/* */
;/* _tx_thread_schedule Thread scheduling routine */
;/* */
;/* CALLED BY */
;/* */
;/* ISRs Interrupt Service Routines */
;/* */
;/* RELEASE HISTORY */
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* 04-02-2021 Andres Mlinar Modified comment(s), and */
;/* r25/r30 are caller saved, */
;/* resulting in version 6.1.6 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_context_restore(VOID)
;{
.global _tx_thread_context_restore
.type _tx_thread_context_restore, @function
.type _tx_thread_context_restore, @function
_tx_thread_context_restore:
;
; /* Note: it is assumed that the stack pointer is in the same position now as
@@ -109,7 +102,7 @@ _tx_thread_context_restore:
;
; /* Interrupts are nested. */
;
; /* Just recover the saved registers and return to the point of
; /* Just recover the saved registers and return to the point of
; interrupt. */
;
@@ -119,7 +112,7 @@ __tx_thread_nested_restore:
sr r0, [LP_START] ; Restore LP_START
ld r1, [sp, 8] ; Recover LP_END
sr r1, [LP_END] ; Restore LP_END
ld r2, [sp, 12] ; Recover LP_COUNT
ld r2, [sp, 12] ; Recover LP_COUNT
mov LP_COUNT, r2
ld r2, [sp, 156] ; Pickup BTA
sr r2, [BTA] ; Recover BTA
@@ -128,6 +121,7 @@ __tx_thread_nested_restore:
ld r59, [sp, 144] ; Recover r59
.endif
ld blink, [sp, 16] ; Recover blink
ld r25, [sp, 32] ; Recover r25
ld r12, [sp, 84] ; Recover r12
ld r11, [sp, 88] ; Recover r11
ld r10, [sp, 92] ; Recover r10
@@ -140,8 +134,9 @@ __tx_thread_nested_restore:
ld r3, [sp, 120] ; Recover r3
ld r2, [sp, 124] ; Recover r2
ld r1, [sp, 128] ; Recover r1
ld r0, [sp, 132] ; Recover r0
add sp, sp, 160 ; Recover interrupt stack frame
ld r0, [sp, 132] ; Recover r0
ld r30, [sp, 136] ; Recover r30
add sp, sp, 160 ; Recover interrupt stack frame
rtie ; Return from interrupt
;
;
@@ -149,7 +144,7 @@ __tx_thread_nested_restore:
__tx_thread_not_nested_restore:
;
; /* Determine if a thread was interrupted and no preemption is required. */
; else if (((_tx_thread_current_ptr) && (_tx_thread_current_ptr == _tx_thread_execute_ptr)
; else if (((_tx_thread_current_ptr) && (_tx_thread_current_ptr == _tx_thread_execute_ptr)
; || (_tx_thread_preempt_disable))
; {
;
@@ -207,6 +202,7 @@ __tx_thread_no_preempt_restore:
ld r59, [sp, 144] ; Recover r59
.endif
ld blink, [sp, 16] ; Recover blink
ld r25, [sp, 32] ; Recover r25
ld r12, [sp, 84] ; Recover r12
ld r11, [sp, 88] ; Recover r11
ld r10, [sp, 92] ; Recover r10
@@ -220,6 +216,7 @@ __tx_thread_no_preempt_restore:
ld r2, [sp, 124] ; Recover r2
ld r1, [sp, 128] ; Recover r1
ld r0, [sp, 132] ; Recover r0
ld r30, [sp, 136] ; Recover r30
add sp, sp, 160 ; Recover interrupt stack frame
rtie ; Return from interrupt
;

96
ports/arc_em/metaware/src/tx_thread_context_save.s
View File

@@ -8,76 +8,68 @@
;/* and in the root directory of this software. */
;/* */
;/**************************************************************************/
;
;
;/**************************************************************************/
;/**************************************************************************/
;/** */
;/** ThreadX Component */
;/** */
;/** ThreadX Component */
;/** */
;/** Thread */
;/** */
;/**************************************************************************/
;/**************************************************************************/
;
;
;#define TX_SOURCE_CODE
;
.equ BTA, 0x412
.equ KSTACK_TOP, 0x264
.equ KSTACK_BASE, 0x265
.equ STATUS32_SC, 0x4000
;
;/* Include necessary system files. */
;
;#include "tx_api.h"
;#include "tx_thread.h"
;#include "tx_timer.h"
;
;
;/**************************************************************************/
;/* */
;/* FUNCTION RELEASE */
;/* */
;/**************************************************************************/
;/* */
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_context_save ARCv2_EM/MetaWare */
;/* 6.1 */
;/* 6.1.6 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
;/* */
;/* DESCRIPTION */
;/* */
;/* This function saves the context of an executing thread in the */
;/* beginning of interrupt processing. The function also ensures that */
;/* the system stack is used upon return to the calling ISR. */
;/* */
;/* INPUT */
;/* */
;/* None */
;/* */
;/* OUTPUT */
;/* */
;/* None */
;/* */
;/* CALLS */
;/* */
;/* None */
;/* */
;/* CALLED BY */
;/* */
;/* ISRs */
;/* */
;/* RELEASE HISTORY */
;/* */
;/* */
;/* This function saves the context of an executing thread in the */
;/* beginning of interrupt processing. The function also ensures that */
;/* the system stack is used upon return to the calling ISR. */
;/* */
;/* INPUT */
;/* */
;/* None */
;/* */
;/* OUTPUT */
;/* */
;/* None */
;/* */
;/* CALLS */
;/* */
;/* None */
;/* */
;/* CALLED BY */
;/* */
;/* ISRs */
;/* */
;/* RELEASE HISTORY */
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* 04-02-2021 Andres Mlinar Modified comment(s), and */
;/* r25/r30 are caller saved, */
;/* resulting in version 6.1.6 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_context_save(VOID)
;{
.global _tx_thread_context_save
.type _tx_thread_context_save, @function
.type _tx_thread_context_save, @function
_tx_thread_context_save:
;
; /* Upon entry to this routine, it is assumed that an interrupt stack frame
@@ -106,6 +98,8 @@ _tx_thread_context_save:
; calling ISR. */
;
__tx_thread_nested_save: ; Label is for special nested interrupt case from idle system save below
st r30, [sp, 136] ; Save r30
st r25, [sp, 32] ; Save r25
st r12, [sp, 84] ; Save r12
st r11, [sp, 88] ; Save r11
st r10, [sp, 92] ; Save r10
@@ -114,7 +108,7 @@ __tx_thread_nested_save: ; Label is for special n
st r7, [sp, 104] ; Save r7
st r6, [sp, 108] ; Save r6
st r5, [sp, 112] ; Save r5
st r4, [sp, 116] ; Save r6
st r4, [sp, 116] ; Save r4
lr r10, [LP_START] ; Pickup LP_START
lr r9, [LP_END] ; Pickup LP_END
st LP_COUNT, [sp, 12] ; Save LP_COUNT
@@ -156,6 +150,8 @@ __tx_thread_not_nested_save:
add r0, r0, 1 ; Increment the nested interrupt count
st r0, [gp, _tx_thread_system_state@sda] ; Update system state
ld r1, [gp, _tx_thread_current_ptr@sda] ; Pickup current thread pointer
st r30, [sp, 136] ; Save r30
st r25, [sp, 32] ; Save r25
st r12, [sp, 84] ; Save r12
st r11, [sp, 88] ; Save r11
breq r1, 0, __tx_thread_idle_system_save ; If no thread is running, idle system was
@@ -247,13 +243,15 @@ __tx_thread_idle_system_save:
lr r0, [AUX_IRQ_ACT] ; Pickup the interrupt active register
neg r1, r0 ; Negate
and r1, r0, r1 ; See if there are any other interrupts present
brne r0, r1, __tx_thread_nested_save ; If more interrupts, go into the nested interrupt save logic
breq r0, r1, __tx_thread_not_nested
j __tx_thread_nested_save ; If more interrupts, go into the nested interrupt save logic
__tx_thread_not_nested:
;
; /* Not much to do here, just adjust the stack pointer, and return to
; /* Not much to do here, just adjust the stack pointer, and return to
; ISR processing. */
;
j_s.d [blink] ; Return to ISR
add sp, sp, 160 ; Recover stack space
add sp, sp, 160 ; Recover stack space
;
; }
;}

76
ports/arc_em/metaware/src/tx_thread_interrupt_control.s
View File

@@ -8,69 +8,61 @@
;/* and in the root directory of this software. */
;/* */
;/**************************************************************************/
;
;
;/**************************************************************************/
;/**************************************************************************/
;/** */
;/** ThreadX Component */
;/** */
;/** ThreadX Component */
;/** */
;/** Thread */
;/** */
;/**************************************************************************/
;/**************************************************************************/
;
;#define TX_SOURCE_CODE
;
;
;/* Include necessary system files. */
;
;#include "tx_api.h"
;#include "tx_thread.h"
;
;
;/**************************************************************************/
;/* */
;/* FUNCTION RELEASE */
;/* */
;/**************************************************************************/
;/* */
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_interrupt_control ARCv2_EM/MetaWare */
;/* 6.1 */
;/* 6.1.6 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
;/* */
;/* DESCRIPTION */
;/* */
;/* This function is responsible for changing the interrupt lockout */
;/* posture of the system. */
;/* */
;/* INPUT */
;/* */
;/* new_posture New interrupt lockout posture */
;/* */
;/* OUTPUT */
;/* */
;/* old_posture Old interrupt lockout posture */
;/* */
;/* CALLS */
;/* */
;/* None */
;/* */
;/* CALLED BY */
;/* */
;/* Application Code */
;/* */
;/* RELEASE HISTORY */
;/* */
;/* */
;/* This function is responsible for changing the interrupt lockout */
;/* posture of the system. */
;/* */
;/* INPUT */
;/* */
;/* new_posture New interrupt lockout posture */
;/* */
;/* OUTPUT */
;/* */
;/* old_posture Old interrupt lockout posture */
;/* */
;/* CALLS */
;/* */
;/* None */
;/* */
;/* CALLED BY */
;/* */
;/* Application Code */
;/* */
;/* RELEASE HISTORY */
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* 04-02-2021 Andres Mlinar Modified comments, */
;/* resulting in version 6.1.6 */
;/* */
;/**************************************************************************/
;UINT _tx_thread_interrupt_control(UINT new_posture)
;{
.global _tx_thread_interrupt_control
.type _tx_thread_interrupt_control, @function
.type _tx_thread_interrupt_control, @function
_tx_thread_interrupt_control:
;
; /* Pickup current interrupt lockout posture. */

117
ports/arc_em/metaware/src/tx_thread_schedule.s
View File

@@ -8,73 +8,67 @@
;/* and in the root directory of this software. */
;/* */
;/**************************************************************************/
;
;
;/**************************************************************************/
;/**************************************************************************/
;/** */
;/** ThreadX Component */
;/** */
;/** ThreadX Component */
;/** */
;/** Thread */
;/** */
;/**************************************************************************/
;/**************************************************************************/
;
;
;#define TX_SOURCE_CODE
;
;
.equ BTA, 0x412
.equ KSTACK_TOP, 0x264
.equ KSTACK_BASE, 0x265
.equ STATUS32_SC, 0x4000
;
;/* Include necessary system files. */
;
;#include "tx_api.h"
;#include "tx_thread.h"
;#include "tx_timer.h"
;
;
;/**************************************************************************/
;/* */
;/* FUNCTION RELEASE */
;/* */
;/**************************************************************************/
;/* */
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_schedule ARCv2_EM/MetaWare */
;/* 6.1 */
;/* 6.1.6 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
;/* */
;/* DESCRIPTION */
;/* */
;/* This function waits for a thread control block pointer to appear in */
;/* the _tx_thread_execute_ptr variable. Once a thread pointer appears */
;/* in the variable, the corresponding thread is resumed. */
;/* */
;/* INPUT */
;/* */
;/* None */
;/* */
;/* OUTPUT */
;/* */
;/* */
;/* This function waits for a thread control block pointer to appear in */
;/* the _tx_thread_execute_ptr variable. Once a thread pointer appears */
;/* in the variable, the corresponding thread is resumed. */
;/* */
;/* INPUT */
;/* */
;/* None */
;/* */
;/* CALLS */
;/* */
;/* */
;/* OUTPUT */
;/* */
;/* None */
;/* */
;/* CALLED BY */
;/* */
;/* _tx_initialize_kernel_enter ThreadX entry function */
;/* _tx_thread_system_return Return to system from thread */
;/* _tx_thread_context_restore Restore thread's context */
;/* */
;/* RELEASE HISTORY */
;/* */
;/* */
;/* CALLS */
;/* */
;/* None */
;/* */
;/* CALLED BY */
;/* */
;/* _tx_initialize_kernel_enter ThreadX entry function */
;/* _tx_thread_system_return Return to system from thread */
;/* _tx_thread_context_restore Restore thread's context */
;/* */
;/* RELEASE HISTORY */
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* 04-02-2021 Andres Mlinar Modified comment(s), and */
;/* fixed interrupt priority */
;/* overwritting bug, and */
;/* fixed hardware stack checker*/
;/* disable and reenable logic, */
;/* resulting in version 6.1.6 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_schedule(VOID)
@@ -85,8 +79,13 @@ _tx_thread_schedule:
;
; /* Enable interrupts. */
;
mov r0, 0x1F ; Build enable interrupt value
seti r0 ; Enable interrupts
seti 0 ; Enable interrupts without changing threshold level
.ifdef TX_ENABLE_HW_STACK_CHECKING
lr r2, [status32] ; Pickup current STATUS32
and r2, r2, ~STATUS32_SC ; Clear the hardware stack checking enable bit (SC)
kflag r2 ; Disable hardware stack checking
.endif
;
; /* Wait for a thread to execute. */
; do
@@ -99,7 +98,7 @@ __tx_thread_schedule_loop:
;
; }
; while(_tx_thread_execute_ptr == TX_NULL);
;
;
; /* Yes! We have a thread to execute. Lockout interrupts and
; transfer control to it. */
;
@@ -118,16 +117,6 @@ __tx_thread_schedule_loop:
ld r4, [r0, 24] ; Pickup time-slice for this thread
add r3, r3, 1 ; Increment run counter
st r3, [r0, 4] ; Store the new run counter
.ifdef TX_ENABLE_HW_STACK_CHECKING
lr r2, [status32] ; Pickup current STATUS32
and r2, r2, ~STATUS32_SC ; Clear the hardware stack checking enable bit (SC)
kflag r2 ; Disable hardware stack checking
ld r3, [r0, 12] ; Pickup the top of the thread's stack (lowest address)
sr r3, [KSTACK_TOP] ; Setup KSTACK_TOP
ld r3, [r0, 16] ; Pickup the base of the thread's stack (highest address)
sr r3, [KSTACK_BASE] ; Setup KSTACK_BASE
.endif
;
; /* Setup time-slice, if present. */
; _tx_timer_time_slice = _tx_thread_current_ptr -> tx_thread_time_slice;
@@ -135,6 +124,10 @@ __tx_thread_schedule_loop:
ld sp, [r0, 8] ; Switch to thread's stack
.ifdef TX_ENABLE_HW_STACK_CHECKING
ld r3, [r0, 12] ; Pickup the top of the thread's stack (lowest address)
sr r3, [KSTACK_TOP] ; Setup KSTACK_TOP
ld r3, [r0, 16] ; Pickup the base of the thread's stack (highest address)
sr r3, [KSTACK_BASE] ; Setup KSTACK_BASE
or r2, r2, STATUS32_SC ; Or in hardware stack checking enable bit (SC)
kflag r2 ; Enable hardware stack checking
.endif
@@ -176,8 +169,8 @@ __tx_thread_schedule_loop:
ld r13, [sp, 64] ; Recover r13
ld r1, [sp, 68] ; Pickup status32
ld r30, [sp, 72] ; Recover r30
add sp, sp, 76 ; Recover solicited stack frame
j_s.d [blink] ; Return to thread and restore flags
add sp, sp, 76 ; Recover solicited stack frame
j_s.d [blink] ; Return to thread and restore flags
seti r1 ; Recover STATUS32
;
__tx_thread_schedule_int_ret:
@@ -189,7 +182,7 @@ __tx_thread_schedule_int_ret:
sr r0, [LP_START] ; Restore LP_START
ld r1, [sp, 8] ; Recover LP_END
sr r1, [LP_END] ; Restore LP_END
ld r2, [sp, 12] ; Recover LP_COUNT
ld r2, [sp, 12] ; Recover LP_COUNT
mov LP_COUNT, r2
ld r0, [sp, 156] ; Pickup saved BTA
sr r0, [BTA] ; Recover BTA
@@ -230,7 +223,7 @@ __tx_thread_schedule_int_ret:
.endif
add sp, sp, 160 ; Recover interrupt stack frame
rtie ; Return to point of interrupt
;
;}
;

96
ports/arc_em/metaware/src/tx_thread_stack_build.s
View File

@@ -8,70 +8,60 @@
;/* and in the root directory of this software. */
;/* */
;/**************************************************************************/
;
;
;/**************************************************************************/
;/**************************************************************************/
;/** */
;/** ThreadX Component */
;/** */
;/** ThreadX Component */
;/** */
;/** Thread */
;/** */
;/**************************************************************************/
;/**************************************************************************/
;
;
;#define TX_SOURCE_CODE
;
;
;/* Include necessary system files. */
;
;#include "tx_api.h"
;#include "tx_thread.h"
;
;
.equ LONG_ALIGN_MASK, 0xFFFFFFFC
.equ LONG_ALIGN_MASK, 0xFFFFFFFC
.equ INT_ENABLE_BITS, 0x8000001E
;
;
;/**************************************************************************/
;/* */
;/* FUNCTION RELEASE */
;/* */
;/**************************************************************************/
;/* */
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_stack_build ARCv2_EM/MetaWare */
;/* 6.1 */
;/* 6.1.6 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
;/* */
;/* DESCRIPTION */
;/* */
;/* */
;/* This function builds a stack frame on the supplied thread's stack. */
;/* The stack frame results in a fake interrupt return to the supplied */
;/* function pointer. */
;/* */
;/* INPUT */
;/* */
;/* function pointer. */
;/* */
;/* INPUT */
;/* */
;/* thread_ptr Pointer to thread control blk */
;/* function_ptr Pointer to return function */
;/* */
;/* OUTPUT */
;/* */
;/* */
;/* OUTPUT */
;/* */
;/* None */
;/* */
;/* CALLS */
;/* */
;/* */
;/* CALLS */
;/* */
;/* None */
;/* */
;/* CALLED BY */
;/* */
;/* */
;/* CALLED BY */
;/* */
;/* _tx_thread_create Create thread service */
;/* */
;/* RELEASE HISTORY */
;/* */
;/* */
;/* RELEASE HISTORY */
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* 04-02-2021 Andres Mlinar Modified comments, */
;/* resulting in version 6.1.6 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(VOID))
@@ -80,11 +70,11 @@
.type _tx_thread_stack_build, @function
_tx_thread_stack_build:
;
;
;
; /* Build a fake interrupt frame. The form of the fake interrupt stack
; on the ARCv2 EM should look like the following after it is built.
; Note that the extension registers are always assigned space here.
;
;
; Stack Top: 1 Interrupt stack frame type
; LP_START Initial loop start
; LP_END Initial loop end
@@ -119,7 +109,7 @@ _tx_thread_stack_build:
; r2 Initial r2
; r1 Initial r1
; r0 Initial r0
; r30 Initial r30
; r30 Initial r30
; r58 Initial r58
; r59 Initial r59
; 0 Reserved
@@ -127,10 +117,10 @@ _tx_thread_stack_build:
; 0 Initial BTA
; 0 Point of Interrupt (thread entry point)
; 0 Initial STATUS32
; 0 Backtrace
; 0 Backtrace
; 0 Backtrace
; 0 Backtrace
; 0 Backtrace
; 0 Backtrace
; 0 Backtrace
; 0 Backtrace
;
; *: these registers will only be saved and restored if flag -Xxmac_d16 is passed to hcac
;
@@ -179,19 +169,19 @@ _tx_thread_stack_build:
st r5, [r3, 128] ; Store initial r1
st r5, [r3, 132] ; Store initial r0
st r5, [r3, 136] ; Store initial r30
st r5, [r3, 140] ; Store initial r58
st r5, [r3, 140] ; Store initial r58
st r5, [r3, 144] ; Store initial r59
st r5, [r3, 148] ; Reserved
st r5, [r3, 152] ; Reserved
st r5, [r3, 156] ; Store initial BTA
st r1, [r3, 160] ; Store initial point of entry
st r1, [r3, 160] ; Store initial point of entry
lr r6, [status32] ; Pickup STATUS32
or r6, r6, INT_ENABLE_BITS ; Make sure interrupts are enabled
st r6, [r3, 164] ; Store initial STATUS32
st r5, [r3, 168] ; Backtrace 0
st r5, [r3, 172] ; Backtrace 0
st r5, [r3, 176] ; Backtrace 0
st r5, [r3, 180] ; Backtrace 0
st r5, [r3, 168] ; Backtrace 0
st r5, [r3, 172] ; Backtrace 0
st r5, [r3, 176] ; Backtrace 0
st r5, [r3, 180] ; Backtrace 0
;
; /* Setup stack pointer. */
; thread_ptr -> tx_thread_stack_ptr = r3;

82
ports/arc_em/metaware/src/tx_thread_system_return.s
View File

@@ -8,69 +8,61 @@
;/* and in the root directory of this software. */
;/* */
;/**************************************************************************/
;
;
;/**************************************************************************/
;/**************************************************************************/
;/** */
;/** ThreadX Component */
;/** */
;/** ThreadX Component */
;/** */
;/** Thread */
;/** */
;/**************************************************************************/
;/**************************************************************************/
;
;#define TX_SOURCE_CODE
;
.equ KSTACK_TOP, 0x264
.equ KSTACK_BASE, 0x265
.equ STATUS32_SC, 0x4000
;
;/* Include necessary system files. */
;
;#include "tx_api.h"
;#include "tx_thread.h"
;#include "tx_timer.h"
;
;
;/**************************************************************************/
;/* */
;/* FUNCTION RELEASE */
;/* */
;/**************************************************************************/
;/* */
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_system_return ARCv2_EM/MetaWare */
;/* 6.1 */
;/* 6.1.6 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
;/* */
;/* DESCRIPTION */
;/* */
;/* This function is target processor specific. It is used to transfer */
;/* control from a thread back to the ThreadX system. Only a */
;/* minimal context is saved since the compiler assumes temp registers */
;/* are going to get slicked by a function call anyway. */
;/* */
;/* INPUT */
;/* */
;/* None */
;/* */
;/* OUTPUT */
;/* */
;/* None */
;/* */
;/* CALLS */
;/* */
;/* _tx_thread_schedule Thread scheduling loop */
;/* */
;/* CALLED BY */
;/* */
;/* ThreadX components */
;/* */
;/* RELEASE HISTORY */
;/* */
;/* */
;/* This function is target processor specific. It is used to transfer */
;/* control from a thread back to the ThreadX system. Only a */
;/* minimal context is saved since the compiler assumes temp registers */
;/* are going to get slicked by a function call anyway. */
;/* */
;/* INPUT */
;/* */
;/* None */
;/* */
;/* OUTPUT */
;/* */
;/* None */
;/* */
;/* CALLS */
;/* */
;/* _tx_thread_schedule Thread scheduling loop */
;/* */
;/* CALLED BY */
;/* */
;/* ThreadX components */
;/* */
;/* RELEASE HISTORY */
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* 04-02-2021 Andres Mlinar Modified comments, */
;/* resulting in version 6.1.6 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_system_return(VOID)
@@ -105,7 +97,7 @@ _tx_thread_system_return:
st r13, [sp, 64] ; Save r13
st r2, [sp, 68] ; Save status32
st r30, [sp, 72] ; Save r30
;
;
.ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
;
; /* Call the thread exit function to indicate the thread is no longer executing. */

93
ports/arc_em/metaware/src/tx_timer_interrupt.s
View File

@@ -8,32 +8,21 @@
;/* and in the root directory of this software. */
;/* */
;/**************************************************************************/
;
;
;/**************************************************************************/
;/**************************************************************************/
;/** */
;/** ThreadX Component */
;/** */
;/** ThreadX Component */
;/** */
;/** Timer */
;/** */
;/**************************************************************************/
;/**************************************************************************/
;
;#define TX_SOURCE_CODE
;
;
;/* Include necessary system files. */
;
;#include "tx_api.h"
;#include "tx_timer.h"
;#include "tx_thread.h"
;
;
;/**************************************************************************/
;/* */
;/* FUNCTION RELEASE */
;/* */
;/**************************************************************************/
;/* */
;/* FUNCTION RELEASE */
;/* */
;/* _tx_timer_interrupt ARCv2_EM/MetaWare */
;/* 6.1.3 */
;/* AUTHOR */
@@ -41,34 +30,34 @@
;/* William E. Lamie, Microsoft Corporation */
;/* */
;/* DESCRIPTION */
;/* */
;/* This function processes the hardware timer interrupt. This */
;/* processing includes incrementing the system clock and checking for */
;/* time slice and/or timer expiration. If either is found, the */
;/* interrupt context save/restore functions are called along with the */
;/* expiration functions. */
;/* */
;/* INPUT */
;/* */
;/* None */
;/* */
;/* OUTPUT */
;/* */
;/* None */
;/* */
;/* CALLS */
;/* */
;/* _tx_timer_expiration_process Process timer expiration */
;/* _tx_thread_time_slice Time slice interrupted thread */
;/* _tx_thread_context_save Save interrupt context */
;/* _tx_thread_context_restore Restore interrupt context */
;/* */
;/* CALLED BY */
;/* */
;/* interrupt vector */
;/* */
;/* RELEASE HISTORY */
;/* */
;/* */
;/* This function processes the hardware timer interrupt. This */
;/* processing includes incrementing the system clock and checking for */
;/* time slice and/or timer expiration. If either is found, the */
;/* interrupt context save/restore functions are called along with the */
;/* expiration functions. */
;/* */
;/* INPUT */
;/* */
;/* None */
;/* */
;/* OUTPUT */
;/* */
;/* None */
;/* */
;/* CALLS */
;/* */
;/* _tx_timer_expiration_process Process timer expiration */
;/* _tx_thread_time_slice Time slice interrupted thread */
;/* _tx_thread_context_save Save interrupt context */
;/* _tx_thread_context_restore Restore interrupt context */
;/* */
;/* CALLED BY */
;/* */
;/* interrupt vector */
;/* */
;/* RELEASE HISTORY */
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
@@ -81,7 +70,7 @@
;VOID _tx_timer_interrupt(VOID)
;{
.global _tx_timer_interrupt
.type _tx_timer_interrupt, @function
.type _tx_timer_interrupt, @function
_tx_timer_interrupt:
;
; /* Upon entry to this routine, it is assumed the interrupt stack frame has
@@ -132,7 +121,7 @@ __tx_timer_no_time_slice:
;
ld r0, [gp, _tx_timer_current_ptr@sda] ; Pickup current timer pointer
ld r2, [r0, 0] ; Pickup examine actual list entry
breq r2, 0, __tx_timer_no_timer ;
breq r2, 0, __tx_timer_no_timer ;
; If NULL, no timer has expired, just move to the next entry
;
; /* Set expiration flag. */
@@ -220,7 +209,7 @@ __tx_timer_dont_activate:
;
__tx_timer_not_ts_expiration:
;
st 0, [gp, _tx_timer_expired_time_slice@sda]
st 0, [gp, _tx_timer_expired_time_slice@sda]
b _tx_thread_context_restore ; Go restore interrupt context..
; ..clearing time-slice expired flag
; Note that we don't return from
@@ -233,9 +222,9 @@ __tx_timer_nothing_expired:
ld r0, [sp, 0] ; Recover r0
ld r1, [sp, 4] ; Recover r1
ld r2, [sp, 8] ; Recover r2
add sp, sp, 160 ; Recover interrupt stack frame
add sp, sp, 160 ; Recover interrupt stack frame
rtie ; Return to point of interrupt
;
;}
.end

9
ports/arc_hs/metaware/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h ARC_HS/MetaWare */
/* 6.1 */
/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -48,6 +48,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -288,7 +291,7 @@ ULONG _tx_misra_time_stamp_get(VOID);
macros. */
#define TX_INTERRUPT_SAVE_AREA register unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA register UINT interrupt_save;
#define TX_DISABLE interrupt_save = _clri();
#define TX_RESTORE _seti(interrupt_save);
@@ -322,7 +325,7 @@ VOID tx_thread_register_bank_assign(VOID *thread_ptr, UINT register_bank);
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX ARC_HS/MetaWare Version 6.1 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX ARC_HS/MetaWare Version 6.1.6 *";
#else
#ifdef TX_MISRA_ENABLE
extern CHAR _tx_version_id[100];

3
ports/arc_hs/metaware/readme_threadx.txt
View File

@@ -241,6 +241,9 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
09-30-2020 Initial ThreadX 6.1 for ARC HS using MetaWare tools.

11
ports/arm11/ac5/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h ARM11/AC5 */
/* 6.1 */
/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -48,6 +48,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -265,7 +268,7 @@ typedef unsigned short USHORT;
#ifndef __thumb
#define TX_INTERRUPT_SAVE_AREA register unsigned int interrupt_save_disabled;
#define TX_INTERRUPT_SAVE_AREA register UINT interrupt_save_disabled;
#ifdef TX_ENABLE_FIQ_SUPPORT
@@ -296,7 +299,7 @@ unsigned int _tx_thread_interrupt_disable(void);
unsigned int _tx_thread_interrupt_restore(UINT old_posture);
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable();
#define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save);
@@ -317,7 +320,7 @@ unsigned int _tx_thread_interrupt_restore(UINT old_posture);
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX ARM11/AC5 Version 6.1 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX ARM11/AC5 Version 6.1.6 *";
#else
extern CHAR _tx_version_id[];
#endif

3
ports/arm11/ac5/readme_threadx.txt
View File

@@ -524,6 +524,9 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
09-30-2020 Initial ThreadX 6.1 version for Cortex-A5 using AC5 tools.

11
ports/arm11/gnu/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h ARM11/GNU */
/* 6.1 */
/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -48,6 +48,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -272,14 +275,14 @@ unsigned int _tx_thread_interrupt_disable(void);
unsigned int _tx_thread_interrupt_restore(UINT old_posture);
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable();
#define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save);
#else
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save, tx_temp;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save, tx_temp;
#ifdef TX_ENABLE_FIQ_SUPPORT
#define TX_DISABLE asm volatile (" MRS %0,CPSR; ORR %1,%0,#0xC0; MSR CPSR_cxsf,%1 ": "=r" (interrupt_save), "=r" (tx_temp) );
@@ -306,7 +309,7 @@ unsigned int _tx_thread_interrupt_restore(UINT old_posture);
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX ARM11/GNU Version 6.1 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX ARM11/GNU Version 6.1.6 *";
#else
extern CHAR _tx_version_id[];
#endif

3
ports/arm11/gnu/readme_threadx.txt
View File

@@ -486,6 +486,9 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
09-30-2020 Initial ThreadX 6.1 version for ARM11 using GNU tools.

11
ports/arm11/iar/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h ARM11/IAR */
/* 6.1 */
/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -48,6 +48,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -334,9 +337,9 @@ __intrinsic void __set_CPSR( unsigned long );
#if (__VER__ < 8002000)
#define TX_INTERRUPT_SAVE_AREA unsigned long interrupt_save;
#define TX_INTERRUPT_SAVE_AREA ULONG interrupt_save;
#else
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#endif
#define TX_DISABLE interrupt_save = __get_CPSR(); \
@@ -372,7 +375,7 @@ void _tx_thread_interrupt_restore(UINT old_posture);
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX ARM11/IAR Version 6.1 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX ARM11/IAR Version 6.1.6 *";
#else
#ifdef TX_MISRA_ENABLE
extern CHAR _tx_version_id[100];

3
ports/arm11/iar/readme_threadx.txt
View File

@@ -517,6 +517,9 @@ The project options "General Options -> Library Configuration" should also have
11. Revision History
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
09-30-2020 Initial ThreadX 6.1 version for ARM11 using IAR's ARM tools.

11
ports/arm9/ac5/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h ARM9/AC5 */
/* 6.1 */
/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -48,6 +48,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -267,7 +270,7 @@ typedef unsigned short USHORT;
macros. */
#ifndef __thumb
#define TX_INTERRUPT_SAVE_AREA register unsigned int interrupt_save_disabled;
#define TX_INTERRUPT_SAVE_AREA register UINT interrupt_save_disabled;
#ifdef TX_ENABLE_FIQ_SUPPORT
@@ -298,7 +301,7 @@ unsigned int _tx_thread_interrupt_disable(void);
unsigned int _tx_thread_interrupt_restore(UINT old_posture);
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable();
#define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save);
@@ -319,7 +322,7 @@ unsigned int _tx_thread_interrupt_restore(UINT old_posture);
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX ARM9/AC5 Version 6.1 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX ARM9/AC5 Version 6.1.6 *";
#else
extern CHAR _tx_version_id[];
#endif

3
ports/arm9/ac5/readme_threadx.txt
View File

@@ -508,6 +508,9 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
09-30-2020 Initial ThreadX 6.1 version for ARM9 using AC5 tools.

11
ports/arm9/gnu/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h ARM9/GNU */
/* 6.1 */
/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -48,6 +48,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -272,14 +275,14 @@ unsigned int _tx_thread_interrupt_disable(void);
unsigned int _tx_thread_interrupt_restore(UINT old_posture);
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable();
#define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save);
#else
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save, tx_temp;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save, tx_temp;
#ifdef TX_ENABLE_FIQ_SUPPORT
#define TX_DISABLE asm volatile (" MRS %0,CPSR; ORR %1,%0,#0xC0; MSR CPSR_cxsf,%1 ": "=r" (interrupt_save), "=r" (tx_temp) );
@@ -306,7 +309,7 @@ unsigned int _tx_thread_interrupt_restore(UINT old_posture);
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX ARM9/GNU Version 6.1 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX ARM9/GNU Version 6.1.6 *";
#else
extern CHAR _tx_version_id[];
#endif

3
ports/arm9/gnu/readme_threadx.txt
View File

@@ -486,6 +486,9 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
09-30-2020 Initial ThreadX 6.1 version for ARM9 using GNU tools.

11
ports/arm9/iar/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h ARM9/IAR */
/* 6.1 */
/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -48,6 +48,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -334,9 +337,9 @@ __intrinsic void __set_CPSR( unsigned long );
#if (__VER__ < 8002000)
#define TX_INTERRUPT_SAVE_AREA unsigned long interrupt_save;
#define TX_INTERRUPT_SAVE_AREA ULONG interrupt_save;
#else
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#endif
#define TX_DISABLE interrupt_save = __get_CPSR(); \
@@ -372,7 +375,7 @@ void _tx_thread_interrupt_restore(UINT old_posture);
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX ARM9/IAR Version 6.1 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX ARM9/IAR Version 6.1.6 *";
#else
#ifdef TX_MISRA_ENABLE
extern CHAR _tx_version_id[100];

3
ports/arm9/iar/readme_threadx.txt
View File

@@ -518,6 +518,9 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
09-30-2020 Initial ThreadX version 6.1 for ARM9 using IAR's ARM tools.

9
ports/c667x/ccs/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h C667x/TI */
/* 6.1 */
/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -48,6 +48,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -237,7 +240,7 @@ typedef unsigned short USHORT;
is used to define a local function save area for the disable and restore
macros. */
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#ifdef TX_SKIP_INTRINSICS
unsigned int _tx_thread_interrupt_control(unsigned int);
@@ -264,7 +267,7 @@ unsigned int _tx_thread_interrupt_control(unsigned int);
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX C667x/TI Version 6.1 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX C667x/TI Version 6.1.6 *";
#else
extern CHAR _tx_version_id[];
#endif

3
ports/c667x/ccs/readme_threadx.txt
View File

@@ -238,6 +238,9 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
09-30-2020 Initial ThreadX 6.1 version for TMS320C667x using TI Code Composer tools.

11
ports/cortex_a15/ac6/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h Cortex-A15/AC6 */
/* 6.1 */
/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -48,6 +48,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -272,14 +275,14 @@ unsigned int _tx_thread_interrupt_disable(void);
unsigned int _tx_thread_interrupt_restore(UINT old_posture);
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable();
#define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save);
#else
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save, tx_temp;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save, tx_temp;
#ifdef TX_ENABLE_FIQ_SUPPORT
#define TX_DISABLE asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) );
@@ -313,7 +316,7 @@ void tx_thread_vfp_disable(void);
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A15/AC6 Version 6.1 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A15/AC6 Version 6.1.6 *";
#else
extern CHAR _tx_version_id[];
#endif

3
ports/cortex_a15/ac6/readme_threadx.txt
View File

@@ -332,6 +332,9 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
09-30-2020 Initial ThreadX 6.1 version for Cortex-A15 using AC6 tools.

11
ports/cortex_a15/gnu/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h Cortex-A15/GNU */
/* 6.1 */
/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -48,6 +48,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -272,14 +275,14 @@ unsigned int _tx_thread_interrupt_disable(void);
unsigned int _tx_thread_interrupt_restore(UINT old_posture);
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable();
#define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save);
#else
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save, tx_temp;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save, tx_temp;
#ifdef TX_ENABLE_FIQ_SUPPORT
#define TX_DISABLE asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) );
@@ -313,7 +316,7 @@ void tx_thread_vfp_disable(void);
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A15/GNU Version 6.1 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A15/GNU Version 6.1.6 *";
#else
extern CHAR _tx_version_id[];
#endif

3
ports/cortex_a15/gnu/readme_threadx.txt
View File

@@ -503,6 +503,9 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
09-30-2020 Initial ThreadX 6.1 version for Cortex-A15 using GNU tools.

11
ports/cortex_a15/iar/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h Cortex-A15/IAR */
/* 6.1 */
/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -48,6 +48,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -336,9 +339,9 @@ __intrinsic void __set_CPSR( unsigned long );
#if (__VER__ < 8002000)
#define TX_INTERRUPT_SAVE_AREA unsigned long interrupt_save;
#define TX_INTERRUPT_SAVE_AREA ULONG interrupt_save;
#else
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#endif
@@ -382,7 +385,7 @@ void tx_thread_vfp_disable(void);
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A15/IAR Version 6.1 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A15/IAR Version 6.1.6 *";
#else
#ifdef TX_MISRA_ENABLE
extern CHAR _tx_version_id[100];

3
ports/cortex_a15/iar/readme_threadx.txt
View File

@@ -534,6 +534,9 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
09-30-2020 Initial ThreadX version 6.1 for Cortex-A15 using IAR's ARM tools.

11
ports/cortex_a35/ac6/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h Cortex-A35/AC6 */
/* 6.1 */
/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -48,6 +48,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -311,7 +314,7 @@ unsigned long long temp;
}
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#define TX_DISABLE interrupt_save = __disable_interrupts();
#define TX_RESTORE __restore_interrupts(interrupt_save);
@@ -321,7 +324,7 @@ unsigned int _tx_thread_interrupt_disable(void);
unsigned int _tx_thread_interrupt_restore(UINT old_posture);
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable();
#define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save);
@@ -354,7 +357,7 @@ VOID tx_thread_fp_disable(VOID);
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A35/AC6 Version 6.1 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A35/AC6 Version 6.1.6 *";
#else
extern CHAR _tx_version_id[];
#endif

3
ports/cortex_a35/ac6/readme_threadx.txt
View File

@@ -243,6 +243,9 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
09-30-2020 Initial ThreadX 6.1 version for Cortex-A35 using AC6 tools.

11
ports/cortex_a35/gnu/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h Cortex-A35/GNU */
/* 6.1 */
/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -48,6 +48,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -311,7 +314,7 @@ unsigned long long temp;
}
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#define TX_DISABLE interrupt_save = __disable_interrupts();
#define TX_RESTORE __restore_interrupts(interrupt_save);
@@ -321,7 +324,7 @@ unsigned int _tx_thread_interrupt_disable(void);
unsigned int _tx_thread_interrupt_restore(UINT old_posture);
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable();
#define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save);
@@ -354,7 +357,7 @@ VOID tx_thread_fp_disable(VOID);
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A35/GNU Version 6.1 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A35/GNU Version 6.1.6 *";
#else
extern CHAR _tx_version_id[];
#endif

3
ports/cortex_a35/gnu/readme_threadx.txt
View File

@@ -243,6 +243,9 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
09-30-2020 Initial ThreadX 6.1 version for Cortex-A35 using GCC tools.

11
ports/cortex_a5/ac5/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h Cortex-A5/AC5 */
/* 6.1 */
/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -48,6 +48,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -265,7 +268,7 @@ typedef unsigned short USHORT;
#ifndef __thumb
#define TX_INTERRUPT_SAVE_AREA register unsigned int interrupt_save_disabled;
#define TX_INTERRUPT_SAVE_AREA register UINT interrupt_save_disabled;
#ifdef TX_ENABLE_FIQ_SUPPORT
@@ -296,7 +299,7 @@ unsigned int _tx_thread_interrupt_disable(void);
unsigned int _tx_thread_interrupt_restore(UINT old_posture);
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable();
#define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save);
@@ -324,7 +327,7 @@ void tx_thread_vfp_disable(void);
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A5/AC5 Version 6.1 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A5/AC5 Version 6.1.6 *";
#else
extern CHAR _tx_version_id[];
#endif

3
ports/cortex_a5/ac5/readme_threadx.txt
View File

@@ -535,6 +535,9 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
09-30-2020 Initial ThreadX 6.1 version for Cortex-A5 using AC5 tools.

11
ports/cortex_a5/gnu/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h Cortex-A5/GNU */
/* 6.1 */
/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -48,6 +48,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -272,14 +275,14 @@ unsigned int _tx_thread_interrupt_disable(void);
unsigned int _tx_thread_interrupt_restore(UINT old_posture);
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable();
#define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save);
#else
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save, tx_temp;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save, tx_temp;
#ifdef TX_ENABLE_FIQ_SUPPORT
#define TX_DISABLE asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) );
@@ -313,7 +316,7 @@ void tx_thread_vfp_disable(void);
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A5/GNU Version 6.1 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A5/GNU Version 6.1.6 *";
#else
extern CHAR _tx_version_id[];
#endif

3
ports/cortex_a5/gnu/readme_threadx.txt
View File

@@ -503,6 +503,9 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
09-30-2020 Initial ThreadX 6.1 version for Cortex-A5 using GNU tools.

13
ports/cortex_a5/green/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h Cortex-A5/Green Hills */
/* 6.1 */
/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -48,6 +48,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -299,7 +302,7 @@ typedef unsigned short USHORT;
unsigned int _tx_thread_interrupt_disable(void);
void _tx_thread_interrupt_restore(unsigned int new_posture);
#define TX_INTERRUPT_SAVE_AREA register int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA register INT interrupt_save;
#define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable();
@@ -307,7 +310,7 @@ void _tx_thread_interrupt_restore(unsigned int new_po
#else
#define TX_INTERRUPT_SAVE_AREA register int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA register INT interrupt_save;
#if defined(__GHS_VERSION_NUMBER) && (__GHS_VERSION_NUMBER >= 350)
@@ -391,8 +394,8 @@ void tx_thread_vfp_disable(void);
/* Define the version ID of ThreadX. This may be utilized by the application. */
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A5/Green Hills Version 6.1 *";
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A5/Green Hills Version 6.1.6 *";
#else
extern CHAR _tx_version_id[];
#endif

3
ports/cortex_a5/green/readme_threadx.txt
View File

@@ -517,6 +517,9 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
05/19/2020 Initial ThreadX version of Cortex-A5/Green Hills port.

11
ports/cortex_a5/iar/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h Cortex-A5/IAR */
/* 6.1 */
/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -48,6 +48,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -335,9 +338,9 @@ __intrinsic void __set_CPSR( unsigned long );
#if (__VER__ < 8002000)
#define TX_INTERRUPT_SAVE_AREA unsigned long interrupt_save;
#define TX_INTERRUPT_SAVE_AREA ULONG interrupt_save;
#else
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#endif
#define TX_DISABLE interrupt_save = __get_CPSR(); \
@@ -380,7 +383,7 @@ void tx_thread_vfp_disable(void);
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A5/IAR Version 6.1 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A5/IAR Version 6.1.6 *";
#else
#ifdef TX_MISRA_ENABLE
extern CHAR _tx_version_id[100];

3
ports/cortex_a5/iar/readme_threadx.txt
View File

@@ -534,6 +534,9 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
09-30-2020 Initial ThreadX version 6.1 for Cortex-A5 using IAR's ARM tools.

11
ports/cortex_a5x/ac6/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h Cortex-A5x/ARM */
/* 6.1 */
/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -48,6 +48,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -311,7 +314,7 @@ unsigned long long temp;
}
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#define TX_DISABLE interrupt_save = __disable_interrupts();
#define TX_RESTORE __restore_interrupts(interrupt_save);
@@ -321,7 +324,7 @@ unsigned int _tx_thread_interrupt_disable(void);
unsigned int _tx_thread_interrupt_restore(UINT old_posture);
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable();
#define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save);
@@ -354,7 +357,7 @@ VOID tx_thread_fp_disable(VOID);
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A5x/ARM Version 6.1 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A5x/ARM Version 6.1.6 *";
#else
extern CHAR _tx_version_id[];
#endif

3
ports/cortex_a5x/ac6/readme_threadx.txt
View File

@@ -245,6 +245,9 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
09-30-2020 Initial ThreadX 6.1 version for Cortex-A5x using ARM tools.

11
ports/cortex_a7/ac5/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h Cortex-A7/AC5 */
/* 6.1 */
/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -48,6 +48,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -265,7 +268,7 @@ typedef unsigned short USHORT;
#ifndef __thumb
#define TX_INTERRUPT_SAVE_AREA register unsigned int interrupt_save_disabled;
#define TX_INTERRUPT_SAVE_AREA register UINT interrupt_save_disabled;
#ifdef TX_ENABLE_FIQ_SUPPORT
@@ -296,7 +299,7 @@ unsigned int _tx_thread_interrupt_disable(void);
unsigned int _tx_thread_interrupt_restore(UINT old_posture);
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable();
#define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save);
@@ -324,7 +327,7 @@ void tx_thread_vfp_disable(void);
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A7/AC5 Version 6.1 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A7/AC5 Version 6.1.6 *";
#else
extern CHAR _tx_version_id[];
#endif

3
ports/cortex_a7/ac5/readme_threadx.txt
View File

@@ -534,6 +534,9 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
09-30-2020 Initial ThreadX 6.1 version for Cortex-A7 using AC5 tools.

11
ports/cortex_a7/ac6/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h Cortex-A7/AC6 */
/* 6.1 */
/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -48,6 +48,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -272,14 +275,14 @@ unsigned int _tx_thread_interrupt_disable(void);
unsigned int _tx_thread_interrupt_restore(UINT old_posture);
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable();
#define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save);
#else
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save, tx_temp;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save, tx_temp;
#ifdef TX_ENABLE_FIQ_SUPPORT
#define TX_DISABLE asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) );
@@ -313,7 +316,7 @@ void tx_thread_vfp_disable(void);
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A7/AC6 Version 6.1 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A7/AC6 Version 6.1.6 *";
#else
extern CHAR _tx_version_id[];
#endif

3
ports/cortex_a7/ac6/readme_threadx.txt
View File

@@ -332,6 +332,9 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
09-30-2020 Initial ThreadX 6.1 version for Cortex-A7 using AC6 tools.

11
ports/cortex_a7/gnu/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h Cortex-A7/GNU */
/* 6.1 */
/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -48,6 +48,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -272,14 +275,14 @@ unsigned int _tx_thread_interrupt_disable(void);
unsigned int _tx_thread_interrupt_restore(UINT old_posture);
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable();
#define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save);
#else
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save, tx_temp;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save, tx_temp;
#ifdef TX_ENABLE_FIQ_SUPPORT
#define TX_DISABLE asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) );
@@ -313,7 +316,7 @@ void tx_thread_vfp_disable(void);
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A7/GNU Version 6.1 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A7/GNU Version 6.1.6 *";
#else
extern CHAR _tx_version_id[];
#endif

3
ports/cortex_a7/gnu/readme_threadx.txt
View File

@@ -503,6 +503,9 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
09-30-2020 Initial ThreadX 6.1 version for Cortex-A7 using GNU tools.

13
ports/cortex_a7/green/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h Cortex-A7/Green Hills */
/* 6.1 */
/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -48,6 +48,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -299,7 +302,7 @@ typedef unsigned short USHORT;
unsigned int _tx_thread_interrupt_disable(void);
void _tx_thread_interrupt_restore(unsigned int new_posture);
#define TX_INTERRUPT_SAVE_AREA register int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA register INT interrupt_save;
#define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable();
@@ -307,7 +310,7 @@ void _tx_thread_interrupt_restore(unsigned int new_po
#else
#define TX_INTERRUPT_SAVE_AREA register int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA register INT interrupt_save;
#if defined(__GHS_VERSION_NUMBER) && (__GHS_VERSION_NUMBER >= 350)
@@ -391,8 +394,8 @@ void tx_thread_vfp_disable(void);
/* Define the version ID of ThreadX. This may be utilized by the application. */
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A7/Green Hills Version 6.1 *";
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A7/Green Hills Version 6.1.6 *";
#else
extern CHAR _tx_version_id[];
#endif

3
ports/cortex_a7/green/readme_threadx.txt
View File

@@ -517,6 +517,9 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
05/19/2020 Initial ThreadX version of Cortex-A7/Green Hills port.

11
ports/cortex_a7/iar/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h Cortex-A7/IAR */
/* 6.1 */
/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -48,6 +48,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -335,9 +338,9 @@ __intrinsic void __set_CPSR( unsigned long );
#if (__VER__ < 8002000)
#define TX_INTERRUPT_SAVE_AREA unsigned long interrupt_save;
#define TX_INTERRUPT_SAVE_AREA ULONG interrupt_save;
#else
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#endif
#define TX_DISABLE interrupt_save = __get_CPSR(); \
@@ -380,7 +383,7 @@ void tx_thread_vfp_disable(void);
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A7/IAR Version 6.1 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A7/IAR Version 6.1.6 *";
#else
extern CHAR _tx_version_id[];
#endif

3
ports/cortex_a7/iar/readme_threadx.txt
View File

@@ -534,6 +534,9 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
09-30-2020 Initial ThreadX version 6.1 for Cortex-A7 using IAR's ARM tools.

11
ports/cortex_a8/ac5/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h Cortex-A8/AC5 */
/* 6.1 */
/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -48,6 +48,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -265,7 +268,7 @@ typedef unsigned short USHORT;
#ifndef __thumb
#define TX_INTERRUPT_SAVE_AREA register unsigned int interrupt_save_disabled;
#define TX_INTERRUPT_SAVE_AREA register UINT interrupt_save_disabled;
#ifdef TX_ENABLE_FIQ_SUPPORT
@@ -296,7 +299,7 @@ unsigned int _tx_thread_interrupt_disable(void);
unsigned int _tx_thread_interrupt_restore(UINT old_posture);
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable();
#define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save);
@@ -324,7 +327,7 @@ void tx_thread_vfp_disable(void);
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A8/AC5 Version 6.1 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A8/AC5 Version 6.1.6 *";
#else
extern CHAR _tx_version_id[];
#endif

3
ports/cortex_a8/ac5/readme_threadx.txt
View File

@@ -537,6 +537,9 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
09-30-2020 Initial ThreadX 6.1 version for Cortex-A8 using AC5 tools.

11
ports/cortex_a8/ac6/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h Cortex-A8/AC6 */
/* 6.1 */
/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -48,6 +48,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -272,14 +275,14 @@ unsigned int _tx_thread_interrupt_disable(void);
unsigned int _tx_thread_interrupt_restore(UINT old_posture);
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable();
#define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save);
#else
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save, tx_temp;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save, tx_temp;
#ifdef TX_ENABLE_FIQ_SUPPORT
#define TX_DISABLE asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) );
@@ -313,7 +316,7 @@ void tx_thread_vfp_disable(void);
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A8/AC6 Version 6.1 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A8/AC6 Version 6.1.6 *";
#else
extern CHAR _tx_version_id[];
#endif

3
ports/cortex_a8/ac6/readme_threadx.txt
View File

@@ -329,6 +329,9 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
09-30-2020 Initial ThreadX 6.1 version for Cortex-A8 using AC6 tools.

11
ports/cortex_a8/gnu/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h Cortex-A8/GNU */
/* 6.1 */
/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -48,6 +48,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -272,14 +275,14 @@ unsigned int _tx_thread_interrupt_disable(void);
unsigned int _tx_thread_interrupt_restore(UINT old_posture);
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable();
#define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save);
#else
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save, tx_temp;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save, tx_temp;
#ifdef TX_ENABLE_FIQ_SUPPORT
#define TX_DISABLE asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) );
@@ -313,7 +316,7 @@ void tx_thread_vfp_disable(void);
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A8/GNU Version 6.1 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A8/GNU Version 6.1.6 *";
#else
extern CHAR _tx_version_id[];
#endif

3
ports/cortex_a8/gnu/readme_threadx.txt
View File

@@ -503,6 +503,9 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
09-30-2020 Initial ThreadX 6.1 version for Cortex-A8 using GNU tools.

13
ports/cortex_a8/green/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h Cortex-A8/Green Hills */
/* 6.1 */
/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -48,6 +48,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -299,7 +302,7 @@ typedef unsigned short USHORT;
unsigned int _tx_thread_interrupt_disable(void);
void _tx_thread_interrupt_restore(unsigned int new_posture);
#define TX_INTERRUPT_SAVE_AREA register int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA register INT interrupt_save;
#define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable();
@@ -307,7 +310,7 @@ void _tx_thread_interrupt_restore(unsigned int new_po
#else
#define TX_INTERRUPT_SAVE_AREA register int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA register INT interrupt_save;
#if defined(__GHS_VERSION_NUMBER) && (__GHS_VERSION_NUMBER >= 350)
@@ -391,8 +394,8 @@ void tx_thread_vfp_disable(void);
/* Define the version ID of ThreadX. This may be utilized by the application. */
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A8/Green Hills Version 6.1 *";
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A8/Green Hills Version 6.1.6 *";
#else
extern CHAR _tx_version_id[];
#endif

3
ports/cortex_a8/green/readme_threadx.txt
View File

@@ -518,6 +518,9 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
05/19/2020 Initial ThreadX version of Cortex-A8/Green Hills port.

11
ports/cortex_a8/iar/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h Cortex-A8/IAR */
/* 6.1 */
/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -48,6 +48,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -335,9 +338,9 @@ __intrinsic void __set_CPSR( unsigned long );
#if (__VER__ < 8002000)
#define TX_INTERRUPT_SAVE_AREA unsigned long interrupt_save;
#define TX_INTERRUPT_SAVE_AREA ULONG interrupt_save;
#else
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#endif
@@ -381,7 +384,7 @@ void tx_thread_vfp_disable(void);
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A8/IAR Version 6.1 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A8/IAR Version 6.1.6 *";
#else
#ifdef TX_MISRA_ENABLE
extern CHAR _tx_version_id[100];

3
ports/cortex_a8/iar/readme_threadx.txt
View File

@@ -534,6 +534,9 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
09-30-2020 Initial ThreadX version 6.1 for Cortex-A8 using IAR's ARM tools.

11
ports/cortex_a9/ac5/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h Cortex-A9/AC5 */
/* 6.1 */
/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -48,6 +48,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -265,7 +268,7 @@ typedef unsigned short USHORT;
#ifndef __thumb
#define TX_INTERRUPT_SAVE_AREA register unsigned int interrupt_save_disabled;
#define TX_INTERRUPT_SAVE_AREA register UINT interrupt_save_disabled;
#ifdef TX_ENABLE_FIQ_SUPPORT
@@ -296,7 +299,7 @@ unsigned int _tx_thread_interrupt_disable(void);
unsigned int _tx_thread_interrupt_restore(UINT old_posture);
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable();
#define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save);
@@ -324,7 +327,7 @@ void tx_thread_vfp_disable(void);
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A9/AC5 Version 6.1 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A9/AC5 Version 6.1.6 *";
#else
extern CHAR _tx_version_id[];
#endif

3
ports/cortex_a9/ac5/readme_threadx.txt
View File

@@ -535,6 +535,9 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
09-30-2020 Initial ThreadX 6.1 version for Cortex-A9 using AC5 tools.

11
ports/cortex_a9/ac6/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h Cortex-A9/AC6 */
/* 6.1 */
/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -48,6 +48,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -272,14 +275,14 @@ unsigned int _tx_thread_interrupt_disable(void);
unsigned int _tx_thread_interrupt_restore(UINT old_posture);
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable();
#define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save);
#else
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save, tx_temp;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save, tx_temp;
#ifdef TX_ENABLE_FIQ_SUPPORT
#define TX_DISABLE asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) );
@@ -313,7 +316,7 @@ void tx_thread_vfp_disable(void);
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A9/AC6 Version 6.1 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A9/AC6 Version 6.1.6 *";
#else
extern CHAR _tx_version_id[];
#endif

3
ports/cortex_a9/ac6/readme_threadx.txt
View File

@@ -332,6 +332,9 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
09-30-2020 Initial ThreadX 6.1 version for Cortex-A9 using AC6 tools.

11
ports/cortex_a9/gnu/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h Cortex-A9/GNU */
/* 6.1 */
/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -48,6 +48,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -272,14 +275,14 @@ unsigned int _tx_thread_interrupt_disable(void);
unsigned int _tx_thread_interrupt_restore(UINT old_posture);
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable();
#define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save);
#else
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save, tx_temp;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save, tx_temp;
#ifdef TX_ENABLE_FIQ_SUPPORT
#define TX_DISABLE asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) );
@@ -313,7 +316,7 @@ void tx_thread_vfp_disable(void);
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A9/GNU Version 6.1 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A9/GNU Version 6.1.6 *";
#else
extern CHAR _tx_version_id[];
#endif

3
ports/cortex_a9/gnu/readme_threadx.txt
View File

@@ -503,6 +503,9 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
09-30-2020 Initial ThreadX 6.1 version for Cortex-A9 using GNU tools.

13
ports/cortex_a9/green/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h Cortex-A9/Green Hills */
/* 6.1 */
/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -48,6 +48,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -299,7 +302,7 @@ typedef unsigned short USHORT;
unsigned int _tx_thread_interrupt_disable(void);
void _tx_thread_interrupt_restore(unsigned int new_posture);
#define TX_INTERRUPT_SAVE_AREA register int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA register INT interrupt_save;
#define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable();
@@ -307,7 +310,7 @@ void _tx_thread_interrupt_restore(unsigned int new_po
#else
#define TX_INTERRUPT_SAVE_AREA register int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA register INT interrupt_save;
#if defined(__GHS_VERSION_NUMBER) && (__GHS_VERSION_NUMBER >= 350)
@@ -391,8 +394,8 @@ void tx_thread_vfp_disable(void);
/* Define the version ID of ThreadX. This may be utilized by the application. */
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A9/Green Hills Version 6.1 *";
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A9/Green Hills Version 6.1.6 *";
#else
extern CHAR _tx_version_id[];
#endif

3
ports/cortex_a9/green/readme_threadx.txt
View File

@@ -517,6 +517,9 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
05/19/2020 Initial ThreadX version of Cortex-A9/Green Hills port.

11
ports/cortex_a9/iar/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h Cortex-A9/IAR */
/* 6.1 */
/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -48,6 +48,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -336,9 +339,9 @@ __intrinsic void __set_CPSR( unsigned long );
#if (__VER__ < 8002000)
#define TX_INTERRUPT_SAVE_AREA unsigned long interrupt_save;
#define TX_INTERRUPT_SAVE_AREA ULONG interrupt_save;
#else
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#endif
@@ -382,7 +385,7 @@ void tx_thread_vfp_disable(void);
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A9/IAR Version 6.1 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A9/IAR Version 6.1.6 *";
#else
#ifdef TX_MISRA_ENABLE
extern CHAR _tx_version_id[100];

3
ports/cortex_a9/iar/readme_threadx.txt
View File

@@ -534,6 +534,9 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
09-30-2020 Initial ThreadX version 6.1 for Cortex-A9 using IAR's ARM tools.

9
ports/cortex_m0/ac5/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h Cortex-M0/AC5 */
/* 6.1 */
/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -48,6 +48,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -288,7 +291,7 @@ VOID _tx_thread_interrupt_restore(UIN
#else
#define TX_INTERRUPT_SAVE_AREA unsigned int was_masked;
#define TX_INTERRUPT_SAVE_AREA UINT was_masked;
#define TX_DISABLE was_masked = __disable_irq();
#define TX_RESTORE if (was_masked == 0) __enable_irq();
@@ -318,7 +321,7 @@ unsigned int was_masked;
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M0/AC5 Version 6.1 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M0/AC5 Version 6.1.6 *";
#else
#ifdef TX_MISRA_ENABLE
extern CHAR _tx_version_id[100];

4
ports/cortex_m0/ac5/readme_threadx.txt
View File

@@ -133,6 +133,10 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
tx_thread_schedule.s Fix compilation error
03-02-2021 The following files were changed/added for version 6.1.5:
tx_thread_schedule.s Added low power feature

11
ports/cortex_m0/ac6/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h Cortex-M0/AC6 */
/* 6.1 */
/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -48,6 +48,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -335,7 +338,7 @@ unsigned int interrupt_save;
}
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#define TX_DISABLE interrupt_save = __disable_interrupts();
#define TX_RESTORE __restore_interrupts(interrupt_save);
@@ -348,7 +351,7 @@ unsigned int interrupt_save;
#else
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#define TX_DISABLE interrupt_save = _tx_thread_interrupt_control(TX_INT_DISABLE);
#define TX_RESTORE _tx_thread_interrupt_control(interrupt_save);
@@ -359,7 +362,7 @@ unsigned int interrupt_save;
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M0/AC6 Version 6.1 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M0/AC6 Version 6.1.6 *";
#else
extern CHAR _tx_version_id[];
#endif

3
ports/cortex_m0/ac6/readme_threadx.txt
View File

@@ -148,6 +148,9 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
03-02-2021 The following files were changed/added for version 6.1.5:
tx_thread_schedule.s Added low power feature

11
ports/cortex_m0/gnu/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h Cortex-M0/GNU */
/* 6.1 */
/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -50,6 +50,9 @@
/* 05-19-2020 William E. Lamie Initial Version 6.0 */
/* 09-30-2020 William E. Lamie Modified comment(s), */
/* resulting in version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -337,7 +340,7 @@ unsigned int interrupt_save;
}
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#define TX_DISABLE interrupt_save = __disable_interrupts();
#define TX_RESTORE __restore_interrupts(interrupt_save);
@@ -350,7 +353,7 @@ unsigned int interrupt_save;
#else
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#define TX_DISABLE interrupt_save = _tx_thread_interrupt_control(TX_INT_DISABLE);
#define TX_RESTORE _tx_thread_interrupt_control(interrupt_save);
@@ -361,7 +364,7 @@ unsigned int interrupt_save;
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M0/GNU Version 6.1 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M0/GNU Version 6.1.6 *";
#else
extern CHAR _tx_version_id[];
#endif

3
ports/cortex_m0/gnu/readme_threadx.txt
View File

@@ -145,6 +145,9 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
03-02-2021 The following files were changed/added for version 6.1.5:
tx_thread_schedule.s Added low power feature

7
ports/cortex_m0/iar/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h Cortex-M0/IAR */
/* 6.1 */
/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -48,6 +48,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -349,7 +352,7 @@ __istate_t interrupt_save;
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M0/IAR Version 6.1 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M0/IAR Version 6.1.6 *";
#else
#ifdef TX_MISRA_ENABLE
extern CHAR _tx_version_id[100];

3
ports/cortex_m0/iar/readme_threadx.txt
View File

@@ -148,6 +148,9 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
03-02-2021 The following files were changed/added for version 6.1.5:
tx_thread_schedule.s Added low power feature

9
ports/cortex_m0/keil/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h Cortex-M0/AC5 */
/* 6.1 */
/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -48,6 +48,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -288,7 +291,7 @@ VOID _tx_thread_interrupt_restore(UIN
#else
#define TX_INTERRUPT_SAVE_AREA unsigned int was_masked;
#define TX_INTERRUPT_SAVE_AREA UINT was_masked;
#define TX_DISABLE was_masked = __disable_irq();
#define TX_RESTORE if (was_masked == 0) __enable_irq();
@@ -318,7 +321,7 @@ unsigned int was_masked;
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M0/AC5 Version 6.1 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M0/AC5 Version 6.1.6 *";
#else
#ifdef TX_MISRA_ENABLE
extern CHAR _tx_version_id[100];

4
ports/cortex_m0/keil/readme_threadx.txt
View File

@@ -139,6 +139,10 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
tx_thread_schedule.s Fix compilation error
03-02-2021 The following files were changed/added for version 6.1.5:
tx_thread_schedule.s Added low power feature

9
ports/cortex_m23/ac5/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h Cortex-M23/AC5 */
/* 6.1 */
/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -48,6 +48,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 Scott Larson Initial Version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -377,7 +380,7 @@ VOID _tx_thread_interrupt_restore(UIN
#else
#define TX_INTERRUPT_SAVE_AREA unsigned int was_masked;
#define TX_INTERRUPT_SAVE_AREA UINT was_masked;
#define TX_DISABLE was_masked = __disable_irq();
#define TX_RESTORE if (was_masked == 0) __enable_irq();
@@ -406,7 +409,7 @@ unsigned int was_masked;
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M23/AC5 Version 6.1 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M23/AC5 Version 6.1.6 *";
#else
#ifdef TX_MISRA_ENABLE
extern CHAR _tx_version_id[100];

2
ports/cortex_m23/ac5/readme_threadx.txt
View File

@@ -143,6 +143,8 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
09-30-2020 Initial ThreadX 6.1 version for Cortex-M23 using AC5 tools.

2
ports/cortex_m23/ac6/inc/tx_port.h
View File

@@ -381,7 +381,7 @@ VOID _tx_thread_interrupt_restore(UIN
#else
#define TX_INTERRUPT_SAVE_AREA unsigned int was_masked;
#define TX_INTERRUPT_SAVE_AREA UINT was_masked;
#define TX_DISABLE was_masked = __disable_irq();
#define TX_RESTORE if (was_masked == 0) __enable_irq();

6
ports/cortex_m23/ac6/readme_threadx.txt
View File

@@ -145,6 +145,12 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
tx_thread_schedule.s Added low power support
03-02-2021 The following files were changed/added for version 6.1.5:
tx_port.h Added ULONG64_DEFINED
09-30-2020 Initial ThreadX 6.1 version for Cortex-M23 using AC6 tools.

19
ports/cortex_m23/ac6/src/tx_thread_schedule.s
View File

@@ -26,7 +26,7 @@
/* FUNCTION RELEASE */
/* */
/* _tx_thread_schedule Cortex-M23/AC6 */
/* 6.1 */
/* 6.1.6 */
/* AUTHOR */
/* */
/* Scott Larson, Microsoft Corporation */
@@ -59,6 +59,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 Scott Larson Initial Version 6.1 */
/* 04-02-2021 Scott Larson Modified comment(s), added */
/* low power code, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
// VOID _tx_thread_schedule(VOID)
@@ -253,11 +256,25 @@ __tx_ts_wait:
LDR r1, [r2] // Pickup the next thread to execute pointer
STR r1, [r0] // Store it in the current pointer
CBNZ r1, __tx_ts_ready // If non-NULL, a new thread is ready!
#ifdef TX_LOW_POWER
PUSH {r0-r3}
BL tx_low_power_enter // Possibly enter low power mode
POP {r0-r3}
#endif
#ifdef TX_ENABLE_WFI
DSB // Ensure no outstanding memory transactions
WFI // Wait for interrupt
ISB // Ensure pipeline is flushed
#endif
#ifdef TX_LOW_POWER
PUSH {r0-r3}
BL tx_low_power_exit // Exit low power mode
POP {r0-r3}
#endif
CPSIE i // Enable interrupts
B __tx_ts_wait // Loop to continue waiting

4
ports/cortex_m23/gnu/inc/tx_port.h
View File

@@ -416,7 +416,7 @@ unsigned int interrupt_save;
}
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#define TX_DISABLE interrupt_save = __disable_interrupts();
#define TX_RESTORE __restore_interrupts(interrupt_save);
@@ -429,7 +429,7 @@ unsigned int interrupt_save;
#else
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#define TX_DISABLE interrupt_save = _tx_thread_interrupt_control(TX_INT_DISABLE);
#define TX_RESTORE _tx_thread_interrupt_control(interrupt_save);

8
ports/cortex_m23/gnu/readme_threadx.txt
View File

@@ -128,10 +128,16 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
tx_thread_schedule.s Added low power support
03-02-2021 The following files were changed/added for version 6.1.5:
tx_port.h Added ULONG64_DEFINED
12-31-2020 The following files were
changed/added for port specific version 6.1.3:
tx_port.h Remove unneeded include files,
use builtin functions,
modified comments.

19
ports/cortex_m23/gnu/src/tx_thread_schedule.s
View File

@@ -26,7 +26,7 @@
/* FUNCTION RELEASE */
/* */
/* _tx_thread_schedule Cortex-M23/GNU */
/* 6.1 */
/* 6.1.6 */
/* AUTHOR */
/* */
/* Scott Larson, Microsoft Corporation */
@@ -59,6 +59,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 Scott Larson Initial Version 6.1 */
/* 04-02-2021 Scott Larson Modified comment(s), added */
/* low power code, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
// VOID _tx_thread_schedule(VOID)
@@ -253,11 +256,25 @@ __tx_ts_wait:
LDR r1, [r2] // Pickup the next thread to execute pointer
STR r1, [r0] // Store it in the current pointer
CBNZ r1, __tx_ts_ready // If non-NULL, a new thread is ready!
#ifdef TX_LOW_POWER
PUSH {r0-r3}
BL tx_low_power_enter // Possibly enter low power mode
POP {r0-r3}
#endif
#ifdef TX_ENABLE_WFI
DSB // Ensure no outstanding memory transactions
WFI // Wait for interrupt
ISB // Ensure pipeline is flushed
#endif
#ifdef TX_LOW_POWER
PUSH {r0-r3}
BL tx_low_power_exit // Exit low power mode
POP {r0-r3}
#endif
CPSIE i // Enable interrupts
B __tx_ts_wait // Loop to continue waiting

7
ports/cortex_m23/iar/readme_threadx.txt
View File

@@ -136,6 +136,13 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
tx_thread_schedule.s Added low power support
03-02-2021 The following files were changed/added for version 6.1.5:
tx_port.h Added ULONG64_DEFINED
09-30-2020 Initial ThreadX 6.1 version for Cortex-M23 using IAR's ARM tools.

23
ports/cortex_m23/iar/src/tx_thread_schedule.s
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@@ -32,6 +32,10 @@
EXTERN _tx_thread_secure_stack_context_save
EXTERN _tx_thread_secure_mode_stack_allocate
EXTERN _tx_thread_secure_mode_stack_free
#ifdef TX_LOW_POWER
EXTERN tx_low_power_enter
EXTERN tx_low_power_exit
#endif
;
;
SECTION `.text`:CODE:NOROOT(2)
@@ -41,7 +45,7 @@
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_schedule Cortex-M23/IAR */
;/* 6.1 */
;/* 6.1.6 */
;/* AUTHOR */
;/* */
;/* Scott Larson, Microsoft Corporation */
@@ -74,6 +78,9 @@
;/* DATE NAME DESCRIPTION */
;/* */
;/* 09-30-2020 Scott Larson Initial Version 6.1 */
;/* 04-02-2021 Scott Larson Modified comment(s), added */
;/* low power code, */
;/* resulting in version 6.1.6 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_schedule(VOID)
@@ -266,11 +273,25 @@ __tx_ts_wait:
LDR r1, [r2] ; Pickup the next thread to execute pointer
STR r1, [r0] ; Store it in the current pointer
CBNZ r1, __tx_ts_ready ; If non-NULL, a new thread is ready!
#ifdef TX_LOW_POWER
PUSH {r0-r3}
BL tx_low_power_enter ; Possibly enter low power mode
POP {r0-r3}
#endif
#ifdef TX_ENABLE_WFI
DSB ; Ensure no outstanding memory transactions
WFI ; Wait for interrupt
ISB ; Ensure pipeline is flushed
#endif
#ifdef TX_LOW_POWER
PUSH {r0-r3}
BL tx_low_power_exit ; Exit low power mode
POP {r0-r3}
#endif
CPSIE i ; Enable interrupts
B __tx_ts_wait ; Loop to continue waiting
;

9
ports/cortex_m3/ac5/inc/tx_port.h
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@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h Cortex-M3/AC5 */
/* 6.1 */
/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -48,6 +48,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -299,7 +302,7 @@ VOID _tx_thread_interrupt_restore(UIN
#else
#define TX_INTERRUPT_SAVE_AREA unsigned int was_masked;
#define TX_INTERRUPT_SAVE_AREA UINT was_masked;
#define TX_DISABLE was_masked = __disable_irq();
#define TX_RESTORE if (was_masked == 0) __enable_irq();
@@ -329,7 +332,7 @@ unsigned int was_masked;
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M3/AC5 Version 6.1 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M3/AC5 Version 6.1.6 *";
#else
#ifdef TX_MISRA_ENABLE
extern CHAR _tx_version_id[100];

4
ports/cortex_m3/ac5/readme_threadx.txt
View File

@@ -135,6 +135,10 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
tx_thread_schedule.s Fix compilation error
03-02-2021 The following files were changed/added for version 6.1.5:
tx_thread_schedule.s Added low power feature

11
ports/cortex_m3/ac6/inc/tx_port.h
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@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h Cortex-M3/AC6 */
/* 6.1 */
/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -48,6 +48,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -319,7 +322,7 @@ unsigned int interrupt_save;
}
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#define TX_DISABLE interrupt_save = __disable_interrupts();
#define TX_RESTORE __restore_interrupts(interrupt_save);
@@ -332,7 +335,7 @@ unsigned int interrupt_save;
#else
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#define TX_DISABLE interrupt_save = _tx_thread_interrupt_control(TX_INT_DISABLE);
#define TX_RESTORE _tx_thread_interrupt_control(interrupt_save);
@@ -343,7 +346,7 @@ unsigned int interrupt_save;
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M3/AC6 Version 6.1 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M3/AC6 Version 6.1.6 *";
#else
extern CHAR _tx_version_id[];
#endif

3
ports/cortex_m3/ac6/readme_threadx.txt
View File

@@ -146,6 +146,9 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
03-02-2021 The following files were changed/added for version 6.1.5:
tx_thread_schedule.s Added low power feature

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