From 9b050d00ed6e138fef2dd9fdcd421298a485d9d1 Mon Sep 17 00:00:00 2001 From: Scott Larson Date: Tue, 10 Nov 2020 13:25:20 -0800 Subject: [PATCH] patch release 6.1.2 --- common/inc/tx_api.h | 15 +- common/inc/tx_thread.h | 10 +- common_smp/inc/tx_user.h | 257 - .../iar/example_build/sample_threadx.ewt | 2797 ---- .../example_build/settings/azure_rtos.wsdt | 535 - .../settings/sample_threadx.Debug.cspy.bat | 40 - .../settings/sample_threadx.Debug.cspy.ps1 | 31 - .../settings/sample_threadx.Debug.driver.xcl | 13 - .../settings/sample_threadx.Debug.general.xcl | 11 - .../settings/sample_threadx.crun | 13 - .../settings/sample_threadx.dbgdt | 1685 --- .../example_build/settings/sample_threadx.dnx | 99 - .../example_build/settings/tx.Debug.cspy.bat | 40 - .../example_build/settings/tx.Debug.cspy.ps1 | 31 - .../settings/tx.Debug.driver.xcl | 13 - .../settings/tx.Debug.general.xcl | 11 - .../arm11/iar/example_build/settings/tx.crun | 13 - .../arm11/iar/example_build/settings/tx.dbgdt | 4 - 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ports_module/cortex-m7/iar/example_build/settings/txm.Debug.general.xcl delete mode 100644 ports_module/cortex-m7/iar/example_build/settings/txm.crun delete mode 100644 ports_module/cortex-m7/iar/example_build/settings/txm.dbgdt delete mode 100644 ports_module/cortex-m7/iar/example_build/settings/txm.dnx delete mode 100644 ports_module/cortex-m7/iar/example_build/tx.ewd delete mode 100644 ports_module/cortex-m7/iar/example_build/tx.ewt delete mode 100644 ports_module/cortex-m7/iar/example_build/txm.ewd delete mode 100644 ports_module/cortex-m7/iar/example_build/txm.ewt diff --git a/common/inc/tx_api.h b/common/inc/tx_api.h index 80f36f95..4b7dbc51 100644 --- a/common/inc/tx_api.h +++ b/common/inc/tx_api.h @@ -26,7 +26,7 @@ /* APPLICATION INTERFACE DEFINITION RELEASE */ /* */ /* tx_api.h PORTABLE C */ -/* 6.1.1 */ +/* 6.1.2 */ /* AUTHOR */ /* */ /* William E. Lamie, Microsoft Corporation */ @@ -54,6 +54,10 @@ /* 10-16-2020 William E. Lamie Modified comment(s), and */ /* increased patch version, */ /* resulting in version 6.1.1 */ +/* 11-09-2020 Yuxin Zhou Modified comment(s), and */ +/* moved TX_THREAD_GET_SYSTEM_ */ +/* STATE to tx_api.h, */ +/* resulting in version 6.1.2 */ /* */ /**************************************************************************/ @@ -86,7 +90,7 @@ extern "C" { #define AZURE_RTOS_THREADX #define THREADX_MAJOR_VERSION 6 #define THREADX_MINOR_VERSION 1 -#define THREADX_PATCH_VERSION 1 +#define THREADX_PATCH_VERSION 2 /* Define the following symbol for backward compatibility */ #define EL_PRODUCT_THREADX @@ -2213,6 +2217,13 @@ void __ghs_rnerr(char *errMsg, int stackLevels, int stackTraceDisplay, void *hex #endif +/* Define the get system state macro. By default, it simply maps to the variable _tx_thread_system_state. */ +/* Note that prior to Azure RTOS 6.1, this symbol was defined in tx_thread.h. */ +#ifndef TX_THREAD_GET_SYSTEM_STATE +#define TX_THREAD_GET_SYSTEM_STATE() _tx_thread_system_state +#endif + + /* Determine if a C++ compiler is being used. If so, complete the standard diff --git a/common/inc/tx_thread.h b/common/inc/tx_thread.h index 7ea159c3..f60e247e 100644 --- a/common/inc/tx_thread.h +++ b/common/inc/tx_thread.h @@ -26,7 +26,7 @@ /* COMPONENT DEFINITION RELEASE */ /* */ /* tx_thread.h PORTABLE C */ -/* 6.1 */ +/* 6.1.2 */ /* AUTHOR */ /* */ /* William E. Lamie, Microsoft Corporation */ @@ -44,6 +44,10 @@ /* 05-19-2020 William E. Lamie Initial Version 6.0 */ /* 09-30-2020 Yuxin Zhou Modified comment(s), */ /* resulting in version 6.1 */ +/* 11-09-2020 Yuxin Zhou Modified comment(s), and */ +/* moved TX_THREAD_GET_SYSTEM_ */ +/* STATE to tx_api.h, */ +/* resulting in version 6.1.2 */ /* */ /**************************************************************************/ @@ -111,11 +115,11 @@ /* Define the get system state macro. By default, it simply maps to the variable _tx_thread_system_state. */ - +/* This symbol is moved to tx_api.h. Therefore removed from this file. #ifndef TX_THREAD_GET_SYSTEM_STATE #define TX_THREAD_GET_SYSTEM_STATE() _tx_thread_system_state #endif - +*/ /* Define the check for whether or not to call the _tx_thread_system_return function. A non-zero value indicates that _tx_thread_system_return should not be called. */ diff --git a/common_smp/inc/tx_user.h b/common_smp/inc/tx_user.h deleted file mode 100644 index db17d428..00000000 --- a/common_smp/inc/tx_user.h +++ /dev/null @@ -1,257 +0,0 @@ -/**************************************************************************/ -/* */ -/* Copyright (c) Microsoft Corporation. All rights reserved. */ -/* */ -/* This software is licensed under the Microsoft Software License */ -/* Terms for Microsoft Azure RTOS. Full text of the license can be */ -/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ -/* and in the root directory of this software. */ -/* */ -/**************************************************************************/ - - -/**************************************************************************/ -/**************************************************************************/ -/** */ -/** ThreadX Component */ -/** */ -/** User Specific */ -/** */ -/**************************************************************************/ -/**************************************************************************/ - - -/**************************************************************************/ -/* */ -/* PORT SPECIFIC C INFORMATION RELEASE */ -/* */ -/* tx_user.h PORTABLE C */ -/* 6.0.1 */ -/* */ -/* AUTHOR */ -/* */ -/* William E. Lamie, Microsoft Corporation */ -/* */ -/* DESCRIPTION */ -/* */ -/* This file contains user defines for configuring ThreadX in specific */ -/* ways. This file will have an effect only if the application and */ -/* ThreadX library are built with TX_INCLUDE_USER_DEFINE_FILE defined. */ -/* Note that all the defines in this file may also be made on the */ -/* command line when building ThreadX library and application objects. */ -/* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */ -/* */ -/**************************************************************************/ - -#ifndef TX_USER_H -#define TX_USER_H - - -/* Define various build options for the ThreadX port. The application should either make changes - here by commenting or un-commenting the conditional compilation defined OR supply the defines - though the compiler's equivalent of the -D option. - - For maximum speed, the following should be defined: - - TX_MAX_PRIORITIES 32 - TX_DISABLE_PREEMPTION_THRESHOLD - TX_DISABLE_REDUNDANT_CLEARING - TX_DISABLE_NOTIFY_CALLBACKS - TX_NOT_INTERRUPTABLE - TX_TIMER_PROCESS_IN_ISR - TX_REACTIVATE_INLINE - TX_DISABLE_STACK_FILLING - TX_INLINE_THREAD_RESUME_SUSPEND - - For minimum size, the following should be defined: - - TX_MAX_PRIORITIES 32 - TX_DISABLE_PREEMPTION_THRESHOLD - TX_DISABLE_REDUNDANT_CLEARING - TX_DISABLE_NOTIFY_CALLBACKS - TX_NOT_INTERRUPTABLE - TX_TIMER_PROCESS_IN_ISR - - Of course, many of these defines reduce functionality and/or change the behavior of the - system in ways that may not be worth the trade-off. For example, the TX_TIMER_PROCESS_IN_ISR - results in faster and smaller code, however, it increases the amount of processing in the ISR. - In addition, some services that are available in timers are not available from ISRs and will - therefore return an error if this option is used. This may or may not be desirable for a - given application. */ - - -/* Override various options with default values already assigned in tx_port.h. Please also refer - to tx_port.h for descriptions on each of these options. */ - -/* -#define TX_MAX_PRIORITIES 32 -#define TX_MINIMUM_STACK ???? -#define TX_THREAD_USER_EXTENSION ???? -#define TX_TIMER_THREAD_STACK_SIZE ???? -#define TX_TIMER_THREAD_PRIORITY ???? -*/ - -/* Determine if timer expirations (application timers, timeouts, and tx_thread_sleep calls - should be processed within the a system timer thread or directly in the timer ISR. - By default, the timer thread is used. When the following is defined, the timer expiration - processing is done directly from the timer ISR, thereby eliminating the timer thread control - block, stack, and context switching to activate it. */ - -/* -#define TX_TIMER_PROCESS_IN_ISR -*/ - -/* Determine if in-line timer reactivation should be used within the timer expiration processing. - By default, this is disabled and a function call is used. When the following is defined, - reactivating is performed in-line resulting in faster timer processing but slightly larger - code size. */ - -/* -#define TX_REACTIVATE_INLINE -*/ - -/* Determine is stack filling is enabled. By default, ThreadX stack filling is enabled, - which places an 0xEF pattern in each byte of each thread's stack. This is used by - debuggers with ThreadX-awareness and by the ThreadX run-time stack checking feature. */ - -/* -#define TX_DISABLE_STACK_FILLING -*/ - -/* Determine whether or not stack checking is enabled. By default, ThreadX stack checking is - disabled. When the following is defined, ThreadX thread stack checking is enabled. If stack - checking is enabled (TX_ENABLE_STACK_CHECKING is defined), the TX_DISABLE_STACK_FILLING - define is negated, thereby forcing the stack fill which is necessary for the stack checking - logic. */ - -/* -#define TX_ENABLE_STACK_CHECKING -*/ - -/* Determine if preemption-threshold should be disabled. By default, preemption-threshold is - enabled. If the application does not use preemption-threshold, it may be disabled to reduce - code size and improve performance. */ - -/* -#define TX_DISABLE_PREEMPTION_THRESHOLD -*/ - -/* Determine if global ThreadX variables should be cleared. If the compiler startup code clears - the .bss section prior to ThreadX running, the define can be used to eliminate unnecessary - clearing of ThreadX global variables. */ - -/* -#define TX_DISABLE_REDUNDANT_CLEARING -*/ - -/* Determine if no timer processing is required. This option will help eliminate the timer - processing when not needed. The user will also have to comment out the call to - tx_timer_interrupt, which is typically made from assembly language in - tx_initialize_low_level. Note: if TX_NO_TIMER is used, the define TX_TIMER_PROCESS_IN_ISR - must also be used. */ - -/* -#define TX_NO_TIMER -#ifndef TX_TIMER_PROCESS_IN_ISR -#define TX_TIMER_PROCESS_IN_ISR -#endif -*/ - -/* Determine if the notify callback option should be disabled. By default, notify callbacks are - enabled. If the application does not use notify callbacks, they may be disabled to reduce - code size and improve performance. */ - -/* -#define TX_DISABLE_NOTIFY_CALLBACKS -*/ - - -/* Determine if the tx_thread_resume and tx_thread_suspend services should have their internal - code in-line. This results in a larger image, but improves the performance of the thread - resume and suspend services. */ - -/* -#define TX_INLINE_THREAD_RESUME_SUSPEND -*/ - - -/* Determine if the internal ThreadX code is non-interruptable. This results in smaller code - size and less processing overhead, but increases the interrupt lockout time. */ - -/* -#define TX_NOT_INTERRUPTABLE -*/ - - -/* Determine if the trace event logging code should be enabled. This causes slight increases in - code size and overhead, but provides the ability to generate system trace information which - is available for viewing in TraceX. */ - -/* -#define TX_ENABLE_EVENT_TRACE -*/ - - -/* Determine if block pool performance gathering is required by the application. When the following is - defined, ThreadX gathers various block pool performance information. */ - -/* -#define TX_BLOCK_POOL_ENABLE_PERFORMANCE_INFO -*/ - -/* Determine if byte pool performance gathering is required by the application. When the following is - defined, ThreadX gathers various byte pool performance information. */ - -/* -#define TX_BYTE_POOL_ENABLE_PERFORMANCE_INFO -*/ - -/* Determine if event flags performance gathering is required by the application. When the following is - defined, ThreadX gathers various event flags performance information. */ - -/* -#define TX_EVENT_FLAGS_ENABLE_PERFORMANCE_INFO -*/ - -/* Determine if mutex performance gathering is required by the application. When the following is - defined, ThreadX gathers various mutex performance information. */ - -/* -#define TX_MUTEX_ENABLE_PERFORMANCE_INFO -*/ - -/* Determine if queue performance gathering is required by the application. When the following is - defined, ThreadX gathers various queue performance information. */ - -/* -#define TX_QUEUE_ENABLE_PERFORMANCE_INFO -*/ - -/* Determine if semaphore performance gathering is required by the application. When the following is - defined, ThreadX gathers various semaphore performance information. */ - -/* -#define TX_SEMAPHORE_ENABLE_PERFORMANCE_INFO -*/ - -/* Determine if thread performance gathering is required by the application. When the following is - defined, ThreadX gathers various thread performance information. */ - -/* -#define TX_THREAD_ENABLE_PERFORMANCE_INFO -*/ - -/* Determine if timer performance gathering is required by the application. When the following is - defined, ThreadX gathers various timer performance information. */ - -/* -#define TX_TIMER_ENABLE_PERFORMANCE_INFO -*/ - -#endif - diff --git a/ports/arm11/iar/example_build/sample_threadx.ewt b/ports/arm11/iar/example_build/sample_threadx.ewt deleted file mode 100644 index a30fa4d3..00000000 --- a/ports/arm11/iar/example_build/sample_threadx.ewt +++ /dev/null @@ -1,2797 +0,0 @@ - - - 3 - - Debug - - ARM - - 1 - - C-STAT - 263 - - 263 - - 0 - - 1 - 600 - 0 - 2 - 0 - 1 - 100 - - - 1.7.0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 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- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - RuntimeChecking - 0 - - 2 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - Release - - ARM - - 0 - - C-STAT - 263 - - 263 - - 0 - - 1 - 600 - 0 - 2 - 0 - 1 - 100 - - - 1.7.0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - RuntimeChecking - 0 - - 2 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - Common sources - - $PROJ_DIR$\cstartup.s - - - $PROJ_DIR$\sample_threadx.c - - - $PROJ_DIR$\Debug\Exe\tx.a - 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- - - 34124 - 0A0000000A0000006E0000006E000000 - 0000000000000000150300001A000000 - 8192 - 0 - 0 - 32767 - 0 - - - 1 - - - - diff --git a/ports/arm11/iar/example_build/settings/sample_threadx.dnx b/ports/arm11/iar/example_build/settings/sample_threadx.dnx deleted file mode 100644 index 1e3115df..00000000 --- a/ports/arm11/iar/example_build/settings/sample_threadx.dnx +++ /dev/null @@ -1,99 +0,0 @@ - - - - 0 - 1 - 90 - 1 - 1 - 1 - main - 0 - 50 - - - 0 - 1 - - - 1018058853 - - - 0 - 0 - 0 - - - 0 - - - _ 0 - _ 0 - - - 0 - - - 0 - 1 - 0 - 0 - - - 0 - - - 1 - - - _ 0 - _ "" - - - _ 0 - _ "" - _ 0 - - - 0 - 0 - 1 - 0 - 1 - 0 - - - 0 - 0 - 1 - 0 - 1 - - - 0 - - - 0 - - - 1 - _ 0 9999 0 9999 1 0 0 100 0 1 "IRQ 1 0x18 CPSR.I" - 1 - - - 1 - 0 - 1 - 0 - 1 - - - 0 - 0 - - - 10000000 - 0 - 1 - - diff --git a/ports/arm11/iar/example_build/settings/tx.Debug.cspy.bat b/ports/arm11/iar/example_build/settings/tx.Debug.cspy.bat deleted file mode 100644 index 256ebf4d..00000000 --- a/ports/arm11/iar/example_build/settings/tx.Debug.cspy.bat +++ /dev/null @@ -1,40 +0,0 @@ -@REM This batch file has been generated by the IAR Embedded Workbench -@REM C-SPY Debugger, as an aid to preparing a command line for running -@REM the cspybat command line utility using the appropriate settings. -@REM -@REM Note that this file is generated every time a new debug session -@REM is initialized, so you may want to move or rename the file before -@REM making changes. -@REM -@REM You can launch cspybat by typing the name of this batch file followed -@REM by the name of the debug file (usually an ELF/DWARF or UBROF file). -@REM -@REM Read about available command line parameters in the C-SPY Debugging -@REM Guide. Hints about additional command line parameters that may be -@REM useful in specific cases: -@REM --download_only Downloads a code image without starting a debug -@REM session afterwards. -@REM --silent Omits the sign-on message. -@REM --timeout Limits the maximum allowed execution time. -@REM - - -@echo off - -if not "%~1" == "" goto debugFile - -@echo on - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0_2\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" - -@echo off -goto end - -:debugFile - -@echo on - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0_2\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" "--debug_file=%~1" --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" - -@echo off -:end \ No newline at end of file diff --git a/ports/arm11/iar/example_build/settings/tx.Debug.cspy.ps1 b/ports/arm11/iar/example_build/settings/tx.Debug.cspy.ps1 deleted file mode 100644 index 6a1889c0..00000000 --- a/ports/arm11/iar/example_build/settings/tx.Debug.cspy.ps1 +++ /dev/null @@ -1,31 +0,0 @@ -param([String]$debugfile = ""); - -# This powershell file has been generated by the IAR Embedded Workbench -# C - SPY Debugger, as an aid to preparing a command line for running -# the cspybat command line utility using the appropriate settings. -# -# Note that this file is generated every time a new debug session -# is initialized, so you may want to move or rename the file before -# making changes. -# -# You can launch cspybat by typing Powershell.exe -File followed by the name of this batch file, followed -# by the name of the debug file (usually an ELF / DWARF or UBROF file). -# -# Read about available command line parameters in the C - SPY Debugging -# Guide. Hints about additional command line parameters that may be -# useful in specific cases : -# --download_only Downloads a code image without starting a debug -# session afterwards. -# --silent Omits the sign - on message. -# --timeout Limits the maximum allowed execution time. -# - - -if ($debugfile -eq "") -{ -& "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0_2\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" -} -else -{ -& "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0_2\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" --debug_file=$debugfile --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" -} diff --git a/ports/arm11/iar/example_build/settings/tx.Debug.driver.xcl b/ports/arm11/iar/example_build/settings/tx.Debug.driver.xcl deleted file mode 100644 index 06e18c00..00000000 --- a/ports/arm11/iar/example_build/settings/tx.Debug.driver.xcl +++ /dev/null @@ -1,13 +0,0 @@ -"--endian=little" - -"--cpu=ARM1136J-S" - -"--fpu=None" - -"--semihosting" - -"--multicore_nr_of_cores=1" - - - - diff --git a/ports/arm11/iar/example_build/settings/tx.Debug.general.xcl b/ports/arm11/iar/example_build/settings/tx.Debug.general.xcl deleted file mode 100644 index deeeb2f9..00000000 --- a/ports/arm11/iar/example_build/settings/tx.Debug.general.xcl +++ /dev/null @@ -1,11 +0,0 @@ -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0_2\arm\bin\armproc.dll" - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0_2\arm\bin\armsim2.dll" - -"C:\release\threadx\Debug\Exe\tx.out" - ---plugin "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0_2\arm\bin\armbat.dll" - - - - diff --git a/ports/arm11/iar/example_build/settings/tx.crun b/ports/arm11/iar/example_build/settings/tx.crun deleted file mode 100644 index d71ea555..00000000 --- a/ports/arm11/iar/example_build/settings/tx.crun +++ /dev/null @@ -1,13 +0,0 @@ - - - 1 - - - * - * - * - 0 - 1 - - - diff --git a/ports/arm11/iar/example_build/settings/tx.dbgdt b/ports/arm11/iar/example_build/settings/tx.dbgdt deleted file mode 100644 index 73e71f6e..00000000 --- a/ports/arm11/iar/example_build/settings/tx.dbgdt +++ /dev/null @@ -1,4 +0,0 @@ - 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- - - 34124 - 0A0000000A0000006E0000006E000000 - 0000000000000000150300001A000000 - 8192 - 0 - 0 - 32767 - 0 - - - 1 - - - - diff --git a/ports/arm9/iar/example_build/settings/sample_threadx.dnx b/ports/arm9/iar/example_build/settings/sample_threadx.dnx deleted file mode 100644 index 7b11d0e2..00000000 --- a/ports/arm9/iar/example_build/settings/sample_threadx.dnx +++ /dev/null @@ -1,99 +0,0 @@ - - - - 0 - 1 - 90 - 1 - 1 - 1 - main - 0 - 50 - - - 0 - 1 - - - 530500706 - - - 0 - 0 - 0 - - - 0 - - - _ 0 - _ 0 - - - 0 - - - 0 - 1 - 0 - 0 - - - 0 - - - 1 - - - _ 0 - _ "" - - - _ 0 - _ "" - _ 0 - - - 0 - 0 - 1 - 0 - 1 - 0 - - - 0 - 0 - 1 - 0 - 1 - - - 0 - - - 0 - - - 1 - _ 0 9999 0 9999 1 0 0 100 0 1 "IRQ 1 0x18 CPSR.I" - 1 - - - 1 - 0 - 1 - 0 - 1 - - - 0 - 0 - - - 10000000 - 0 - 1 - - diff --git a/ports/arm9/iar/example_build/settings/tx.Debug.cspy.bat b/ports/arm9/iar/example_build/settings/tx.Debug.cspy.bat deleted file mode 100644 index 256ebf4d..00000000 --- a/ports/arm9/iar/example_build/settings/tx.Debug.cspy.bat +++ /dev/null @@ -1,40 +0,0 @@ -@REM This batch file has been generated by the IAR Embedded Workbench -@REM C-SPY Debugger, as an aid to preparing a command line for running -@REM the cspybat command line utility using the appropriate settings. -@REM -@REM Note that this file is generated every time a new debug session -@REM is initialized, so you may want to move or rename the file before -@REM making changes. -@REM -@REM You can launch cspybat by typing the name of this batch file followed -@REM by the name of the debug file (usually an ELF/DWARF or UBROF file). -@REM -@REM Read about available command line parameters in the C-SPY Debugging -@REM Guide. Hints about additional command line parameters that may be -@REM useful in specific cases: -@REM --download_only Downloads a code image without starting a debug -@REM session afterwards. -@REM --silent Omits the sign-on message. -@REM --timeout Limits the maximum allowed execution time. -@REM - - -@echo off - -if not "%~1" == "" goto debugFile - -@echo on - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0_2\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" - -@echo off -goto end - -:debugFile - -@echo on - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0_2\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" "--debug_file=%~1" --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" - -@echo off -:end \ No newline at end of file diff --git a/ports/arm9/iar/example_build/settings/tx.Debug.cspy.ps1 b/ports/arm9/iar/example_build/settings/tx.Debug.cspy.ps1 deleted file mode 100644 index 6a1889c0..00000000 --- a/ports/arm9/iar/example_build/settings/tx.Debug.cspy.ps1 +++ /dev/null @@ -1,31 +0,0 @@ -param([String]$debugfile = ""); - -# This powershell file has been generated by the IAR Embedded Workbench -# C - SPY Debugger, as an aid to preparing a command line for running -# the cspybat command line utility using the appropriate settings. -# -# Note that this file is generated every time a new debug session -# is initialized, so you may want to move or rename the file before -# making changes. -# -# You can launch cspybat by typing Powershell.exe -File followed by the name of this batch file, followed -# by the name of the debug file (usually an ELF / DWARF or UBROF file). -# -# Read about available command line parameters in the C - SPY Debugging -# Guide. Hints about additional command line parameters that may be -# useful in specific cases : -# --download_only Downloads a code image without starting a debug -# session afterwards. -# --silent Omits the sign - on message. -# --timeout Limits the maximum allowed execution time. -# - - -if ($debugfile -eq "") -{ -& "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0_2\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" -} -else -{ -& "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0_2\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" --debug_file=$debugfile --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" -} diff --git a/ports/arm9/iar/example_build/settings/tx.Debug.driver.xcl b/ports/arm9/iar/example_build/settings/tx.Debug.driver.xcl deleted file mode 100644 index f90fa82c..00000000 --- a/ports/arm9/iar/example_build/settings/tx.Debug.driver.xcl +++ /dev/null @@ -1,13 +0,0 @@ -"--endian=little" - -"--cpu=ARM9TDMI" - -"--fpu=None" - -"--semihosting" - -"--multicore_nr_of_cores=1" - - - - diff --git a/ports/arm9/iar/example_build/settings/tx.Debug.general.xcl b/ports/arm9/iar/example_build/settings/tx.Debug.general.xcl deleted file mode 100644 index deeeb2f9..00000000 --- a/ports/arm9/iar/example_build/settings/tx.Debug.general.xcl +++ /dev/null @@ -1,11 +0,0 @@ -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0_2\arm\bin\armproc.dll" - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0_2\arm\bin\armsim2.dll" - -"C:\release\threadx\Debug\Exe\tx.out" - ---plugin "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0_2\arm\bin\armbat.dll" - - - - diff --git a/ports/arm9/iar/example_build/settings/tx.crun b/ports/arm9/iar/example_build/settings/tx.crun deleted file mode 100644 index d71ea555..00000000 --- a/ports/arm9/iar/example_build/settings/tx.crun +++ /dev/null @@ -1,13 +0,0 @@ - - - 1 - - - * - * - * - 0 - 1 - - - diff --git a/ports/arm9/iar/example_build/settings/tx.dbgdt b/ports/arm9/iar/example_build/settings/tx.dbgdt deleted file mode 100644 index 73e71f6e..00000000 --- a/ports/arm9/iar/example_build/settings/tx.dbgdt +++ /dev/null @@ -1,4 +0,0 @@ - - - - diff --git a/ports/arm9/iar/example_build/settings/tx.dnx b/ports/arm9/iar/example_build/settings/tx.dnx deleted file mode 100644 index 1872e83f..00000000 --- a/ports/arm9/iar/example_build/settings/tx.dnx +++ /dev/null @@ -1,58 +0,0 @@ - - - - 0 - 0 - 1 - 0 - 1 - 0 - - - 0 - 0 - 1 - 0 - 1 - - - 0 - 1 - 90 - 1 - 1 - 1 - main - 0 - 50 - - - 0 - - - 0 - - - 1 - - - 1 - 0 - 1 - 0 - 1 - - - 0 - 1 - - - 0 - 0 - - - 10000000 - 0 - 1 - - diff --git a/ports/arm9/iar/example_build/tx.dep b/ports/arm9/iar/example_build/tx.dep deleted file mode 100644 index ffa06c4e..00000000 --- a/ports/arm9/iar/example_build/tx.dep +++ /dev/null @@ -1,9603 +0,0 @@ - - - 4 - 501655296 - - Debug - - $PROJ_DIR$\tx_event_flags_initialize.c - $PROJ_DIR$\tx_event_flags_performance_info_get.c - $PROJ_DIR$\tx_event_flags_set.c - $PROJ_DIR$\tx_byte_pool_performance_info_get.c - $PROJ_DIR$\tx_byte_pool_search.c - $PROJ_DIR$\tx_event_flags_cleanup.c - $PROJ_DIR$\tx_event_flags_performance_system_info_get.c - $PROJ_DIR$\tx_event_flags_set_notify.c - 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- - 34050 - 0A0000000A0000006E0000006E000000 - 0000000000000000FE0200001A000000 - 8192 - 0 - 0 - 744 - 0 - - - 1 - - - - 34048 - 34049 - 34050 - 34051 - 34052 - 34053 - 34054 - 34055 - 34056 - 34057 - 34058 - 34059 - 34060 - 34061 - 34062 - 34063 - 34064 - 34065 - - - - 01000000030000000100000000000000000000000100000001000000FFFFFFFF00000000010000000100000000000000280000002800000000000000 - - - - diff --git a/ports/cortex_a5/iar/example_build/settings/sample_threadx.Debug.cspy.bat b/ports/cortex_a5/iar/example_build/settings/sample_threadx.Debug.cspy.bat deleted file mode 100644 index ad03338f..00000000 --- a/ports/cortex_a5/iar/example_build/settings/sample_threadx.Debug.cspy.bat +++ /dev/null @@ -1,40 +0,0 @@ -@REM This batch file has been generated by the IAR Embedded Workbench -@REM C-SPY Debugger, as an aid to preparing a command line for running -@REM the cspybat command line utility using the appropriate settings. -@REM -@REM Note that this file is generated every time a new debug session -@REM is initialized, so you may want to move or rename the file before -@REM making changes. -@REM -@REM You can launch cspybat by typing the name of this batch file followed -@REM by the name of the debug file (usually an ELF/DWARF or UBROF file). -@REM -@REM Read about available command line parameters in the C-SPY Debugging -@REM Guide. Hints about additional command line parameters that may be -@REM useful in specific cases: -@REM --download_only Downloads a code image without starting a debug -@REM session afterwards. -@REM --silent Omits the sign-on message. -@REM --timeout Limits the maximum allowed execution time. -@REM - - -@echo off - -if not "%~1" == "" goto debugFile - -@echo on - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\common\bin\cspybat" -f "C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports\cortex_a5\iar\example_build\settings\sample_threadx.Debug.general.xcl" --backend -f "C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports\cortex_a5\iar\example_build\settings\sample_threadx.Debug.driver.xcl" - -@echo off -goto end - -:debugFile - -@echo on - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\common\bin\cspybat" -f "C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports\cortex_a5\iar\example_build\settings\sample_threadx.Debug.general.xcl" "--debug_file=%~1" --backend -f "C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports\cortex_a5\iar\example_build\settings\sample_threadx.Debug.driver.xcl" - -@echo off -:end \ No newline at end of file diff --git a/ports/cortex_a5/iar/example_build/settings/sample_threadx.Debug.cspy.ps1 b/ports/cortex_a5/iar/example_build/settings/sample_threadx.Debug.cspy.ps1 deleted file mode 100644 index de4f156b..00000000 --- a/ports/cortex_a5/iar/example_build/settings/sample_threadx.Debug.cspy.ps1 +++ /dev/null @@ -1,31 +0,0 @@ -param([String]$debugfile = ""); - -# This powershell file has been generated by the IAR Embedded Workbench -# C - SPY Debugger, as an aid to preparing a command line for running -# the cspybat command line utility using the appropriate settings. -# -# Note that this file is generated every time a new debug session -# is initialized, so you may want to move or rename the file before -# making changes. -# -# You can launch cspybat by typing Powershell.exe -File followed by the name of this batch file, followed -# by the name of the debug file (usually an ELF / DWARF or UBROF file). -# -# Read about available command line parameters in the C - SPY Debugging -# Guide. Hints about additional command line parameters that may be -# useful in specific cases : -# --download_only Downloads a code image without starting a debug -# session afterwards. -# --silent Omits the sign - on message. -# --timeout Limits the maximum allowed execution time. -# - - -if ($debugfile -eq "") -{ -& "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\common\bin\cspybat" -f "C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports\cortex_a5\iar\example_build\settings\sample_threadx.Debug.general.xcl" --backend -f "C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports\cortex_a5\iar\example_build\settings\sample_threadx.Debug.driver.xcl" -} -else -{ -& "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\common\bin\cspybat" -f "C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports\cortex_a5\iar\example_build\settings\sample_threadx.Debug.general.xcl" --debug_file=$debugfile --backend -f "C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports\cortex_a5\iar\example_build\settings\sample_threadx.Debug.driver.xcl" -} diff --git a/ports/cortex_a5/iar/example_build/settings/sample_threadx.Debug.driver.xcl b/ports/cortex_a5/iar/example_build/settings/sample_threadx.Debug.driver.xcl deleted file mode 100644 index 50057893..00000000 --- a/ports/cortex_a5/iar/example_build/settings/sample_threadx.Debug.driver.xcl +++ /dev/null @@ -1,13 +0,0 @@ -"--endian=little" - -"--cpu=Cortex-A5" - -"--fpu=None" - -"--semihosting" - -"--multicore_nr_of_cores=1" - - - - diff --git a/ports/cortex_a5/iar/example_build/settings/sample_threadx.Debug.general.xcl b/ports/cortex_a5/iar/example_build/settings/sample_threadx.Debug.general.xcl deleted file mode 100644 index 22442691..00000000 --- a/ports/cortex_a5/iar/example_build/settings/sample_threadx.Debug.general.xcl +++ /dev/null @@ -1,11 +0,0 @@ -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\arm\bin\armproc.dll" - -"C:\Program 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a/ports/cortex_a5/iar/example_build/settings/tx.Debug.cspy.bat +++ /dev/null @@ -1,40 +0,0 @@ -@REM This batch file has been generated by the IAR Embedded Workbench -@REM C-SPY Debugger, as an aid to preparing a command line for running -@REM the cspybat command line utility using the appropriate settings. -@REM -@REM Note that this file is generated every time a new debug session -@REM is initialized, so you may want to move or rename the file before -@REM making changes. -@REM -@REM You can launch cspybat by typing the name of this batch file followed -@REM by the name of the debug file (usually an ELF/DWARF or UBROF file). -@REM -@REM Read about available command line parameters in the C-SPY Debugging -@REM Guide. Hints about additional command line parameters that may be -@REM useful in specific cases: -@REM --download_only Downloads a code image without starting a debug -@REM session afterwards. -@REM --silent Omits the sign-on message. -@REM --timeout Limits the maximum allowed execution time. -@REM - - -@echo off - -if not "%~1" == "" goto debugFile - -@echo on - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0_2\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" - -@echo off -goto end - -:debugFile - -@echo on - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0_2\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" "--debug_file=%~1" --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" - -@echo off -:end \ No newline at end of file diff --git a/ports/cortex_a5/iar/example_build/settings/tx.Debug.cspy.ps1 b/ports/cortex_a5/iar/example_build/settings/tx.Debug.cspy.ps1 deleted file mode 100644 index 6a1889c0..00000000 --- a/ports/cortex_a5/iar/example_build/settings/tx.Debug.cspy.ps1 +++ /dev/null @@ -1,31 +0,0 @@ -param([String]$debugfile = ""); - -# This powershell file has been generated by the IAR Embedded Workbench -# C - SPY Debugger, as an aid to preparing a command line for running -# the cspybat command line utility using the appropriate settings. -# -# Note that this file is generated every time a new debug session -# is initialized, so you may want to move or rename the file before -# making changes. -# -# You can launch cspybat by typing Powershell.exe -File followed by the name of this batch file, followed -# by the name of the debug file (usually an ELF / DWARF or UBROF file). -# -# Read about available command line parameters in the C - SPY Debugging -# Guide. Hints about additional command line parameters that may be -# useful in specific cases : -# --download_only Downloads a code image without starting a debug -# session afterwards. -# --silent Omits the sign - on message. -# --timeout Limits the maximum allowed execution time. -# - - -if ($debugfile -eq "") -{ -& "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0_2\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" -} -else -{ -& "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0_2\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" --debug_file=$debugfile --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" -} diff --git a/ports/cortex_a5/iar/example_build/settings/tx.Debug.driver.xcl b/ports/cortex_a5/iar/example_build/settings/tx.Debug.driver.xcl deleted file mode 100644 index 50057893..00000000 --- a/ports/cortex_a5/iar/example_build/settings/tx.Debug.driver.xcl +++ /dev/null @@ -1,13 +0,0 @@ -"--endian=little" - -"--cpu=Cortex-A5" - -"--fpu=None" - -"--semihosting" - -"--multicore_nr_of_cores=1" - - - - diff --git a/ports/cortex_a5/iar/example_build/settings/tx.Debug.general.xcl b/ports/cortex_a5/iar/example_build/settings/tx.Debug.general.xcl deleted file mode 100644 index deeeb2f9..00000000 --- a/ports/cortex_a5/iar/example_build/settings/tx.Debug.general.xcl +++ /dev/null @@ -1,11 +0,0 @@ -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0_2\arm\bin\armproc.dll" - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0_2\arm\bin\armsim2.dll" - -"C:\release\threadx\Debug\Exe\tx.out" - ---plugin "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0_2\arm\bin\armbat.dll" - - - - diff --git a/ports/cortex_a5/iar/example_build/settings/tx.crun b/ports/cortex_a5/iar/example_build/settings/tx.crun deleted file mode 100644 index d71ea555..00000000 --- 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debug session -@REM is initialized, so you may want to move or rename the file before -@REM making changes. -@REM -@REM You can launch cspybat by typing the name of this batch file followed -@REM by the name of the debug file (usually an ELF/DWARF or UBROF file). -@REM -@REM Read about available command line parameters in the C-SPY Debugging -@REM Guide. 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a/ports/cortex_a7/iar/example_build/settings/tx.Debug.cspy.bat +++ /dev/null @@ -1,40 +0,0 @@ -@REM This batch file has been generated by the IAR Embedded Workbench -@REM C-SPY Debugger, as an aid to preparing a command line for running -@REM the cspybat command line utility using the appropriate settings. -@REM -@REM Note that this file is generated every time a new debug session -@REM is initialized, so you may want to move or rename the file before -@REM making changes. -@REM -@REM You can launch cspybat by typing the name of this batch file followed -@REM by the name of the debug file (usually an ELF/DWARF or UBROF file). -@REM -@REM Read about available command line parameters in the C-SPY Debugging -@REM Guide. Hints about additional command line parameters that may be -@REM useful in specific cases: -@REM --download_only Downloads a code image without starting a debug -@REM session afterwards. -@REM --silent Omits the sign-on message. -@REM --timeout Limits the maximum allowed execution time. -@REM - - -@echo off - -if not "%~1" == "" goto debugFile - -@echo on - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0_2\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" - -@echo off -goto end - -:debugFile - -@echo on - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0_2\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" "--debug_file=%~1" --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" - -@echo off -:end \ No newline at end of file diff --git a/ports/cortex_a7/iar/example_build/settings/tx.Debug.cspy.ps1 b/ports/cortex_a7/iar/example_build/settings/tx.Debug.cspy.ps1 deleted file mode 100644 index 6a1889c0..00000000 --- a/ports/cortex_a7/iar/example_build/settings/tx.Debug.cspy.ps1 +++ /dev/null @@ -1,31 +0,0 @@ -param([String]$debugfile = ""); - -# This powershell file has been generated by the IAR Embedded Workbench -# C - SPY Debugger, as an aid to preparing a command line for running -# the cspybat command line utility using the appropriate settings. -# -# Note that this file is generated every time a new debug session -# is initialized, so you may want to move or rename the file before -# making changes. -# -# You can launch cspybat by typing Powershell.exe -File followed by the name of this batch file, followed -# by the name of the debug file (usually an ELF / DWARF or UBROF file). -# -# Read about available command line parameters in the C - SPY Debugging -# Guide. Hints about additional command line parameters that may be -# useful in specific cases : -# --download_only Downloads a code image without starting a debug -# session afterwards. -# --silent Omits the sign - on message. -# --timeout Limits the maximum allowed execution time. -# - - -if ($debugfile -eq "") -{ -& "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0_2\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" -} -else -{ -& "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0_2\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" --debug_file=$debugfile --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" -} diff --git a/ports/cortex_a7/iar/example_build/settings/tx.Debug.driver.xcl b/ports/cortex_a7/iar/example_build/settings/tx.Debug.driver.xcl deleted file mode 100644 index ddc3572b..00000000 --- a/ports/cortex_a7/iar/example_build/settings/tx.Debug.driver.xcl +++ /dev/null @@ -1,13 +0,0 @@ -"--endian=little" - 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a/ports/cortex_a8/iar/example_build/settings/tx.Debug.cspy.bat +++ /dev/null @@ -1,40 +0,0 @@ -@REM This batch file has been generated by the IAR Embedded Workbench -@REM C-SPY Debugger, as an aid to preparing a command line for running -@REM the cspybat command line utility using the appropriate settings. -@REM -@REM Note that this file is generated every time a new debug session -@REM is initialized, so you may want to move or rename the file before -@REM making changes. -@REM -@REM You can launch cspybat by typing the name of this batch file followed -@REM by the name of the debug file (usually an ELF/DWARF or UBROF file). -@REM -@REM Read about available command line parameters in the C-SPY Debugging -@REM Guide. Hints about additional command line parameters that may be -@REM useful in specific cases: -@REM --download_only Downloads a code image without starting a debug -@REM session afterwards. -@REM --silent Omits the sign-on message. -@REM --timeout Limits the maximum allowed execution time. -@REM - - -@echo off - -if not "%~1" == "" goto debugFile - -@echo on - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0_2\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" - -@echo off -goto end - -:debugFile - -@echo on - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0_2\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" "--debug_file=%~1" --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" - -@echo off -:end \ No newline at end of file diff --git a/ports/cortex_a8/iar/example_build/settings/tx.Debug.cspy.ps1 b/ports/cortex_a8/iar/example_build/settings/tx.Debug.cspy.ps1 deleted file mode 100644 index 6a1889c0..00000000 --- a/ports/cortex_a8/iar/example_build/settings/tx.Debug.cspy.ps1 +++ /dev/null @@ -1,31 +0,0 @@ -param([String]$debugfile = ""); - -# This powershell file has been generated by the IAR Embedded Workbench -# C - SPY Debugger, as an aid to preparing a command line for running -# the cspybat command line utility using the appropriate settings. -# -# Note that this file is generated every time a new debug session -# is initialized, so you may want to move or rename the file before -# making changes. -# -# You can launch cspybat by typing Powershell.exe -File followed by the name of this batch file, followed -# by the name of the debug file (usually an ELF / DWARF or UBROF file). -# -# Read about available command line parameters in the C - SPY Debugging -# Guide. Hints about additional command line parameters that may be -# useful in specific cases : -# --download_only Downloads a code image without starting a debug -# session afterwards. -# --silent Omits the sign - on message. -# --timeout Limits the maximum allowed execution time. -# - - -if ($debugfile -eq "") -{ -& "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0_2\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" -} -else -{ -& "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0_2\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" --debug_file=$debugfile --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" -} diff --git a/ports/cortex_a8/iar/example_build/settings/tx.Debug.driver.xcl b/ports/cortex_a8/iar/example_build/settings/tx.Debug.driver.xcl deleted file mode 100644 index 36278b8c..00000000 --- a/ports/cortex_a8/iar/example_build/settings/tx.Debug.driver.xcl +++ /dev/null @@ -1,13 +0,0 @@ -"--endian=little" - -"--cpu=Cortex-A8" - -"--fpu=None" - -"--semihosting" - -"--multicore_nr_of_cores=1" - - - - diff --git a/ports/cortex_a8/iar/example_build/settings/tx.Debug.general.xcl b/ports/cortex_a8/iar/example_build/settings/tx.Debug.general.xcl deleted file mode 100644 index deeeb2f9..00000000 --- a/ports/cortex_a8/iar/example_build/settings/tx.Debug.general.xcl +++ /dev/null @@ -1,11 +0,0 @@ -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0_2\arm\bin\armproc.dll" - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0_2\arm\bin\armsim2.dll" - -"C:\release\threadx\Debug\Exe\tx.out" - ---plugin "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0_2\arm\bin\armbat.dll" - - - - diff --git a/ports/cortex_a8/iar/example_build/settings/tx.crun b/ports/cortex_a8/iar/example_build/settings/tx.crun deleted file mode 100644 index d71ea555..00000000 --- a/ports/cortex_a8/iar/example_build/settings/tx.crun +++ /dev/null @@ -1,13 +0,0 @@ - - - 1 - - - * - * - * - 0 - 1 - - - diff --git a/ports/cortex_a8/iar/example_build/settings/tx.dbgdt b/ports/cortex_a8/iar/example_build/settings/tx.dbgdt deleted file mode 100644 index 73e71f6e..00000000 --- a/ports/cortex_a8/iar/example_build/settings/tx.dbgdt +++ /dev/null @@ -1,4 +0,0 @@ - - - - diff --git a/ports/cortex_a8/iar/example_build/settings/tx.dnx b/ports/cortex_a8/iar/example_build/settings/tx.dnx deleted file mode 100644 index 1872e83f..00000000 --- a/ports/cortex_a8/iar/example_build/settings/tx.dnx +++ /dev/null @@ -1,58 +0,0 @@ - - - - 0 - 0 - 1 - 0 - 1 - 0 - - - 0 - 0 - 1 - 0 - 1 - - - 0 - 1 - 90 - 1 - 1 - 1 - main - 0 - 50 - - - 0 - - - 0 - - - 1 - - - 1 - 0 - 1 - 0 - 1 - - - 0 - 1 - - - 0 - 0 - - - 10000000 - 0 - 1 - - diff --git a/ports/cortex_a8/iar/example_build/tx.dep b/ports/cortex_a8/iar/example_build/tx.dep deleted file mode 100644 index d3f1fdc6..00000000 --- a/ports/cortex_a8/iar/example_build/tx.dep +++ /dev/null @@ -1,9603 +0,0 @@ - - - 4 - 2050279214 - - Debug - - $PROJ_DIR$\Debug\Obj\tx_queue_create.o - $PROJ_DIR$\Debug\Obj\tx_thread_irq_nesting_start.o - $PROJ_DIR$\Debug\Obj\txe_timer_delete.pbi - $PROJ_DIR$\Debug\Obj\tx_semaphore_prioritize.pbi - $PROJ_DIR$\Debug\Obj\txe_thread_time_slice_change.o - $PROJ_DIR$\Debug\Obj\tx_mutex_performance_system_info_get.pbi - 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- - - 34124 - 0A0000000A0000006E0000006E000000 - 0000000000000000150300001A000000 - 8192 - 0 - 0 - 32767 - 0 - - - 1 - - - - diff --git a/ports/cortex_a9/iar/example_build/settings/sample_threadx.dnx b/ports/cortex_a9/iar/example_build/settings/sample_threadx.dnx deleted file mode 100644 index f612528c..00000000 --- a/ports/cortex_a9/iar/example_build/settings/sample_threadx.dnx +++ /dev/null @@ -1,100 +0,0 @@ - - - - 0 - 1 - 90 - 1 - 1 - 1 - main - 0 - 50 - - - 0 - 1 - - - 79500869 - - - 0 - 0 - 0 - - - 1 - 0 - - - _ 0 - _ 0 - - - 0 - - - 0 - 1 - 0 - 0 - - - 0 - - - 1 - - - _ 0 - _ "" - - - _ 0 - _ "" - _ 0 - - - 0 - 0 - 1 - 0 - 1 - 0 - - - 0 - 0 - 1 - 0 - 1 - - - 0 - - - 0 - - - 1 - _ 0 9999 0 9999 1 0 0 100 0 1 "IRQ 1 0x18 CPSR.I" - 1 - - - 1 - 0 - 1 - 0 - 1 - - - 0 - 0 - - - 10000000 - 0 - 1 - - diff --git a/ports/cortex_a9/iar/example_build/settings/tx.Debug.cspy.bat b/ports/cortex_a9/iar/example_build/settings/tx.Debug.cspy.bat deleted file mode 100644 index 256ebf4d..00000000 --- a/ports/cortex_a9/iar/example_build/settings/tx.Debug.cspy.bat +++ /dev/null @@ -1,40 +0,0 @@ -@REM This batch file has been generated by the IAR Embedded Workbench -@REM C-SPY Debugger, as an aid to preparing a command line for running -@REM the cspybat command line utility using the appropriate settings. -@REM -@REM Note that this file is generated every time a new debug session -@REM is initialized, so you may want to move or rename the file before -@REM making changes. -@REM -@REM You can launch cspybat by typing the name of this batch file followed -@REM by the name of the debug file (usually an ELF/DWARF or UBROF file). -@REM -@REM Read about available command line parameters in the C-SPY Debugging -@REM Guide. Hints about additional command line parameters that may be -@REM useful in specific cases: -@REM --download_only Downloads a code image without starting a debug -@REM session afterwards. -@REM --silent Omits the sign-on message. -@REM --timeout Limits the maximum allowed execution time. -@REM - - -@echo off - -if not "%~1" == "" goto debugFile - -@echo on - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0_2\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" - -@echo off -goto end - -:debugFile - -@echo on - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0_2\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" "--debug_file=%~1" --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" - -@echo off -:end \ No newline at end of file diff --git a/ports/cortex_a9/iar/example_build/settings/tx.Debug.cspy.ps1 b/ports/cortex_a9/iar/example_build/settings/tx.Debug.cspy.ps1 deleted file mode 100644 index 6a1889c0..00000000 --- a/ports/cortex_a9/iar/example_build/settings/tx.Debug.cspy.ps1 +++ /dev/null @@ -1,31 +0,0 @@ -param([String]$debugfile = ""); - -# This powershell file has been generated by the IAR Embedded Workbench -# C - SPY Debugger, as an aid to preparing a command line for running -# the cspybat command line utility using the appropriate settings. -# -# Note that this file is generated every time a new debug session -# is initialized, so you may want to move or rename the file before -# making changes. -# -# You can launch cspybat by typing Powershell.exe -File followed by the name of this batch file, followed -# by the name of the debug file (usually an ELF / DWARF or UBROF file). -# -# Read about available command line parameters in the C - SPY Debugging -# Guide. Hints about additional command line parameters that may be -# useful in specific cases : -# --download_only Downloads a code image without starting a debug -# session afterwards. -# --silent Omits the sign - on message. -# --timeout Limits the maximum allowed execution time. -# - - -if ($debugfile -eq "") -{ -& "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0_2\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" -} -else -{ -& "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0_2\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" --debug_file=$debugfile --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" -} diff --git a/ports/cortex_a9/iar/example_build/settings/tx.Debug.driver.xcl b/ports/cortex_a9/iar/example_build/settings/tx.Debug.driver.xcl deleted file mode 100644 index a969962f..00000000 --- a/ports/cortex_a9/iar/example_build/settings/tx.Debug.driver.xcl +++ /dev/null @@ -1,13 +0,0 @@ -"--endian=little" - -"--cpu=Cortex-A9" - -"--fpu=VFPv3Neon" - -"--semihosting" - -"--multicore_nr_of_cores=1" - - - - diff --git a/ports/cortex_a9/iar/example_build/settings/tx.Debug.general.xcl b/ports/cortex_a9/iar/example_build/settings/tx.Debug.general.xcl deleted file mode 100644 index deeeb2f9..00000000 --- a/ports/cortex_a9/iar/example_build/settings/tx.Debug.general.xcl +++ /dev/null @@ -1,11 +0,0 @@ -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0_2\arm\bin\armproc.dll" - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0_2\arm\bin\armsim2.dll" - -"C:\release\threadx\Debug\Exe\tx.out" - ---plugin "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0_2\arm\bin\armbat.dll" - - - - diff --git a/ports/cortex_a9/iar/example_build/settings/tx.crun b/ports/cortex_a9/iar/example_build/settings/tx.crun deleted file mode 100644 index d71ea555..00000000 --- a/ports/cortex_a9/iar/example_build/settings/tx.crun +++ /dev/null @@ -1,13 +0,0 @@ - - - 1 - - - * - * - * - 0 - 1 - - - diff --git a/ports/cortex_a9/iar/example_build/settings/tx.dbgdt b/ports/cortex_a9/iar/example_build/settings/tx.dbgdt deleted file mode 100644 index 73e71f6e..00000000 --- a/ports/cortex_a9/iar/example_build/settings/tx.dbgdt +++ /dev/null @@ -1,4 +0,0 @@ - - - - diff --git a/ports/cortex_a9/iar/example_build/settings/tx.dnx b/ports/cortex_a9/iar/example_build/settings/tx.dnx deleted file mode 100644 index 1872e83f..00000000 --- a/ports/cortex_a9/iar/example_build/settings/tx.dnx +++ /dev/null @@ -1,58 +0,0 @@ - - - - 0 - 0 - 1 - 0 - 1 - 0 - - - 0 - 0 - 1 - 0 - 1 - - - 0 - 1 - 90 - 1 - 1 - 1 - main - 0 - 50 - - - 0 - - - 0 - - - 1 - - - 1 - 0 - 1 - 0 - 1 - - - 0 - 1 - - - 0 - 0 - - - 10000000 - 0 - 1 - - diff --git a/ports/cortex_a9/iar/example_build/tx.dep b/ports/cortex_a9/iar/example_build/tx.dep deleted file mode 100644 index a1dc2578..00000000 --- a/ports/cortex_a9/iar/example_build/tx.dep +++ /dev/null @@ -1,9593 +0,0 @@ - - - 4 - 607583892 - - Debug - - $PROJ_DIR$\..\..\..\..\common\src\txe_mutex_put.c - $PROJ_DIR$\..\..\..\..\common\src\txe_thread_create.c - $PROJ_DIR$\..\..\..\..\common\src\txe_thread_info_get.c - $PROJ_DIR$\..\..\..\..\common\src\txe_semaphore_info_get.c - $PROJ_DIR$\..\..\..\..\common\src\txe_thread_relinquish.c - $PROJ_DIR$\..\..\..\..\common\src\txe_queue_info_get.c - $PROJ_DIR$\..\..\..\..\common\src\txe_semaphore_delete.c - $PROJ_DIR$\..\..\..\..\common\src\txe_mutex_prioritize.c - $PROJ_DIR$\..\..\..\..\common\src\txe_mutex_get.c - $PROJ_DIR$\..\..\..\..\common\src\txe_queue_flush.c - $PROJ_DIR$\..\..\..\..\common\src\txe_queue_prioritize.c - $PROJ_DIR$\..\..\..\..\common\src\txe_semaphore_ceiling_put.c - $PROJ_DIR$\..\..\..\..\common\src\txe_semaphore_prioritize.c - $PROJ_DIR$\..\..\..\..\common\src\txe_queue_receive.c - $PROJ_DIR$\..\..\..\..\common\src\txe_queue_send_notify.c - $PROJ_DIR$\..\..\..\..\common\src\txe_semaphore_create.c - $PROJ_DIR$\..\..\..\..\common\src\txe_mutex_create.c - $PROJ_DIR$\..\..\..\..\common\src\txe_queue_delete.c - $PROJ_DIR$\..\..\..\..\common\src\txe_thread_preemption_change.c - $PROJ_DIR$\..\..\..\..\common\src\txe_event_flags_set_notify.c - $PROJ_DIR$\..\..\..\..\common\src\txe_queue_create.c - $PROJ_DIR$\..\..\..\..\common\src\txe_thread_priority_change.c - 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- - - 34123 - 0A0000000A0000006E0000006E000000 - 0000000000000000150300001A000000 - 8192 - 0 - 0 - 767 - 0 - - - 1 - - - - diff --git a/ports/cortex_m0/iar/example_build/settings/sample_threadx.dnx b/ports/cortex_m0/iar/example_build/settings/sample_threadx.dnx deleted file mode 100644 index e84a61e9..00000000 --- a/ports/cortex_m0/iar/example_build/settings/sample_threadx.dnx +++ /dev/null @@ -1,100 +0,0 @@ - - - - 0 - 1 - 90 - 1 - 1 - 1 - main - 0 - 50 - - - 0 - 1 - - - 98018242 - - - 0 - 0 - 0 - - - 1 - 0 - - - _ 0 - _ 0 - - - 0 - - - 0 - 1 - 0 - 0 - - - 0 - - - 1 - - - _ 0 - _ "" - - - _ 0 - _ "" - _ 0 - - - 0 - 0 - 1 - 0 - 1 - 0 - - - 0 - 0 - 1 - 0 - 1 - - - 0 - - - 0 - - - 1 - _ 0 9999 0 9999 1 0 0 100 0 1 "SysTick 1 0x3C" - 1 - - - 1 - 0 - 1 - 0 - 1 - - - 0 - 0 - - - 10000000 - 0 - 1 - - diff --git a/ports/cortex_m0/iar/example_build/settings/sample_threadx.reggroups b/ports/cortex_m0/iar/example_build/settings/sample_threadx.reggroups deleted file mode 100644 index 5f282702..00000000 --- a/ports/cortex_m0/iar/example_build/settings/sample_threadx.reggroups +++ /dev/null @@ -1 +0,0 @@ - \ No newline at end of file diff --git a/ports/cortex_m0/iar/example_build/settings/tx.Debug.cspy.bat b/ports/cortex_m0/iar/example_build/settings/tx.Debug.cspy.bat deleted file mode 100644 index d76cfad9..00000000 --- a/ports/cortex_m0/iar/example_build/settings/tx.Debug.cspy.bat +++ /dev/null @@ -1,40 +0,0 @@ -@REM This batch file has been generated by the IAR Embedded Workbench -@REM C-SPY Debugger, as an aid to preparing a command line for running -@REM the cspybat command line utility using the appropriate settings. -@REM -@REM Note that this file is generated every time a new debug session -@REM is initialized, so you may want to move or rename the file before -@REM making changes. -@REM -@REM You can launch cspybat by typing the name of this batch file followed -@REM by the name of the debug file (usually an ELF/DWARF or UBROF file). -@REM -@REM Read about available command line parameters in the C-SPY Debugging -@REM Guide. Hints about additional command line parameters that may be -@REM useful in specific cases: -@REM --download_only Downloads a code image without starting a debug -@REM session afterwards. -@REM --silent Omits the sign-on message. -@REM --timeout Limits the maximum allowed execution time. -@REM - - -@echo off - -if not "%~1" == "" goto debugFile - -@echo on - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" - -@echo off -goto end - -:debugFile - -@echo on - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" "--debug_file=%~1" --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" - -@echo off -:end \ No newline at end of file diff --git a/ports/cortex_m0/iar/example_build/settings/tx.Debug.cspy.ps1 b/ports/cortex_m0/iar/example_build/settings/tx.Debug.cspy.ps1 deleted file mode 100644 index 1c1ba13b..00000000 --- a/ports/cortex_m0/iar/example_build/settings/tx.Debug.cspy.ps1 +++ /dev/null @@ -1,31 +0,0 @@ -param([String]$debugfile = ""); - -# This powershell file has been generated by the IAR Embedded Workbench -# C - SPY Debugger, as an aid to preparing a command line for running -# the cspybat command line utility using the appropriate settings. -# -# Note that this file is generated every time a new debug session -# is initialized, so you may want to move or rename the file before -# making changes. -# -# You can launch cspybat by typing Powershell.exe -File followed by the name of this batch file, followed -# by the name of the debug file (usually an ELF / DWARF or UBROF file). -# -# Read about available command line parameters in the C - SPY Debugging -# Guide. Hints about additional command line parameters that may be -# useful in specific cases : -# --download_only Downloads a code image without starting a debug -# session afterwards. -# --silent Omits the sign - on message. -# --timeout Limits the maximum allowed execution time. -# - - -if ($debugfile -eq "") -{ -& "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" -} -else -{ -& "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" --debug_file=$debugfile --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" -} diff --git a/ports/cortex_m0/iar/example_build/settings/tx.Debug.driver.xcl b/ports/cortex_m0/iar/example_build/settings/tx.Debug.driver.xcl deleted file mode 100644 index a7aa9bbc..00000000 --- a/ports/cortex_m0/iar/example_build/settings/tx.Debug.driver.xcl +++ /dev/null @@ -1,13 +0,0 @@ -"--endian=little" - -"--cpu=Cortex-M0" - -"--fpu=None" - -"--semihosting" - -"--multicore_nr_of_cores=1" - - - - diff --git a/ports/cortex_m0/iar/example_build/settings/tx.Debug.general.xcl b/ports/cortex_m0/iar/example_build/settings/tx.Debug.general.xcl deleted file mode 100644 index ef6d6dd5..00000000 --- a/ports/cortex_m0/iar/example_build/settings/tx.Debug.general.xcl +++ /dev/null @@ -1,11 +0,0 @@ -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm\bin\armproc.dll" - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm\bin\armsim2.dll" - -"C:\release\threadx\Debug\Exe\tx.out" - ---plugin "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm\bin\armbat.dll" - - - - diff --git a/ports/cortex_m0/iar/example_build/settings/tx.crun b/ports/cortex_m0/iar/example_build/settings/tx.crun deleted file mode 100644 index d71ea555..00000000 --- a/ports/cortex_m0/iar/example_build/settings/tx.crun +++ /dev/null @@ -1,13 +0,0 @@ - - - 1 - - - * - * - * - 0 - 1 - - - diff --git a/ports/cortex_m0/iar/example_build/settings/tx.dbgdt b/ports/cortex_m0/iar/example_build/settings/tx.dbgdt deleted file mode 100644 index 9e08d965..00000000 --- a/ports/cortex_m0/iar/example_build/settings/tx.dbgdt +++ /dev/null @@ -1,4 +0,0 @@ - - - - diff --git a/ports/cortex_m0/iar/example_build/settings/tx.dnx b/ports/cortex_m0/iar/example_build/settings/tx.dnx deleted file mode 100644 index 25e4c4ba..00000000 --- a/ports/cortex_m0/iar/example_build/settings/tx.dnx +++ /dev/null @@ -1,58 +0,0 @@ - - - - 0 - 1 - 90 - 1 - 1 - 1 - main - 0 - 50 - - - 0 - 1 - - - 0 - 0 - 1 - 0 - 1 - 0 - - - 0 - 0 - 1 - 0 - 1 - - - 0 - - - 0 - - - 1 - - - 1 - 0 - 1 - 0 - 1 - - - 0 - 0 - - - 10000000 - 0 - 1 - - diff --git a/ports/cortex_m0/iar/example_build/tx.dep b/ports/cortex_m0/iar/example_build/tx.dep deleted file mode 100644 index f75ac03e..00000000 --- a/ports/cortex_m0/iar/example_build/tx.dep +++ /dev/null @@ -1,11975 +0,0 @@ - - - 4 - 3548978476 - - Debug - - $PROJ_DIR$\..\..\..\..\common\inc\tx_queue.h - $PROJ_DIR$\..\..\..\..\common\inc\tx_semaphore.h - $PROJ_DIR$\..\..\..\..\common\inc\tx_api.h - $PROJ_DIR$\..\..\..\..\common\inc\tx_event_flags.h - $PROJ_DIR$\..\..\..\..\common\inc\tx_initialize.h - $PROJ_DIR$\..\..\..\..\common\inc\tx_mutex.h - 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- - - 34123 - 0A0000000A0000006E0000006E000000 - 0000000000000000150300001A000000 - 8192 - 0 - 0 - 32767 - 0 - - - 1 - - - - diff --git a/ports/cortex_m3/iar/example_build/settings/sample_threadx.dnx b/ports/cortex_m3/iar/example_build/settings/sample_threadx.dnx deleted file mode 100644 index 0fa79328..00000000 --- a/ports/cortex_m3/iar/example_build/settings/sample_threadx.dnx +++ /dev/null @@ -1,99 +0,0 @@ - - - - 0 - 1 - 90 - 1 - 1 - 1 - main - 0 - 50 - - - 0 - 1 - - - 1618778298 - - - 0 - 0 - 0 - - - 0 - - - _ 0 - _ 0 - - - 0 - - - 0 - 1 - 0 - 0 - - - 0 - - - 1 - - - _ 0 - _ "" - - - _ 0 - _ "" - _ 0 - - - 0 - 0 - 1 - 0 - 1 - 0 - - - 0 - 0 - 1 - 0 - 1 - - - 0 - - - 0 - - - 1 - _ 0 9999 0 9999 1 0 0 100 0 1 "SysTick 1 0x3C" - 1 - - - 1 - 0 - 1 - 0 - 1 - - - 0 - 0 - - - 10000000 - 0 - 1 - - diff --git a/ports/cortex_m3/iar/example_build/settings/tx.Debug.cspy.bat b/ports/cortex_m3/iar/example_build/settings/tx.Debug.cspy.bat deleted file mode 100644 index d76cfad9..00000000 --- a/ports/cortex_m3/iar/example_build/settings/tx.Debug.cspy.bat +++ /dev/null @@ -1,40 +0,0 @@ -@REM This batch file has been generated by the IAR Embedded Workbench -@REM C-SPY Debugger, as an aid to preparing a command line for running -@REM the cspybat command line utility using the appropriate settings. -@REM -@REM Note that this file is generated every time a new debug session -@REM is initialized, so you may want to move or rename the file before -@REM making changes. -@REM -@REM You can launch cspybat by typing the name of this batch file followed -@REM by the name of the debug file (usually an ELF/DWARF or UBROF file). -@REM -@REM Read about available command line parameters in the C-SPY Debugging -@REM Guide. Hints about additional command line parameters that may be -@REM useful in specific cases: -@REM --download_only Downloads a code image without starting a debug -@REM session afterwards. -@REM --silent Omits the sign-on message. -@REM --timeout Limits the maximum allowed execution time. -@REM - - -@echo off - -if not "%~1" == "" goto debugFile - -@echo on - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" - -@echo off -goto end - -:debugFile - -@echo on - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" "--debug_file=%~1" --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" - -@echo off -:end \ No newline at end of file diff --git a/ports/cortex_m3/iar/example_build/settings/tx.Debug.cspy.ps1 b/ports/cortex_m3/iar/example_build/settings/tx.Debug.cspy.ps1 deleted file mode 100644 index 1c1ba13b..00000000 --- a/ports/cortex_m3/iar/example_build/settings/tx.Debug.cspy.ps1 +++ /dev/null @@ -1,31 +0,0 @@ -param([String]$debugfile = ""); - -# This powershell file has been generated by the IAR Embedded Workbench -# C - SPY Debugger, as an aid to preparing a command line for running -# the cspybat command line utility using the appropriate settings. -# -# Note that this file is generated every time a new debug session -# is initialized, so you may want to move or rename the file before -# making changes. -# -# You can launch cspybat by typing Powershell.exe -File followed by the name of this batch file, followed -# by the name of the debug file (usually an ELF / DWARF or UBROF file). -# -# Read about available command line parameters in the C - SPY Debugging -# Guide. Hints about additional command line parameters that may be -# useful in specific cases : -# --download_only Downloads a code image without starting a debug -# session afterwards. -# --silent Omits the sign - on message. -# --timeout Limits the maximum allowed execution time. -# - - -if ($debugfile -eq "") -{ -& "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" -} -else -{ -& "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" --debug_file=$debugfile --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" -} diff --git a/ports/cortex_m3/iar/example_build/settings/tx.Debug.driver.xcl b/ports/cortex_m3/iar/example_build/settings/tx.Debug.driver.xcl deleted file mode 100644 index 11a77ea1..00000000 --- a/ports/cortex_m3/iar/example_build/settings/tx.Debug.driver.xcl +++ /dev/null @@ -1,13 +0,0 @@ -"--endian=little" - -"--cpu=Cortex-M3" - -"--fpu=None" - -"--semihosting" - -"--multicore_nr_of_cores=1" - - - - diff --git a/ports/cortex_m3/iar/example_build/settings/tx.Debug.general.xcl b/ports/cortex_m3/iar/example_build/settings/tx.Debug.general.xcl deleted file mode 100644 index ef6d6dd5..00000000 --- a/ports/cortex_m3/iar/example_build/settings/tx.Debug.general.xcl +++ /dev/null @@ -1,11 +0,0 @@ -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm\bin\armproc.dll" - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm\bin\armsim2.dll" - -"C:\release\threadx\Debug\Exe\tx.out" - ---plugin "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm\bin\armbat.dll" - - - - diff --git a/ports/cortex_m3/iar/example_build/settings/tx.crun b/ports/cortex_m3/iar/example_build/settings/tx.crun deleted file mode 100644 index d71ea555..00000000 --- a/ports/cortex_m3/iar/example_build/settings/tx.crun +++ /dev/null @@ -1,13 +0,0 @@ - - - 1 - - - * - * - * - 0 - 1 - - - diff --git a/ports/cortex_m3/iar/example_build/settings/tx.dbgdt b/ports/cortex_m3/iar/example_build/settings/tx.dbgdt deleted file mode 100644 index 9e08d965..00000000 --- a/ports/cortex_m3/iar/example_build/settings/tx.dbgdt +++ /dev/null @@ -1,4 +0,0 @@ - - - - diff --git a/ports/cortex_m3/iar/example_build/settings/tx.dnx b/ports/cortex_m3/iar/example_build/settings/tx.dnx deleted file mode 100644 index 25e4c4ba..00000000 --- a/ports/cortex_m3/iar/example_build/settings/tx.dnx +++ /dev/null @@ -1,58 +0,0 @@ - - - - 0 - 1 - 90 - 1 - 1 - 1 - main - 0 - 50 - - - 0 - 1 - - - 0 - 0 - 1 - 0 - 1 - 0 - - - 0 - 0 - 1 - 0 - 1 - - - 0 - - - 0 - - - 1 - - - 1 - 0 - 1 - 0 - 1 - - - 0 - 0 - - - 10000000 - 0 - 1 - - diff --git a/ports/cortex_m3/iar/example_build/tx.dep b/ports/cortex_m3/iar/example_build/tx.dep deleted file mode 100644 index 1bcebb99..00000000 --- a/ports/cortex_m3/iar/example_build/tx.dep +++ /dev/null @@ -1,9780 +0,0 @@ - - - 4 - 1228130052 - - Debug - - $PROJ_DIR$\..\..\..\..\common\inc\tx_api.h - $PROJ_DIR$\..\..\..\..\common\inc\tx_block_pool.h - $PROJ_DIR$\..\..\..\..\common\inc\tx_byte_pool.h - $PROJ_DIR$\..\..\..\..\common\inc\tx_event_flags.h - $PROJ_DIR$\..\..\..\..\common\inc\tx_initialize.h - $PROJ_DIR$\..\..\..\..\common\inc\tx_trace.h - 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- - - 34122 - 0A0000000A0000006E0000006E000000 - 0000000000000000150300001A000000 - 8192 - 0 - 0 - 32767 - 0 - - - 1 - - - - diff --git a/ports/cortex_m4/iar/example_build/settings/sample_threadx.dnx b/ports/cortex_m4/iar/example_build/settings/sample_threadx.dnx deleted file mode 100644 index cf1f427a..00000000 --- a/ports/cortex_m4/iar/example_build/settings/sample_threadx.dnx +++ /dev/null @@ -1,100 +0,0 @@ - - - - 0 - 1 - 90 - 1 - 1 - 1 - main - 0 - 50 - - - 0 - 1 - - - 4132951230 - - - 1 - 0 - - - _ 0 - _ 0 - - - 0 - - - 0 - 0 - 0 - - - 0 - 1 - 0 - 0 - - - 0 - - - 1 - - - _ 0 - _ "" - - - _ 0 - _ "" - _ 0 - - - 0 - 0 - 1 - 0 - 1 - 0 - - - 0 - 0 - 1 - 0 - 1 - - - 0 - - - 0 - - - 1 - _ 0 9999 0 9999 1 0 0 100 0 1 "SysTick 1 0x3C" - 1 - - - 1 - 0 - 1 - 0 - 1 - - - 0 - 0 - - - 10000000 - 0 - 1 - - diff --git a/ports/cortex_m4/iar/example_build/settings/tx.Debug.cspy.bat b/ports/cortex_m4/iar/example_build/settings/tx.Debug.cspy.bat deleted file mode 100644 index d76cfad9..00000000 --- a/ports/cortex_m4/iar/example_build/settings/tx.Debug.cspy.bat +++ /dev/null @@ -1,40 +0,0 @@ -@REM This batch file has been generated by the IAR Embedded Workbench -@REM C-SPY Debugger, as an aid to preparing a command line for running -@REM the cspybat command line utility using the appropriate settings. -@REM -@REM Note that this file is generated every time a new debug session -@REM is initialized, so you may want to move or rename the file before -@REM making changes. -@REM -@REM You can launch cspybat by typing the name of this batch file followed -@REM by the name of the debug file (usually an ELF/DWARF or UBROF file). -@REM -@REM Read about available command line parameters in the C-SPY Debugging -@REM Guide. Hints about additional command line parameters that may be -@REM useful in specific cases: -@REM --download_only Downloads a code image without starting a debug -@REM session afterwards. -@REM --silent Omits the sign-on message. -@REM --timeout Limits the maximum allowed execution time. -@REM - - -@echo off - -if not "%~1" == "" goto debugFile - -@echo on - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" - -@echo off -goto end - -:debugFile - -@echo on - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" "--debug_file=%~1" --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" - -@echo off -:end \ No newline at end of file diff --git a/ports/cortex_m4/iar/example_build/settings/tx.Debug.cspy.ps1 b/ports/cortex_m4/iar/example_build/settings/tx.Debug.cspy.ps1 deleted file mode 100644 index 1c1ba13b..00000000 --- a/ports/cortex_m4/iar/example_build/settings/tx.Debug.cspy.ps1 +++ /dev/null @@ -1,31 +0,0 @@ -param([String]$debugfile = ""); - -# This powershell file has been generated by the IAR Embedded Workbench -# C - SPY Debugger, as an aid to preparing a command line for running -# the cspybat command line utility using the appropriate settings. -# -# Note that this file is generated every time a new debug session -# is initialized, so you may want to move or rename the file before -# making changes. -# -# You can launch cspybat by typing Powershell.exe -File followed by the name of this batch file, followed -# by the name of the debug file (usually an ELF / DWARF or UBROF file). -# -# Read about available command line parameters in the C - SPY Debugging -# Guide. Hints about additional command line parameters that may be -# useful in specific cases : -# --download_only Downloads a code image without starting a debug -# session afterwards. -# --silent Omits the sign - on message. -# --timeout Limits the maximum allowed execution time. -# - - -if ($debugfile -eq "") -{ -& "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" -} -else -{ -& "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" --debug_file=$debugfile --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" -} diff --git a/ports/cortex_m4/iar/example_build/settings/tx.Debug.driver.xcl b/ports/cortex_m4/iar/example_build/settings/tx.Debug.driver.xcl deleted file mode 100644 index 22bc90ef..00000000 --- a/ports/cortex_m4/iar/example_build/settings/tx.Debug.driver.xcl +++ /dev/null @@ -1,13 +0,0 @@ -"--endian=little" - -"--cpu=Cortex-M4" - -"--fpu=None" - -"--semihosting" - -"--multicore_nr_of_cores=1" - - - - diff --git a/ports/cortex_m4/iar/example_build/settings/tx.Debug.general.xcl b/ports/cortex_m4/iar/example_build/settings/tx.Debug.general.xcl deleted file mode 100644 index ef6d6dd5..00000000 --- a/ports/cortex_m4/iar/example_build/settings/tx.Debug.general.xcl +++ /dev/null @@ -1,11 +0,0 @@ -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm\bin\armproc.dll" - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm\bin\armsim2.dll" - -"C:\release\threadx\Debug\Exe\tx.out" - ---plugin "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm\bin\armbat.dll" - - - - diff --git a/ports/cortex_m4/iar/example_build/settings/tx.crun b/ports/cortex_m4/iar/example_build/settings/tx.crun deleted file mode 100644 index d71ea555..00000000 --- a/ports/cortex_m4/iar/example_build/settings/tx.crun +++ /dev/null @@ -1,13 +0,0 @@ - - - 1 - - - * - * - * - 0 - 1 - - - diff --git a/ports/cortex_m4/iar/example_build/settings/tx.dbgdt b/ports/cortex_m4/iar/example_build/settings/tx.dbgdt deleted file mode 100644 index 9e08d965..00000000 --- a/ports/cortex_m4/iar/example_build/settings/tx.dbgdt +++ /dev/null @@ -1,4 +0,0 @@ - - - - diff --git a/ports/cortex_m4/iar/example_build/settings/tx.dnx b/ports/cortex_m4/iar/example_build/settings/tx.dnx deleted file mode 100644 index 25e4c4ba..00000000 --- a/ports/cortex_m4/iar/example_build/settings/tx.dnx +++ /dev/null @@ -1,58 +0,0 @@ - - - - 0 - 1 - 90 - 1 - 1 - 1 - main - 0 - 50 - - - 0 - 1 - - - 0 - 0 - 1 - 0 - 1 - 0 - - - 0 - 0 - 1 - 0 - 1 - - - 0 - - - 0 - - - 1 - - - 1 - 0 - 1 - 0 - 1 - - - 0 - 0 - - - 10000000 - 0 - 1 - - diff --git a/ports/cortex_m4/iar/example_build/tx.dep b/ports/cortex_m4/iar/example_build/tx.dep deleted file mode 100644 index 53d58a7c..00000000 --- a/ports/cortex_m4/iar/example_build/tx.dep +++ /dev/null @@ -1,8968 +0,0 @@ - - - 4 - 2672330084 - - Debug - - $PROJ_DIR$\..\..\..\..\common\src\tx_timer_activate.c - $PROJ_DIR$\..\..\..\..\common\src\tx_thread_system_suspend.c - $PROJ_DIR$\..\..\..\..\common\src\tx_thread_time_slice.c - $PROJ_DIR$\..\..\..\..\common\src\tx_timer_delete.c - $PROJ_DIR$\..\..\..\..\common\src\tx_timer_system_deactivate.c - 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Hints about additional command line parameters that may be -@REM useful in specific cases: -@REM --download_only Downloads a code image without starting a debug -@REM session afterwards. -@REM --silent Omits the sign-on message. -@REM --timeout Limits the maximum allowed execution time. -@REM - - -@echo off - -if not "%~1" == "" goto debugFile - -@echo on - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\common\bin\cspybat" -f "C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports\cortex_m7\iar\example_build\settings\sample_threadx.Debug.general.xcl" --backend -f "C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports\cortex_m7\iar\example_build\settings\sample_threadx.Debug.driver.xcl" - -@echo off -goto end - -:debugFile - -@echo on - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\common\bin\cspybat" -f "C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports\cortex_m7\iar\example_build\settings\sample_threadx.Debug.general.xcl" "--debug_file=%~1" --backend -f "C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports\cortex_m7\iar\example_build\settings\sample_threadx.Debug.driver.xcl" - -@echo off -:end \ No newline at end of file diff --git a/ports/cortex_m7/iar/example_build/settings/sample_threadx.Debug.cspy.ps1 b/ports/cortex_m7/iar/example_build/settings/sample_threadx.Debug.cspy.ps1 deleted file mode 100644 index 9fc15b26..00000000 --- a/ports/cortex_m7/iar/example_build/settings/sample_threadx.Debug.cspy.ps1 +++ /dev/null @@ -1,31 +0,0 @@ -param([String]$debugfile = ""); - -# This powershell file has been generated by the IAR Embedded Workbench -# C - SPY Debugger, as an aid to preparing a command line for running -# the cspybat command line utility using the appropriate settings. -# -# Note that this file is generated every time a new debug session -# is initialized, so you may want to move or rename the file before -# making changes. -# -# You can launch cspybat by typing Powershell.exe -File followed by the name of this batch file, followed -# by the name of the debug file (usually an ELF / DWARF or UBROF file). -# -# Read about available command line parameters in the C - SPY Debugging -# Guide. Hints about additional command line parameters that may be -# useful in specific cases : -# --download_only Downloads a code image without starting a debug -# session afterwards. -# --silent Omits the sign - on message. -# --timeout Limits the maximum allowed execution time. -# - - -if ($debugfile -eq "") -{ -& "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\common\bin\cspybat" -f "C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports\cortex_m7\iar\example_build\settings\sample_threadx.Debug.general.xcl" --backend -f "C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports\cortex_m7\iar\example_build\settings\sample_threadx.Debug.driver.xcl" -} -else -{ -& "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\common\bin\cspybat" -f "C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports\cortex_m7\iar\example_build\settings\sample_threadx.Debug.general.xcl" --debug_file=$debugfile --backend -f "C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports\cortex_m7\iar\example_build\settings\sample_threadx.Debug.driver.xcl" -} diff --git a/ports/cortex_m7/iar/example_build/settings/sample_threadx.Debug.driver.xcl b/ports/cortex_m7/iar/example_build/settings/sample_threadx.Debug.driver.xcl deleted file mode 100644 index c0ab94e4..00000000 --- a/ports/cortex_m7/iar/example_build/settings/sample_threadx.Debug.driver.xcl +++ /dev/null @@ -1,13 +0,0 @@ -"--endian=little" - -"--cpu=Cortex-M7" - -"--fpu=VFPv5_SP" - -"--semihosting" - -"--multicore_nr_of_cores=1" - - - - diff --git a/ports/cortex_m7/iar/example_build/settings/sample_threadx.Debug.general.xcl b/ports/cortex_m7/iar/example_build/settings/sample_threadx.Debug.general.xcl deleted file mode 100644 index db2ac682..00000000 --- a/ports/cortex_m7/iar/example_build/settings/sample_threadx.Debug.general.xcl +++ /dev/null @@ -1,11 +0,0 @@ -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\arm\bin\armproc.dll" - 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- - - 34122 - 0A0000000A0000006E0000006E000000 - 0000000000000000150300001A000000 - 8192 - 0 - 0 - 32767 - 0 - - - 1 - - - - diff --git a/ports/cortex_m7/iar/example_build/settings/sample_threadx.dnx b/ports/cortex_m7/iar/example_build/settings/sample_threadx.dnx deleted file mode 100644 index 7ae81233..00000000 --- a/ports/cortex_m7/iar/example_build/settings/sample_threadx.dnx +++ /dev/null @@ -1,99 +0,0 @@ - - - - 0 - 1 - 90 - 1 - 1 - 1 - main - 0 - 50 - - - 0 - 1 - - - 4108083456 - - - 0 - - - _ 0 - _ 0 - - - 0 - - - 0 - 0 - 0 - - - 0 - 1 - 0 - 0 - - - 0 - - - 1 - - - _ 0 - _ "" - - - _ 0 - _ "" - _ 0 - - - 0 - 0 - 1 - 0 - 1 - 0 - - - 0 - 0 - 1 - 0 - 1 - - - 0 - - - 0 - - - 1 - _ 0 9999 0 9999 1 0 0 100 0 1 "SysTick 1 0x3C" - 1 - - - 1 - 0 - 1 - 0 - 1 - - - 0 - 0 - - - 10000000 - 0 - 1 - - diff --git a/ports/cortex_m7/iar/example_build/settings/tx.Debug.cspy.bat b/ports/cortex_m7/iar/example_build/settings/tx.Debug.cspy.bat deleted file mode 100644 index d76cfad9..00000000 --- a/ports/cortex_m7/iar/example_build/settings/tx.Debug.cspy.bat +++ /dev/null @@ -1,40 +0,0 @@ -@REM This batch file has been generated by the IAR Embedded Workbench -@REM C-SPY Debugger, as an aid to preparing a command line for running -@REM the cspybat command line utility using the appropriate settings. -@REM -@REM Note that this file is generated every time a new debug session -@REM is initialized, so you may want to move or rename the file before -@REM making changes. -@REM -@REM You can launch cspybat by typing the name of this batch file followed -@REM by the name of the debug file (usually an ELF/DWARF or UBROF file). -@REM -@REM Read about available command line parameters in the C-SPY Debugging -@REM Guide. Hints about additional command line parameters that may be -@REM useful in specific cases: -@REM --download_only Downloads a code image without starting a debug -@REM session afterwards. -@REM --silent Omits the sign-on message. -@REM --timeout Limits the maximum allowed execution time. -@REM - - -@echo off - -if not "%~1" == "" goto debugFile - -@echo on - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" - -@echo off -goto end - -:debugFile - -@echo on - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" "--debug_file=%~1" --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" - -@echo off -:end \ No newline at end of file diff --git a/ports/cortex_m7/iar/example_build/settings/tx.Debug.cspy.ps1 b/ports/cortex_m7/iar/example_build/settings/tx.Debug.cspy.ps1 deleted file mode 100644 index 1c1ba13b..00000000 --- a/ports/cortex_m7/iar/example_build/settings/tx.Debug.cspy.ps1 +++ /dev/null @@ -1,31 +0,0 @@ -param([String]$debugfile = ""); - -# This powershell file has been generated by the IAR Embedded Workbench -# C - SPY Debugger, as an aid to preparing a command line for running -# the cspybat command line utility using the appropriate settings. -# -# Note that this file is generated every time a new debug session -# is initialized, so you may want to move or rename the file before -# making changes. -# -# You can launch cspybat by typing Powershell.exe -File followed by the name of this batch file, followed -# by the name of the debug file (usually an ELF / DWARF or UBROF file). -# -# Read about available command line parameters in the C - SPY Debugging -# Guide. Hints about additional command line parameters that may be -# useful in specific cases : -# --download_only Downloads a code image without starting a debug -# session afterwards. -# --silent Omits the sign - on message. -# --timeout Limits the maximum allowed execution time. -# - - -if ($debugfile -eq "") -{ -& "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" -} -else -{ -& "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" --debug_file=$debugfile --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" -} diff --git a/ports/cortex_m7/iar/example_build/settings/tx.Debug.driver.xcl b/ports/cortex_m7/iar/example_build/settings/tx.Debug.driver.xcl deleted file mode 100644 index b5f366cc..00000000 --- a/ports/cortex_m7/iar/example_build/settings/tx.Debug.driver.xcl +++ /dev/null @@ -1,13 +0,0 @@ -"--endian=little" - -"--cpu=Cortex-M7" - -"--fpu=None" - -"--semihosting" - -"--multicore_nr_of_cores=1" - - - - diff --git a/ports/cortex_m7/iar/example_build/settings/tx.Debug.general.xcl b/ports/cortex_m7/iar/example_build/settings/tx.Debug.general.xcl deleted file mode 100644 index ef6d6dd5..00000000 --- a/ports/cortex_m7/iar/example_build/settings/tx.Debug.general.xcl +++ /dev/null @@ -1,11 +0,0 @@ -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm\bin\armproc.dll" - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm\bin\armsim2.dll" - -"C:\release\threadx\Debug\Exe\tx.out" - ---plugin "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm\bin\armbat.dll" - - - - diff --git a/ports/cortex_m7/iar/example_build/settings/tx.crun b/ports/cortex_m7/iar/example_build/settings/tx.crun deleted file mode 100644 index d71ea555..00000000 --- a/ports/cortex_m7/iar/example_build/settings/tx.crun +++ /dev/null @@ -1,13 +0,0 @@ - - - 1 - - - * - * - * - 0 - 1 - - - diff --git a/ports/cortex_m7/iar/example_build/settings/tx.dbgdt b/ports/cortex_m7/iar/example_build/settings/tx.dbgdt deleted file mode 100644 index 73e71f6e..00000000 --- a/ports/cortex_m7/iar/example_build/settings/tx.dbgdt +++ /dev/null @@ -1,4 +0,0 @@ - - - - diff --git a/ports/cortex_m7/iar/example_build/settings/tx.dnx b/ports/cortex_m7/iar/example_build/settings/tx.dnx deleted file mode 100644 index 1872e83f..00000000 --- a/ports/cortex_m7/iar/example_build/settings/tx.dnx +++ /dev/null @@ -1,58 +0,0 @@ - - - - 0 - 0 - 1 - 0 - 1 - 0 - - - 0 - 0 - 1 - 0 - 1 - - - 0 - 1 - 90 - 1 - 1 - 1 - main - 0 - 50 - - - 0 - - - 0 - - - 1 - - - 1 - 0 - 1 - 0 - 1 - - - 0 - 1 - - - 0 - 0 - - - 10000000 - 0 - 1 - - diff --git a/ports/cortex_m7/iar/example_build/tx.dep b/ports/cortex_m7/iar/example_build/tx.dep deleted file mode 100644 index 30b4e270..00000000 --- a/ports/cortex_m7/iar/example_build/tx.dep +++ /dev/null @@ -1,8055 +0,0 @@ - - - 4 - 851124999 - - Debug - - $PROJ_DIR$\tx_block_release.c - $PROJ_DIR$\tx_block_pool_cleanup.c - $PROJ_DIR$\tx_block_pool_info_get.c - $PROJ_DIR$\tx_block_pool.h - $PROJ_DIR$\tx_block_allocate.c - $PROJ_DIR$\tx_block_pool_create.c - $PROJ_DIR$\tx_block_pool_initialize.c - $PROJ_DIR$\tx_block_pool_performance_info_get.c - $PROJ_DIR$\tx_api.h - $PROJ_DIR$\tx_block_pool_delete.c - $PROJ_DIR$\tx_block_pool_performance_system_info_get.c - $PROJ_DIR$\tx_block_pool_prioritize.c - $PROJ_DIR$\Debug\Obj\tx_queue_front_send.o - $PROJ_DIR$\Debug\Obj\tx_byte_pool_delete.pbi - $PROJ_DIR$\Debug\Obj\tx_thread_priority_change.pbi - $PROJ_DIR$\Debug\Obj\tx_thread_timeout.o - $PROJ_DIR$\Debug\Obj\txe_mutex_info_get.pbi - $PROJ_DIR$\Debug\Obj\tx_byte_pool_create.pbi - $PROJ_DIR$\Debug\Obj\tx_block_release.pbi - $PROJ_DIR$\Debug\Obj\tx_thread_priority_change.o - $PROJ_DIR$\Debug\Obj\tx_mutex_get.pbi - $PROJ_DIR$\Debug\Obj\tx_timer_expiration_process.o - $PROJ_DIR$\Debug\Obj\txe_timer_delete.pbi - $PROJ_DIR$\Debug\Obj\tx_timer_interrupt.o - $PROJ_DIR$\Debug\Obj\tx_block_pool_prioritize.pbi - $PROJ_DIR$\Debug\Obj\tx_timer_system_activate.pbi - $PROJ_DIR$\Debug\Obj\tx_semaphore_put.pbi - $PROJ_DIR$\Debug\Obj\txe_queue_send_notify.pbi - $PROJ_DIR$\Debug\Obj\txe_thread_suspend.pbi - $PROJ_DIR$\Debug\Obj\tx_timer_create.pbi - $PROJ_DIR$\Debug\Obj\tx_timer_system_deactivate.pbi - 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- - - 34123 - 0A0000000A0000006E0000006E000000 - 0000000000000000150300001A000000 - 8192 - 0 - 0 - 32767 - 0 - - - 1 - - - - diff --git a/ports/cortex_r4/iar/example_build/settings/sample_threadx.dnx b/ports/cortex_r4/iar/example_build/settings/sample_threadx.dnx deleted file mode 100644 index a6623ee1..00000000 --- a/ports/cortex_r4/iar/example_build/settings/sample_threadx.dnx +++ /dev/null @@ -1,130 +0,0 @@ - - - - 0 - 1 - 90 - 1 - 1 - 1 - main - 0 - 50 - - - 0 - 1 - - - 2137572426 - - - 0 - - - HL512000 - - 0 - 2 - _ 0 - _ 0 "" 0 "" 0 "" 0 "" 0 0 0 0 - _ 0 "" 0 "" 0 "" 0 "" 0 0 0 0 - _ 0 - _ 0 - - - _ 0 - _ 0 "" 0 "" 0 "" 0 "" 0 0 0 0 - _ 0 "" 0 "" 0 "" 0 "" 0 0 0 0 - _ 0 - _ 0 - 0 - 1 - - - _ 0 - _ 0 "" 0 "" 0 "" 0 "" 0 0 0 0 - _ 0 "" 0 "" 0 "" 0 "" 0 0 0 0 - _ 0 - _ 0 - - - _ 0 - _ 0 - - - 0 - - - 1 - 0 - - - 0 - 0 - 0 - - - 0 - 1 - 0 - 0 - - - 0 - - - 1 - - - _ 0 - _ "" - - - _ 0 - _ "" - _ 0 - - - 0 - 0 - 1 - 0 - 1 - 0 - - - 0 - 0 - 1 - 0 - 1 - - - 0 - - - 0 - - - 1 - _ 0 9999 0 9999 1 0 0 100 0 1 "IRQ 1 0x18 CPSR.I" - 1 - - - 1 - 0 - 1 - 0 - 1 - - - 0 - 0 - - - 10000000 - 0 - 1 - - diff --git a/ports/cortex_r4/iar/example_build/settings/sample_threadx.reggroups b/ports/cortex_r4/iar/example_build/settings/sample_threadx.reggroups deleted file mode 100644 index 5f282702..00000000 --- a/ports/cortex_r4/iar/example_build/settings/sample_threadx.reggroups +++ /dev/null @@ -1 +0,0 @@ - \ No newline at end of file diff --git a/ports/cortex_r4/iar/example_build/settings/sample_threadx_Debug_xds100board.dat b/ports/cortex_r4/iar/example_build/settings/sample_threadx_Debug_xds100board.dat deleted file mode 100644 index 192ce771..00000000 --- a/ports/cortex_r4/iar/example_build/settings/sample_threadx_Debug_xds100board.dat +++ /dev/null @@ -1,32 +0,0 @@ -# config version=3.5 -$ sepk - pod_drvr=jioxds110.dll - pod_port=0 - pod_serial=HL512000 -$ / -$ product - title="Texas Instruments XDS110 USB" - alias=TI_XDS110_USB - name=XDS110 -$ / -$ uscif - tdoedge=FALL - tclk_program=DEFAULT - tclk_frequency=2.5MHz -$ / -$ dot7 - dts_usage=nothing -$ / -$ swd - swd_debug=disabled - swo_data=aux_uart -$ / -@ icepick family=icepick_c irbits=6 drbits=1 subpaths=2 - & port17 address=17 default=no custom=no force=yes pseudo=no - & port16 address=16 default=no custom=no force=yes pseudo=no - @ dap family=cs_dap irbits=4 drbits=1 subpaths=1 identify=0 - & portr4 type=debug address=0 default=no custom=no force=no pseudo=no - @ cortexr4 family=cortex_rxx irbits=0 drbits=0 address=0x80001000 identify=0x02000100 traceid=0x0 - & / - & / -# / diff --git a/ports/cortex_r4/iar/example_build/settings/tx.Debug.cspy.bat b/ports/cortex_r4/iar/example_build/settings/tx.Debug.cspy.bat deleted file mode 100644 index d76cfad9..00000000 --- a/ports/cortex_r4/iar/example_build/settings/tx.Debug.cspy.bat +++ /dev/null @@ -1,40 +0,0 @@ -@REM This batch file has been generated by the IAR Embedded Workbench -@REM C-SPY Debugger, as an aid to preparing a command line for running -@REM the cspybat command line utility using the appropriate settings. -@REM -@REM Note that this file is generated every time a new debug session -@REM is initialized, so you may want to move or rename the file before -@REM making changes. -@REM -@REM You can launch cspybat by typing the name of this batch file followed -@REM by the name of the debug file (usually an ELF/DWARF or UBROF file). -@REM -@REM Read about available command line parameters in the C-SPY Debugging -@REM Guide. Hints about additional command line parameters that may be -@REM useful in specific cases: -@REM --download_only Downloads a code image without starting a debug -@REM session afterwards. -@REM --silent Omits the sign-on message. -@REM --timeout Limits the maximum allowed execution time. -@REM - - -@echo off - -if not "%~1" == "" goto debugFile - -@echo on - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" - -@echo off -goto end - -:debugFile - -@echo on - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" "--debug_file=%~1" --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" - -@echo off -:end \ No newline at end of file diff --git a/ports/cortex_r4/iar/example_build/settings/tx.Debug.cspy.ps1 b/ports/cortex_r4/iar/example_build/settings/tx.Debug.cspy.ps1 deleted file mode 100644 index 1c1ba13b..00000000 --- a/ports/cortex_r4/iar/example_build/settings/tx.Debug.cspy.ps1 +++ /dev/null @@ -1,31 +0,0 @@ -param([String]$debugfile = ""); - -# This powershell file has been generated by the IAR Embedded Workbench -# C - SPY Debugger, as an aid to preparing a command line for running -# the cspybat command line utility using the appropriate settings. -# -# Note that this file is generated every time a new debug session -# is initialized, so you may want to move or rename the file before -# making changes. -# -# You can launch cspybat by typing Powershell.exe -File followed by the name of this batch file, followed -# by the name of the debug file (usually an ELF / DWARF or UBROF file). -# -# Read about available command line parameters in the C - SPY Debugging -# Guide. Hints about additional command line parameters that may be -# useful in specific cases : -# --download_only Downloads a code image without starting a debug -# session afterwards. -# --silent Omits the sign - on message. -# --timeout Limits the maximum allowed execution time. -# - - -if ($debugfile -eq "") -{ -& "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" -} -else -{ -& "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" --debug_file=$debugfile --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" -} diff --git a/ports/cortex_r4/iar/example_build/settings/tx.Debug.driver.xcl b/ports/cortex_r4/iar/example_build/settings/tx.Debug.driver.xcl deleted file mode 100644 index 529ac91f..00000000 --- a/ports/cortex_r4/iar/example_build/settings/tx.Debug.driver.xcl +++ /dev/null @@ -1,15 +0,0 @@ -"--endian=big" - -"--cpu=Cortex-R4" - -"--fpu=VFPv3" - -"--semihosting" - -"--BE32" - -"--multicore_nr_of_cores=1" - - - - diff --git a/ports/cortex_r4/iar/example_build/settings/tx.Debug.general.xcl b/ports/cortex_r4/iar/example_build/settings/tx.Debug.general.xcl deleted file mode 100644 index ef6d6dd5..00000000 --- a/ports/cortex_r4/iar/example_build/settings/tx.Debug.general.xcl +++ /dev/null @@ -1,11 +0,0 @@ -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm\bin\armproc.dll" - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm\bin\armsim2.dll" - -"C:\release\threadx\Debug\Exe\tx.out" - ---plugin "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm\bin\armbat.dll" - - - - diff --git a/ports/cortex_r4/iar/example_build/settings/tx.crun b/ports/cortex_r4/iar/example_build/settings/tx.crun deleted file mode 100644 index d71ea555..00000000 --- a/ports/cortex_r4/iar/example_build/settings/tx.crun +++ /dev/null @@ -1,13 +0,0 @@ - - - 1 - - - * - * - * - 0 - 1 - - - diff --git a/ports/cortex_r4/iar/example_build/settings/tx.dbgdt b/ports/cortex_r4/iar/example_build/settings/tx.dbgdt deleted file mode 100644 index 9e08d965..00000000 --- a/ports/cortex_r4/iar/example_build/settings/tx.dbgdt +++ /dev/null @@ -1,4 +0,0 @@ - - - - diff --git a/ports/cortex_r4/iar/example_build/settings/tx.dnx b/ports/cortex_r4/iar/example_build/settings/tx.dnx deleted file mode 100644 index 25e4c4ba..00000000 --- a/ports/cortex_r4/iar/example_build/settings/tx.dnx +++ /dev/null @@ -1,58 +0,0 @@ - - - - 0 - 1 - 90 - 1 - 1 - 1 - main - 0 - 50 - - - 0 - 1 - - - 0 - 0 - 1 - 0 - 1 - 0 - - - 0 - 0 - 1 - 0 - 1 - - - 0 - - - 0 - - - 1 - - - 1 - 0 - 1 - 0 - 1 - - - 0 - 0 - - - 10000000 - 0 - 1 - - diff --git a/ports/cortex_r4/iar/example_build/tx.dep b/ports/cortex_r4/iar/example_build/tx.dep deleted file mode 100644 index 09806296..00000000 --- a/ports/cortex_r4/iar/example_build/tx.dep +++ /dev/null @@ -1,10488 +0,0 @@ - - - 4 - 554479155 - - Debug - - $PROJ_DIR$\..\inc\tx_port.h - $PROJ_DIR$\Debug\Obj\tx_timer_performance_system_info_get.__cstat.et - $PROJ_DIR$\Debug\Obj\txe_event_flags_get.__cstat.et - $PROJ_DIR$\Debug\Obj\tx_thread_fiq_context_restore.o - $PROJ_DIR$\Txe_bytp.c - $PROJ_DIR$\Debug\Obj\tx_time_get.pbi - $PROJ_DIR$\Txe_bytr.c - $PROJ_DIR$\Debug\Obj\tx_initialize_high_level.pbi - $PROJ_DIR$\Debug\Obj\tx_thread_wait_abort.pbi - $PROJ_DIR$\Debug\Obj\txe_event_flags_create.pbi - $PROJ_DIR$\Debug\Obj\tx_timer_delete.__cstat.et - $PROJ_DIR$\Debug\Obj\txe_thread_time_slice_change.o - $PROJ_DIR$\Debug\Obj\tx_timer_info_get.__cstat.et - $PROJ_DIR$\Tx_tts.c - $PROJ_DIR$\Debug\Obj\tx_timer_expiration_process.__cstat.et - $PROJ_DIR$\Debug\Obj\tx_block_release.o - $PROJ_DIR$\Debug\Obj\txe_semaphore_ceiling_put.__cstat.et - $PROJ_DIR$\Debug\Obj\txe_event_flags_get.pbi - $PROJ_DIR$\Tx_qi.c - $PROJ_DIR$\Debug\Obj\tx.pbd - $PROJ_DIR$\Debug\Obj\tx_trace_isr_enter_insert.__cstat.et - $PROJ_DIR$\Debug\Obj\tx_block_pool_create.o - $PROJ_DIR$\Debug\Obj\tx_block_release.__cstat.et - $PROJ_DIR$\Debug\Obj\tx_time_get.__cstat.et - $PROJ_DIR$\Debug\Obj\txe_mutex_create.__cstat.et - $PROJ_DIR$\Debug\Obj\tx_queue_receive.o - $PROJ_DIR$\Txe_sig.c - $PROJ_DIR$\Debug\Obj\txe_semaphore_prioritize.pbi - $PROJ_DIR$\Debug\Obj\tx_queue_prioritize.pbi - $PROJ_DIR$\Debug\Obj\tx_mutex_priority_change.__cstat.et - $PROJ_DIR$\Tx_efg.c - $PROJ_DIR$\Debug\Obj\txe_event_flags_set_notify.__cstat.et - $PROJ_DIR$\Tx_ike.c - $PROJ_DIR$\Debug\Obj\tx_trace_initialize.__cstat.et - $PROJ_DIR$\Debug\Obj\tx_event_flags_delete.__cstat.et - $PROJ_DIR$\Debug\Obj\tx_byte_pool_info_get.o - $PROJ_DIR$\Debug\Obj\txe_queue_send_notify.__cstat.et - $PROJ_DIR$\Debug\Obj\tx_timer_system_activate.pbi - $PROJ_DIR$\Txe_efig.c - $PROJ_DIR$\Debug\Obj\tx_thread_shell_entry.__cstat.et - $PROJ_DIR$\Debug\Obj\tx_semaphore_cleanup.pbi - $PROJ_DIR$\Debug\Obj\txe_event_flags_info_get.pbi - $PROJ_DIR$\Debug\Obj\tx_byte_pool_initialize.pbi - $PROJ_DIR$\Debug\Obj\tx_event_flags_delete.o - $PROJ_DIR$\Debug\Obj\tx_event_flags_cleanup.pbi - $PROJ_DIR$\Tx_tprch.c - $PROJ_DIR$\Debug\Obj\tx_semaphore_put.pbi - $PROJ_DIR$\Debug\Obj\tx_event_flags_delete.pbi - $PROJ_DIR$\Debug\Obj\txe_event_flags_set.o - $PROJ_DIR$\Debug\Obj\txe_semaphore_create.__cstat.et - $PROJ_DIR$\Debug\Obj\txe_thread_wait_abort.pbi - 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- - - 34126 - 0A0000000A0000006E0000006E000000 - 0000000000000000150300001A000000 - 8192 - 0 - 0 - 32767 - 0 - - - 1 - - - - diff --git a/ports/cortex_r5/iar/example_build/settings/sample_threadx.dnx b/ports/cortex_r5/iar/example_build/settings/sample_threadx.dnx deleted file mode 100644 index 4c51289b..00000000 --- a/ports/cortex_r5/iar/example_build/settings/sample_threadx.dnx +++ /dev/null @@ -1,130 +0,0 @@ - - - - 0 - 1 - 90 - 1 - 1 - 1 - main - 0 - 50 - - - 0 - 1 - - - 256381086 - - - 0 - - - HL512000 - - 0 - 2 - _ 0 - _ 0 "" 0 "" 0 "" 0 "" 0 0 0 0 - _ 0 "" 0 "" 0 "" 0 "" 0 0 0 0 - _ 0 - _ 0 - - - _ 0 - _ 0 "" 0 "" 0 "" 0 "" 0 0 0 0 - _ 0 "" 0 "" 0 "" 0 "" 0 0 0 0 - _ 0 - _ 0 - 0 - 1 - - - _ 0 - _ 0 "" 0 "" 0 "" 0 "" 0 0 0 0 - _ 0 "" 0 "" 0 "" 0 "" 0 0 0 0 - _ 0 - _ 0 - - - _ 0 - _ 0 - - - 0 - - - 1 - 0 - - - 0 - 0 - 0 - - - 0 - 1 - 0 - 0 - - - 0 - - - 1 - - - _ 0 - _ "" - - - _ 0 - _ "" - _ 0 - - - 0 - 0 - 1 - 0 - 1 - 0 - - - 0 - 0 - 1 - 0 - 1 - - - 0 - - - 0 - - - 1 - _ 0 9999 0 9999 1 0 0 100 0 1 "IRQ 1 0x18 CPSR.I" - 1 - - - 1 - 0 - 1 - 0 - 1 - - - 0 - 0 - - - 10000000 - 0 - 1 - - diff --git a/ports/cortex_r5/iar/example_build/settings/sample_threadx.reggroups b/ports/cortex_r5/iar/example_build/settings/sample_threadx.reggroups deleted file mode 100644 index 5f282702..00000000 --- a/ports/cortex_r5/iar/example_build/settings/sample_threadx.reggroups +++ /dev/null @@ -1 +0,0 @@ - \ No newline at end of file diff --git a/ports/cortex_r5/iar/example_build/settings/sample_threadx_Debug_xds100board.dat b/ports/cortex_r5/iar/example_build/settings/sample_threadx_Debug_xds100board.dat deleted file mode 100644 index 192ce771..00000000 --- a/ports/cortex_r5/iar/example_build/settings/sample_threadx_Debug_xds100board.dat +++ /dev/null @@ -1,32 +0,0 @@ -# config version=3.5 -$ sepk - pod_drvr=jioxds110.dll - pod_port=0 - pod_serial=HL512000 -$ / -$ product - title="Texas Instruments XDS110 USB" - alias=TI_XDS110_USB - name=XDS110 -$ / -$ uscif - tdoedge=FALL - tclk_program=DEFAULT - tclk_frequency=2.5MHz -$ / -$ dot7 - dts_usage=nothing -$ / -$ swd - swd_debug=disabled - swo_data=aux_uart -$ / -@ icepick family=icepick_c irbits=6 drbits=1 subpaths=2 - & port17 address=17 default=no custom=no force=yes pseudo=no - & port16 address=16 default=no custom=no force=yes pseudo=no - @ dap family=cs_dap irbits=4 drbits=1 subpaths=1 identify=0 - & portr4 type=debug address=0 default=no custom=no force=no pseudo=no - @ cortexr4 family=cortex_rxx irbits=0 drbits=0 address=0x80001000 identify=0x02000100 traceid=0x0 - & / - & / -# / diff --git a/ports/cortex_r5/iar/example_build/settings/tx.Debug.cspy.bat b/ports/cortex_r5/iar/example_build/settings/tx.Debug.cspy.bat deleted file mode 100644 index ddbce99e..00000000 --- a/ports/cortex_r5/iar/example_build/settings/tx.Debug.cspy.bat +++ /dev/null @@ -1,40 +0,0 @@ -@REM This batch file has been generated by the IAR Embedded Workbench -@REM C-SPY Debugger, as an aid to preparing a command line for running -@REM the cspybat command line utility using the appropriate settings. -@REM -@REM Note that this file is generated every time a new debug session -@REM is initialized, so you may want to move or rename the file before -@REM making changes. -@REM -@REM You can launch cspybat by typing the name of this batch file followed -@REM by the name of the debug file (usually an ELF/DWARF or UBROF file). -@REM -@REM Read about available command line parameters in the C-SPY Debugging -@REM Guide. Hints about additional command line parameters that may be -@REM useful in specific cases: -@REM --download_only Downloads a code image without starting a debug -@REM session afterwards. -@REM --silent Omits the sign-on message. -@REM --timeout Limits the maximum allowed execution time. -@REM - - -@echo off - -if not "%~1" == "" goto debugFile - -@echo on - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.1\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" - -@echo off -goto end - -:debugFile - -@echo on - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.1\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" "--debug_file=%~1" --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" - -@echo off -:end \ No newline at end of file diff --git a/ports/cortex_r5/iar/example_build/settings/tx.Debug.cspy.ps1 b/ports/cortex_r5/iar/example_build/settings/tx.Debug.cspy.ps1 deleted file mode 100644 index 903a188b..00000000 --- a/ports/cortex_r5/iar/example_build/settings/tx.Debug.cspy.ps1 +++ /dev/null @@ -1,31 +0,0 @@ -param([String]$debugfile = ""); - -# This powershell file has been generated by the IAR Embedded Workbench -# C - SPY Debugger, as an aid to preparing a command line for running -# the cspybat command line utility using the appropriate settings. -# -# Note that this file is generated every time a new debug session -# is initialized, so you may want to move or rename the file before -# making changes. -# -# You can launch cspybat by typing Powershell.exe -File followed by the name of this batch file, followed -# by the name of the debug file (usually an ELF / DWARF or UBROF file). -# -# Read about available command line parameters in the C - SPY Debugging -# Guide. Hints about additional command line parameters that may be -# useful in specific cases : -# --download_only Downloads a code image without starting a debug -# session afterwards. -# --silent Omits the sign - on message. -# --timeout Limits the maximum allowed execution time. -# - - -if ($debugfile -eq "") -{ -& "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.1\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" -} -else -{ -& "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.1\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" --debug_file=$debugfile --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" -} diff --git a/ports/cortex_r5/iar/example_build/settings/tx.Debug.driver.xcl b/ports/cortex_r5/iar/example_build/settings/tx.Debug.driver.xcl deleted file mode 100644 index 7f8b9b49..00000000 --- a/ports/cortex_r5/iar/example_build/settings/tx.Debug.driver.xcl +++ /dev/null @@ -1,15 +0,0 @@ -"--endian=big" - -"--cpu=Cortex-R5" - -"--fpu=VFPv3" - -"--semihosting" - -"--BE8" - -"--multicore_nr_of_cores=1" - - - - diff --git a/ports/cortex_r5/iar/example_build/settings/tx.Debug.general.xcl b/ports/cortex_r5/iar/example_build/settings/tx.Debug.general.xcl deleted file mode 100644 index d5205384..00000000 --- a/ports/cortex_r5/iar/example_build/settings/tx.Debug.general.xcl +++ /dev/null @@ -1,11 +0,0 @@ -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.1\arm\bin\armproc.dll" - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.1\arm\bin\armsim2.dll" - -"C:\release\threadx\Debug\Exe\tx.out" - ---plugin="C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.1\arm\bin\armbat.dll" - - - - diff --git a/ports/cortex_r5/iar/example_build/settings/tx.crun b/ports/cortex_r5/iar/example_build/settings/tx.crun deleted file mode 100644 index d71ea555..00000000 --- a/ports/cortex_r5/iar/example_build/settings/tx.crun +++ /dev/null @@ -1,13 +0,0 @@ - - - 1 - - - * - * - * - 0 - 1 - - - diff --git a/ports/cortex_r5/iar/example_build/settings/tx.dbgdt b/ports/cortex_r5/iar/example_build/settings/tx.dbgdt deleted file mode 100644 index 9e08d965..00000000 --- a/ports/cortex_r5/iar/example_build/settings/tx.dbgdt +++ /dev/null @@ -1,4 +0,0 @@ - - - - diff --git a/ports/cortex_r5/iar/example_build/settings/tx.dnx b/ports/cortex_r5/iar/example_build/settings/tx.dnx deleted file mode 100644 index 25e4c4ba..00000000 --- a/ports/cortex_r5/iar/example_build/settings/tx.dnx +++ /dev/null @@ -1,58 +0,0 @@ - - - - 0 - 1 - 90 - 1 - 1 - 1 - main - 0 - 50 - - - 0 - 1 - - - 0 - 0 - 1 - 0 - 1 - 0 - - - 0 - 0 - 1 - 0 - 1 - - - 0 - - - 0 - - - 1 - - - 1 - 0 - 1 - 0 - 1 - - - 0 - 0 - - - 10000000 - 0 - 1 - - diff --git a/ports/cortex_r5/iar/example_build/tx.dep b/ports/cortex_r5/iar/example_build/tx.dep deleted file mode 100644 index a10cf92c..00000000 --- a/ports/cortex_r5/iar/example_build/tx.dep +++ /dev/null @@ -1,10476 +0,0 @@ - - - 4 - 2479021136 - - Debug - - $PROJ_DIR$\tx_api.h - $PROJ_DIR$\tx_block_pool.h - $PROJ_DIR$\tx_block_pool_info_get.c - $PROJ_DIR$\tx_block_pool_delete.c - $PROJ_DIR$\tx_block_pool_initialize.c - $PROJ_DIR$\tx_block_allocate.c - $PROJ_DIR$\tx_block_pool_performance_system_info_get.c - $PROJ_DIR$\tx_block_pool_prioritize.c - $PROJ_DIR$\tx_block_release.c - $PROJ_DIR$\tx_block_pool_performance_info_get.c - $PROJ_DIR$\tx_block_pool_cleanup.c - $PROJ_DIR$\tx_block_pool_create.c - $PROJ_DIR$\tx_byte_pool_info_get.c - $PROJ_DIR$\tx_event_flags_delete.c - $PROJ_DIR$\tx_event_flags_create.c - $PROJ_DIR$\tx_event_flags_performance_system_info_get.c - $PROJ_DIR$\tx_mutex_create.c - $PROJ_DIR$\tx_byte_pool_search.c - $PROJ_DIR$\tx_event_flags_set_notify.c - $PROJ_DIR$\tx_byte_pool_performance_info_get.c - $PROJ_DIR$\tx_byte_pool_create.c - $PROJ_DIR$\tx_byte_pool_performance_system_info_get.c - $PROJ_DIR$\tx_byte_pool_prioritize.c - $PROJ_DIR$\tx_byte_release.c - $PROJ_DIR$\tx_byte_pool_initialize.c - $PROJ_DIR$\tx_byte_pool.h - $PROJ_DIR$\tx_event_flags.h - $PROJ_DIR$\tx_event_flags_get.c - $PROJ_DIR$\tx_event_flags_info_get.c - $PROJ_DIR$\tx_event_flags_performance_info_get.c - $PROJ_DIR$\tx_byte_allocate.c - $PROJ_DIR$\tx_event_flags_set.c - $PROJ_DIR$\tx_iar.c - $PROJ_DIR$\tx_initialize.h - $PROJ_DIR$\tx_initialize_high_level.c - $PROJ_DIR$\tx_event_flags_cleanup.c - $PROJ_DIR$\tx_initialize_kernel_enter.c - $PROJ_DIR$\tx_byte_pool_cleanup.c - $PROJ_DIR$\tx_initialize_kernel_setup.c - $PROJ_DIR$\tx_mutex_cleanup.c - $PROJ_DIR$\tx_event_flags_initialize.c - $PROJ_DIR$\tx_mutex.h - $PROJ_DIR$\tx_byte_pool_delete.c - $PROJ_DIR$\tx_queue.h - $PROJ_DIR$\tx_queue_create.c - $PROJ_DIR$\tx_queue_performance_info_get.c - $PROJ_DIR$\tx_semaphore_ceiling_put.c - $PROJ_DIR$\tx_semaphore_delete.c - $PROJ_DIR$\tx_mutex_info_get.c - $PROJ_DIR$\tx_semaphore.h - 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- - - 34123 - 0A0000000A0000006E0000006E000000 - 0000000000000000150300001A000000 - 8192 - 0 - 0 - 32767 - 0 - - - 1 - - - - diff --git a/ports_module/cortex-m3/iar/example_build/settings/sample_threadx.dnx b/ports_module/cortex-m3/iar/example_build/settings/sample_threadx.dnx deleted file mode 100644 index 0fa79328..00000000 --- a/ports_module/cortex-m3/iar/example_build/settings/sample_threadx.dnx +++ /dev/null @@ -1,99 +0,0 @@ - - - - 0 - 1 - 90 - 1 - 1 - 1 - main - 0 - 50 - - - 0 - 1 - - - 1618778298 - - - 0 - 0 - 0 - - - 0 - - - _ 0 - _ 0 - - - 0 - - - 0 - 1 - 0 - 0 - - - 0 - - - 1 - - - _ 0 - _ "" - - - _ 0 - _ "" - _ 0 - - - 0 - 0 - 1 - 0 - 1 - 0 - - - 0 - 0 - 1 - 0 - 1 - - - 0 - - - 0 - - - 1 - _ 0 9999 0 9999 1 0 0 100 0 1 "SysTick 1 0x3C" - 1 - - - 1 - 0 - 1 - 0 - 1 - - - 0 - 0 - - - 10000000 - 0 - 1 - - diff --git a/ports_module/cortex-m3/iar/example_build/settings/sample_threadx_module.Debug.cspy.bat b/ports_module/cortex-m3/iar/example_build/settings/sample_threadx_module.Debug.cspy.bat deleted file mode 100644 index 6a76a8e3..00000000 --- a/ports_module/cortex-m3/iar/example_build/settings/sample_threadx_module.Debug.cspy.bat +++ /dev/null @@ -1,40 +0,0 @@ -@REM This batch file has been generated by the IAR Embedded Workbench -@REM C-SPY Debugger, as an aid to preparing a command line for running -@REM the cspybat command line utility using the appropriate settings. -@REM -@REM Note that this file is generated every time a new debug session -@REM is initialized, so you may want to move or rename the file before -@REM making changes. -@REM -@REM You can launch cspybat by typing the name of this batch file followed -@REM by the name of the debug file (usually an ELF/DWARF or UBROF file). -@REM -@REM Read about available command line parameters in the C-SPY Debugging -@REM Guide. Hints about additional command line parameters that may be -@REM useful in specific cases: -@REM --download_only Downloads a code image without starting a debug -@REM session afterwards. -@REM --silent Omits the sign-on message. -@REM --timeout Limits the maximum allowed execution time. -@REM - - -@echo off - -if not "%~1" == "" goto debugFile - -@echo on - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\common\bin\cspybat" -f "C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports_module\cortex-m3\iar\example_build\settings\sample_threadx_module.Debug.general.xcl" --backend -f "C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports_module\cortex-m3\iar\example_build\settings\sample_threadx_module.Debug.driver.xcl" - -@echo off -goto end - -:debugFile - -@echo on - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\common\bin\cspybat" -f "C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports_module\cortex-m3\iar\example_build\settings\sample_threadx_module.Debug.general.xcl" "--debug_file=%~1" --backend -f "C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports_module\cortex-m3\iar\example_build\settings\sample_threadx_module.Debug.driver.xcl" - -@echo off -:end diff --git a/ports_module/cortex-m3/iar/example_build/settings/sample_threadx_module.Debug.cspy.ps1 b/ports_module/cortex-m3/iar/example_build/settings/sample_threadx_module.Debug.cspy.ps1 deleted file mode 100644 index fb7f5494..00000000 --- a/ports_module/cortex-m3/iar/example_build/settings/sample_threadx_module.Debug.cspy.ps1 +++ /dev/null @@ -1,31 +0,0 @@ -param([String]$debugfile = ""); - -# This powershell file has been generated by the IAR Embedded Workbench -# C - SPY Debugger, as an aid to preparing a command line for running -# the cspybat command line utility using the appropriate settings. -# -# Note that this file is generated every time a new debug session -# is initialized, so you may want to move or rename the file before -# making changes. -# -# You can launch cspybat by typing Powershell.exe -File followed by the name of this batch file, followed -# by the name of the debug file (usually an ELF / DWARF or UBROF file). -# -# Read about available command line parameters in the C - SPY Debugging -# Guide. Hints about additional command line parameters that may be -# useful in specific cases : -# --download_only Downloads a code image without starting a debug -# session afterwards. -# --silent Omits the sign - on message. -# --timeout Limits the maximum allowed execution time. -# - - -if ($debugfile -eq "") -{ -& "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\common\bin\cspybat" -f "C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports_module\cortex-m3\iar\example_build\settings\sample_threadx_module.Debug.general.xcl" --backend -f "C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports_module\cortex-m3\iar\example_build\settings\sample_threadx_module.Debug.driver.xcl" -} -else -{ -& "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\common\bin\cspybat" -f "C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports_module\cortex-m3\iar\example_build\settings\sample_threadx_module.Debug.general.xcl" --debug_file=$debugfile --backend -f "C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports_module\cortex-m3\iar\example_build\settings\sample_threadx_module.Debug.driver.xcl" -} diff --git a/ports_module/cortex-m3/iar/example_build/settings/sample_threadx_module.Debug.driver.xcl b/ports_module/cortex-m3/iar/example_build/settings/sample_threadx_module.Debug.driver.xcl deleted file mode 100644 index 11a77ea1..00000000 --- a/ports_module/cortex-m3/iar/example_build/settings/sample_threadx_module.Debug.driver.xcl +++ /dev/null @@ -1,13 +0,0 @@ -"--endian=little" - -"--cpu=Cortex-M3" - -"--fpu=None" - -"--semihosting" - -"--multicore_nr_of_cores=1" - - - - diff --git a/ports_module/cortex-m3/iar/example_build/settings/sample_threadx_module.Debug.general.xcl b/ports_module/cortex-m3/iar/example_build/settings/sample_threadx_module.Debug.general.xcl deleted file mode 100644 index 8179c7fe..00000000 --- a/ports_module/cortex-m3/iar/example_build/settings/sample_threadx_module.Debug.general.xcl +++ /dev/null @@ -1,11 +0,0 @@ -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\arm\bin\armproc.dll" - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\arm\bin\armsim2.dll" - -"C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports_module\cortex-m3\iar\example_build\Debug\Exe\sample_threadx_module_stm32f4xx.out" - ---plugin="C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\arm\bin\armbat.dll" - - - - diff --git a/ports_module/cortex-m3/iar/example_build/settings/sample_threadx_module.crun b/ports_module/cortex-m3/iar/example_build/settings/sample_threadx_module.crun deleted file mode 100644 index d71ea555..00000000 --- a/ports_module/cortex-m3/iar/example_build/settings/sample_threadx_module.crun +++ /dev/null @@ -1,13 +0,0 @@ - - - 1 - - - * - * - * - 0 - 1 - - - diff --git a/ports_module/cortex-m3/iar/example_build/settings/sample_threadx_module.dbgdt b/ports_module/cortex-m3/iar/example_build/settings/sample_threadx_module.dbgdt deleted file mode 100644 index 73e71f6e..00000000 --- a/ports_module/cortex-m3/iar/example_build/settings/sample_threadx_module.dbgdt +++ /dev/null @@ -1,4 +0,0 @@ - - - - diff --git a/ports_module/cortex-m3/iar/example_build/settings/sample_threadx_module.dnx b/ports_module/cortex-m3/iar/example_build/settings/sample_threadx_module.dnx deleted file mode 100644 index 1872e83f..00000000 --- a/ports_module/cortex-m3/iar/example_build/settings/sample_threadx_module.dnx +++ /dev/null @@ -1,58 +0,0 @@ - - - - 0 - 0 - 1 - 0 - 1 - 0 - - - 0 - 0 - 1 - 0 - 1 - - - 0 - 1 - 90 - 1 - 1 - 1 - main - 0 - 50 - - - 0 - - - 0 - - - 1 - - - 1 - 0 - 1 - 0 - 1 - - - 0 - 1 - - - 0 - 0 - - - 10000000 - 0 - 1 - - diff --git a/ports_module/cortex-m3/iar/example_build/settings/sample_threadx_module_manager.Debug.cspy.bat b/ports_module/cortex-m3/iar/example_build/settings/sample_threadx_module_manager.Debug.cspy.bat deleted file mode 100644 index 820020f4..00000000 --- a/ports_module/cortex-m3/iar/example_build/settings/sample_threadx_module_manager.Debug.cspy.bat +++ /dev/null @@ -1,40 +0,0 @@ -@REM This batch file has been generated by the IAR Embedded Workbench -@REM C-SPY Debugger, as an aid to preparing a command line for running -@REM the cspybat command line utility using the appropriate settings. -@REM -@REM Note that this file is generated every time a new debug session -@REM is initialized, so you may want to move or rename the file before -@REM making changes. -@REM -@REM You can launch cspybat by typing the name of this batch file followed -@REM by the name of the debug file (usually an ELF/DWARF or UBROF file). -@REM -@REM Read about available command line parameters in the C-SPY Debugging -@REM Guide. Hints about additional command line parameters that may be -@REM useful in specific cases: -@REM --download_only Downloads a code image without starting a debug -@REM session afterwards. -@REM --silent Omits the sign-on message. -@REM --timeout Limits the maximum allowed execution time. -@REM - - -@echo off - -if not "%~1" == "" goto debugFile - -@echo on - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\common\bin\cspybat" -f "C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports_module\cortex-m3\iar\example_build\settings\sample_threadx_module_manager.Debug.general.xcl" --backend -f "C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports_module\cortex-m3\iar\example_build\settings\sample_threadx_module_manager.Debug.driver.xcl" - -@echo off -goto end - -:debugFile - -@echo on - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\common\bin\cspybat" -f "C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports_module\cortex-m3\iar\example_build\settings\sample_threadx_module_manager.Debug.general.xcl" "--debug_file=%~1" --backend -f "C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports_module\cortex-m3\iar\example_build\settings\sample_threadx_module_manager.Debug.driver.xcl" - -@echo off -:end \ No newline at end of file diff --git a/ports_module/cortex-m3/iar/example_build/settings/sample_threadx_module_manager.Debug.cspy.ps1 b/ports_module/cortex-m3/iar/example_build/settings/sample_threadx_module_manager.Debug.cspy.ps1 deleted file mode 100644 index 34a9f4f9..00000000 --- a/ports_module/cortex-m3/iar/example_build/settings/sample_threadx_module_manager.Debug.cspy.ps1 +++ /dev/null @@ -1,31 +0,0 @@ -param([String]$debugfile = ""); - -# This powershell file has been generated by the IAR Embedded Workbench -# C - SPY Debugger, as an aid to preparing a command line for running -# the cspybat command line utility using the appropriate settings. -# -# Note that this file is generated every time a new debug session -# is initialized, so you may want to move or rename the file before -# making changes. -# -# You can launch cspybat by typing Powershell.exe -File followed by the name of this batch file, followed -# by the name of the debug file (usually an ELF / DWARF or UBROF file). -# -# Read about available command line parameters in the C - SPY Debugging -# Guide. Hints about additional command line parameters that may be -# useful in specific cases : -# --download_only Downloads a code image without starting a debug -# session afterwards. -# --silent Omits the sign - on message. -# --timeout Limits the maximum allowed execution time. -# - - -if ($debugfile -eq "") -{ -& "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\common\bin\cspybat" -f "C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports_module\cortex-m3\iar\example_build\settings\sample_threadx_module_manager.Debug.general.xcl" --backend -f "C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports_module\cortex-m3\iar\example_build\settings\sample_threadx_module_manager.Debug.driver.xcl" -} -else -{ -& "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\common\bin\cspybat" -f "C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports_module\cortex-m3\iar\example_build\settings\sample_threadx_module_manager.Debug.general.xcl" --debug_file=$debugfile --backend -f "C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports_module\cortex-m3\iar\example_build\settings\sample_threadx_module_manager.Debug.driver.xcl" -} diff --git a/ports_module/cortex-m3/iar/example_build/settings/sample_threadx_module_manager.Debug.driver.xcl b/ports_module/cortex-m3/iar/example_build/settings/sample_threadx_module_manager.Debug.driver.xcl deleted file mode 100644 index 23c72b54..00000000 --- a/ports_module/cortex-m3/iar/example_build/settings/sample_threadx_module_manager.Debug.driver.xcl +++ /dev/null @@ -1,19 +0,0 @@ -"--endian=little" - -"--cpu=Cortex-M3" - -"--fpu=None" - -"-p" - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\arm\CONFIG\debugger\ST\STM32F217IG.ddf" - -"--semihosting" - -"--device=STM32F217IG" - -"--multicore_nr_of_cores=1" - - - - diff --git a/ports_module/cortex-m3/iar/example_build/settings/sample_threadx_module_manager.Debug.general.xcl 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- - - 34050 - 0A0000000A0000006E0000006E000000 - 0000000000000000150300001A000000 - 8192 - 0 - 0 - 767 - 0 - - - 1 - - - - diff --git a/ports_module/cortex-m3/iar/example_build/settings/sample_threadx_module_manager.dnx b/ports_module/cortex-m3/iar/example_build/settings/sample_threadx_module_manager.dnx deleted file mode 100644 index 77e49cb9..00000000 --- a/ports_module/cortex-m3/iar/example_build/settings/sample_threadx_module_manager.dnx +++ /dev/null @@ -1,105 +0,0 @@ - - - - 0 - 1 - 90 - 1 - 1 - 1 - main - 0 - 50 - - - _ 0 - _ 0 - - - 3269948375 - - - 0 - 1 - - - 0 - 0 - 0 - - - 0 - 1 - - - _ 0 - _ 0 - - - 0 - - - 0 - 1 - 0 - 0 - - - 0 - - - 1 - - - _ 0 - _ "" - - - _ 0 - _ "" - _ 0 - - - 0 - 0 - 1 - 0 - 1 - 0 - - - 0 - 0 - 1 - 0 - 1 - - - 0 - - - 0 - - - 1 - _ 0 10000 0 10000 1 0 0 100 0 1 "SysTick 1 0x3C" - 1 - - - 1 - 0 - 1 - 0 - 1 - - - _ "C:\Users\nisohack\Documents\work\tasks\st_work\threadx_07242020_rc2\ports_module\cortex-m3\iar\example_build\sample_threadx_module_stm32f2xx.c" "" - 1 - 0 - - - 10000000 - 0 - 1 - - diff --git a/ports_module/cortex-m3/iar/example_build/settings/tx.Debug.cspy.bat b/ports_module/cortex-m3/iar/example_build/settings/tx.Debug.cspy.bat deleted file mode 100644 index c4707b78..00000000 --- a/ports_module/cortex-m3/iar/example_build/settings/tx.Debug.cspy.bat +++ /dev/null @@ -1,40 +0,0 @@ -@REM This batch file has been generated by the IAR Embedded Workbench -@REM C-SPY Debugger, as an aid to preparing a command line for running -@REM the cspybat command line utility using the appropriate settings. -@REM -@REM Note that this file is generated every time a new debug session -@REM is initialized, so you may want to move or rename the file before -@REM making changes. -@REM -@REM You can launch cspybat by typing the name of this batch file followed -@REM by the name of the debug file (usually an ELF/DWARF or UBROF file). -@REM -@REM Read about available command line parameters in the C-SPY Debugging -@REM Guide. Hints about additional command line parameters that may be -@REM useful in specific cases: -@REM --download_only Downloads a code image without starting a debug -@REM session afterwards. -@REM --silent Omits the sign-on message. -@REM --timeout Limits the maximum allowed execution time. -@REM - - -@echo off - -if not "%~1" == "" goto debugFile - -@echo on - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" - -@echo off -goto end - -:debugFile - -@echo on - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" "--debug_file=%~1" --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" - -@echo off -:end diff --git a/ports_module/cortex-m3/iar/example_build/settings/tx.Debug.cspy.ps1 b/ports_module/cortex-m3/iar/example_build/settings/tx.Debug.cspy.ps1 deleted file mode 100644 index 1c1ba13b..00000000 --- a/ports_module/cortex-m3/iar/example_build/settings/tx.Debug.cspy.ps1 +++ /dev/null @@ -1,31 +0,0 @@ -param([String]$debugfile = ""); - -# This powershell file has been generated by the IAR Embedded Workbench -# C - SPY Debugger, as an aid to preparing a command line for running -# the cspybat command line utility using the appropriate settings. -# -# Note that this file is generated every time a new debug session -# is initialized, so you may want to move or rename the file before -# making changes. -# -# You can launch cspybat by typing Powershell.exe -File followed by the name of this batch file, followed -# by the name of the debug file (usually an ELF / DWARF or UBROF file). -# -# Read about available command line parameters in the C - SPY Debugging -# Guide. Hints about additional command line parameters that may be -# useful in specific cases : -# --download_only Downloads a code image without starting a debug -# session afterwards. -# --silent Omits the sign - on message. -# --timeout Limits the maximum allowed execution time. -# - - -if ($debugfile -eq "") -{ -& "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" -} -else -{ -& "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\common\bin\cspybat" -f "C:\release\threadx\settings\tx.Debug.general.xcl" --debug_file=$debugfile --backend -f "C:\release\threadx\settings\tx.Debug.driver.xcl" -} diff --git a/ports_module/cortex-m3/iar/example_build/settings/tx.Debug.driver.xcl b/ports_module/cortex-m3/iar/example_build/settings/tx.Debug.driver.xcl deleted file mode 100644 index 11a77ea1..00000000 --- a/ports_module/cortex-m3/iar/example_build/settings/tx.Debug.driver.xcl +++ /dev/null @@ -1,13 +0,0 @@ -"--endian=little" - -"--cpu=Cortex-M3" - -"--fpu=None" - -"--semihosting" - -"--multicore_nr_of_cores=1" - - - - diff --git a/ports_module/cortex-m3/iar/example_build/settings/tx.Debug.general.xcl b/ports_module/cortex-m3/iar/example_build/settings/tx.Debug.general.xcl deleted file mode 100644 index ef6d6dd5..00000000 --- a/ports_module/cortex-m3/iar/example_build/settings/tx.Debug.general.xcl +++ /dev/null @@ -1,11 +0,0 @@ -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm\bin\armproc.dll" - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm\bin\armsim2.dll" - -"C:\release\threadx\Debug\Exe\tx.out" - ---plugin "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm\bin\armbat.dll" - - - - diff --git a/ports_module/cortex-m3/iar/example_build/settings/tx.crun b/ports_module/cortex-m3/iar/example_build/settings/tx.crun deleted file mode 100644 index d71ea555..00000000 --- a/ports_module/cortex-m3/iar/example_build/settings/tx.crun +++ /dev/null @@ -1,13 +0,0 @@ - - - 1 - - - * - * - * - 0 - 1 - - - diff --git a/ports_module/cortex-m3/iar/example_build/settings/tx.dbgdt b/ports_module/cortex-m3/iar/example_build/settings/tx.dbgdt deleted file mode 100644 index 9e08d965..00000000 --- a/ports_module/cortex-m3/iar/example_build/settings/tx.dbgdt +++ /dev/null @@ -1,4 +0,0 @@ - - - - diff --git a/ports_module/cortex-m3/iar/example_build/settings/tx.dnx b/ports_module/cortex-m3/iar/example_build/settings/tx.dnx deleted file mode 100644 index 25e4c4ba..00000000 --- a/ports_module/cortex-m3/iar/example_build/settings/tx.dnx +++ /dev/null @@ -1,58 +0,0 @@ - - - - 0 - 1 - 90 - 1 - 1 - 1 - main - 0 - 50 - - - 0 - 1 - - - 0 - 0 - 1 - 0 - 1 - 0 - - - 0 - 0 - 1 - 0 - 1 - - - 0 - - - 0 - - - 1 - - - 1 - 0 - 1 - 0 - 1 - - - 0 - 0 - - - 10000000 - 0 - 1 - - diff --git a/ports_module/cortex-m3/iar/example_build/settings/txm.Debug.cspy.bat b/ports_module/cortex-m3/iar/example_build/settings/txm.Debug.cspy.bat deleted file mode 100644 index 1ab003ac..00000000 --- a/ports_module/cortex-m3/iar/example_build/settings/txm.Debug.cspy.bat +++ /dev/null @@ -1,40 +0,0 @@ -@REM This batch file has been generated by the IAR Embedded Workbench -@REM C-SPY Debugger, as an aid to preparing a command line for running -@REM the cspybat command line utility using the appropriate settings. -@REM -@REM Note that this file is generated every time a new debug session -@REM is initialized, so you may want to move or rename the file before -@REM making changes. -@REM -@REM You can launch cspybat by typing the name of this batch file followed -@REM by the name of the debug file (usually an ELF/DWARF or UBROF file). -@REM -@REM Read about available command line parameters in the C-SPY Debugging -@REM Guide. Hints about additional command line parameters that may be -@REM useful in specific cases: -@REM --download_only Downloads a code image without starting a debug -@REM session afterwards. -@REM --silent Omits the sign-on message. -@REM --timeout Limits the maximum allowed execution time. -@REM - - -@echo off - -if not "%~1" == "" goto debugFile - -@echo on - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\common\bin\cspybat" -f "C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports_module\cortex-m3\iar\example_build\settings\txm.Debug.general.xcl" --backend -f "C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports_module\cortex-m3\iar\example_build\settings\txm.Debug.driver.xcl" - -@echo off -goto end - -:debugFile - -@echo on - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\common\bin\cspybat" -f "C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports_module\cortex-m3\iar\example_build\settings\txm.Debug.general.xcl" "--debug_file=%~1" --backend -f "C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports_module\cortex-m3\iar\example_build\settings\txm.Debug.driver.xcl" - -@echo off -:end diff --git a/ports_module/cortex-m3/iar/example_build/settings/txm.Debug.cspy.ps1 b/ports_module/cortex-m3/iar/example_build/settings/txm.Debug.cspy.ps1 deleted file mode 100644 index 9ab546ed..00000000 --- a/ports_module/cortex-m3/iar/example_build/settings/txm.Debug.cspy.ps1 +++ /dev/null @@ -1,31 +0,0 @@ -param([String]$debugfile = ""); - -# This powershell file has been generated by the IAR Embedded Workbench -# C - SPY Debugger, as an aid to preparing a command line for running -# the cspybat command line utility using the appropriate settings. -# -# Note that this file is generated every time a new debug session -# is initialized, so you may want to move or rename the file before -# making changes. -# -# You can launch cspybat by typing Powershell.exe -File followed by the name of this batch file, followed -# by the name of the debug file (usually an ELF / DWARF or UBROF file). -# -# Read about available command line parameters in the C - SPY Debugging -# Guide. Hints about additional command line parameters that may be -# useful in specific cases : -# --download_only Downloads a code image without starting a debug -# session afterwards. -# --silent Omits the sign - on message. -# --timeout Limits the maximum allowed execution time. -# - - -if ($debugfile -eq "") -{ -& "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\common\bin\cspybat" -f "C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports_module\cortex-m3\iar\example_build\settings\txm.Debug.general.xcl" --backend -f "C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports_module\cortex-m3\iar\example_build\settings\txm.Debug.driver.xcl" -} -else -{ -& "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\common\bin\cspybat" -f "C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports_module\cortex-m3\iar\example_build\settings\txm.Debug.general.xcl" --debug_file=$debugfile --backend -f "C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports_module\cortex-m3\iar\example_build\settings\txm.Debug.driver.xcl" -} diff --git a/ports_module/cortex-m3/iar/example_build/settings/txm.Debug.driver.xcl b/ports_module/cortex-m3/iar/example_build/settings/txm.Debug.driver.xcl deleted file mode 100644 index 11a77ea1..00000000 --- a/ports_module/cortex-m3/iar/example_build/settings/txm.Debug.driver.xcl +++ /dev/null @@ -1,13 +0,0 @@ -"--endian=little" - -"--cpu=Cortex-M3" - -"--fpu=None" - -"--semihosting" - -"--multicore_nr_of_cores=1" - - - - diff --git a/ports_module/cortex-m3/iar/example_build/settings/txm.Debug.general.xcl b/ports_module/cortex-m3/iar/example_build/settings/txm.Debug.general.xcl deleted file mode 100644 index 0d0166c6..00000000 --- a/ports_module/cortex-m3/iar/example_build/settings/txm.Debug.general.xcl +++ /dev/null @@ -1,11 +0,0 @@ -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\arm\bin\armproc.dll" - -"C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\arm\bin\armsim2.dll" - -"C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports_module\cortex-m3\iar\example_build\Debug\Exe\txm.out" - ---plugin="C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\arm\bin\armbat.dll" - - - - diff --git a/ports_module/cortex-m3/iar/example_build/settings/txm.crun b/ports_module/cortex-m3/iar/example_build/settings/txm.crun deleted file mode 100644 index d71ea555..00000000 --- a/ports_module/cortex-m3/iar/example_build/settings/txm.crun +++ /dev/null @@ -1,13 +0,0 @@ - - - 1 - - - * - * - * - 0 - 1 - - - diff --git a/ports_module/cortex-m3/iar/example_build/settings/txm.dbgdt b/ports_module/cortex-m3/iar/example_build/settings/txm.dbgdt deleted file mode 100644 index 73e71f6e..00000000 --- a/ports_module/cortex-m3/iar/example_build/settings/txm.dbgdt +++ /dev/null @@ -1,4 +0,0 @@ - - - - diff --git a/ports_module/cortex-m3/iar/example_build/settings/txm.dnx b/ports_module/cortex-m3/iar/example_build/settings/txm.dnx deleted file mode 100644 index 1872e83f..00000000 --- a/ports_module/cortex-m3/iar/example_build/settings/txm.dnx +++ /dev/null @@ -1,58 +0,0 @@ - - - - 0 - 0 - 1 - 0 - 1 - 0 - - - 0 - 0 - 1 - 0 - 1 - - - 0 - 1 - 90 - 1 - 1 - 1 - main - 0 - 50 - - - 0 - - - 0 - - - 1 - - - 1 - 0 - 1 - 0 - 1 - - - 0 - 1 - - - 0 - 0 - - - 10000000 - 0 - 1 - - diff --git a/ports_module/cortex-m3/iar/example_build/tx.ewd b/ports_module/cortex-m3/iar/example_build/tx.ewd deleted file mode 100644 index b2b3f2fe..00000000 --- a/ports_module/cortex-m3/iar/example_build/tx.ewd +++ /dev/null @@ -1,2974 +0,0 @@ - - - 3 - - Debug - - ARM - - 1 - - C-SPY - 2 - - 32 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ARMSIM_ID - 2 - - 1 - 1 - 1 - - - - - - - - CADI_ID - 2 - - 0 - 1 - 1 - - - - - - - - - CMSISDAP_ID - 2 - - 4 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - GDBSERVER_ID - 2 - - 0 - 1 - 1 - - - - - - - - - - - IJET_ID - 2 - - 8 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - JLINK_ID - 2 - - 16 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - LMIFTDI_ID - 2 - - 2 - 1 - 1 - - - - - - - - - - NULINK_ID - 2 - - 0 - 1 - 1 - - - - - - - PEMICRO_ID - 2 - - 3 - 1 - 1 - - - - - - - - STLINK_ID - 2 - - 7 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - THIRDPARTY_ID - 2 - - 0 - 1 - 1 - - - - - - - - TIFET_ID - 2 - - 1 - 1 - 1 - - - - - - - - - - - - - - - - - - - XDS100_ID - 2 - - 8 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\FreeRtos\FreeRtosArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\HWRTOSplugin\HWRTOSplugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin2.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\RemedyRtosViewer\RemedyRtosViewer.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm8b.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm8bBE.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin - 0 - - - $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin - 0 - - - $EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin - 0 - - - $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin - 0 - - - - - Release - - ARM - - 0 - - C-SPY - 2 - - 32 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ARMSIM_ID - 2 - - 1 - 1 - 0 - - - - - - - - CADI_ID - 2 - - 0 - 1 - 0 - - - - - - - - - CMSISDAP_ID - 2 - - 4 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - GDBSERVER_ID - 2 - - 0 - 1 - 0 - - - - - - - - - - - IJET_ID - 2 - - 8 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - JLINK_ID - 2 - - 16 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - LMIFTDI_ID - 2 - - 2 - 1 - 0 - - - - - - - - - - NULINK_ID - 2 - - 0 - 1 - 0 - - - - - - - PEMICRO_ID - 2 - - 3 - 1 - 0 - - - - - - - - STLINK_ID - 2 - - 7 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - THIRDPARTY_ID - 2 - - 0 - 1 - 0 - - - - - - - - TIFET_ID - 2 - - 1 - 1 - 0 - - - - - - - - - - - - - - - - - - - XDS100_ID - 2 - - 8 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\FreeRtos\FreeRtosArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\HWRTOSplugin\HWRTOSplugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin2.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\RemedyRtosViewer\RemedyRtosViewer.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm8b.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm8bBE.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin - 0 - - - $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin - 0 - - - $EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin - 0 - - - $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin - 0 - - - - diff --git a/ports_module/cortex-m3/iar/example_build/tx.ewt b/ports_module/cortex-m3/iar/example_build/tx.ewt deleted file mode 100644 index d43d0fe5..00000000 --- a/ports_module/cortex-m3/iar/example_build/tx.ewt +++ /dev/null @@ -1,3514 +0,0 @@ - - - 3 - - Debug - - ARM - - 1 - - C-STAT - 263 - - 263 - - 0 - - 1 - 600 - 0 - 2 - 0 - 1 - 100 - - - 1.7.0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 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$PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_mutex_performance_system_info_get.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_mutex_prioritize.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_mutex_put.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_queue_create.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_queue_delete.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_queue_flush.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_queue_front_send.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_queue_info_get.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_queue_performance_info_get.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_queue_performance_system_info_get.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_queue_prioritize.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_queue_receive.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_queue_send.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_queue_send_notify.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_semaphore_ceiling_put.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_semaphore_create.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_semaphore_delete.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_semaphore_get.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_semaphore_info_get.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_semaphore_performance_info_get.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_semaphore_performance_system_info_get.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_semaphore_prioritize.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_semaphore_put.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_semaphore_put_notify.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_thread_create.c - - - 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$PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_thread_sleep.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_thread_stack_error_notify.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_thread_suspend.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_thread_terminate.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_thread_time_slice_change.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_thread_wait_abort.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_time_get.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_time_set.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_timer_activate.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_timer_change.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_timer_create.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_timer_deactivate.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_timer_delete.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_timer_info_get.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_timer_performance_info_get.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_timer_performance_system_info_get.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_trace_buffer_full_notify.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_trace_disable.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_trace_enable.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_trace_event_filter.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_trace_event_unfilter.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_trace_interrupt_control.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_trace_isr_enter_insert.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_trace_isr_exit_insert.c - - - $PROJ_DIR$\..\..\..\..\modules\module_lib\src\txm_trace_user_event_insert.c - - - diff --git a/ports_module/cortex-m4/ac5/example_build/build_threadx.bat b/ports_module/cortex-m4/ac5/example_build/build_threadx.bat index add2c03f..155cd7f9 100644 --- a/ports_module/cortex-m4/ac5/example_build/build_threadx.bat +++ b/ports_module/cortex-m4/ac5/example_build/build_threadx.bat @@ -1,240 +1,235 @@ del tx.a -armasm -g --cpu=cortex-m4 --fpu=softvfp --apcs=/interwork tx_initialize_low_level.S -armasm -g --cpu=cortex-m4 --fpu=softvfp --apcs=/interwork ../module_manager/src/tx_thread_stack_build.S -armasm -g --cpu=cortex-m4 --fpu=softvfp --apcs=/interwork ../module_manager/src/tx_thread_schedule.S --diag_suppress=A1581W -armasm -g --cpu=cortex-m4 --fpu=softvfp --apcs=/interwork ../module_manager/src/tx_thread_system_return.S -armasm -g --cpu=cortex-m4 --fpu=softvfp --apcs=/interwork ../module_manager/src/tx_thread_context_save.S -armasm -g --cpu=cortex-m4 --fpu=softvfp --apcs=/interwork ../module_manager/src/tx_thread_context_restore.S -armasm -g --cpu=cortex-m4 --fpu=softvfp --apcs=/interwork ../module_manager/src/tx_thread_interrupt_control.S -armasm -g --cpu=cortex-m4 --fpu=softvfp --apcs=/interwork ../module_manager/src/tx_timer_interrupt.S -armasm -g --cpu=cortex-m4 --fpu=softvfp --apcs=/interwork ../module_manager/src/tx_thread_interrupt_disable.S -armasm -g --cpu=cortex-m4 --fpu=softvfp --apcs=/interwork ../module_manager/src/tx_thread_interrupt_restore.S -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_block_allocate.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_block_pool_cleanup.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_block_pool_create.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_block_pool_delete.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_block_pool_info_get.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_block_pool_initialize.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_block_pool_performance_info_get.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_block_pool_performance_system_info_get.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_block_pool_prioritize.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_block_release.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_byte_allocate.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_byte_pool_cleanup.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_byte_pool_create.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_byte_pool_delete.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_byte_pool_info_get.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_byte_pool_initialize.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_byte_pool_performance_info_get.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_byte_pool_performance_system_info_get.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_byte_pool_prioritize.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_byte_pool_search.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_byte_release.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_event_flags_cleanup.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_event_flags_create.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_event_flags_delete.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_event_flags_get.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_event_flags_info_get.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_event_flags_initialize.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_event_flags_performance_info_get.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_event_flags_performance_system_info_get.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_event_flags_set.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_event_flags_set_notify.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_initialize_high_level.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_initialize_kernel_enter.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_initialize_kernel_setup.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_mutex_cleanup.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_mutex_create.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_mutex_delete.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_mutex_get.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_mutex_info_get.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_mutex_initialize.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_mutex_performance_info_get.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_mutex_performance_system_info_get.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_mutex_prioritize.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_mutex_priority_change.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_mutex_put.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_queue_cleanup.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_queue_create.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_queue_delete.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_queue_flush.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_queue_front_send.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_queue_info_get.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_queue_initialize.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_queue_performance_info_get.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_queue_performance_system_info_get.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_queue_prioritize.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_queue_receive.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_queue_send.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_queue_send_notify.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_semaphore_ceiling_put.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_semaphore_cleanup.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_semaphore_create.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_semaphore_delete.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_semaphore_get.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_semaphore_info_get.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_semaphore_initialize.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_semaphore_performance_info_get.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_semaphore_performance_system_info_get.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_semaphore_prioritize.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_semaphore_put.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_semaphore_put_notify.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_create.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_delete.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_entry_exit_notify.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_identify.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_info_get.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_initialize.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_performance_info_get.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_performance_system_info_get.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_preemption_change.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_priority_change.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_relinquish.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_reset.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_resume.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_shell_entry.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_sleep.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_stack_analyze.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_stack_error_handler.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_stack_error_notify.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_suspend.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_system_preempt_check.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_system_resume.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_system_suspend.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_terminate.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_time_slice.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_time_slice_change.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_timeout.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common/inc 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../../../../common_modules/module_manager/src/txm_module_manager_thread_reset.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_timer_notify_trampoline.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_unload.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_util.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../module_manager/src/txm_module_manager_alignment_adjust.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../module_manager/src/txm_module_manager_external_memory_enable.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../module_manager/src/txm_module_manager_memory_fault_handler.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../module_manager/src/txm_module_manager_memory_fault_notify.c -armcc -g -O0 --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../module_manager/src/txm_module_manager_mm_register_setup.c -armasm -g --cpu=cortex-m4 --fpu=softvfp --apcs=/interwork ../module_manager/src/txm_module_manager_thread_stack_build.S -armasm -g --cpu=cortex-m4 --fpu=softvfp --apcs=/interwork ../module_manager/src/txm_module_manager_user_mode_entry.S +armasm -g --cpreproc --cpu=cortex-m4 --fpu=vfpv4 --apcs=/interwork tx_initialize_low_level.S +armasm -g --cpreproc --cpu=cortex-m4 --fpu=vfpv4 --apcs=/interwork ../module_manager/src/tx_thread_stack_build.S +armasm -g --cpreproc --cpu=cortex-m4 --fpu=vfpv4 --apcs=/interwork ../module_manager/src/tx_thread_schedule.S --diag_suppress=A1581W +armasm -g --cpreproc --cpu=cortex-m4 --fpu=vfpv4 --apcs=/interwork ../module_manager/src/tx_thread_system_return.S +armasm -g --cpreproc --cpu=cortex-m4 --fpu=vfpv4 --apcs=/interwork ../module_manager/src/tx_thread_context_save.S +armasm -g --cpreproc --cpu=cortex-m4 --fpu=vfpv4 --apcs=/interwork ../module_manager/src/tx_thread_context_restore.S +armasm -g --cpreproc --cpu=cortex-m4 --fpu=vfpv4 --apcs=/interwork ../module_manager/src/tx_thread_interrupt_control.S +armasm -g --cpreproc --cpu=cortex-m4 --fpu=vfpv4 --apcs=/interwork ../module_manager/src/tx_timer_interrupt.S +armasm -g --cpreproc --cpu=cortex-m4 --fpu=vfpv4 --apcs=/interwork ../module_manager/src/tx_thread_interrupt_disable.S +armasm -g --cpreproc --cpu=cortex-m4 --fpu=vfpv4 --apcs=/interwork ../module_manager/src/tx_thread_interrupt_restore.S +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_block_allocate.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_block_pool_cleanup.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_block_pool_create.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_block_pool_delete.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_block_pool_info_get.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_block_pool_initialize.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_block_pool_performance_info_get.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_block_pool_performance_system_info_get.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_block_pool_prioritize.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_block_release.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_byte_allocate.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_byte_pool_cleanup.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_byte_pool_create.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_byte_pool_delete.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_byte_pool_info_get.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_byte_pool_initialize.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_byte_pool_performance_info_get.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_byte_pool_performance_system_info_get.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_byte_pool_prioritize.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_byte_pool_search.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_byte_release.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_event_flags_cleanup.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_event_flags_create.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_event_flags_delete.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_event_flags_get.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_event_flags_info_get.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_event_flags_initialize.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_event_flags_performance_info_get.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_event_flags_performance_system_info_get.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_event_flags_set.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_event_flags_set_notify.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_initialize_high_level.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_initialize_kernel_enter.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_initialize_kernel_setup.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_mutex_cleanup.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_mutex_create.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_mutex_delete.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_mutex_get.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_mutex_info_get.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_mutex_initialize.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_mutex_performance_info_get.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_mutex_performance_system_info_get.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_mutex_prioritize.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_mutex_priority_change.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_mutex_put.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_queue_cleanup.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_queue_create.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_queue_delete.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_queue_flush.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_queue_front_send.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_queue_info_get.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_queue_initialize.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_queue_performance_info_get.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_queue_performance_system_info_get.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_queue_prioritize.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_queue_receive.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_queue_send.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_queue_send_notify.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_semaphore_ceiling_put.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_semaphore_cleanup.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_semaphore_create.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_semaphore_delete.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_semaphore_get.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_semaphore_info_get.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_semaphore_initialize.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_semaphore_performance_info_get.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_semaphore_performance_system_info_get.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_semaphore_prioritize.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_semaphore_put.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_semaphore_put_notify.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_create.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_delete.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_entry_exit_notify.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_identify.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_info_get.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_initialize.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_performance_info_get.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_performance_system_info_get.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_preemption_change.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_priority_change.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_relinquish.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_reset.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_resume.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_shell_entry.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_sleep.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_stack_analyze.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_stack_error_handler.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_stack_error_notify.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_suspend.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_system_preempt_check.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_system_resume.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_system_suspend.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_terminate.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_time_slice.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_time_slice_change.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_timeout.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_wait_abort.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_time_get.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_time_set.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_timer_activate.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_timer_change.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_timer_create.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_timer_deactivate.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_timer_delete.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_timer_expiration_process.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_timer_info_get.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_timer_initialize.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_timer_performance_info_get.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_timer_performance_system_info_get.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_timer_system_activate.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_timer_system_deactivate.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_timer_thread_entry.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_trace_enable.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_trace_disable.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_trace_initialize.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_trace_interrupt_control.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_trace_isr_enter_insert.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_trace_isr_exit_insert.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_trace_object_register.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_trace_object_unregister.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_trace_user_event_insert.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_trace_buffer_full_notify.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_trace_event_filter.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/tx_trace_event_unfilter.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_block_allocate.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_block_pool_create.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_block_pool_delete.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_block_pool_info_get.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_block_pool_prioritize.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_block_release.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_byte_allocate.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_byte_pool_create.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_byte_pool_delete.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_byte_pool_info_get.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_byte_pool_prioritize.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_byte_release.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_event_flags_create.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_event_flags_delete.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_event_flags_get.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_event_flags_info_get.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_event_flags_set.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_event_flags_set_notify.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_mutex_create.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_mutex_delete.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_mutex_get.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_mutex_info_get.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_mutex_prioritize.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_mutex_put.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_queue_create.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_queue_delete.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_queue_flush.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_queue_front_send.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_queue_info_get.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_queue_prioritize.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_queue_receive.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_queue_send.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_queue_send_notify.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_semaphore_ceiling_put.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_semaphore_create.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_semaphore_delete.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_semaphore_get.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_semaphore_info_get.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_semaphore_prioritize.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_semaphore_put.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_semaphore_put_notify.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_thread_create.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_thread_delete.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_thread_entry_exit_notify.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_thread_info_get.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_thread_preemption_change.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_thread_priority_change.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_thread_relinquish.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_thread_reset.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_thread_resume.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_thread_suspend.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_thread_terminate.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_thread_time_slice_change.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_thread_wait_abort.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_timer_activate.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_timer_change.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_timer_create.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_timer_deactivate.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_timer_delete.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common/inc ../../../../common/src/txe_timer_info_get.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_application_request.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_callback_request.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_event_flags_notify_trampoline.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_file_load.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_in_place_load.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_internal_load.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_initialize.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_kernel_dispatch.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_maximum_module_priority_set.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_memory_load.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_object_allocate.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_object_deallocate.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_object_pointer_get.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_object_pointer_get_extended.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_object_pool_create.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_properties_get.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_queue_notify_trampoline.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_semaphore_notify_trampoline.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_start.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_stop.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_thread_create.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_thread_notify_trampoline.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_thread_reset.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_timer_notify_trampoline.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_unload.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_util.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../module_manager/src/txm_module_manager_alignment_adjust.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../module_manager/src/txm_module_manager_external_memory_enable.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../module_manager/src/txm_module_manager_memory_fault_handler.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../module_manager/src/txm_module_manager_memory_fault_notify.c +armcc -g -O0 --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../module_manager/src/txm_module_manager_mm_register_setup.c +armasm -g --cpreproc --cpu=cortex-m4 --fpu=vfpv4 --apcs=/interwork ../module_manager/src/txm_module_manager_thread_stack_build.S +armasm -g --cpreproc --cpu=cortex-m4 --fpu=vfpv4 --apcs=/interwork ../module_manager/src/txm_module_manager_user_mode_entry.S armar --create tx.a tx_thread_stack_build.o tx_thread_schedule.o tx_thread_system_return.o tx_thread_context_save.o tx_thread_context_restore.o tx_timer_interrupt.o tx_thread_interrupt_control.o tx_initialize_low_level.o tx_thread_interrupt_disable.o tx_thread_interrupt_restore.o tx_block_allocate.o tx_block_pool_cleanup.o tx_block_pool_create.o tx_block_pool_delete.o tx_block_pool_info_get.o tx_block_pool_initialize.o tx_block_pool_performance_info_get.o tx_block_pool_performance_system_info_get.o tx_block_pool_prioritize.o tx_block_release.o tx_byte_allocate.o tx_byte_pool_cleanup.o tx_byte_pool_create.o tx_byte_pool_delete.o tx_byte_pool_info_get.o tx_byte_pool_initialize.o tx_byte_pool_performance_info_get.o tx_byte_pool_performance_system_info_get.o tx_byte_pool_prioritize.o tx_byte_pool_search.o tx_byte_release.o tx_event_flags_cleanup.o tx_event_flags_create.o tx_event_flags_delete.o tx_event_flags_get.o tx_event_flags_info_get.o tx_event_flags_initialize.o tx_event_flags_performance_info_get.o - armar -r tx.a tx_event_flags_performance_system_info_get.o tx_event_flags_set.o tx_event_flags_set_notify.o tx_initialize_high_level.o tx_initialize_kernel_enter.o tx_initialize_kernel_setup.o tx_mutex_cleanup.o tx_mutex_create.o tx_mutex_delete.o tx_mutex_get.o tx_mutex_info_get.o tx_mutex_initialize.o tx_mutex_performance_info_get.o tx_mutex_performance_system_info_get.o tx_mutex_prioritize.o tx_mutex_priority_change.o tx_mutex_put.o tx_queue_cleanup.o tx_queue_create.o tx_queue_delete.o tx_queue_flush.o tx_queue_front_send.o tx_queue_info_get.o tx_queue_initialize.o tx_queue_performance_info_get.o tx_queue_performance_system_info_get.o tx_queue_prioritize.o tx_queue_receive.o tx_queue_send.o tx_queue_send_notify.o tx_semaphore_ceiling_put.o tx_semaphore_cleanup.o tx_semaphore_create.o tx_semaphore_delete.o tx_semaphore_get.o tx_semaphore_info_get.o tx_semaphore_initialize.o tx_semaphore_performance_info_get.o tx_semaphore_performance_system_info_get.o tx_semaphore_prioritize.o tx_semaphore_put.o - armar -r tx.a tx_semaphore_put_notify.o tx_thread_create.o tx_thread_delete.o tx_thread_entry_exit_notify.o tx_thread_identify.o tx_thread_info_get.o tx_thread_initialize.o tx_thread_performance_info_get.o tx_thread_performance_system_info_get.o tx_thread_preemption_change.o tx_thread_priority_change.o tx_thread_relinquish.o tx_thread_reset.o tx_thread_resume.o tx_thread_shell_entry.o tx_thread_sleep.o tx_thread_stack_analyze.o tx_thread_stack_error_handler.o tx_thread_stack_error_notify.o tx_thread_suspend.o tx_thread_system_preempt_check.o tx_thread_system_resume.o tx_thread_system_suspend.o tx_thread_terminate.o tx_thread_time_slice.o tx_thread_time_slice_change.o tx_thread_timeout.o tx_thread_wait_abort.o tx_time_get.o tx_time_set.o tx_timer_activate.o tx_timer_change.o tx_timer_create.o tx_timer_deactivate.o tx_timer_delete.o tx_timer_expiration_process.o tx_timer_info_get.o tx_timer_initialize.o tx_timer_performance_info_get.o tx_timer_performance_system_info_get.o tx_timer_system_activate.o - armar -r tx.a tx_timer_system_deactivate.o tx_timer_thread_entry.o tx_trace_enable.o tx_trace_disable.o tx_trace_initialize.o tx_trace_interrupt_control.o tx_trace_isr_enter_insert.o tx_trace_isr_exit_insert.o tx_trace_object_register.o tx_trace_object_unregister.o tx_trace_user_event_insert.o tx_trace_buffer_full_notify.o tx_trace_event_filter.o tx_trace_event_unfilter.o txe_block_allocate.o txe_block_pool_create.o txe_block_pool_delete.o txe_block_pool_info_get.o txe_block_pool_prioritize.o txe_block_release.o txe_byte_allocate.o txe_byte_pool_create.o txe_byte_pool_delete.o txe_byte_pool_info_get.o txe_byte_pool_prioritize.o txe_byte_release.o txe_event_flags_create.o txe_event_flags_delete.o txe_event_flags_get.o txe_event_flags_info_get.o txe_event_flags_set.o txe_event_flags_set_notify.o txe_mutex_create.o txe_mutex_delete.o txe_mutex_get.o txe_mutex_info_get.o txe_mutex_prioritize.o txe_mutex_put.o txe_queue_create.o txe_queue_delete.o txe_queue_flush.o txe_queue_front_send.o txe_queue_info_get.o - armar -r tx.a txe_queue_prioritize.o txe_queue_receive.o txe_queue_send.o txe_queue_send_notify.o txe_semaphore_ceiling_put.o txe_semaphore_create.o txe_semaphore_delete.o txe_semaphore_get.o txe_semaphore_info_get.o txe_semaphore_prioritize.o txe_semaphore_put.o txe_semaphore_put_notify.o txe_thread_create.o txe_thread_delete.o txe_thread_entry_exit_notify.o txe_thread_info_get.o txe_thread_preemption_change.o txe_thread_priority_change.o txe_thread_relinquish.o txe_thread_reset.o txe_thread_resume.o txe_thread_suspend.o txe_thread_terminate.o txe_thread_time_slice_change.o txe_thread_wait_abort.o txe_timer_activate.o txe_timer_change.o txe_timer_create.o txe_timer_deactivate.o txe_timer_delete.o txe_timer_info_get.o txm_module_manager_alignment_adjust.o txm_module_manager_application_request.o txm_module_manager_callback_request.o txm_module_manager_event_flags_notify_trampoline.o txm_module_manager_external_memory_enable.o txm_module_manager_file_load.o txm_module_manager_in_place_load.o - armar -r tx.a txm_module_manager_initialize.o txm_module_manager_kernel_dispatch.o txm_module_manager_maximum_module_priority_set.o txm_module_manager_memory_fault_handler.o txm_module_manager_memory_fault_notify.o txm_module_manager_memory_load.o txm_module_manager_object_pointer_get.o txm_module_manager_object_pool_create.o txm_module_manager_queue_notify_trampoline.o txm_module_manager_semaphore_notify_trampoline.o txm_module_manager_mm_register_setup.o txm_module_manager_start.o txm_module_manager_stop.o txm_module_manager_thread_create.o txm_module_manager_thread_notify_trampoline.o txm_module_manager_thread_reset.o txm_module_manager_timer_notify_trampoline.o txm_module_manager_unload.o txm_module_manager_thread_stack_build.o txm_module_manager_internal_load.o txm_module_manager_object_allocate.o txm_module_manager_object_deallocate.o txm_module_manager_object_pointer_get_extended.o txm_module_manager_properties_get.o txm_module_manager_util.o txm_module_manager_user_mode_entry.o diff --git a/ports_module/cortex-m4/ac5/example_build/build_threadx_demo.bat b/ports_module/cortex-m4/ac5/example_build/build_threadx_demo.bat index 101e70c1..dbe992a0 100644 --- a/ports_module/cortex-m4/ac5/example_build/build_threadx_demo.bat +++ b/ports_module/cortex-m4/ac5/example_build/build_threadx_demo.bat @@ -1,4 +1,4 @@ -armasm -g --cpu=cortex-m4 --apcs=interwork tx_initialize_low_level.S +armasm -g --cpreproc --cpu=cortex-m4 --apcs=/interwork tx_initialize_low_level.S armcc -c -g --cpu=cortex-m4 -O2 -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc sample_threadx.c armlink -d -o sample_threadx.axf --elf --map --ro-base=0x00000000 --rw-base=0x20000000 --first __tx_vectors --datacompressor=off --inline --info=inline --callgraph --list sample_threadx.map tx_initialize_low_level.o sample_threadx.o tx.a diff --git a/ports_module/cortex-m4/ac5/example_build/build_threadx_module_demo.bat b/ports_module/cortex-m4/ac5/example_build/build_threadx_module_demo.bat index f7206706..fec9c004 100644 --- a/ports_module/cortex-m4/ac5/example_build/build_threadx_module_demo.bat +++ b/ports_module/cortex-m4/ac5/example_build/build_threadx_module_demo.bat @@ -1,3 +1,3 @@ -armasm -g --cpu=cortex-m4 --fpu=softvfp --apcs=/interwork/ropi/rwpi txm_module_preamble.S -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi --lower_ropi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc sample_threadx_module.c +armasm -g --cpreproc --cpu=cortex-m4 --fpu=vfpv4 --apcs=/interwork/ropi/rwpi txm_module_preamble.S +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi --lower_ropi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc sample_threadx_module.c armlink -d -o sample_threadx_module.axf --elf --ro=0x30000 --rw=0x40000 --first txm_module_preamble.o(Init) --entry=_txm_module_thread_shell_entry --ropi --rwpi --remove --map --symbols --list sample_threadx_module.map txm_module_preamble.o sample_threadx_module.o txm.a diff --git a/ports_module/cortex-m4/ac5/example_build/build_threadx_module_library.bat b/ports_module/cortex-m4/ac5/example_build/build_threadx_module_library.bat index 0c44afbc..80e804b9 100644 --- a/ports_module/cortex-m4/ac5/example_build/build_threadx_module_library.bat +++ b/ports_module/cortex-m4/ac5/example_build/build_threadx_module_library.bat @@ -1,106 +1,104 @@ del txm.a -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_block_allocate.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_block_pool_create.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_block_pool_delete.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_block_pool_info_get.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_block_pool_performance_info_get.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_block_pool_performance_system_info_get.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_block_pool_prioritize.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_block_release.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_byte_allocate.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_byte_pool_create.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_byte_pool_delete.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_byte_pool_info_get.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_byte_pool_performance_info_get.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_byte_pool_performance_system_info_get.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_byte_pool_prioritize.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_byte_release.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_event_flags_create.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_event_flags_delete.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_event_flags_get.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_event_flags_info_get.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_event_flags_performance_info_get.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_event_flags_performance_system_info_get.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_event_flags_set.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_event_flags_set_notify.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_module_application_request.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_module_callback_request_thread_entry.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_module_object_allocate.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_module_object_deallocate.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_module_object_pointer_get.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_module_thread_system_suspend.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_mutex_create.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_mutex_delete.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_mutex_get.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_mutex_info_get.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_mutex_performance_info_get.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_mutex_performance_system_info_get.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_mutex_prioritize.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_mutex_put.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_queue_create.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_queue_delete.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_queue_flush.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_queue_front_send.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_queue_info_get.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_queue_performance_info_get.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_queue_performance_system_info_get.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_queue_prioritize.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_queue_receive.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_queue_send.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_queue_send_notify.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_semaphore_ceiling_put.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_semaphore_create.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_semaphore_delete.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_semaphore_get.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_semaphore_info_get.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_semaphore_performance_info_get.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_semaphore_performance_system_info_get.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_semaphore_prioritize.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_semaphore_put.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_semaphore_put_notify.c -armcc -g --cpu=cortex-m4 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc 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-I../../../../common/inc ../../../../common_modules/module_lib/src/txm_mutex_performance_system_info_get.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_mutex_prioritize.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_mutex_put.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_queue_create.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_queue_delete.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_queue_flush.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_queue_front_send.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_queue_info_get.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_queue_performance_info_get.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_queue_performance_system_info_get.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_queue_prioritize.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_queue_receive.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_queue_send.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_queue_send_notify.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_semaphore_ceiling_put.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_semaphore_create.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_semaphore_delete.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_semaphore_get.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_semaphore_info_get.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_semaphore_performance_info_get.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_semaphore_performance_system_info_get.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_semaphore_prioritize.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_semaphore_put.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_semaphore_put_notify.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_thread_create.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_thread_delete.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_thread_entry_exit_notify.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_thread_identify.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_thread_info_get.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_thread_interrupt_control.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_thread_performance_info_get.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_thread_performance_system_info_get.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_thread_preemption_change.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_thread_priority_change.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_thread_relinquish.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_thread_reset.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_thread_resume.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_thread_sleep.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_thread_stack_error_notify.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_thread_suspend.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_thread_terminate.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_thread_time_slice_change.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_thread_wait_abort.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_time_get.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_time_set.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_timer_activate.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_timer_change.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_timer_create.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_timer_deactivate.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_timer_delete.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_timer_info_get.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_timer_performance_info_get.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_timer_performance_system_info_get.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_trace_buffer_full_notify.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_trace_disable.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_trace_enable.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_trace_event_filter.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_trace_event_unfilter.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_trace_isr_enter_insert.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_trace_isr_exit_insert.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_trace_user_event_insert.c +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ..//module_lib/src/txm_module_thread_shell_entry.c +armasm -g --cpreproc --cpu=cortex-m4 --fpu=vfpv4 --apcs=/interwork/ropi/rwpi --cpreproc --cpreproc_opts=-D,TXM_ASSEMBLY --cpreproc_opts=-D,TXM_MODULE_HEAP_SIZE=512 -I../inc ../module_lib/src/txm_module_initialize.S armar --create txm.a txm_block_allocate.o txm_block_pool_create.o txm_block_pool_delete.o txm_block_pool_info_get.o txm_block_pool_performance_info_get.o txm_block_pool_performance_system_info_get.o txm_block_pool_prioritize.o txm_block_release.o txm_byte_allocate.o txm_byte_pool_create.o txm_byte_pool_delete.o txm_byte_pool_info_get.o txm_byte_pool_performance_info_get.o txm_byte_pool_performance_system_info_get.o txm_byte_pool_prioritize.o txm_byte_release.o txm_event_flags_create.o txm_event_flags_delete.o txm_event_flags_get.o txm_event_flags_info_get.o txm_event_flags_performance_info_get.o txm_event_flags_performance_system_info_get.o txm_event_flags_set.o txm_event_flags_set_notify.o txm_module_application_request.o txm_module_callback_request_thread_entry.o txm_module_initialize.o txm_module_object_allocate.o txm_module_object_deallocate.o txm_module_object_pointer_get.o txm_module_thread_shell_entry.o txm_module_thread_system_suspend.o txm_mutex_create.o txm_mutex_delete.o txm_mutex_get.o - armar -r txm.a txm_mutex_info_get.o txm_mutex_performance_info_get.o txm_mutex_performance_system_info_get.o txm_mutex_prioritize.o txm_mutex_put.o txm_queue_create.o txm_queue_delete.o txm_queue_flush.o txm_queue_front_send.o txm_queue_info_get.o txm_queue_performance_info_get.o txm_queue_performance_system_info_get.o txm_queue_prioritize.o txm_queue_receive.o txm_queue_send.o txm_queue_send_notify.o txm_semaphore_ceiling_put.o txm_semaphore_create.o txm_semaphore_delete.o txm_semaphore_get.o txm_semaphore_info_get.o txm_semaphore_performance_info_get.o txm_semaphore_performance_system_info_get.o txm_semaphore_prioritize.o txm_semaphore_put.o txm_semaphore_put_notify.o txm_thread_create.o txm_thread_delete.o txm_thread_entry_exit_notify.o txm_thread_identify.o txm_thread_info_get.o txm_thread_interrupt_control.o txm_thread_performance_info_get.o txm_thread_performance_system_info_get.o txm_thread_preemption_change.o txm_thread_priority_change.o txm_thread_relinquish.o txm_thread_reset.o txm_thread_resume.o - armar -r txm.a txm_thread_sleep.o txm_thread_stack_error_notify.o txm_thread_suspend.o txm_thread_terminate.o txm_thread_time_slice_change.o txm_thread_wait_abort.o txm_time_get.o txm_time_set.o txm_timer_activate.o txm_timer_change.o txm_timer_create.o txm_timer_deactivate.o txm_timer_delete.o txm_timer_info_get.o txm_timer_performance_info_get.o txm_timer_performance_system_info_get.o txm_trace_buffer_full_notify.o txm_trace_disable.o txm_trace_enable.o txm_trace_event_filter.o txm_trace_event_unfilter.o txm_trace_isr_enter_insert.o txm_trace_isr_exit_insert.o txm_trace_user_event_insert.o diff --git a/ports_module/cortex-m4/ac5/example_build/build_threadx_module_manager_demo.bat b/ports_module/cortex-m4/ac5/example_build/build_threadx_module_manager_demo.bat index 7b247801..a6a22535 100644 --- a/ports_module/cortex-m4/ac5/example_build/build_threadx_module_manager_demo.bat +++ b/ports_module/cortex-m4/ac5/example_build/build_threadx_module_manager_demo.bat @@ -1,3 +1,3 @@ -armasm -g --cpu=cortex-m4 --fpu=softvfp --apcs=interwork tx_initialize_low_level.S -armcc -g --cpu=cortex-m4 --fpu=softvfp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc sample_threadx_module_manager.c +armasm -g --cpreproc --cpu=cortex-m4 --fpu=vfpv4 --apcs=/interwork tx_initialize_low_level.S +armcc -g --cpu=cortex-m4 --fpu=vfpv4 -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc sample_threadx_module_manager.c armlink -d -o sample_threadx_module_manager.axf --elf --ro 0x00000000 --first tx_initialize_low_level.o(RESET) --remove --map --symbols --list sample_threadx_module_manager.map tx_initialize_low_level.o sample_threadx_module_manager.o tx.a diff --git a/ports_module/cortex-m4/ac5/example_build/tx_initialize_low_level.S b/ports_module/cortex-m4/ac5/example_build/tx_initialize_low_level.S index f4210fe4..c06f4b07 100644 --- a/ports_module/cortex-m4/ac5/example_build/tx_initialize_low_level.S +++ b/ports_module/cortex-m4/ac5/example_build/tx_initialize_low_level.S @@ -1,36 +1,25 @@ -;/**************************************************************************/ -;/* */ -;/* Copyright (c) Microsoft Corporation. All rights reserved. */ -;/* */ -;/* This software is licensed under the Microsoft Software License */ -;/* Terms for Microsoft Azure RTOS. Full text of the license can be */ -;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ -;/* and in the root directory of this software. */ -;/* */ -;/**************************************************************************/ -; -; -;/**************************************************************************/ -;/**************************************************************************/ -;/** */ -;/** ThreadX Component */ -;/** */ -;/** Initialize */ -;/** */ -;/**************************************************************************/ -;/**************************************************************************/ -; -;#define TX_SOURCE_CODE -; -; -;/* Include necessary system files. */ -; -;#include "tx_api.h" -;#include "tx_initialize.h" -;#include "tx_thread.h" -;#include "tx_timer.h" -; -; +/**************************************************************************/ +/* */ +/* Copyright (c) Microsoft Corporation. All rights reserved. */ +/* */ +/* This software is licensed under the Microsoft Software License */ +/* Terms for Microsoft Azure RTOS. Full text of the license can be */ +/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ +/* and in the root directory of this software. */ +/* */ +/**************************************************************************/ + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ThreadX Component */ +/** */ +/** Initialize */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + IMPORT _tx_thread_system_stack_ptr IMPORT _tx_initialize_unused_memory IMPORT _tx_thread_context_save @@ -44,14 +33,12 @@ IMPORT __tx_PendSVHandler IMPORT __tx_SVCallHandler IMPORT MemManage_Handler -; -; + SYSTEM_CLOCK EQU 6000000 SYSTICK_CYCLES EQU ((SYSTEM_CLOCK / 100) -1) -; -; -;/* Setup the stack and heap areas. */ -; + +/* Setup the stack and heap areas. */ + STACK_SIZE EQU 0x00000400 HEAP_SIZE EQU 0x00000000 @@ -69,156 +56,156 @@ __heap_limit AREA RESET, CODE, READONLY -; + EXPORT __tx_vectors EXPORT __vector_table __vector_table __tx_vectors - DCD __initial_sp ; Reset and system stack ptr - DCD Reset_Handler ; Reset goes to startup function - DCD __tx_NMIHandler ; NMI - DCD __tx_BadHandler ; HardFault - DCD MemManage_Handler ; MemManage - DCD 0 ; BusFault - DCD 0 ; UsageFault - DCD 0 ; 7 - DCD 0 ; 8 - DCD 0 ; 9 - DCD 0 ; 10 - DCD __tx_SVCallHandler ; SVCall - DCD __tx_DBGHandler ; Monitor - DCD 0 ; 13 - DCD __tx_PendSVHandler ; PendSV - DCD __tx_SysTickHandler ; SysTick - DCD __tx_IntHandler ; Int 0 - DCD __tx_IntHandler ; Int 1 - DCD __tx_IntHandler ; Int 2 - DCD __tx_IntHandler ; Int 3 - -; -; + DCD __initial_sp // Reset and system stack ptr + DCD Reset_Handler // Reset goes to startup function + DCD __tx_NMIHandler // NMI + DCD __tx_BadHandler // HardFault + DCD MemManage_Handler // MemManage + DCD 0 // BusFault + DCD 0 // UsageFault + DCD 0 // 7 + DCD 0 // 8 + DCD 0 // 9 + DCD 0 // 10 + DCD __tx_SVCallHandler // SVCall + DCD __tx_DBGHandler // Monitor + DCD 0 // 13 + DCD __tx_PendSVHandler // PendSV + DCD __tx_SysTickHandler // SysTick + DCD __tx_IntHandler // Int 0 + DCD __tx_IntHandler // Int 1 + DCD __tx_IntHandler // Int 2 + DCD __tx_IntHandler // Int 3 + AREA ||.text||, CODE, READONLY EXPORT Reset_Handler Reset_Handler CPSID i IF {TARGET_FPU_VFP} = {TRUE} - LDR r0, =0xE000ED88 ; Pickup address of CPACR - LDR r1, [r0] ; Pickup CPACR - MOV32 r2, 0x00F00000 ; Build enable value - ORR r1, r1, r2 ; Or in enable value - STR r1, [r0] ; Setup CPACR + LDR r0, =0xE000ED88 // Pickup address of CPACR + LDR r1, [r0] // Pickup CPACR + MOV32 r2, 0x00F00000 // Build enable value + ORR r1, r1, r2 // Or in enable value + STR r1, [r0] // Setup CPACR ENDIF LDR r0, =__main BX r0 -;/**************************************************************************/ -;/* */ -;/* FUNCTION RELEASE */ -;/* */ -;/* _tx_initialize_low_level Cortex-M4/MPU/AC5 */ -;/* 6.1 */ -;/* AUTHOR */ -;/* */ -;/* Scott Larson, Microsoft Corporation */ -;/* */ -;/* DESCRIPTION */ -;/* */ -;/* This function is responsible for any low-level processor */ -;/* initialization, including setting up interrupt vectors, setting */ -;/* up a periodic timer interrupt source, saving the system stack */ -;/* pointer for use in ISR processing later, and finding the first */ -;/* available RAM memory address for tx_application_define. */ -;/* */ -;/* INPUT */ -;/* */ -;/* None */ -;/* */ -;/* OUTPUT */ -;/* */ -;/* None */ -;/* */ -;/* CALLS */ -;/* */ -;/* None */ -;/* */ -;/* CALLED BY */ -;/* */ -;/* _tx_initialize_kernel_enter ThreadX entry function */ -;/* */ -;/* RELEASE HISTORY */ -;/* */ -;/* DATE NAME DESCRIPTION */ -;/* */ -;/* 09-30-2020 Scott Larson Initial Version 6.1 */ -;/* */ -;/**************************************************************************/ -;VOID _tx_initialize_low_level(VOID) -;{ +/**************************************************************************/ +/* */ +/* FUNCTION RELEASE */ +/* */ +/* _tx_initialize_low_level Cortex-M4/MPU/AC5 */ +/* 6.1.2 */ +/* AUTHOR */ +/* */ +/* Scott Larson, Microsoft Corporation */ +/* */ +/* DESCRIPTION */ +/* */ +/* This function is responsible for any low-level processor */ +/* initialization, including setting up interrupt vectors, setting */ +/* up a periodic timer interrupt source, saving the system stack */ +/* pointer for use in ISR processing later, and finding the first */ +/* available RAM memory address for tx_application_define. */ +/* */ +/* INPUT */ +/* */ +/* None */ +/* */ +/* OUTPUT */ +/* */ +/* None */ +/* */ +/* CALLS */ +/* */ +/* None */ +/* */ +/* CALLED BY */ +/* */ +/* _tx_initialize_kernel_enter ThreadX entry function */ +/* */ +/* RELEASE HISTORY */ +/* */ +/* DATE NAME DESCRIPTION */ +/* */ +/* 09-30-2020 Scott Larson Initial Version 6.1 */ +/* 11-09-2020 Scott Larson Modified comment(s), */ +/* resulting in version 6.1.2 */ +/* */ +/**************************************************************************/ +// VOID _tx_initialize_low_level(VOID) +// { EXPORT _tx_initialize_low_level _tx_initialize_low_level -; -; /* Disable interrupts during ThreadX initialization. */ -; + + /* Disable interrupts during ThreadX initialization. */ + CPSID i -; -; /* Set base of available memory to end of non-initialised RAM area. */ -; - LDR r0, =_tx_initialize_unused_memory ; Build address of unused memory pointer - LDR r1, =|Image$$ZI$$Limit| ; Build first free address - ADD r1, r1, #4 ; - STR r1, [r0] ; Setup first unused memory pointer -; -; /* Setup Vector Table Offset Register. */ -; - MOV r0, #0xE000E000 ; Build address of NVIC registers - LDR r1, =__tx_vectors ; Pickup address of vector table - STR r1, [r0, #0xD08] ; Set vector table address -; -; /* Enable the cycle count register. */ -; -; LDR r0, =0xE0001000 ; Build address of DWT register -; LDR r1, [r0] ; Pickup the current value -; ORR r1, r1, #1 ; Set the CYCCNTENA bit -; STR r1, [r0] ; Enable the cycle count register -; -; /* Set system stack pointer from vector value. */ -; - LDR r0, =_tx_thread_system_stack_ptr ; Build address of system stack pointer - LDR r1, =__tx_vectors ; Pickup address of vector table - LDR r1, [r1] ; Pickup reset stack pointer - STR r1, [r0] ; Save system stack pointer -; -; /* Configure SysTick. */ -; - MOV r0, #0xE000E000 ; Build address of NVIC registers + + /* Set base of available memory to end of non-initialised RAM area. */ + + LDR r0, =_tx_initialize_unused_memory // Build address of unused memory pointer + LDR r1, =|Image$$ZI$$Limit| // Build first free address + ADD r1, r1, #4 // + STR r1, [r0] // Setup first unused memory pointer + + /* Setup Vector Table Offset Register. */ + + MOV r0, #0xE000E000 // Build address of NVIC registers + LDR r1, =__tx_vectors // Pickup address of vector table + STR r1, [r0, #0xD08] // Set vector table address + + /* Enable the cycle count register. */ + +// LDR r0, =0xE0001000 // Build address of DWT register +// LDR r1, [r0] // Pickup the current value +// ORR r1, r1, #1 // Set the CYCCNTENA bit +// STR r1, [r0] // Enable the cycle count register + + /* Set system stack pointer from vector value. */ + + LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer + LDR r1, =__tx_vectors // Pickup address of vector table + LDR r1, [r1] // Pickup reset stack pointer + STR r1, [r0] // Save system stack pointer + + /* Configure SysTick. */ + + MOV r0, #0xE000E000 // Build address of NVIC registers LDR r1, =SYSTICK_CYCLES - STR r1, [r0, #0x14] ; Setup SysTick Reload Value - MOV r1, #0x7 ; Build SysTick Control Enable Value - STR r1, [r0, #0x10] ; Setup SysTick Control -; -; /* Configure handler priorities. */ -; - LDR r1, =0x00000000 ; Rsrv, UsgF, BusF, MemM - STR r1, [r0, #0xD18] ; Setup System Handlers 4-7 Priority Registers + STR r1, [r0, #0x14] // Setup SysTick Reload Value + MOV r1, #0x7 // Build SysTick Control Enable Value + STR r1, [r0, #0x10] // Setup SysTick Control - LDR r1, =0xFF000000 ; SVCl, Rsrv, Rsrv, Rsrv - STR r1, [r0, #0xD1C] ; Setup System Handlers 8-11 Priority Registers - ; Note: SVC must be lowest priority, which is 0xFF + /* Configure handler priorities. */ + + LDR r1, =0x00000000 // Rsrv, UsgF, BusF, MemM + STR r1, [r0, #0xD18] // Setup System Handlers 4-7 Priority Registers + + LDR r1, =0xFF000000 // SVCl, Rsrv, Rsrv, Rsrv + STR r1, [r0, #0xD1C] // Setup System Handlers 8-11 Priority Registers + // Note: SVC must be lowest priority, which is 0xFF + + LDR r1, =0x40FF0000 // SysT, PnSV, Rsrv, DbgM + STR r1, [r0, #0xD20] // Setup System Handlers 12-15 Priority Registers + // Note: PnSV must be lowest priority, which is 0xFF + + /* Return to caller. */ - LDR r1, =0x40FF0000 ; SysT, PnSV, Rsrv, DbgM - STR r1, [r0, #0xD20] ; Setup System Handlers 12-15 Priority Registers - ; Note: PnSV must be lowest priority, which is 0xFF -; -; /* Return to caller. */ -; BX lr -;} -; -; -;/* Define initial heap/stack routine for the ARM RVCT startup code. -; This routine will set the initial stack and heap locations */ -; +// } + + +/* Define initial heap/stack routine for the ARM RVCT startup code. + This routine will set the initial stack and heap locations */ + EXPORT __user_initial_stackheap __user_initial_stackheap LDR r0, =HeapMem @@ -226,41 +213,40 @@ __user_initial_stackheap LDR r2, =(HeapMem + HEAP_SIZE) LDR r3, =StackMem BX lr -; -; -;/* Define shells for each of the unused vectors. */ -; + +/* Define shells for each of the unused vectors. */ + EXPORT __tx_BadHandler __tx_BadHandler B __tx_BadHandler -; EXPORT __tx_SVCallHandler -;__tx_SVCallHandler -; B __tx_SVCallHandler +// EXPORT __tx_SVCallHandler +//__tx_SVCallHandler +// B __tx_SVCallHandler EXPORT __tx_IntHandler __tx_IntHandler -; VOID InterruptHandler (VOID) -; { - PUSH {lr} - -; /* Do interrupt handler work here */ -; /* .... */ +// VOID InterruptHandler (VOID) +// { + PUSH {r0, lr} - POP {lr} + /* Do interrupt handler work here */ + /* .... */ + + POP {r0, lr} BX LR -; } +// } EXPORT __tx_SysTickHandler __tx_SysTickHandler -; VOID TimerInterruptHandler (VOID) -; { -; - PUSH {lr} +// VOID TimerInterruptHandler (VOID) +// { + + PUSH {r0, lr} BL _tx_timer_interrupt - POP {lr} + POP {r0, lr} BX LR -; } +// } EXPORT __tx_NMIHandler __tx_NMIHandler @@ -281,5 +267,3 @@ _tx_execution_thread_exit ALIGN LTORG END - - diff --git a/ports_module/cortex-m4/ac5/example_build/txm_module_preamble.S b/ports_module/cortex-m4/ac5/example_build/txm_module_preamble.S index 1e7a1800..f9f25cd5 100644 --- a/ports_module/cortex-m4/ac5/example_build/txm_module_preamble.S +++ b/ports_module/cortex-m4/ac5/example_build/txm_module_preamble.S @@ -2,7 +2,7 @@ PRESERVE8 - ; Define public symbols + /* Define public symbols. */ EXPORT __txm_module_preamble @@ -12,7 +12,7 @@ EXTERN demo_module_start - ; Define common external references + /* Define common external references. */ IMPORT _txm_module_thread_shell_entry IMPORT _txm_module_callback_request_thread_entry @@ -23,47 +23,48 @@ IMPORT |Image$$ER_ZI$$ZI$$Length| __txm_module_preamble - DCD 0x4D4F4455 ; Module ID - DCD 0x6 ; Module Major Version - DCD 0x1 ; Module Minor Version - DCD 32 ; Module Preamble Size in 32-bit words - DCD 0x12345678 ; Module ID (application defined) - DCD 0x01000007 ; Module Properties where: - ; Bits 31-24: Compiler ID - ; 0 -> IAR - ; 1 -> ARM - ; 2 -> GNU - ; Bit 0: 0 -> Privileged mode execution - ; 1 -> User mode execution - ; Bit 1: 0 -> No MPU protection - ; 1 -> MPU protection (must have user mode selected) - ; Bit 2: 0 -> Disable shared/external memory access - ; 1 -> Enable shared/external memory access - DCD _txm_module_thread_shell_entry - __txm_module_preamble ; Module Shell Entry Point - DCD demo_module_start - __txm_module_preamble ; Module Start Thread Entry Point - DCD 0 ; Module Stop Thread Entry Point - DCD 1 ; Module Start/Stop Thread Priority - DCD 1024 ; Module Start/Stop Thread Stack Size - DCD _txm_module_callback_request_thread_entry - __txm_module_preamble ; Module Callback Thread Entry - DCD 1 ; Module Callback Thread Priority - DCD 1024 ; Module Callback Thread Stack Size - DCD |Image$$ER_RO$$Length| + |Image$$ER_RW$$Length| ; Module Code Size - DCD |Image$$ER_RW$$Length| + |Image$$ER_ZI$$ZI$$Length| ; Module Data Size - DCD 0 ; Reserved 0 - DCD 0 ; Reserved 1 - DCD 0 ; Reserved 2 - DCD 0 ; Reserved 3 - DCD 0 ; Reserved 4 - DCD 0 ; Reserved 5 - DCD 0 ; Reserved 6 - DCD 0 ; Reserved 7 - DCD 0 ; Reserved 8 - DCD 0 ; Reserved 9 - DCD 0 ; Reserved 10 - DCD 0 ; Reserved 11 - DCD 0 ; Reserved 12 - DCD 0 ; Reserved 13 - DCD 0 ; Reserved 14 - DCD 0 ; Reserved 15 + DCD 0x4D4F4455 // Module ID + DCD 0x6 // Module Major Version + DCD 0x1 // Module Minor Version + DCD 32 // Module Preamble Size in 32-bit words + DCD 0x12345678 // Module ID (application defined) + DCD 0x01000007 // Module Properties where: + // Bits 31-24: Compiler ID + // 0 -> IAR + // 1 -> ARM + // 2 -> GNU + // Bits 23-3: Reserved + // Bit 2: 0 -> Disable shared/external memory access + // 1 -> Enable shared/external memory access + // Bit 1: 0 -> No MPU protection + // 1 -> MPU protection (must have user mode selected) + // Bit 0: 0 -> Privileged mode execution + // 1 -> User mode execution + DCD _txm_module_thread_shell_entry - __txm_module_preamble // Module Shell Entry Point + DCD demo_module_start - __txm_module_preamble // Module Start Thread Entry Point + DCD 0 // Module Stop Thread Entry Point + DCD 1 // Module Start/Stop Thread Priority + DCD 1024 // Module Start/Stop Thread Stack Size + DCD _txm_module_callback_request_thread_entry - __txm_module_preamble // Module Callback Thread Entry + DCD 1 // Module Callback Thread Priority + DCD 1024 // Module Callback Thread Stack Size + DCD |Image$$ER_RO$$Length| + |Image$$ER_RW$$Length| // Module Code Size + DCD |Image$$ER_RW$$Length| + |Image$$ER_ZI$$ZI$$Length| // Module Data Size + DCD 0 // Reserved 0 + DCD 0 // Reserved 1 + DCD 0 // Reserved 2 + DCD 0 // Reserved 3 + DCD 0 // Reserved 4 + DCD 0 // Reserved 5 + DCD 0 // Reserved 6 + DCD 0 // Reserved 7 + DCD 0 // Reserved 8 + DCD 0 // Reserved 9 + DCD 0 // Reserved 10 + DCD 0 // Reserved 11 + DCD 0 // Reserved 12 + DCD 0 // Reserved 13 + DCD 0 // Reserved 14 + DCD 0 // Reserved 15 END diff --git a/ports_module/cortex-m4/ac5/inc/txm_module_port.h b/ports_module/cortex-m4/ac5/inc/txm_module_port.h index c720ab37..ae5a90fb 100644 --- a/ports_module/cortex-m4/ac5/inc/txm_module_port.h +++ b/ports_module/cortex-m4/ac5/inc/txm_module_port.h @@ -26,7 +26,7 @@ /* APPLICATION INTERFACE DEFINITION RELEASE */ /* */ /* txm_module_port.h Cortex-M4/MPU/AC5 */ -/* 6.1 */ +/* 6.1.2 */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ @@ -41,6 +41,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 Scott Larson Initial Version 6.1 */ +/* 11-09-2020 Scott Larson Modified comment(s), */ +/* increase kernel stack size, */ +/* resulting in version 6.1.2 */ /* */ /**************************************************************************/ @@ -98,19 +101,9 @@ The following extensions must also be defined in tx_port.h: /* Define the kernel stack size for a module thread. */ #ifndef TXM_MODULE_KERNEL_STACK_SIZE -#define TXM_MODULE_KERNEL_STACK_SIZE 512 +#define TXM_MODULE_KERNEL_STACK_SIZE 768 #endif -/* For the following 3 access control settings, change TEX and C, B, S (bits 21 through 16 of MPU_RASR) - * to reflect your system memory attributes (cache, shareable, memory type). */ -/* Code region access control: privileged read-only, outer & inner write-back, normal memory, shareable. */ -#define TXM_MODULE_MPU_CODE_ACCESS_CONTROL 0x06070000 -/* Data region access control: execute never, read/write, outer & inner write-back, normal memory, shareable. */ -#define TXM_MODULE_MPU_DATA_ACCESS_CONTROL 0x13070000 -/* Shared region access control: execute never, read-only, outer & inner write-back, normal memory, shareable. */ -#define TXM_MODULE_MPU_SHARED_ACCESS_CONTROL 0x12070000 - - /* Define constants specific to the tools the module can be built with for this particular modules port. */ #define TXM_MODULE_IAR_COMPILER 0x00000000 @@ -165,9 +158,9 @@ The following extensions must also be defined in tx_port.h: #define INLINE_DECLARE inline -/* Define the number of MPU entries assigned to the code and data sections. On Cortex-M parts, there can only be 7 total - entries, since ThreadX uses one for access to the kernel dispatch function. */ - +/* Define the number of MPU entries assigned to the code and data sections. + On Cortex-M4 parts, there are 8 total entries. ThreadX uses one for access + to the kernel entry function, thus 7 remain for code and data protection. */ #define TXM_MODULE_MANAGER_CODE_MPU_ENTRIES 4 #define TXM_MODULE_MANAGER_DATA_MPU_ENTRIES 3 #define TXM_MODULE_MANAGER_SHARED_MPU_INDEX 8 @@ -333,6 +326,6 @@ ULONG _txm_module_manager_region_size_get(ULONG block_size); #define TXM_MODULE_MANAGER_VERSION_ID \ CHAR _txm_module_manager_version_id[] = \ - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Module Cortex-M4/MPU/AC5 Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Module Cortex-M4/MPU/AC5 Version 6.1.2 *"; #endif diff --git a/ports_module/cortex-m4/ac5/module_lib/src/txm_module_initialize.S b/ports_module/cortex-m4/ac5/module_lib/src/txm_module_initialize.S index f0c5ee68..e965b809 100644 --- a/ports_module/cortex-m4/ac5/module_lib/src/txm_module_initialize.S +++ b/ports_module/cortex-m4/ac5/module_lib/src/txm_module_initialize.S @@ -1,97 +1,96 @@ -;/**************************************************************************/ -;/* */ -;/* Copyright (c) Microsoft Corporation. All rights reserved. */ -;/* */ -;/* This software is licensed under the Microsoft Software License */ -;/* Terms for Microsoft Azure RTOS. Full text of the license can be */ -;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ -;/* and in the root directory of this software. */ -;/* */ -;/**************************************************************************/ -; -; -;/**************************************************************************/ -;/**************************************************************************/ -;/** */ -;/** ThreadX Component */ -;/** */ -;/** Module */ -;/** */ -;/**************************************************************************/ -;/**************************************************************************/ -; -; +/**************************************************************************/ +/* */ +/* Copyright (c) Microsoft Corporation. All rights reserved. */ +/* */ +/* This software is licensed under the Microsoft Software License */ +/* Terms for Microsoft Azure RTOS. Full text of the license can be */ +/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ +/* and in the root directory of this software. */ +/* */ +/**************************************************************************/ + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ThreadX Component */ +/** */ +/** Module */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + IMPORT __use_two_region_memory IMPORT __scatterload IMPORT txm_heap AREA ||.text||, CODE, READONLY -;/**************************************************************************/ -;/* */ -;/* FUNCTION RELEASE */ -;/* */ -;/* _txm_module_initialize Cortex-M4/MPU/AC5 */ -;/* 6.1 */ -;/* AUTHOR */ -;/* */ -;/* Scott Larson, Microsoft Corporation */ -;/* */ -;/* DESCRIPTION */ -;/* */ -;/* This function initializes the module c runtime. */ -;/* */ -;/* INPUT */ -;/* */ -;/* None */ -;/* */ -;/* OUTPUT */ -;/* */ -;/* None */ -;/* */ -;/* CALLS */ -;/* */ -;/* __scatterload Initialize C runtime */ -;/* */ -;/* CALLED BY */ -;/* */ -;/* _txm_module_thread_shell_entry Start module thread */ -;/* */ -;/* RELEASE HISTORY */ -;/* */ -;/* DATE NAME DESCRIPTION */ -;/* */ -;/* 09-30-2020 Scott Larson Initial Version 6.1 */ -;/* */ -;/**************************************************************************/ -;VOID _txm_module_initialize(VOID) +/**************************************************************************/ +/* */ +/* FUNCTION RELEASE */ +/* */ +/* _txm_module_initialize Cortex-M4/MPU/AC5 */ +/* 6.1.2 */ +/* AUTHOR */ +/* */ +/* Scott Larson, Microsoft Corporation */ +/* */ +/* DESCRIPTION */ +/* */ +/* This function initializes the module c runtime. */ +/* */ +/* INPUT */ +/* */ +/* None */ +/* */ +/* OUTPUT */ +/* */ +/* None */ +/* */ +/* CALLS */ +/* */ +/* __scatterload Initialize C runtime */ +/* */ +/* CALLED BY */ +/* */ +/* _txm_module_thread_shell_entry Start module thread */ +/* */ +/* RELEASE HISTORY */ +/* */ +/* DATE NAME DESCRIPTION */ +/* */ +/* 09-30-2020 Scott Larson Initial Version 6.1 */ +/* 11-09-2020 Scott Larson Modified comment(s), */ +/* resulting in version 6.1.2 */ +/* */ +/**************************************************************************/ +// VOID _txm_module_initialize(VOID) EXPORT _txm_module_initialize _txm_module_initialize - PUSH {r4-r12,lr} ; Save dregs and LR + PUSH {r4-r12,lr} // Save dregs and LR - B __scatterload ; Call ARM func to initialize variables + B __scatterload // Call ARM func to initialize variables + + +/* Override __rt_exit function. */ -; -;/* Override __rt_exit function. */ -; EXPORT __rt_exit __rt_exit - POP {r4-r12,lr} ; Restore dregs and LR - BX lr ; Return to caller -; -; -; + POP {r4-r12,lr} // Restore dregs and LR + BX lr // Return to caller + EXPORT __user_setup_stackheap - ; returns heap start address in R0 - ; returns heap end address in R2 - ; does not touch SP, it is already set up before the module runs + // returns heap start address in R0 + // returns heap end address in R2 + // does not touch SP, it is already set up before the module runs __user_setup_stackheap - LDR r1, _tx_heap_offset ; load heap offset - ADD r0, r9, r1 ; calculate heap base address - MOV r2, #TXM_MODULE_HEAP_SIZE ; load heap size - ADD r2, r2, r0 ; calculate heap end address + LDR r1, _tx_heap_offset // load heap offset + ADD r0, r9, r1 // calculate heap base address + MOV r2, #TXM_MODULE_HEAP_SIZE // load heap size + ADD r2, r2, r0 // calculate heap end address BX lr ALIGN 4 @@ -101,9 +100,9 @@ _tx_heap_offset IMPORT txm_heap [DATA] -; -; Dummy main function -; + +// Dummy main function + AREA section_main, CODE, READONLY, ALIGN=2 EXPORT main main diff --git a/ports_module/cortex-m4/ac5/module_manager/src/tx_thread_context_restore.S b/ports_module/cortex-m4/ac5/module_manager/src/tx_thread_context_restore.S index 0ed36142..65f7d711 100644 --- a/ports_module/cortex-m4/ac5/module_manager/src/tx_thread_context_restore.S +++ b/ports_module/cortex-m4/ac5/module_manager/src/tx_thread_context_restore.S @@ -1,91 +1,86 @@ -;/**************************************************************************/ -;/* */ -;/* Copyright (c) Microsoft Corporation. All rights reserved. */ -;/* */ -;/* This software is licensed under the Microsoft Software License */ -;/* Terms for Microsoft Azure RTOS. Full text of the license can be */ -;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ -;/* and in the root directory of this software. */ -;/* */ -;/**************************************************************************/ -; -; -;/**************************************************************************/ -;/**************************************************************************/ -;/** */ -;/** ThreadX Component */ -;/** */ -;/** Thread */ -;/** */ -;/**************************************************************************/ -;/**************************************************************************/ -; -; +/**************************************************************************/ +/* */ +/* Copyright (c) Microsoft Corporation. All rights reserved. */ +/* */ +/* This software is licensed under the Microsoft Software License */ +/* Terms for Microsoft Azure RTOS. Full text of the license can be */ +/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ +/* and in the root directory of this software. */ +/* */ +/**************************************************************************/ + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ThreadX Component */ +/** */ +/** Thread */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + IF :DEF:TX_ENABLE_EXECUTION_CHANGE_NOTIFY IMPORT _tx_execution_isr_exit ENDIF -; -; + AREA ||.text||, CODE, READONLY PRESERVE8 -;/**************************************************************************/ -;/* */ -;/* FUNCTION RELEASE */ -;/* */ -;/* _tx_thread_context_restore Cortex-M4/AC5 */ -;/* 6.1 */ -;/* AUTHOR */ -;/* */ -;/* William E. Lamie, Microsoft Corporation */ -;/* */ -;/* DESCRIPTION */ -;/* */ -;/* This function is only needed for legacy applications and it should */ -;/* not be called in any new development on a Cortex-M. */ -;/* This function restores the interrupt context if it is processing a */ -;/* nested interrupt. If not, it returns to the interrupt thread if no */ -;/* preemption is necessary. Otherwise, if preemption is necessary or */ -;/* if no thread was running, the function returns to the scheduler. */ -;/* */ -;/* INPUT */ -;/* */ -;/* None */ -;/* */ -;/* OUTPUT */ -;/* */ -;/* None */ -;/* */ -;/* CALLS */ -;/* */ -;/* _tx_thread_schedule Thread scheduling routine */ -;/* */ -;/* CALLED BY */ -;/* */ -;/* ISRs Interrupt Service Routines */ -;/* */ -;/* RELEASE HISTORY */ -;/* */ -;/* DATE NAME DESCRIPTION */ -;/* */ -;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -;/* */ -;/**************************************************************************/ -;VOID _tx_thread_context_restore(VOID) -;{ +/**************************************************************************/ +/* */ +/* FUNCTION RELEASE */ +/* */ +/* _tx_thread_context_restore Cortex-M4/AC5 */ +/* 6.1.2 */ +/* AUTHOR */ +/* */ +/* William E. Lamie, Microsoft Corporation */ +/* */ +/* DESCRIPTION */ +/* */ +/* This function is only needed for legacy applications and it should */ +/* not be called in any new development on a Cortex-M. */ +/* */ +/* INPUT */ +/* */ +/* None */ +/* */ +/* OUTPUT */ +/* */ +/* None */ +/* */ +/* CALLS */ +/* */ +/* None */ +/* */ +/* CALLED BY */ +/* */ +/* ISRs Interrupt Service Routines */ +/* */ +/* RELEASE HISTORY */ +/* */ +/* DATE NAME DESCRIPTION */ +/* */ +/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 11-09-2020 Scott Larson Modified comment(s), */ +/* resulting in version 6.1.2 */ +/* */ +/**************************************************************************/ +// VOID _tx_thread_context_restore(VOID) +// { EXPORT _tx_thread_context_restore _tx_thread_context_restore + IF :DEF:TX_ENABLE_EXECUTION_CHANGE_NOTIFY -; -; /* Call the ISR exit function to indicate an ISR is complete. */ -; - PUSH {r0,lr} ; Save ISR lr - BL _tx_execution_isr_exit ; Call the ISR exit function - POP {r0,lr} ; Restore ISR lr + /* Call the ISR exit function to indicate an ISR is complete. */ + PUSH {r0,lr} // Save ISR lr + BL _tx_execution_isr_exit // Call the ISR exit function + POP {r0,lr} // Restore ISR lr ENDIF -; + POP {lr} BX lr -;} +// } ALIGN LTORG END diff --git a/ports_module/cortex-m4/ac5/module_manager/src/tx_thread_context_save.S b/ports_module/cortex-m4/ac5/module_manager/src/tx_thread_context_save.S index a6827883..c05300fe 100644 --- a/ports_module/cortex-m4/ac5/module_manager/src/tx_thread_context_save.S +++ b/ports_module/cortex-m4/ac5/module_manager/src/tx_thread_context_save.S @@ -1,91 +1,87 @@ -;/**************************************************************************/ -;/* */ -;/* Copyright (c) Microsoft Corporation. All rights reserved. */ -;/* */ -;/* This software is licensed under the Microsoft Software License */ -;/* Terms for Microsoft Azure RTOS. Full text of the license can be */ -;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ -;/* and in the root directory of this software. */ -;/* */ -;/**************************************************************************/ -; -; -;/**************************************************************************/ -;/**************************************************************************/ -;/** */ -;/** ThreadX Component */ -;/** */ -;/** Thread */ -;/** */ -;/**************************************************************************/ -;/**************************************************************************/ -; -; +/**************************************************************************/ +/* */ +/* Copyright (c) Microsoft Corporation. All rights reserved. */ +/* */ +/* This software is licensed under the Microsoft Software License */ +/* Terms for Microsoft Azure RTOS. Full text of the license can be */ +/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ +/* and in the root directory of this software. */ +/* */ +/**************************************************************************/ + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ThreadX Component */ +/** */ +/** Thread */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + IF :DEF:TX_ENABLE_EXECUTION_CHANGE_NOTIFY IMPORT _tx_execution_isr_enter ENDIF -; -; + AREA ||.text||, CODE, READONLY PRESERVE8 -;/**************************************************************************/ -;/* */ -;/* FUNCTION RELEASE */ -;/* */ -;/* _tx_thread_context_save Cortex-M4/AC5 */ -;/* 6.1 */ -;/* AUTHOR */ -;/* */ -;/* William E. Lamie, Microsoft Corporation */ -;/* */ -;/* DESCRIPTION */ -;/* */ -;/* This function is only needed for legacy applications and it should */ -;/* not be called in any new development on a Cortex-M. */ -;/* This function saves the context of an executing thread in the */ -;/* beginning of interrupt processing. The function also ensures that */ -;/* the system stack is used upon return to the calling ISR. */ -;/* */ -;/* INPUT */ -;/* */ -;/* None */ -;/* */ -;/* OUTPUT */ -;/* */ -;/* None */ -;/* */ -;/* CALLS */ -;/* */ -;/* None */ -;/* */ -;/* CALLED BY */ -;/* */ -;/* ISRs */ -;/* */ -;/* RELEASE HISTORY */ -;/* */ -;/* DATE NAME DESCRIPTION */ -;/* */ -;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -;/* */ -;/**************************************************************************/ -;VOID _tx_thread_context_save(VOID) -;{ +/**************************************************************************/ +/* */ +/* FUNCTION RELEASE */ +/* */ +/* _tx_thread_context_save Cortex-M4/AC5 */ +/* 6.1.2 */ +/* AUTHOR */ +/* */ +/* William E. Lamie, Microsoft Corporation */ +/* */ +/* DESCRIPTION */ +/* */ +/* This function is only needed for legacy applications and it should */ +/* not be called in any new development on a Cortex-M. */ +/* */ +/* INPUT */ +/* */ +/* None */ +/* */ +/* OUTPUT */ +/* */ +/* None */ +/* */ +/* CALLS */ +/* */ +/* None */ +/* */ +/* CALLED BY */ +/* */ +/* ISRs */ +/* */ +/* RELEASE HISTORY */ +/* */ +/* DATE NAME DESCRIPTION */ +/* */ +/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 11-09-2020 Scott Larson Modified comment(s), */ +/* resulting in version 6.1.2 */ +/* */ +/**************************************************************************/ +// VOID _tx_thread_context_save(VOID) +// { EXPORT _tx_thread_context_save _tx_thread_context_save + IF :DEF:TX_ENABLE_EXECUTION_CHANGE_NOTIFY -; -; /* Call the ISR enter function to indicate an ISR is executing. */ -; - PUSH {r0, lr} ; Save ISR lr - BL _tx_execution_isr_enter ; Call the ISR enter function - POP {r0, lr} ; Recover ISR lr + /* Call the ISR enter function to indicate an ISR is executing. */ + PUSH {r0, lr} // Save ISR lr + BL _tx_execution_isr_enter // Call the ISR enter function + POP {r0, lr} // Recover ISR lr ENDIF -; -; /* Return to interrupt processing. */ -; - BX lr ; Return to interrupt processing caller -;} + + /* Return to interrupt processing. */ + + BX lr // Return to interrupt processing caller +// } ALIGN LTORG END diff --git a/ports_module/cortex-m4/ac5/module_manager/src/tx_thread_interrupt_control.S b/ports_module/cortex-m4/ac5/module_manager/src/tx_thread_interrupt_control.S index ef983f17..3c574171 100644 --- a/ports_module/cortex-m4/ac5/module_manager/src/tx_thread_interrupt_control.S +++ b/ports_module/cortex-m4/ac5/module_manager/src/tx_thread_interrupt_control.S @@ -1,76 +1,74 @@ -;/**************************************************************************/ -;/* */ -;/* Copyright (c) Microsoft Corporation. All rights reserved. */ -;/* */ -;/* This software is licensed under the Microsoft Software License */ -;/* Terms for Microsoft Azure RTOS. Full text of the license can be */ -;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ -;/* and in the root directory of this software. */ -;/* */ -;/**************************************************************************/ -; -; -;/**************************************************************************/ -;/**************************************************************************/ -;/** */ -;/** ThreadX Component */ -;/** */ -;/** Thread */ -;/** */ -;/**************************************************************************/ -;/**************************************************************************/ -; -; +/**************************************************************************/ +/* */ +/* Copyright (c) Microsoft Corporation. All rights reserved. */ +/* */ +/* This software is licensed under the Microsoft Software License */ +/* Terms for Microsoft Azure RTOS. Full text of the license can be */ +/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ +/* and in the root directory of this software. */ +/* */ +/**************************************************************************/ + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ThreadX Component */ +/** */ +/** Thread */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + AREA ||.text||, CODE, READONLY -;/**************************************************************************/ -;/* */ -;/* FUNCTION RELEASE */ -;/* */ -;/* _tx_thread_interrupt_control Cortex-M4/AC5 */ -;/* 6.1 */ -;/* AUTHOR */ -;/* */ -;/* William E. Lamie, Microsoft Corporation */ -;/* */ -;/* DESCRIPTION */ -;/* */ -;/* This function is responsible for changing the interrupt lockout */ -;/* posture of the system. */ -;/* */ -;/* INPUT */ -;/* */ -;/* new_posture New interrupt lockout posture */ -;/* */ -;/* OUTPUT */ -;/* */ -;/* old_posture Old interrupt lockout posture */ -;/* */ -;/* CALLS */ -;/* */ -;/* None */ -;/* */ -;/* CALLED BY */ -;/* */ -;/* Application Code */ -;/* */ -;/* RELEASE HISTORY */ -;/* */ -;/* DATE NAME DESCRIPTION */ -;/* */ -;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -;/* */ -;/**************************************************************************/ -;UINT _tx_thread_interrupt_control(UINT new_posture) -;{ +/**************************************************************************/ +/* */ +/* FUNCTION RELEASE */ +/* */ +/* _tx_thread_interrupt_control Cortex-M4/AC5 */ +/* 6.1.2 */ +/* AUTHOR */ +/* */ +/* William E. Lamie, Microsoft Corporation */ +/* */ +/* DESCRIPTION */ +/* */ +/* This function is responsible for changing the interrupt lockout */ +/* posture of the system. */ +/* */ +/* INPUT */ +/* */ +/* new_posture New interrupt lockout posture */ +/* */ +/* OUTPUT */ +/* */ +/* old_posture Old interrupt lockout posture */ +/* */ +/* CALLS */ +/* */ +/* None */ +/* */ +/* CALLED BY */ +/* */ +/* Application Code */ +/* */ +/* RELEASE HISTORY */ +/* */ +/* DATE NAME DESCRIPTION */ +/* */ +/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 11-09-2020 Scott Larson Modified comment(s), */ +/* resulting in version 6.1.2 */ +/* */ +/**************************************************************************/ +// UINT _tx_thread_interrupt_control(UINT new_posture) +// { EXPORT _tx_thread_interrupt_control _tx_thread_interrupt_control -; -; /* Pickup current interrupt lockout posture. */ -; - MRS r1, PRIMASK - MSR PRIMASK, r0 - MOV r0, r1 - BX lr -; -;} + MRS r1, PRIMASK // Pickup current interrupt lockout + MSR PRIMASK, r0 // Apply the new interrupt lockout + MOV r0, r1 // Transfer old to return register + BX lr // Return to caller + +// } END diff --git a/ports_module/cortex-m4/ac5/module_manager/src/tx_thread_interrupt_disable.S b/ports_module/cortex-m4/ac5/module_manager/src/tx_thread_interrupt_disable.S index 6d11e5b8..cee8330d 100644 --- a/ports_module/cortex-m4/ac5/module_manager/src/tx_thread_interrupt_disable.S +++ b/ports_module/cortex-m4/ac5/module_manager/src/tx_thread_interrupt_disable.S @@ -1,75 +1,76 @@ -;/**************************************************************************/ -;/* */ -;/* Copyright (c) Microsoft Corporation. All rights reserved. */ -;/* */ -;/* This software is licensed under the Microsoft Software License */ -;/* Terms for Microsoft Azure RTOS. Full text of the license can be */ -;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ -;/* and in the root directory of this software. */ -;/* */ -;/**************************************************************************/ -; -; -;/**************************************************************************/ -;/**************************************************************************/ -;/** */ -;/** ThreadX Component */ -;/** */ -;/** Thread */ -;/** */ -;/**************************************************************************/ -;/**************************************************************************/ -; -; +/**************************************************************************/ +/* */ +/* Copyright (c) Microsoft Corporation. All rights reserved. */ +/* */ +/* This software is licensed under the Microsoft Software License */ +/* Terms for Microsoft Azure RTOS. Full text of the license can be */ +/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ +/* and in the root directory of this software. */ +/* */ +/**************************************************************************/ + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ThreadX Component */ +/** */ +/** Thread */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + AREA ||.text||, CODE, READONLY -;/**************************************************************************/ -;/* */ -;/* FUNCTION RELEASE */ -;/* */ -;/* _tx_thread_interrupt_disable Cortex-M4/AC5 */ -;/* 6.1 */ -;/* AUTHOR */ -;/* */ -;/* William E. Lamie, Microsoft Corporation */ -;/* */ -;/* DESCRIPTION */ -;/* */ -;/* This function is responsible for disabling interrupts and returning */ -;/* the previous interrupt lockout posture. */ -;/* */ -;/* INPUT */ -;/* */ -;/* old_posture Old interrupt lockout posture */ -;/* */ -;/* OUTPUT */ -;/* */ -;/* None */ -;/* */ -;/* CALLS */ -;/* */ -;/* None */ -;/* */ -;/* CALLED BY */ -;/* */ -;/* Application Code */ -;/* */ -;/* RELEASE HISTORY */ -;/* */ -;/* DATE NAME DESCRIPTION */ -;/* */ -;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -;/* */ -;/**************************************************************************/ -;UINT _tx_thread_interrupt_disable(UINT new_posture) -;{ +/**************************************************************************/ +/* */ +/* FUNCTION RELEASE */ +/* */ +/* _tx_thread_interrupt_disable Cortex-M4/AC5 */ +/* 6.1.2 */ +/* AUTHOR */ +/* */ +/* William E. Lamie, Microsoft Corporation */ +/* */ +/* DESCRIPTION */ +/* */ +/* This function is responsible for disabling interrupts and returning */ +/* the previous interrupt lockout posture. */ +/* */ +/* INPUT */ +/* */ +/* old_posture Old interrupt lockout posture */ +/* */ +/* OUTPUT */ +/* */ +/* None */ +/* */ +/* CALLS */ +/* */ +/* None */ +/* */ +/* CALLED BY */ +/* */ +/* Application Code */ +/* */ +/* RELEASE HISTORY */ +/* */ +/* DATE NAME DESCRIPTION */ +/* */ +/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 11-09-2020 Scott Larson Modified comment(s), */ +/* resulting in version 6.1.2 */ +/* */ +/**************************************************************************/ +// UINT _tx_thread_interrupt_disable(UINT new_posture) +// { EXPORT _tx_thread_interrupt_disable _tx_thread_interrupt_disable -; -; /* Return current interrupt lockout posture. */ -; + + /* Return current interrupt lockout posture. */ + MRS r0, PRIMASK CPSID i BX lr -; -;} + +// } END diff --git a/ports_module/cortex-m4/ac5/module_manager/src/tx_thread_interrupt_restore.S b/ports_module/cortex-m4/ac5/module_manager/src/tx_thread_interrupt_restore.S index 0f52527b..9287a2e8 100644 --- a/ports_module/cortex-m4/ac5/module_manager/src/tx_thread_interrupt_restore.S +++ b/ports_module/cortex-m4/ac5/module_manager/src/tx_thread_interrupt_restore.S @@ -1,74 +1,75 @@ -;/**************************************************************************/ -;/* */ -;/* Copyright (c) Microsoft Corporation. All rights reserved. */ -;/* */ -;/* This software is licensed under the Microsoft Software License */ -;/* Terms for Microsoft Azure RTOS. Full text of the license can be */ -;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ -;/* and in the root directory of this software. */ -;/* */ -;/**************************************************************************/ -; -; -;/**************************************************************************/ -;/**************************************************************************/ -;/** */ -;/** ThreadX Component */ -;/** */ -;/** Thread */ -;/** */ -;/**************************************************************************/ -;/**************************************************************************/ -; -; +/**************************************************************************/ +/* */ +/* Copyright (c) Microsoft Corporation. All rights reserved. */ +/* */ +/* This software is licensed under the Microsoft Software License */ +/* Terms for Microsoft Azure RTOS. Full text of the license can be */ +/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ +/* and in the root directory of this software. */ +/* */ +/**************************************************************************/ + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ThreadX Component */ +/** */ +/** Thread */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + AREA ||.text||, CODE, READONLY -;/**************************************************************************/ -;/* */ -;/* FUNCTION RELEASE */ -;/* */ -;/* _tx_thread_interrupt_restore Cortex-M4/AC5 */ -;/* 6.1 */ -;/* AUTHOR */ -;/* */ -;/* William E. Lamie, Microsoft Corporation */ -;/* */ -;/* DESCRIPTION */ -;/* */ -;/* This function is responsible for restoring the previous */ -;/* interrupt lockout posture. */ -;/* */ -;/* INPUT */ -;/* */ -;/* None */ -;/* */ -;/* OUTPUT */ -;/* */ -;/* previous_posture Previous interrupt posture */ -;/* */ -;/* CALLS */ -;/* */ -;/* None */ -;/* */ -;/* CALLED BY */ -;/* */ -;/* Application Code */ -;/* */ -;/* RELEASE HISTORY */ -;/* */ -;/* DATE NAME DESCRIPTION */ -;/* */ -;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -;/* */ -;/**************************************************************************/ -;VOID _tx_thread_interrupt_restore(UINT new_posture) -;{ +/**************************************************************************/ +/* */ +/* FUNCTION RELEASE */ +/* */ +/* _tx_thread_interrupt_restore Cortex-M4/AC5 */ +/* 6.1.2 */ +/* AUTHOR */ +/* */ +/* William E. Lamie, Microsoft Corporation */ +/* */ +/* DESCRIPTION */ +/* */ +/* This function is responsible for restoring the previous */ +/* interrupt lockout posture. */ +/* */ +/* INPUT */ +/* */ +/* None */ +/* */ +/* OUTPUT */ +/* */ +/* previous_posture Previous interrupt posture */ +/* */ +/* CALLS */ +/* */ +/* None */ +/* */ +/* CALLED BY */ +/* */ +/* Application Code */ +/* */ +/* RELEASE HISTORY */ +/* */ +/* DATE NAME DESCRIPTION */ +/* */ +/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 11-09-2020 Scott Larson Modified comment(s), */ +/* resulting in version 6.1.2 */ +/* */ +/**************************************************************************/ +// VOID _tx_thread_interrupt_restore(UINT new_posture) +// { EXPORT _tx_thread_interrupt_restore _tx_thread_interrupt_restore -; -; /* Restore previous interrupt lockout posture. */ -; + + /* Restore previous interrupt lockout posture. */ + MSR PRIMASK, r0 BX lr -; -;} + +// } END diff --git a/ports_module/cortex-m4/ac5/module_manager/src/tx_thread_schedule.S b/ports_module/cortex-m4/ac5/module_manager/src/tx_thread_schedule.S index 820c5758..4e29fd2c 100644 --- a/ports_module/cortex-m4/ac5/module_manager/src/tx_thread_schedule.S +++ b/ports_module/cortex-m4/ac5/module_manager/src/tx_thread_schedule.S @@ -1,30 +1,28 @@ -;/**************************************************************************/ -;/* */ -;/* Copyright (c) Microsoft Corporation. All rights reserved. */ -;/* */ -;/* This software is licensed under the Microsoft Software License */ -;/* Terms for Microsoft Azure RTOS. Full text of the license can be */ -;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ -;/* and in the root directory of this software. */ -;/* */ -;/**************************************************************************/ -; -; -;/**************************************************************************/ -;/**************************************************************************/ -;/** */ -;/** ThreadX Component */ -;/** */ -;/** Thread */ -;/** */ -;/**************************************************************************/ -;/**************************************************************************/ -; -; +/**************************************************************************/ +/* */ +/* Copyright (c) Microsoft Corporation. All rights reserved. */ +/* */ +/* This software is licensed under the Microsoft Software License */ +/* Terms for Microsoft Azure RTOS. Full text of the license can be */ +/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ +/* and in the root directory of this software. */ +/* */ +/**************************************************************************/ + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ThreadX Component */ +/** */ +/** Thread */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + IMPORT _tx_thread_current_ptr IMPORT _tx_thread_execute_ptr IMPORT _tx_timer_time_slice - IMPORT _tx_thread_system_stack_ptr IF :DEF: TX_ENABLE_EXECUTION_CHANGE_NOTIFY IMPORT _tx_execution_thread_enter IMPORT _tx_execution_thread_exit @@ -34,418 +32,409 @@ IMPORT _txm_module_manager_memory_fault_info IMPORT _txm_module_priv IMPORT _txm_module_user_mode_exit -; -; + AREA ||.text||, CODE, READONLY THUMB -;/**************************************************************************/ -;/* */ -;/* FUNCTION RELEASE */ -;/* */ -;/* _tx_thread_schedule Cortex-M4/MPU/AC5 */ -;/* 6.1 */ -;/* AUTHOR */ -;/* */ -;/* Scott Larson, Microsoft Corporation */ -;/* */ -;/* DESCRIPTION */ -;/* */ -;/* This function waits for a thread control block pointer to appear in */ -;/* the _tx_thread_execute_ptr variable. Once a thread pointer appears */ -;/* in the variable, the corresponding thread is resumed. */ -;/* */ -;/* INPUT */ -;/* */ -;/* None */ -;/* */ -;/* OUTPUT */ -;/* */ -;/* None */ -;/* */ -;/* CALLS */ -;/* */ -;/* None */ -;/* */ -;/* CALLED BY */ -;/* */ -;/* _tx_initialize_kernel_enter ThreadX entry function */ -;/* _tx_thread_system_return Return to system from thread */ -;/* _tx_thread_context_restore Restore thread's context */ -;/* */ -;/* RELEASE HISTORY */ -;/* */ -;/* DATE NAME DESCRIPTION */ -;/* */ -;/* 09-30-2020 Scott Larson Initial Version 6.1 */ -;/* */ -;/**************************************************************************/ -;VOID _tx_thread_schedule(VOID) -;{ +/**************************************************************************/ +/* */ +/* FUNCTION RELEASE */ +/* */ +/* _tx_thread_schedule Cortex-M4/MPU/AC5 */ +/* 6.1.2 */ +/* AUTHOR */ +/* */ +/* Scott Larson, Microsoft Corporation */ +/* */ +/* DESCRIPTION */ +/* */ +/* This function waits for a thread control block pointer to appear in */ +/* the _tx_thread_execute_ptr variable. Once a thread pointer appears */ +/* in the variable, the corresponding thread is resumed. */ +/* */ +/* INPUT */ +/* */ +/* None */ +/* */ +/* OUTPUT */ +/* */ +/* None */ +/* */ +/* CALLS */ +/* */ +/* None */ +/* */ +/* CALLED BY */ +/* */ +/* _tx_initialize_kernel_enter ThreadX entry function */ +/* _tx_thread_system_return Return to system from thread */ +/* _tx_thread_context_restore Restore thread's context */ +/* */ +/* RELEASE HISTORY */ +/* */ +/* DATE NAME DESCRIPTION */ +/* */ +/* 09-30-2020 Scott Larson Initial Version 6.1 */ +/* 11-09-2020 Scott Larson Modified comment(s), arrange */ +/* code to fix link error when */ +/* VFP is enabled, resulting */ +/* in version 6.1.2 */ +/* */ +/**************************************************************************/ +// VOID _tx_thread_schedule(VOID) +// { EXPORT _tx_thread_schedule _tx_thread_schedule -; -; /* This function should only ever be called on Cortex-M -; from the first schedule request. Subsequent scheduling occurs -; from the PendSV handling routines below. */ -; -; /* Clear the preempt-disable flag to enable rescheduling after initialization on Cortex-M targets. */ -; - MOV r0, #0 ; Build value for TX_FALSE - LDR r2, =_tx_thread_preempt_disable ; Build address of preempt disable flag - STR r0, [r2, #0] ; Clear preempt disable flag -; -; /* Clear CONTROL.FPCA bit so FPU registers aren't unnecessarily stacked. */ -; - IF :DEF: __ARMVFP__ - MRS r0, CONTROL ; Pickup current CONTROL register - BIC r0, r0, #4 ; Clear the FPCA bit - MSR CONTROL, r0 ; Setup new CONTROL register - ENDIF -; -; /* Enable memory fault registers. */ -; - LDR r0, =0xE000ED24 ; Build SHCSR address - LDR r1, =0x70000 ; Enable Usage, Bus, and MemManage faults - STR r1, [r0] ; -; -; /* Enable interrupts */ -; - CPSIE i -; -; /* Enter the scheduler for the first time. */ -; - MOV r0, #0x10000000 ; Load PENDSVSET bit - MOV r1, #0xE000E000 ; Load NVIC base - STR r0, [r1, #0xD04] ; Set PENDSVBIT in ICSR - DSB ; Complete all memory accesses - ISB ; Flush pipeline -; /* Wait here for the PendSV to take place. */ + /* This function should only ever be called on Cortex-M + from the first schedule request. Subsequent scheduling occurs + from the PendSV handling routines below. */ + + /* Clear the preempt-disable flag to enable rescheduling after initialization on Cortex-M targets. */ + + MOV r0, #0 // Build value for TX_FALSE + LDR r2, =_tx_thread_preempt_disable // Build address of preempt disable flag + STR r0, [r2, #0] // Clear preempt disable flag + + /* Clear CONTROL.FPCA bit so FPU registers aren't unnecessarily stacked. */ + + IF {TARGET_FPU_VFP} = {TRUE} + MRS r0, CONTROL // Pickup current CONTROL register + BIC r0, r0, #4 // Clear the FPCA bit + MSR CONTROL, r0 // Setup new CONTROL register + ENDIF + + /* Enable memory fault registers. */ + + LDR r0, =0xE000ED24 // Build SHCSR address + LDR r1, =0x70000 // Enable Usage, Bus, and MemManage faults + STR r1, [r0] // + + /* Enable interrupts */ + + CPSIE i + + /* Enter the scheduler for the first time. */ + + MOV r0, #0x10000000 // Load PENDSVSET bit + MOV r1, #0xE000E000 // Load NVIC base + STR r0, [r1, #0xD04] // Set PENDSVBIT in ICSR + DSB // Complete all memory accesses + ISB // Flush pipeline + + /* Wait here for the PendSV to take place. */ __tx_wait_here - B __tx_wait_here ; Wait for the PendSV to happen -;} -; + B __tx_wait_here // Wait for the PendSV to happen +// } + + + /* Memory Exception Handler. */ -; -; /* Memory Exception Handler. */ -; EXPORT MemManage_Handler MemManage_Handler -;{ - CPSID i ; Disable interrupts -; -; /* Now pickup and store all the fault related information. */ -; - LDR r12,=_txm_module_manager_memory_fault_info ; Pickup fault info struct - LDR r0, =_tx_thread_current_ptr ; Build current thread pointer address - LDR r1, [r0] ; Pickup the current thread pointer - STR r1, [r12, #0] ; Save current thread pointer in fault info structure - LDR r0, =0xE000ED24 ; Build SHCSR address - LDR r1, [r0] ; Pickup SHCSR - STR r1, [r12, #8] ; Save SHCSR - LDR r0, =0xE000ED28 ; Build CFSR address - LDR r1, [r0] ; Pickup CFSR - STR r1, [r12, #12] ; Save CFSR - LDR r0, =0xE000ED34 ; Build MMFAR address - LDR r1, [r0] ; Pickup MMFAR - STR r1, [r12, #16] ; Save MMFAR - LDR r0, =0xE000ED38 ; Build BFAR address - LDR r1, [r0] ; Pickup BFAR - STR r1, [r12, #20] ; Save BFAR - MRS r0, CONTROL ; Pickup current CONTROL register - STR r0, [r12, #24] ; Save CONTROL - MRS r1, PSP ; Pickup thread stack pointer - STR r1, [r12, #28] ; Save thread stack pointer - LDR r0, [r1] ; Pickup saved r0 - STR r0, [r12, #32] ; Save r0 - LDR r0, [r1, #4] ; Pickup saved r1 - STR r0, [r12, #36] ; Save r1 - STR r2, [r12, #40] ; Save r2 - STR r3, [r12, #44] ; Save r3 - STR r4, [r12, #48] ; Save r4 - STR r5, [r12, #52] ; Save r5 - STR r6, [r12, #56] ; Save r6 - STR r7, [r12, #60] ; Save r7 - STR r8, [r12, #64] ; Save r8 - STR r9, [r12, #68] ; Save r9 - STR r10,[r12, #72] ; Save r10 - STR r11,[r12, #76] ; Save r11 - LDR r0, [r1, #16] ; Pickup saved r12 - STR r0, [r12, #80] ; Save r12 - LDR r0, [r1, #20] ; Pickup saved lr - STR r0, [r12, #84] ; Save lr - LDR r0, [r1, #24] ; Pickup instruction address at point of fault - STR r0, [r12, #4] ; Save point of fault - LDR r0, [r1, #28] ; Pickup xPSR - STR r0, [r12, #88] ; Save xPSR - MRS r0, CONTROL ; Pickup current CONTROL register - BIC r0, r0, #1 ; Clear the UNPRIV bit - MSR CONTROL, r0 ; Setup new CONTROL register + CPSID i // Disable interrupts - LDR r0, =0xE000ED28 ; Build the Memory Management Fault Status Register (MMFSR) - LDRB r1, [r0] ; Pickup the MMFSR, with the following bit definitions: - ; Bit 0 = 1 -> Instruction address violation - ; Bit 1 = 1 -> Load/store address violation - ; Bit 7 = 1 -> MMFAR is valid - STRB r1, [r0] ; Clear the MMFSR + /* Now pickup and store all the fault related information. */ - IF :DEF: __ARMVFP__ - LDR r0, =0xE000EF34 ; Cleanup FPU context: Load FPCCR address - LDR r1, [r0] ; Load FPCCR - BIC r1, r1, #1 ; Clear the lazy preservation active bit - STR r1, [r0] ; Store the value + LDR r12,=_txm_module_manager_memory_fault_info // Pickup fault info struct + LDR r0, =_tx_thread_current_ptr // Build current thread pointer address + LDR r1, [r0] // Pickup the current thread pointer + STR r1, [r12, #0] // Save current thread pointer in fault info structure + LDR r0, =0xE000ED24 // Build SHCSR address + LDR r1, [r0] // Pickup SHCSR + STR r1, [r12, #8] // Save SHCSR + LDR r0, =0xE000ED28 // Build CFSR address + LDR r1, [r0] // Pickup CFSR + STR r1, [r12, #12] // Save CFSR + LDR r0, =0xE000ED34 // Build MMFAR address + LDR r1, [r0] // Pickup MMFAR + STR r1, [r12, #16] // Save MMFAR + LDR r0, =0xE000ED38 // Build BFAR address + LDR r1, [r0] // Pickup BFAR + STR r1, [r12, #20] // Save BFAR + MRS r0, CONTROL // Pickup current CONTROL register + STR r0, [r12, #24] // Save CONTROL + MRS r1, PSP // Pickup thread stack pointer + STR r1, [r12, #28] // Save thread stack pointer + LDR r0, [r1] // Pickup saved r0 + STR r0, [r12, #32] // Save r0 + LDR r0, [r1, #4] // Pickup saved r1 + STR r0, [r12, #36] // Save r1 + STR r2, [r12, #40] // Save r2 + STR r3, [r12, #44] // Save r3 + STR r4, [r12, #48] // Save r4 + STR r5, [r12, #52] // Save r5 + STR r6, [r12, #56] // Save r6 + STR r7, [r12, #60] // Save r7 + STR r8, [r12, #64] // Save r8 + STR r9, [r12, #68] // Save r9 + STR r10,[r12, #72] // Save r10 + STR r11,[r12, #76] // Save r11 + LDR r0, [r1, #16] // Pickup saved r12 + STR r0, [r12, #80] // Save r12 + LDR r0, [r1, #20] // Pickup saved lr + STR r0, [r12, #84] // Save lr + LDR r0, [r1, #24] // Pickup instruction address at point of fault + STR r0, [r12, #4] // Save point of fault + LDR r0, [r1, #28] // Pickup xPSR + STR r0, [r12, #88] // Save xPSR + + MRS r0, CONTROL // Pickup current CONTROL register + BIC r0, r0, #1 // Clear the UNPRIV bit + MSR CONTROL, r0 // Setup new CONTROL register + + LDR r0, =0xE000ED28 // Build the Memory Management Fault Status Register (MMFSR) + LDRB r1, [r0] // Pickup the MMFSR, with the following bit definitions: + // Bit 0 = 1 -> Instruction address violation + // Bit 1 = 1 -> Load/store address violation + // Bit 7 = 1 -> MMFAR is valid + STRB r1, [r0] // Clear the MMFSR + + IF {TARGET_FPU_VFP} = {TRUE} + LDR r0, =0xE000EF34 // Cleanup FPU context: Load FPCCR address + LDR r1, [r0] // Load FPCCR + BIC r1, r1, #1 // Clear the lazy preservation active bit + STR r1, [r0] // Store the value ENDIF - BL _txm_module_manager_memory_fault_handler ; Call memory manager fault handler + BL _txm_module_manager_memory_fault_handler // Call memory manager fault handler IF :DEF: TX_ENABLE_EXECUTION_CHANGE_NOTIFY -; -; /* Call the thread exit function to indicate the thread is no longer executing. */ -; - CPSID i ; Disable interrupts - BL _tx_execution_thread_exit ; Call the thread exit function - CPSIE i ; Enable interrupts + /* Call the thread exit function to indicate the thread is no longer executing. */ + CPSID i // Disable interrupts + BL _tx_execution_thread_exit // Call the thread exit function + CPSIE i // Enable interrupts ENDIF - MOV r1, #0 ; Build NULL value - LDR r0, =_tx_thread_current_ptr ; Pickup address of current thread pointer - STR r1, [r0] ; Clear current thread pointer + MOV r1, #0 // Build NULL value + LDR r0, =_tx_thread_current_ptr // Pickup address of current thread pointer + STR r1, [r0] // Clear current thread pointer - ; Return from MemManage_Handler exception - LDR r0, =0xE000ED04 ; Load ICSR - LDR r1, =0x10000000 ; Set PENDSVSET bit - STR r1, [r0] ; Store ICSR - DSB ; Wait for memory access to complete - CPSIE i ; Enable interrupts - MOV lr, #0xFFFFFFFD ; Load exception return code - BX lr ; Return from exception -;} + // Return from MemManage_Handler exception + LDR r0, =0xE000ED04 // Load ICSR + LDR r1, =0x10000000 // Set PENDSVSET bit + STR r1, [r0] // Store ICSR + DSB // Wait for memory access to complete + CPSIE i // Enable interrupts + MOV lr, #0xFFFFFFFD // Load exception return code + BX lr // Return from exception + + + /* Generic context PendSV handler. */ -; -; /* Generic context PendSV handler. */ -; EXPORT PendSV_Handler EXPORT __tx_PendSVHandler PendSV_Handler __tx_PendSVHandler -; -; /* Get current thread value and new thread pointer. */ -; + + /* Get current thread value and new thread pointer. */ + __tx_ts_handler IF :DEF: TX_ENABLE_EXECUTION_CHANGE_NOTIFY -; -; /* Call the thread exit function to indicate the thread is no longer executing. */ -; - CPSID i ; Disable interrupts - PUSH {r0, lr} ; Save LR (and r0 just for alignment) - BL _tx_execution_thread_exit ; Call the thread exit function - POP {r0, lr} ; Recover LR - CPSIE i ; Enable interrupts + /* Call the thread exit function to indicate the thread is no longer executing. */ + CPSID i // Disable interrupts + PUSH {r0, lr} // Save LR (and r0 just for alignment) + BL _tx_execution_thread_exit // Call the thread exit function + POP {r0, lr} // Recover LR + CPSIE i // Enable interrupts ENDIF - MOV32 r0, _tx_thread_current_ptr ; Build current thread pointer address - MOV32 r2, _tx_thread_execute_ptr ; Build execute thread pointer address - MOV r3, #0 ; Build NULL value - LDR r1, [r0] ; Pickup current thread pointer -; -; /* Determine if there is a current thread to finish preserving. */ -; - CBZ r1, __tx_ts_new ; If NULL, skip preservation -; -; /* Recover PSP and preserve current thread context. */ -; - STR r3, [r0] ; Set _tx_thread_current_ptr to NULL - MRS r12, PSP ; Pickup PSP pointer (thread's stack pointer) - STMDB r12!, {r4-r11} ; Save its remaining registers - IF :DEF: __ARMVFP__ - TST LR, #0x10 ; Determine if the VFP extended frame is present + + LDR r0, =_tx_thread_current_ptr // Build current thread pointer address + LDR r2, =_tx_thread_execute_ptr // Build execute thread pointer address + MOV r3, #0 // Build NULL value + LDR r1, [r0] // Pickup current thread pointer + + /* Determine if there is a current thread to finish preserving. */ + + CBZ r1, __tx_ts_new // If NULL, skip preservation + + /* Recover PSP and preserve current thread context. */ + + STR r3, [r0] // Set _tx_thread_current_ptr to NULL + MRS r12, PSP // Pickup PSP pointer (thread's stack pointer) + STMDB r12!, {r4-r11} // Save its remaining registers + IF {TARGET_FPU_VFP} = {TRUE} + TST LR, #0x10 // Determine if the VFP extended frame is present BNE _skip_vfp_save - VSTMDB r12!,{s16-s31} ; Yes, save additional VFP registers + VSTMDB r12!,{s16-s31} // Yes, save additional VFP registers _skip_vfp_save ENDIF - MOV32 r4, _tx_timer_time_slice ; Build address of time-slice variable - STMDB r12!, {LR} ; Save LR on the stack -; -; /* Determine if time-slice is active. If it isn't, skip time handling processing. */ -; - LDR r5, [r4] ; Pickup current time-slice - STR r12, [r1, #8] ; Save the thread stack pointer - CBZ r5, __tx_ts_new ; If not active, skip processing -; -; /* Time-slice is active, save the current thread's time-slice and clear the global time-slice variable. */ -; - STR r5, [r1, #24] ; Save current time-slice -; -; /* Clear the global time-slice. */ -; - STR r3, [r4] ; Clear time-slice -; -; /* Executing thread is now completely preserved!!! */ -; + LDR r4, =_tx_timer_time_slice // Build address of time-slice variable + STMDB r12!, {LR} // Save LR on the stack + + /* Determine if time-slice is active. If it isn't, skip time handling processing. */ + + LDR r5, [r4] // Pickup current time-slice + STR r12, [r1, #8] // Save the thread stack pointer + CBZ r5, __tx_ts_new // If not active, skip processing + + /* Time-slice is active, save the current thread's time-slice and clear the global time-slice variable. */ + + STR r5, [r1, #24] // Save current time-slice + + /* Clear the global time-slice. */ + + STR r3, [r4] // Clear time-slice + + /* Executing thread is now completely preserved!!! */ + __tx_ts_new -; -; /* Now we are looking for a new thread to execute! */ -; - CPSID i ; Disable interrupts - LDR r1, [r2] ; Is there another thread ready to execute? - CBZ r1, __tx_ts_wait ; No, skip to the wait processing -; -; /* Yes, another thread is ready for else, make the current thread the new thread. */ -; - STR r1, [r0] ; Setup the current thread pointer to the new thread - CPSIE i ; Enable interrupts -; -; /* Increment the thread run count. */ -; + + /* Now we are looking for a new thread to execute! */ + + CPSID i // Disable interrupts + LDR r1, [r2] // Is there another thread ready to execute? + CBNZ r1, __tx_ts_restore // Yes, schedule it + + /* The following is the idle wait processing... in this case, no threads are ready for execution and the + system will simply be idle until an interrupt occurs that makes a thread ready. Note that interrupts + are disabled to allow use of WFI for waiting for a thread to arrive. */ + +__tx_ts_wait + CPSID i // Disable interrupts + LDR r1, [r2] // Pickup the next thread to execute pointer + CBNZ r1, __tx_ts_ready // If non-NULL, a new thread is ready! +#ifdef TX_ENABLE_WFI + DSB // Ensure no outstanding memory transactions + WFI // Wait for interrupt + ISB // Ensure pipeline is flushed +#endif + CPSIE i // Enable interrupts + B __tx_ts_wait // Loop to continue waiting + + /* At this point, we have a new thread ready to go. Clear any newly pended PendSV - since we are + already in the handler! */ + +__tx_ts_ready + MOV r7, #0x08000000 // Build clear PendSV value + MOV r8, #0xE000E000 // Build base NVIC address + STR r7, [r8, #0xD04] // Clear any PendSV + __tx_ts_restore - LDR r7, [r1, #4] ; Pickup the current thread run count - MOV32 r4, _tx_timer_time_slice ; Build address of time-slice variable - LDR r5, [r1, #24] ; Pickup thread's current time-slice - ADD r7, r7, #1 ; Increment the thread run count - STR r7, [r1, #4] ; Store the new run count -; -; /* Setup global time-slice with thread's current time-slice. */ -; - STR r5, [r4] ; Setup global time-slice + + /* A thread is ready, make the current thread the new thread + and enable interrupts. */ + + STR r1, [r0] // Setup the current thread pointer to the new thread + CPSIE i // Enable interrupts + + /* Increment the thread run count. */ + + LDR r7, [r1, #4] // Pickup the current thread run count + LDR r4, =_tx_timer_time_slice // Build address of time-slice variable + LDR r5, [r1, #24] // Pickup thread's current time-slice + ADD r7, r7, #1 // Increment the thread run count + STR r7, [r1, #4] // Store the new run count + + /* Setup global time-slice with thread's current time-slice. */ + + STR r5, [r4] // Setup global time-slice IF :DEF: TX_ENABLE_EXECUTION_CHANGE_NOTIFY -; -; /* Call the thread entry function to indicate the thread is executing. */ -; - PUSH {r0, r1} ; Save r0 and r1 - BL _tx_execution_thread_enter ; Call the thread execution enter function - POP {r0, r1} ; Recover r0 and r1 + /* Call the thread entry function to indicate the thread is executing. */ + PUSH {r0, r1} // Save r0 and r1 + BL _tx_execution_thread_enter // Call the thread execution enter function + POP {r0, r1} // Recover r0 and r1 ENDIF -; -; /* Restore the thread context and PSP. */ -; - LDR r12, [r1, #8] ; Pickup thread's stack pointer - MRS r5, CONTROL ; Pickup current CONTROL register - LDR r4, [r1, #0x98] ; Pickup current user mode flag - BIC r5, r5, #1 ; Clear the UNPRIV bit - ORR r4, r4, r5 ; Build new CONTROL register - MSR CONTROL, r4 ; Setup new CONTROL register + /* Restore the thread context and PSP. */ - LDR r0, =0xE000ED94 ; Build MPU control reg address - MOV r3, #0 ; Build disable value - STR r3, [r0] ; Disable MPU - LDR r0, [r1, #0x90] ; Pickup the module instance pointer - CBZ r0, skip_mpu_setup ; Is this thread owned by a module? No, skip MPU setup - LDR r1, [r0, #0x64] ; Pickup MPU register[0] - CBZ r1, skip_mpu_setup ; Is protection required for this module? No, skip MPU setup - LDR r1, =0xE000ED9C ; Build address of MPU base register + LDR r12, [r1, #8] // Pickup thread's stack pointer - ; Use alias registers to quickly load MPU - ADD r0, r0, #100 ; Build address of MPU register start in thread control block - LDM r0!,{r2-r9} ; Load MPU regions 0-3 - STM r1,{r2-r9} ; Store MPU regions 0-3 - LDM r0!,{r2-r9} ; Load MPU regions 4-7 - STM r1,{r2-r9} ; Store MPU regions 4-7 - LDR r0, =0xE000ED94 ; Build MPU control reg address - MOV r1, #5 ; Build enable value with background region enabled - STR r1, [r0] ; Enable MPU + MRS r5, CONTROL // Pickup current CONTROL register + LDR r4, [r1, #0x98] // Pickup current user mode flag + BIC r5, r5, #1 // Clear the UNPRIV bit + ORR r4, r4, r5 // Build new CONTROL register + MSR CONTROL, r4 // Setup new CONTROL register + + LDR r0, =0xE000ED94 // Build MPU control reg address + MOV r3, #0 // Build disable value + STR r3, [r0] // Disable MPU + LDR r0, [r1, #0x90] // Pickup the module instance pointer + CBZ r0, skip_mpu_setup // Is this thread owned by a module? No, skip MPU setup + LDR r1, [r0, #0x64] // Pickup MPU register[0] + CBZ r1, skip_mpu_setup // Is protection required for this module? No, skip MPU setup + LDR r1, =0xE000ED9C // Build address of MPU base register + + // Use alias registers to quickly load MPU + ADD r0, r0, #100 // Build address of MPU register start in thread control block + LDM r0!,{r2-r9} // Load first four MPU regions + STM r1,{r2-r9} // Store first four MPU regions + LDM r0,{r2-r9} // Load second four MPU regions + STM r1,{r2-r9} // Store second four MPU regions + LDR r0, =0xE000ED94 // Build MPU control reg address + MOV r1, #5 // Build enable value with background region enabled + STR r1, [r0] // Enable MPU skip_mpu_setup - LDMIA r12!, {LR} ; Pickup LR - IF :DEF: __ARMVFP__ - TST LR, #0x10 ; Determine if the VFP extended frame is present - BNE _skip_vfp_restore ; If not, skip VFP restore - VLDMIA r12!, {s16-s31} ; Yes, restore additional VFP registers + LDMIA r12!, {LR} // Pickup LR + IF {TARGET_FPU_VFP} = {TRUE} + TST LR, #0x10 // Determine if the VFP extended frame is present + BNE _skip_vfp_restore // If not, skip VFP restore + VLDMIA r12!, {s16-s31} // Yes, restore additional VFP registers _skip_vfp_restore ENDIF - LDMIA r12!, {r4-r11} ; Recover thread's registers - MSR PSP, r12 ; Setup the thread's stack pointer -; -; /* Return to thread. */ -; - BX lr ; Return to thread! -; -; /* The following is the idle wait processing... in this case, no threads are ready for execution and the -; system will simply be idle until an interrupt occurs that makes a thread ready. Note that interrupts -; are disabled to allow use of WFI for waiting for a thread to arrive. */ -; -__tx_ts_wait - CPSID i ; Disable interrupts - LDR r1, [r2] ; Pickup the next thread to execute pointer - STR r1, [r0] ; Store it in the current pointer - CBNZ r1, __tx_ts_ready ; If non-NULL, a new thread is ready! - IF :DEF:TX_ENABLE_WFI - DSB ; Ensure no outstanding memory transactions - WFI ; Wait for interrupt - ISB ; Ensure pipeline is flushed - ENDIF - CPSIE i ; Enable interrupts - B __tx_ts_wait ; Loop to continue waiting -; -; /* At this point, we have a new thread ready to go. Clear any newly pended PendSV - since we are -; already in the handler! */ -; -__tx_ts_ready - MOV r7, #0x08000000 ; Build clear PendSV value - MOV r8, #0xE000E000 ; Build base NVIC address - STR r7, [r8, #0xD04] ; Clear any PendSV -; -; /* Re-enable interrupts and restore new thread. */ -; - CPSIE i ; Enable interrupts - B __tx_ts_restore ; Restore the thread -;} + LDMIA r12!, {r4-r11} // Recover thread's registers + MSR PSP, r12 // Setup the thread's stack pointer + + /* Return to thread. */ + + BX lr // Return to thread! + + + /* SVC Handler. */ -; -; /* SVC Handler. */ -; EXPORT SVC_Handler EXPORT __tx_SVCallHandler SVC_Handler __tx_SVCallHandler -;{ - MRS r0, PSP ; Pickup the PSP stack - LDR r1, [r0, #24] ; Pickup the point of interrupt - LDRB r2, [r1, #-2] ; Pickup the SVC parameter - ; - ; Determine which SVC trap we are processing - ; - CMP r2, #1 ; Is it the entry into ThreadX? - BNE _tx_thread_user_return ; No, return to user mode - ; - ; At this point we have an SVC 1, which means we are entering the kernel from a module thread with user mode selected - ; - LDR r2, =_txm_module_priv ; Subtract 1 because of THUMB mode. - SUB r2, r2, #1 ; Temporary fix until ARM describes how to load label above correctly. - CMP r1, r2 ; Did we come from user_mode_entry? - IT NE ; If no (not equal), then... - BXNE lr ; return from where we came. + MRS r0, PSP // Pickup the PSP stack + LDR r1, [r0, #24] // Pickup the point of interrupt + LDRB r2, [r1, #-2] // Pickup the SVC parameter - LDR r3, [r0, #20] ; This is the saved LR - LDR r1, =_tx_thread_current_ptr ; Build current thread pointer address - LDR r2, [r1] ; Pickup current thread pointer - MOV r1, #0 ; Build clear value - STR r1, [r2, #0x98] ; Clear the current user mode selection for thread - STR r3, [r2, #0xA0] ; Save the original LR in thread control block + /* Determine which SVC trap we are processing */ - ; If there is memory protection, use kernel stack - LDR r0, [r2, #0x90] ; Load the module instance ptr - LDR r0, [r0, #0x0C] ; Load the module property flags - TST r0, #2 ; Check if memory protected + CMP r2, #1 // Is it the entry into ThreadX? + BNE _tx_thread_user_return // No, return to user mode + + /* At this point we have an SVC 1, which means we are entering + the kernel from a module thread with user mode selected. */ + + LDR r2, =_txm_module_priv // Load address of where we should have come from + SUB r2, r2, #1 // Subtract 1 because of THUMB mode. + CMP r1, r2 // Did we come from user_mode_entry? + IT NE // If no (not equal), then... + BXNE lr // return from where we came. + + LDR r3, [r0, #20] // This is the saved LR + LDR r1, =_tx_thread_current_ptr // Build current thread pointer address + LDR r2, [r1] // Pickup current thread pointer + MOV r1, #0 // Build clear value + STR r1, [r2, #0x98] // Clear the current user mode selection for thread + STR r3, [r2, #0xA0] // Save the original LR in thread control block + + /* If there is memory protection, use kernel stack */ + LDR r0, [r2, #0x90] // Load the module instance ptr + LDR r0, [r0, #0x0C] // Load the module property flags + TST r0, #2 // Check if memory protected BEQ _tx_skip_kernel_stack_enter - ; Switch to the module thread's kernel stack - LDR r0, [r2, #0xA8] ; Load the module kernel stack end + /* Switch to the module thread's kernel stack */ + LDR r0, [r2, #0xA8] // Load the module kernel stack end IF :LNOT: :DEF: TXM_MODULE_KERNEL_STACK_MAINTENANCE_DISABLE - LDR r1, [r2, #0xA4] ; Load the module kernel stack start - LDR r3, [r2, #0xAC] ; Load the module kernel stack size - STR r1, [r2, #12] ; Set stack start - STR r0, [r2, #16] ; Set stack end - STR r3, [r2, #20] ; Set stack size + LDR r1, [r2, #0xA4] // Load the module kernel stack start + LDR r3, [r2, #0xAC] // Load the module kernel stack size + STR r1, [r2, #12] // Set stack start + STR r0, [r2, #16] // Set stack end + STR r3, [r2, #20] // Set stack size ENDIF - MRS r3, PSP ; Pickup thread stack pointer - STR r3, [r2, #0xB0] ; Save thread stack pointer + MRS r3, PSP // Pickup thread stack pointer + STR r3, [r2, #0xB0] // Save thread stack pointer - ; Build kernel stack by copying thread stack two registers at a time - ADD r3, r3, #32 ; start at bottom of hardware stack + /* Build kernel stack by copying thread stack two registers at a time */ + ADD r3, r3, #32 // Start at bottom of hardware stack LDMDB r3!,{r1-r2} STMDB r0!,{r1-r2} LDMDB r3!,{r1-r2} @@ -455,44 +444,44 @@ __tx_SVCallHandler LDMDB r3!,{r1-r2} STMDB r0!,{r1-r2} - MSR PSP, r0 ; Set kernel stack pointer + MSR PSP, r0 // Set kernel stack pointer _tx_skip_kernel_stack_enter - MRS r0, CONTROL ; Pickup current CONTROL register - BIC r0, r0, #1 ; Clear the UNPRIV bit - MSR CONTROL, r0 ; Setup new CONTROL register - BX lr ; Return to thread + MRS r0, CONTROL // Pickup current CONTROL register + BIC r0, r0, #1 // Clear the UNPRIV bit + MSR CONTROL, r0 // Setup new CONTROL register + BX lr // Return to thread _tx_thread_user_return - LDR r2, =_txm_module_user_mode_exit ; Subtract 1 because of THUMB mode. - SUB r2, r2, #1 ; Temporary fix until ARM describes how to load label above correctly. - CMP r1, r2 ; Did we come from user_mode_exit? - IT NE ; If no (not equal), then... - BXNE lr ; return from where we came + LDR r2, =_txm_module_user_mode_exit // Load address of where we should have come from + SUB r2, r2, #1 // Subtract 1 because of THUMB mode. + CMP r1, r2 // Did we come from user_mode_exit? + IT NE // If no (not equal), then... + BXNE lr // return from where we came - LDR r1, =_tx_thread_current_ptr ; Build current thread pointer address - LDR r2, [r1] ; Pickup current thread pointer - LDR r1, [r2, #0x9C] ; Pick up user mode - STR r1, [r2, #0x98] ; Set the current user mode selection for thread + LDR r1, =_tx_thread_current_ptr // Build current thread pointer address + LDR r2, [r1] // Pickup current thread pointer + LDR r1, [r2, #0x9C] // Pick up user mode + STR r1, [r2, #0x98] // Set the current user mode selection for thread - ; If there is memory protection, use kernel stack - LDR r0, [r2, #0x90] ; Load the module instance ptr - LDR r0, [r0, #0x0C] ; Load the module property flags - TST r0, #2 ; Check if memory protected + /* If there is memory protection, use kernel stack */ + LDR r0, [r2, #0x90] // Load the module instance ptr + LDR r0, [r0, #0x0C] // Load the module property flags + TST r0, #2 // Check if memory protected BEQ _tx_skip_kernel_stack_exit IF :LNOT: :DEF: TXM_MODULE_KERNEL_STACK_MAINTENANCE_DISABLE - LDR r0, [r2, #0xB4] ; Load the module thread stack start - LDR r1, [r2, #0xB8] ; Load the module thread stack end - LDR r3, [r2, #0xBC] ; Load the module thread stack size - STR r0, [r2, #12] ; Set stack start - STR r1, [r2, #16] ; Set stack end - STR r3, [r2, #20] ; Set stack size + LDR r0, [r2, #0xB4] // Load the module thread stack start + LDR r1, [r2, #0xB8] // Load the module thread stack end + LDR r3, [r2, #0xBC] // Load the module thread stack size + STR r0, [r2, #12] // Set stack start + STR r1, [r2, #16] // Set stack end + STR r3, [r2, #20] // Set stack size ENDIF - LDR r0, [r2, #0xB0] ; Load the module thread stack pointer - MRS r3, PSP ; Pickup kernel stack pointer + LDR r0, [r2, #0xB0] // Load the module thread stack pointer + MRS r3, PSP // Pickup kernel stack pointer - ; Copy kernel hardware stack to module thread stack. + /* Copy kernel hardware stack to module thread stack. */ LDM r3!,{r1-r2} STM r0!,{r1-r2} LDM r3!,{r1-r2} @@ -501,38 +490,35 @@ _tx_thread_user_return STM r0!,{r1-r2} LDM r3!,{r1-r2} STM r0!,{r1-r2} - SUB r0, r0, #32 ; Subtract 32 to get back to top of stack - MSR PSP, r0 ; Set thread stack pointer + SUB r0, r0, #32 // Subtract 32 to get back to top of stack + MSR PSP, r0 // Set thread stack pointer - LDR r1, =_tx_thread_current_ptr ; Build current thread pointer address - LDR r2, [r1] ; Pickup current thread pointer - LDR r1, [r2, #0x9C] ; Pick up user mode + LDR r1, =_tx_thread_current_ptr // Build current thread pointer address + LDR r2, [r1] // Pickup current thread pointer + LDR r1, [r2, #0x9C] // Pick up user mode _tx_skip_kernel_stack_exit - MRS r0, CONTROL ; Pickup current CONTROL register - ORR r0, r0, r1 ; OR in the user mode bit - MSR CONTROL, r0 ; Setup new CONTROL register - BX lr ; Return to thread -;} + MRS r0, CONTROL // Pickup current CONTROL register + ORR r0, r0, r1 // OR in the user mode bit + MSR CONTROL, r0 // Setup new CONTROL register + BX lr // Return to thread - IF :DEF: __ARMVFP__ + IF {TARGET_FPU_VFP} = {TRUE} EXPORT tx_thread_fpu_enable tx_thread_fpu_enable -; -; /* Automatic VPF logic is supported, this function is present only for -; backward compatibility purposes and therefore simply returns. */ -; - BX LR ; Return to caller - ENDIF - - IF :DEF: __ARMVFP__ EXPORT tx_thread_fpu_disable tx_thread_fpu_disable -; -; /* Automatic VPF logic is supported, this function is present only for -; backward compatibility purposes and therefore simply returns. */ -; - BX LR ; Return to caller + + /* Automatic VPF logic is supported, this function is present only for + backward compatibility purposes and therefore simply returns. */ + + BX LR // Return to caller + + EXPORT _tx_vfp_access +_tx_vfp_access + VMOV.F32 s0, s0 // Simply access the VFP + BX lr // Return to caller + ENDIF ALIGN 4 diff --git a/ports_module/cortex-m4/ac5/module_manager/src/tx_thread_stack_build.S b/ports_module/cortex-m4/ac5/module_manager/src/tx_thread_stack_build.S index f548938b..0ccd8d6f 100644 --- a/ports_module/cortex-m4/ac5/module_manager/src/tx_thread_stack_build.S +++ b/ports_module/cortex-m4/ac5/module_manager/src/tx_thread_stack_build.S @@ -1,133 +1,133 @@ -;/**************************************************************************/ -;/* */ -;/* Copyright (c) Microsoft Corporation. All rights reserved. */ -;/* */ -;/* This software is licensed under the Microsoft Software License */ -;/* Terms for Microsoft Azure RTOS. Full text of the license can be */ -;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ -;/* and in the root directory of this software. */ -;/* */ -;/**************************************************************************/ -; -; -;/**************************************************************************/ -;/**************************************************************************/ -;/** */ -;/** ThreadX Component */ -;/** */ -;/** Thread */ -;/** */ -;/**************************************************************************/ -;/**************************************************************************/ -; -; +/**************************************************************************/ +/* */ +/* Copyright (c) Microsoft Corporation. All rights reserved. */ +/* */ +/* This software is licensed under the Microsoft Software License */ +/* Terms for Microsoft Azure RTOS. Full text of the license can be */ +/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ +/* and in the root directory of this software. */ +/* */ +/**************************************************************************/ + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ThreadX Component */ +/** */ +/** Thread */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + AREA ||.text||, CODE, READONLY -;/**************************************************************************/ -;/* */ -;/* FUNCTION RELEASE */ -;/* */ -;/* _tx_thread_stack_build Cortex-M4/AC5 */ -;/* 6.1 */ -;/* AUTHOR */ -;/* */ -;/* William E. Lamie, Microsoft Corporation */ -;/* */ -;/* DESCRIPTION */ -;/* */ -;/* This function builds a stack frame on the supplied thread's stack. */ -;/* The stack frame results in a fake interrupt return to the supplied */ -;/* function pointer. */ -;/* */ -;/* INPUT */ -;/* */ -;/* thread_ptr Pointer to thread control blk */ -;/* function_ptr Pointer to return function */ -;/* */ -;/* OUTPUT */ -;/* */ -;/* None */ -;/* */ -;/* CALLS */ -;/* */ -;/* None */ -;/* */ -;/* CALLED BY */ -;/* */ -;/* _tx_thread_create Create thread service */ -;/* */ -;/* RELEASE HISTORY */ -;/* */ -;/* DATE NAME DESCRIPTION */ -;/* */ -;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -;/* */ -;/**************************************************************************/ -;VOID _tx_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(VOID)) -;{ +/**************************************************************************/ +/* */ +/* FUNCTION RELEASE */ +/* */ +/* _tx_thread_stack_build Cortex-M4/AC5 */ +/* 6.1.2 */ +/* AUTHOR */ +/* */ +/* William E. Lamie, Microsoft Corporation */ +/* */ +/* DESCRIPTION */ +/* */ +/* This function builds a stack frame on the supplied thread's stack. */ +/* The stack frame results in a fake interrupt return to the supplied */ +/* function pointer. */ +/* */ +/* INPUT */ +/* */ +/* thread_ptr Pointer to thread control blk */ +/* function_ptr Pointer to return function */ +/* */ +/* OUTPUT */ +/* */ +/* None */ +/* */ +/* CALLS */ +/* */ +/* None */ +/* */ +/* CALLED BY */ +/* */ +/* _tx_thread_create Create thread service */ +/* */ +/* RELEASE HISTORY */ +/* */ +/* DATE NAME DESCRIPTION */ +/* */ +/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 11-09-2020 Scott Larson Modified comment(s), */ +/* resulting in version 6.1.2 */ +/* */ +/**************************************************************************/ +// VOID _tx_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(VOID)) +// { EXPORT _tx_thread_stack_build _tx_thread_stack_build -; -; -; /* Build a fake interrupt frame. The form of the fake interrupt stack -; on the Cortex-M4 should look like the following after it is built: -; -; Stack Top: -; LR Interrupted LR (LR at time of PENDSV) -; r4 Initial value for r4 -; r5 Initial value for r5 -; r6 Initial value for r6 -; r7 Initial value for r7 -; r8 Initial value for r8 -; r9 Initial value for r9 -; r10 Initial value for r10 -; r11 Initial value for r11 -; r0 Initial value for r0 (Hardware stack starts here!!) -; r1 Initial value for r1 -; r2 Initial value for r2 -; r3 Initial value for r3 -; r12 Initial value for r12 -; lr Initial value for lr -; pc Initial value for pc -; xPSR Initial value for xPSR -; -; Stack Bottom: (higher memory address) */ -; - LDR r2, [r0, #16] ; Pickup end of stack area - BIC r2, r2, #0x7 ; Align frame for 8-byte alignment - SUB r2, r2, #68 ; Subtract frame size - LDR r3, =0xFFFFFFFD ; Build initial LR value - STR r3, [r2, #0] ; Save on the stack -; -; /* Actually build the stack frame. */ -; - MOV r3, #0 ; Build initial register value - STR r3, [r2, #4] ; Store initial r4 - STR r3, [r2, #8] ; Store initial r5 - STR r3, [r2, #12] ; Store initial r6 - STR r3, [r2, #16] ; Store initial r7 - STR r3, [r2, #20] ; Store initial r8 - STR r3, [r2, #24] ; Store initial r9 - STR r3, [r2, #28] ; Store initial r10 - STR r3, [r2, #32] ; Store initial r11 -; -; /* Hardware stack follows. */ -; - STR r3, [r2, #36] ; Store initial r0 - STR r3, [r2, #40] ; Store initial r1 - STR r3, [r2, #44] ; Store initial r2 - STR r3, [r2, #48] ; Store initial r3 - STR r3, [r2, #52] ; Store initial r12 - MOV r3, #0xFFFFFFFF ; Poison EXC_RETURN value - STR r3, [r2, #56] ; Store initial lr - STR r1, [r2, #60] ; Store initial pc - MOV r3, #0x01000000 ; Only T-bit need be set - STR r3, [r2, #64] ; Store initial xPSR -; -; /* Setup stack pointer. */ -; thread_ptr -> tx_thread_stack_ptr = r2; -; - STR r2, [r0, #8] ; Save stack pointer in thread's - ; control block - BX lr ; Return to caller -;} + + /* Build a fake interrupt frame. The form of the fake interrupt stack + on the Cortex-M should look like the following after it is built: + + Stack Top: + LR Interrupted LR (LR at time of PENDSV) + r4 Initial value for r4 + r5 Initial value for r5 + r6 Initial value for r6 + r7 Initial value for r7 + r8 Initial value for r8 + r9 Initial value for r9 + r10 Initial value for r10 + r11 Initial value for r11 + r0 Initial value for r0 (Hardware stack starts here!!) + r1 Initial value for r1 + r2 Initial value for r2 + r3 Initial value for r3 + r12 Initial value for r12 + lr Initial value for lr + pc Initial value for pc + xPSR Initial value for xPSR + + Stack Bottom: (higher memory address) */ + + LDR r2, [r0, #16] // Pickup end of stack area + BIC r2, r2, #0x7 // Align frame for 8-byte alignment + SUB r2, r2, #68 // Subtract frame size + LDR r3, =0xFFFFFFFD // Build initial LR value + STR r3, [r2, #0] // Save on the stack + + /* Actually build the stack frame. */ + + MOV r3, #0 // Build initial register value + STR r3, [r2, #4] // Store initial r4 + STR r3, [r2, #8] // Store initial r5 + STR r3, [r2, #12] // Store initial r6 + STR r3, [r2, #16] // Store initial r7 + STR r3, [r2, #20] // Store initial r8 + STR r3, [r2, #24] // Store initial r9 + STR r3, [r2, #28] // Store initial r10 + STR r3, [r2, #32] // Store initial r11 + + /* Hardware stack follows. */ + + STR r3, [r2, #36] // Store initial r0 + STR r3, [r2, #40] // Store initial r1 + STR r3, [r2, #44] // Store initial r2 + STR r3, [r2, #48] // Store initial r3 + STR r3, [r2, #52] // Store initial r12 + MOV r3, #0xFFFFFFFF // Poison EXC_RETURN value + STR r3, [r2, #56] // Store initial lr + STR r1, [r2, #60] // Store initial pc + MOV r3, #0x01000000 // Only T-bit need be set + STR r3, [r2, #64] // Store initial xPSR + + /* Setup stack pointer. */ + // thread_ptr -> tx_thread_stack_ptr = r2; + + STR r2, [r0, #8] // Save stack pointer in thread's + // control block + BX lr // Return to caller +// } END diff --git a/ports_module/cortex-m4/ac5/module_manager/src/tx_thread_system_return.S b/ports_module/cortex-m4/ac5/module_manager/src/tx_thread_system_return.S index 9c453e61..fd7eec6b 100644 --- a/ports_module/cortex-m4/ac5/module_manager/src/tx_thread_system_return.S +++ b/ports_module/cortex-m4/ac5/module_manager/src/tx_thread_system_return.S @@ -1,85 +1,87 @@ -;/**************************************************************************/ -;/* */ -;/* Copyright (c) Microsoft Corporation. All rights reserved. */ -;/* */ -;/* This software is licensed under the Microsoft Software License */ -;/* Terms for Microsoft Azure RTOS. Full text of the license can be */ -;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ -;/* and in the root directory of this software. */ -;/* */ -;/**************************************************************************/ -; -; -;/**************************************************************************/ -;/**************************************************************************/ -;/** */ -;/** ThreadX Component */ -;/** */ -;/** Thread */ -;/** */ -;/**************************************************************************/ -;/**************************************************************************/ -; -; +/**************************************************************************/ +/* */ +/* Copyright (c) Microsoft Corporation. All rights reserved. */ +/* */ +/* This software is licensed under the Microsoft Software License */ +/* Terms for Microsoft Azure RTOS. Full text of the license can be */ +/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ +/* and in the root directory of this software. */ +/* */ +/**************************************************************************/ + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ThreadX Component */ +/** */ +/** Thread */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + AREA ||.text||, CODE, READONLY -;/**************************************************************************/ -;/* */ -;/* FUNCTION RELEASE */ -;/* */ -;/* _tx_thread_system_return Cortex-M4/AC5 */ -;/* 6.1 */ -;/* AUTHOR */ -;/* */ -;/* William E. Lamie, Microsoft Corporation */ -;/* */ -;/* DESCRIPTION */ -;/* */ -;/* This function is target processor specific. It is used to transfer */ -;/* control from a thread back to the ThreadX system. Only a */ -;/* minimal context is saved since the compiler assumes temp registers */ -;/* are going to get slicked by a function call anyway. */ -;/* */ -;/* INPUT */ -;/* */ -;/* None */ -;/* */ -;/* OUTPUT */ -;/* */ -;/* None */ -;/* */ -;/* CALLS */ -;/* */ -;/* _tx_thread_schedule Thread scheduling loop */ -;/* */ -;/* CALLED BY */ -;/* */ -;/* ThreadX components */ -;/* */ -;/* RELEASE HISTORY */ -;/* */ -;/* DATE NAME DESCRIPTION */ -;/* */ -;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -;/* */ -;/**************************************************************************/ -;VOID _tx_thread_system_return(VOID) -;{ +/**************************************************************************/ +/* */ +/* FUNCTION RELEASE */ +/* */ +/* _tx_thread_system_return Cortex-M4/AC5 */ +/* 6.1.2 */ +/* AUTHOR */ +/* */ +/* William E. Lamie, Microsoft Corporation */ +/* */ +/* DESCRIPTION */ +/* */ +/* This function is target processor specific. It is used to transfer */ +/* control from a thread back to the ThreadX system. Only a */ +/* minimal context is saved since the compiler assumes temp registers */ +/* are going to get slicked by a function call anyway. */ +/* */ +/* INPUT */ +/* */ +/* None */ +/* */ +/* OUTPUT */ +/* */ +/* None */ +/* */ +/* CALLS */ +/* */ +/* _tx_thread_schedule Thread scheduling loop */ +/* */ +/* CALLED BY */ +/* */ +/* ThreadX components */ +/* */ +/* RELEASE HISTORY */ +/* */ +/* DATE NAME DESCRIPTION */ +/* */ +/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 11-09-2020 Scott Larson Modified comment(s), */ +/* resulting in version 6.1.2 */ +/* */ +/**************************************************************************/ +// VOID _tx_thread_system_return(VOID) +// { EXPORT _tx_thread_system_return _tx_thread_system_return -; -; /* Return to real scheduler via PendSV. Note that this routine is often -; replaced with in-line assembly in tx_port.h to improved performance. */ -; - MOV r0, #0x10000000 ; Load PENDSVSET bit - MOV r1, #0xE000E000 ; Load NVIC base - STR r0, [r1, #0xD04] ; Set PENDSVBIT in ICSR - MRS r0, IPSR ; Pickup IPSR - CMP r0, #0 ; Is it a thread returning? - BNE _isr_context ; If ISR, skip interrupt enable - MRS r1, PRIMASK ; Thread context returning, pickup PRIMASK - CPSIE i ; Enable interrupts - MSR PRIMASK, r1 ; Restore original interrupt posture + + /* Return to real scheduler via PendSV. Note that this routine is often + replaced with in-line assembly in tx_port.h to improved performance. */ + + MOV r0, #0x10000000 // Load PENDSVSET bit + MOV r1, #0xE000E000 // Load NVIC base + STR r0, [r1, #0xD04] // Set PENDSVBIT in ICSR + MRS r0, IPSR // Pickup IPSR + CMP r0, #0 // Is it a thread returning? + BNE _isr_context // If ISR, skip interrupt enable + MRS r1, PRIMASK // Thread context returning, pickup PRIMASK + CPSIE i // Enable interrupts + MSR PRIMASK, r1 // Restore original interrupt posture _isr_context - BX lr ; Return to caller -;} + BX lr // Return to caller + +// } END diff --git a/ports_module/cortex-m4/ac5/module_manager/src/tx_timer_interrupt.S b/ports_module/cortex-m4/ac5/module_manager/src/tx_timer_interrupt.S index f5160174..b1a58dd9 100644 --- a/ports_module/cortex-m4/ac5/module_manager/src/tx_timer_interrupt.S +++ b/ports_module/cortex-m4/ac5/module_manager/src/tx_timer_interrupt.S @@ -1,26 +1,25 @@ -;/**************************************************************************/ -;/* */ -;/* Copyright (c) Microsoft Corporation. All rights reserved. */ -;/* */ -;/* This software is licensed under the Microsoft Software License */ -;/* Terms for Microsoft Azure RTOS. Full text of the license can be */ -;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ -;/* and in the root directory of this software. */ -;/* */ -;/**************************************************************************/ -; -; -;/**************************************************************************/ -;/**************************************************************************/ -;/** */ -;/** ThreadX Component */ -;/** */ -;/** Timer */ -;/** */ -;/**************************************************************************/ -;/**************************************************************************/ -; -; +/**************************************************************************/ +/* */ +/* Copyright (c) Microsoft Corporation. All rights reserved. */ +/* */ +/* This software is licensed under the Microsoft Software License */ +/* Terms for Microsoft Azure RTOS. Full text of the license can be */ +/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ +/* and in the root directory of this software. */ +/* */ +/**************************************************************************/ + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ThreadX Component */ +/** */ +/** Timer */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + IMPORT _tx_timer_time_slice IMPORT _tx_timer_system_clock IMPORT _tx_timer_current_ptr @@ -33,227 +32,225 @@ IMPORT _tx_thread_preempt_disable IMPORT _tx_thread_current_ptr IMPORT _tx_thread_execute_ptr -; -; + AREA ||.text||, CODE, READONLY PRESERVE8 -;/**************************************************************************/ -;/* */ -;/* FUNCTION RELEASE */ -;/* */ -;/* _tx_timer_interrupt Cortex-M4/AC5 */ -;/* 6.1 */ -;/* AUTHOR */ -;/* */ -;/* William E. Lamie, Microsoft Corporation */ -;/* */ -;/* DESCRIPTION */ -;/* */ -;/* This function processes the hardware timer interrupt. This */ -;/* processing includes incrementing the system clock and checking for */ -;/* time slice and/or timer expiration. If either is found, the */ -;/* interrupt context save/restore functions are called along with the */ -;/* expiration functions. */ -;/* */ -;/* INPUT */ -;/* */ -;/* None */ -;/* */ -;/* OUTPUT */ -;/* */ -;/* None */ -;/* */ -;/* CALLS */ -;/* */ -;/* _tx_timer_expiration_process Timer expiration processing */ -;/* _tx_thread_time_slice Time slice interrupted thread */ -;/* */ -;/* CALLED BY */ -;/* */ -;/* interrupt vector */ -;/* */ -;/* RELEASE HISTORY */ -;/* */ -;/* DATE NAME DESCRIPTION */ -;/* */ -;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -;/* */ -;/**************************************************************************/ -;VOID _tx_timer_interrupt(VOID) -;{ +/**************************************************************************/ +/* */ +/* FUNCTION RELEASE */ +/* */ +/* _tx_timer_interrupt Cortex-M4/AC5 */ +/* 6.1.2 */ +/* AUTHOR */ +/* */ +/* William E. Lamie, Microsoft Corporation */ +/* */ +/* DESCRIPTION */ +/* */ +/* This function processes the hardware timer interrupt. This */ +/* processing includes incrementing the system clock and checking for */ +/* time slice and/or timer expiration. If either is found, the */ +/* expiration functions are called. */ +/* */ +/* INPUT */ +/* */ +/* None */ +/* */ +/* OUTPUT */ +/* */ +/* None */ +/* */ +/* CALLS */ +/* */ +/* _tx_timer_expiration_process Timer expiration processing */ +/* _tx_thread_time_slice Time slice interrupted thread */ +/* */ +/* CALLED BY */ +/* */ +/* interrupt vector */ +/* */ +/* RELEASE HISTORY */ +/* */ +/* DATE NAME DESCRIPTION */ +/* */ +/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 11-09-2020 Scott Larson Modified comment(s), */ +/* resulting in version 6.1.2 */ +/* */ +/**************************************************************************/ +// VOID _tx_timer_interrupt(VOID) +// { EXPORT _tx_timer_interrupt _tx_timer_interrupt -; -; /* Upon entry to this routine, it is assumed that context save has already -; been called, and therefore the compiler scratch registers are available -; for use. */ -; -; /* Increment the system clock. */ -; _tx_timer_system_clock++; -; - MOV32 r1, _tx_timer_system_clock ; Pickup address of system clock - LDR r0, [r1, #0] ; Pickup system clock - ADD r0, r0, #1 ; Increment system clock - STR r0, [r1, #0] ; Store new system clock -; -; /* Test for time-slice expiration. */ -; if (_tx_timer_time_slice) -; { -; - MOV32 r3, _tx_timer_time_slice ; Pickup address of time-slice - LDR r2, [r3, #0] ; Pickup time-slice - CBZ r2, __tx_timer_no_time_slice ; Is it non-active? - ; Yes, skip time-slice processing -; -; /* Decrement the time_slice. */ -; _tx_timer_time_slice--; -; - SUB r2, r2, #1 ; Decrement the time-slice - STR r2, [r3, #0] ; Store new time-slice value -; -; /* Check for expiration. */ -; if (__tx_timer_time_slice == 0) -; - CBNZ r2, __tx_timer_no_time_slice ; Has it expired? -; -; /* Set the time-slice expired flag. */ -; _tx_timer_expired_time_slice = TX_TRUE; -; - MOV32 r3, _tx_timer_expired_time_slice ; Pickup address of expired flag - MOV r0, #1 ; Build expired value - STR r0, [r3, #0] ; Set time-slice expiration flag -; -; } -; -__tx_timer_no_time_slice -; -; /* Test for timer expiration. */ -; if (*_tx_timer_current_ptr) -; { -; - MOV32 r1, _tx_timer_current_ptr ; Pickup current timer pointer address - LDR r0, [r1, #0] ; Pickup current timer - LDR r2, [r0, #0] ; Pickup timer list entry - CBZ r2, __tx_timer_no_timer ; Is there anything in the list? - ; No, just increment the timer -; -; /* Set expiration flag. */ -; _tx_timer_expired = TX_TRUE; -; - MOV32 r3, _tx_timer_expired ; Pickup expiration flag address - MOV r2, #1 ; Build expired value - STR r2, [r3, #0] ; Set expired flag - B __tx_timer_done ; Finished timer processing -; -; } -; else -; { -__tx_timer_no_timer -; -; /* No timer expired, increment the timer pointer. */ -; _tx_timer_current_ptr++; -; - ADD r0, r0, #4 ; Move to next timer -; -; /* Check for wrap-around. */ -; if (_tx_timer_current_ptr == _tx_timer_list_end) -; - MOV32 r3, _tx_timer_list_end ; Pickup addr of timer list end - LDR r2, [r3, #0] ; Pickup list end - CMP r0, r2 ; Are we at list end? - BNE __tx_timer_skip_wrap ; No, skip wrap-around logic -; -; /* Wrap to beginning of list. */ -; _tx_timer_current_ptr = _tx_timer_list_start; -; - MOV32 r3, _tx_timer_list_start ; Pickup addr of timer list start - LDR r0, [r3, #0] ; Set current pointer to list start -; -__tx_timer_skip_wrap -; - STR r0, [r1, #0] ; Store new current timer pointer -; } -; -__tx_timer_done -; -; -; /* See if anything has expired. */ -; if ((_tx_timer_expired_time_slice) || (_tx_timer_expired)) -; { -; - MOV32 r3, _tx_timer_expired_time_slice ; Pickup addr of expired flag - LDR r2, [r3, #0] ; Pickup time-slice expired flag - CBNZ r2, __tx_something_expired ; Did a time-slice expire? - ; If non-zero, time-slice expired - MOV32 r1, _tx_timer_expired ; Pickup addr of other expired flag - LDR r0, [r1, #0] ; Pickup timer expired flag - CBZ r0, __tx_timer_nothing_expired ; Did a timer expire? - ; No, nothing expired -; -__tx_something_expired -; -; - STMDB sp!, {r0, lr} ; Save the lr register on the stack - ; and save r0 just to keep 8-byte alignment -; -; /* Did a timer expire? */ -; if (_tx_timer_expired) -; { -; - MOV32 r1, _tx_timer_expired ; Pickup addr of expired flag - LDR r0, [r1, #0] ; Pickup timer expired flag - CBZ r0, __tx_timer_dont_activate ; Check for timer expiration - ; If not set, skip timer activation -; -; /* Process timer expiration. */ -; _tx_timer_expiration_process(); -; - BL _tx_timer_expiration_process ; Call the timer expiration handling routine -; -; } -__tx_timer_dont_activate -; -; /* Did time slice expire? */ -; if (_tx_timer_expired_time_slice) -; { -; - MOV32 r3, _tx_timer_expired_time_slice ; Pickup addr of time-slice expired - LDR r2, [r3, #0] ; Pickup the actual flag - CBZ r2, __tx_timer_not_ts_expiration ; See if the flag is set - ; No, skip time-slice processing -; -; /* Time slice interrupted thread. */ -; _tx_thread_time_slice(); - BL _tx_thread_time_slice ; Call time-slice processing - MOV32 r0, _tx_thread_preempt_disable ; Build address of preempt disable flag - LDR r1, [r0] ; Is the preempt disable flag set? - CBNZ r1, __tx_timer_skip_time_slice ; Yes, skip the PendSV logic - MOV32 r0, _tx_thread_current_ptr ; Build current thread pointer address - LDR r1, [r0] ; Pickup the current thread pointer - MOV32 r2, _tx_thread_execute_ptr ; Build execute thread pointer address - LDR r3, [r2] ; Pickup the execute thread pointer - MOV32 r0, 0xE000ED04 ; Build address of control register - MOV32 r2, 0x10000000 ; Build value for PendSV bit - CMP r1, r3 ; Are they the same? - BEQ __tx_timer_skip_time_slice ; If the same, there was no time-slice performed - STR r2, [r0] ; Not the same, issue the PendSV for preemption + /* Upon entry to this routine, it is assumed that the compiler scratch registers are available + for use. */ + + /* Increment the system clock. */ + // _tx_timer_system_clock++; + + LDR r1, =_tx_timer_system_clock // Pickup address of system clock + LDR r0, [r1, #0] // Pickup system clock + ADD r0, r0, #1 // Increment system clock + STR r0, [r1, #0] // Store new system clock + + /* Test for time-slice expiration. */ + // if (_tx_timer_time_slice) + // { + + LDR r3, =_tx_timer_time_slice // Pickup address of time-slice + LDR r2, [r3, #0] // Pickup time-slice + CBZ r2, __tx_timer_no_time_slice // Is it non-active? + // Yes, skip time-slice processing + + /* Decrement the time_slice. */ + // _tx_timer_time_slice--; + + SUB r2, r2, #1 // Decrement the time-slice + STR r2, [r3, #0] // Store new time-slice value + + /* Check for expiration. */ + // if (__tx_timer_time_slice == 0) + + CBNZ r2, __tx_timer_no_time_slice // Has it expired? + + /* Set the time-slice expired flag. */ + // _tx_timer_expired_time_slice = TX_TRUE; + + LDR r3, =_tx_timer_expired_time_slice // Pickup address of expired flag + MOV r0, #1 // Build expired value + STR r0, [r3, #0] // Set time-slice expiration flag + + // } + +__tx_timer_no_time_slice + + /* Test for timer expiration. */ + // if (*_tx_timer_current_ptr) + // { + + LDR r1, =_tx_timer_current_ptr // Pickup current timer pointer address + LDR r0, [r1, #0] // Pickup current timer + LDR r2, [r0, #0] // Pickup timer list entry + CBZ r2, __tx_timer_no_timer // Is there anything in the list? + // No, just increment the timer + + /* Set expiration flag. */ + // _tx_timer_expired = TX_TRUE; + + LDR r3, =_tx_timer_expired // Pickup expiration flag address + MOV r2, #1 // Build expired value + STR r2, [r3, #0] // Set expired flag + B __tx_timer_done // Finished timer processing + + // } + // else + // { +__tx_timer_no_timer + + /* No timer expired, increment the timer pointer. */ + // _tx_timer_current_ptr++; + + ADD r0, r0, #4 // Move to next timer + + /* Check for wrap-around. */ + // if (_tx_timer_current_ptr == _tx_timer_list_end) + + LDR r3, =_tx_timer_list_end // Pickup addr of timer list end + LDR r2, [r3, #0] // Pickup list end + CMP r0, r2 // Are we at list end? + BNE __tx_timer_skip_wrap // No, skip wrap-around logic + + /* Wrap to beginning of list. */ + // _tx_timer_current_ptr = _tx_timer_list_start; + + LDR r3, =_tx_timer_list_start // Pickup addr of timer list start + LDR r0, [r3, #0] // Set current pointer to list start + +__tx_timer_skip_wrap + + STR r0, [r1, #0] // Store new current timer pointer + // } + +__tx_timer_done + + /* See if anything has expired. */ + // if ((_tx_timer_expired_time_slice) || (_tx_timer_expired)) + // { + + LDR r3, =_tx_timer_expired_time_slice // Pickup addr of expired flag + LDR r2, [r3, #0] // Pickup time-slice expired flag + CBNZ r2, __tx_something_expired // Did a time-slice expire? + // If non-zero, time-slice expired + LDR r1, =_tx_timer_expired // Pickup addr of other expired flag + LDR r0, [r1, #0] // Pickup timer expired flag + CBZ r0, __tx_timer_nothing_expired // Did a timer expire? + // No, nothing expired + +__tx_something_expired + + STMDB sp!, {r0, lr} // Save the lr register on the stack + // and save r0 just to keep 8-byte alignment + + /* Did a timer expire? */ + // if (_tx_timer_expired) + // { + + LDR r1, =_tx_timer_expired // Pickup addr of expired flag + LDR r0, [r1, #0] // Pickup timer expired flag + CBZ r0, __tx_timer_dont_activate // Check for timer expiration + // If not set, skip timer activation + + /* Process timer expiration. */ + // _tx_timer_expiration_process(); + + BL _tx_timer_expiration_process // Call the timer expiration handling routine + + // } +__tx_timer_dont_activate + + /* Did time slice expire? */ + // if (_tx_timer_expired_time_slice) + // { + + LDR r3, =_tx_timer_expired_time_slice // Pickup addr of time-slice expired + LDR r2, [r3, #0] // Pickup the actual flag + CBZ r2, __tx_timer_not_ts_expiration // See if the flag is set + // No, skip time-slice processing + + /* Time slice interrupted thread. */ + // _tx_thread_time_slice(); + + BL _tx_thread_time_slice // Call time-slice processing + LDR r0, =_tx_thread_preempt_disable // Build address of preempt disable flag + LDR r1, [r0] // Is the preempt disable flag set? + CBNZ r1, __tx_timer_skip_time_slice // Yes, skip the PendSV logic + LDR r0, =_tx_thread_current_ptr // Build current thread pointer address + LDR r1, [r0] // Pickup the current thread pointer + LDR r2, =_tx_thread_execute_ptr // Build execute thread pointer address + LDR r3, [r2] // Pickup the execute thread pointer + LDR r0, =0xE000ED04 // Build address of control register + LDR r2, =0x10000000 // Build value for PendSV bit + CMP r1, r3 // Are they the same? + BEQ __tx_timer_skip_time_slice // If the same, there was no time-slice performed + STR r2, [r0] // Not the same, issue the PendSV for preemption __tx_timer_skip_time_slice -; -; } -; + + // } + __tx_timer_not_ts_expiration -; - LDMIA sp!, {r0, lr} ; Recover lr register (r0 is just there for -; -; } -; + + LDMIA sp!, {r0, lr} // Recover lr register (r0 is just there for + // the 8-byte stack alignment + + // } + __tx_timer_nothing_expired - DSB ; Complete all memory access - BX lr ; Return to caller -; -;} + DSB // Complete all memory access + BX lr // Return to caller + +// } ALIGN LTORG END diff --git a/ports_module/cortex-m4/ac5/module_manager/src/txm_module_manager_thread_stack_build.S b/ports_module/cortex-m4/ac5/module_manager/src/txm_module_manager_thread_stack_build.S index ec7f5f97..032975e2 100644 --- a/ports_module/cortex-m4/ac5/module_manager/src/txm_module_manager_thread_stack_build.S +++ b/ports_module/cortex-m4/ac5/module_manager/src/txm_module_manager_thread_stack_build.S @@ -1,141 +1,140 @@ -;/**************************************************************************/ -;/* */ -;/* Copyright (c) Microsoft Corporation. All rights reserved. */ -;/* */ -;/* This software is licensed under the Microsoft Software License */ -;/* Terms for Microsoft Azure RTOS. Full text of the license can be */ -;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ -;/* and in the root directory of this software. */ -;/* */ -;/**************************************************************************/ -; -; -;/**************************************************************************/ -;/**************************************************************************/ -;/** */ -;/** ThreadX Component */ -;/** */ -;/** Module Manager */ -;/** */ -;/**************************************************************************/ -;/**************************************************************************/ -; -; +/**************************************************************************/ +/* */ +/* Copyright (c) Microsoft Corporation. All rights reserved. */ +/* */ +/* This software is licensed under the Microsoft Software License */ +/* Terms for Microsoft Azure RTOS. Full text of the license can be */ +/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ +/* and in the root directory of this software. */ +/* */ +/**************************************************************************/ + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ThreadX Component */ +/** */ +/** Module Manager */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + AREA ||.text||, CODE, READONLY THUMB -;/**************************************************************************/ -;/* */ -;/* FUNCTION RELEASE */ -;/* */ -;/* _txm_module_manager_thread_stack_build Cortex-M4/MPU/AC5 */ -;/* 6.1 */ -;/* AUTHOR */ -;/* */ -;/* Scott Larson, Microsoft Corporation */ -;/* */ -;/* DESCRIPTION */ -;/* */ -;/* This function builds a stack frame on the supplied thread's stack. */ -;/* The stack frame results in a fake interrupt return to the supplied */ -;/* function pointer. */ -;/* */ -;/* INPUT */ -;/* */ -;/* thread_ptr Pointer to thread */ -;/* function_ptr Pointer to shell function */ -;/* */ -;/* OUTPUT */ -;/* */ -;/* None */ -;/* */ -;/* CALLS */ -;/* */ -;/* None */ -;/* */ -;/* CALLED BY */ -;/* */ -;/* _tx_thread_create Create thread service */ -;/* */ -;/* RELEASE HISTORY */ -;/* */ -;/* DATE NAME DESCRIPTION */ -;/* */ -;/* 09-30-2020 Scott Larson Initial Version 6.1 */ -;/* */ -;/**************************************************************************/ -;VOID _txm_module_manager_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(TX_THREAD *, TXM_MODULE_INSTANCE *)) -;{ +/**************************************************************************/ +/* */ +/* FUNCTION RELEASE */ +/* */ +/* _txm_module_manager_thread_stack_build Cortex-M4/MPU/AC5 */ +/* 6.1.2 */ +/* AUTHOR */ +/* */ +/* Scott Larson, Microsoft Corporation */ +/* */ +/* DESCRIPTION */ +/* */ +/* This function builds a stack frame on the supplied thread's stack. */ +/* The stack frame results in a fake interrupt return to the supplied */ +/* function pointer. */ +/* */ +/* INPUT */ +/* */ +/* thread_ptr Pointer to thread */ +/* function_ptr Pointer to shell function */ +/* */ +/* OUTPUT */ +/* */ +/* None */ +/* */ +/* CALLS */ +/* */ +/* None */ +/* */ +/* CALLED BY */ +/* */ +/* _tx_thread_create Create thread service */ +/* */ +/* RELEASE HISTORY */ +/* */ +/* DATE NAME DESCRIPTION */ +/* */ +/* 09-30-2020 Scott Larson Initial Version 6.1 */ +/* 11-09-2020 Scott Larson Modified comment(s), */ +/* resulting in version 6.1.2 */ +/* */ +/**************************************************************************/ +// VOID _txm_module_manager_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(TX_THREAD *, TXM_MODULE_INSTANCE *)) +// { EXPORT _txm_module_manager_thread_stack_build _txm_module_manager_thread_stack_build -; -; -; /* Build a fake interrupt frame. The form of the fake interrupt stack -; on the Cortex-M should look like the following after it is built: -; -; Stack Top: -; LR Interrupted LR (LR at time of PENDSV) -; r4 Initial value for r4 -; r5 Initial value for r5 -; r6 Initial value for r6 -; r7 Initial value for r7 -; r8 Initial value for r8 -; r9 Initial value for r9 -; r10 Initial value for r10 -; r11 Initial value for r11 -; r0 Initial value for r0 (Hardware stack starts here!!) -; r1 Initial value for r1 -; r2 Initial value for r2 -; r3 Initial value for r3 -; r12 Initial value for r12 -; lr Initial value for lr -; pc Initial value for pc -; xPSR Initial value for xPSR -; -; Stack Bottom: (higher memory address) */ -; - LDR r2, [r0, #16] ; Pickup end of stack area - BIC r2, r2, #0x7 ; Align frame - SUB r2, r2, #68 ; Subtract frame size - LDR r3, =0xFFFFFFFD ; Build initial LR value - STR r3, [r2, #0] ; Save on the stack -; -; /* Actually build the stack frame. */ -; - MOV r3, #0 ; Build initial register value - STR r3, [r2, #4] ; Store initial r4 - STR r3, [r2, #8] ; Store initial r5 - STR r3, [r2, #12] ; Store initial r6 - STR r3, [r2, #16] ; Store initial r7 - STR r3, [r2, #20] ; Store initial r8 - STR r3, [r2, #28] ; Store initial r10 - STR r3, [r2, #32] ; Store initial r11 -; -; /* Hardware stack follows. */ -; - STR r0, [r2, #36] ; Store initial r0, which is the thread control block - LDR r3, [r0, #8] ; Pickup thread entry info pointer,which is in the stack pointer position of the thread control block. - ; It was setup in the txm_module_manager_thread_create function. It will be overwritten later in this - ; function with the actual, initial stack pointer. - STR r3, [r2, #40] ; Store initial r1, which is the module entry information. - LDR r3, [r3, #8] ; Pickup data base register from the module information - STR r3, [r2, #24] ; Store initial r9 (data base register) - MOV r3, #0 ; Clear r3 again + /* Build a fake interrupt frame. The form of the fake interrupt stack + on the Cortex-M should look like the following after it is built: - STR r3, [r2, #44] ; Store initial r2 - STR r3, [r2, #48] ; Store initial r3 - STR r3, [r2, #52] ; Store initial r12 - MOV r3, #0xFFFFFFFF ; Poison EXC_RETURN value - STR r3, [r2, #56] ; Store initial lr - STR r1, [r2, #60] ; Store initial pc - MOV r3, #0x01000000 ; Only T-bit need be set - STR r3, [r2, #64] ; Store initial xPSR -; -; /* Setup stack pointer. */ -; thread_ptr -> tx_thread_stack_ptr = r2; -; - STR r2, [r0, #8] ; Save stack pointer in thread's control block - BX lr ; Return to caller -;} + Stack Top: + LR Interrupted LR (LR at time of PENDSV) + r4 Initial value for r4 + r5 Initial value for r5 + r6 Initial value for r6 + r7 Initial value for r7 + r8 Initial value for r8 + r9 Initial value for r9 + r10 Initial value for r10 + r11 Initial value for r11 + r0 Initial value for r0 (Hardware stack starts here!!) + r1 Initial value for r1 + r2 Initial value for r2 + r3 Initial value for r3 + r12 Initial value for r12 + lr Initial value for lr + pc Initial value for pc + xPSR Initial value for xPSR + + Stack Bottom: (higher memory address) */ + + LDR r2, [r0, #16] // Pickup end of stack area + BIC r2, r2, #0x7 // Align frame + SUB r2, r2, #68 // Subtract frame size + LDR r3, =0xFFFFFFFD // Build initial LR value + STR r3, [r2, #0] // Save on the stack + + /* Actually build the stack frame. */ + + MOV r3, #0 // Build initial register value + STR r3, [r2, #4] // Store initial r4 + STR r3, [r2, #8] // Store initial r5 + STR r3, [r2, #12] // Store initial r6 + STR r3, [r2, #16] // Store initial r7 + STR r3, [r2, #20] // Store initial r8 + STR r3, [r2, #28] // Store initial r10 + STR r3, [r2, #32] // Store initial r11 + + /* Hardware stack follows. */ + + STR r0, [r2, #36] // Store initial r0, which is the thread control block + + LDR r3, [r0, #8] // Pickup thread entry info pointer,which is in the stack pointer position of the thread control block. + // It was setup in the txm_module_manager_thread_create function. It will be overwritten later in this + // function with the actual, initial stack pointer. + STR r3, [r2, #40] // Store initial r1, which is the module entry information. + LDR r3, [r3, #8] // Pickup data base register from the module information + STR r3, [r2, #24] // Store initial r9 (data base register) + MOV r3, #0 // Clear r3 again + + STR r3, [r2, #44] // Store initial r2 + STR r3, [r2, #48] // Store initial r3 + STR r3, [r2, #52] // Store initial r12 + MOV r3, #0xFFFFFFFF // Poison EXC_RETURN value + STR r3, [r2, #56] // Store initial lr + STR r1, [r2, #60] // Store initial pc + MOV r3, #0x01000000 // Only T-bit need be set + STR r3, [r2, #64] // Store initial xPSR + + /* Setup stack pointer. */ + // thread_ptr -> tx_thread_stack_ptr = r2; + + STR r2, [r0, #8] // Save stack pointer in thread's control block + BX lr // Return to caller +// } END - diff --git a/ports_module/cortex-m4/ac5/module_manager/src/txm_module_manager_user_mode_entry.S b/ports_module/cortex-m4/ac5/module_manager/src/txm_module_manager_user_mode_entry.S index 28ffe970..83d6f960 100644 --- a/ports_module/cortex-m4/ac5/module_manager/src/txm_module_manager_user_mode_entry.S +++ b/ports_module/cortex-m4/ac5/module_manager/src/txm_module_manager_user_mode_entry.S @@ -1,88 +1,90 @@ -;/**************************************************************************/ -;/* */ -;/* Copyright (c) Microsoft Corporation. All rights reserved. */ -;/* */ -;/* This software is licensed under the Microsoft Software License */ -;/* Terms for Microsoft Azure RTOS. Full text of the license can be */ -;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ -;/* and in the root directory of this software. */ -;/* */ -;/**************************************************************************/ -; -; -;/**************************************************************************/ -;/**************************************************************************/ -;/** */ -;/** ThreadX Component */ -;/** */ -;/** Module Manager */ -;/** */ -;/**************************************************************************/ -;/**************************************************************************/ -; +/**************************************************************************/ +/* */ +/* Copyright (c) Microsoft Corporation. All rights reserved. */ +/* */ +/* This software is licensed under the Microsoft Software License */ +/* Terms for Microsoft Azure RTOS. Full text of the license can be */ +/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ +/* and in the root directory of this software. */ +/* */ +/**************************************************************************/ + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ThreadX Component */ +/** */ +/** Module Manager */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + IMPORT _txm_module_manager_kernel_dispatch IMPORT _tx_thread_current_ptr -; + AREA ||.text||, CODE, READONLY, ALIGN=5 THUMB -;/**************************************************************************/ -;/* */ -;/* FUNCTION RELEASE */ -;/* */ -;/* _txm_module_manager_user_mode_entry Cortex-M4/MPU/AC5 */ -;/* 6.1 */ -;/* AUTHOR */ -;/* */ -;/* Scott Larson, Microsoft Corporation */ -;/* */ -;/* DESCRIPTION */ -;/* */ -;/* This function allows modules to enter kernel mode. */ -;/* */ -;/* INPUT */ -;/* */ -;/* None */ -;/* */ -;/* OUTPUT */ -;/* */ -;/* None */ -;/* */ -;/* CALLS */ -;/* */ -;/* SVC 1 Enter kernel mode */ -;/* SVC 2 Exit kernel mode */ -;/* */ -;/* CALLED BY */ -;/* */ -;/* Modules in user mode */ -;/* */ -;/* RELEASE HISTORY */ -;/* */ -;/* DATE NAME DESCRIPTION */ -;/* */ -;/* 09-30-2020 Scott Larson Initial Version 6.1 */ -;/* */ -;/**************************************************************************/; -;VOID _txm_module_manager_user_mode_entry(VOID) -;{ +/**************************************************************************/ +/* */ +/* FUNCTION RELEASE */ +/* */ +/* _txm_module_manager_user_mode_entry Cortex-M4/MPU/AC5 */ +/* 6.1.2 */ +/* AUTHOR */ +/* */ +/* Scott Larson, Microsoft Corporation */ +/* */ +/* DESCRIPTION */ +/* */ +/* This function allows modules to enter kernel mode. */ +/* */ +/* INPUT */ +/* */ +/* None */ +/* */ +/* OUTPUT */ +/* */ +/* None */ +/* */ +/* CALLS */ +/* */ +/* SVC 1 Enter kernel mode */ +/* SVC 2 Exit kernel mode */ +/* */ +/* CALLED BY */ +/* */ +/* Modules in user mode */ +/* */ +/* RELEASE HISTORY */ +/* */ +/* DATE NAME DESCRIPTION */ +/* */ +/* 09-30-2020 Scott Larson Initial Version 6.1 */ +/* 11-09-2020 Scott Larson Modified comment(s), */ +/* resulting in version 6.1.2 */ +/* */ +/**************************************************************************/ +// VOID _txm_module_manager_user_mode_entry(VOID) +// { EXPORT _txm_module_manager_user_mode_entry _txm_module_manager_user_mode_entry - SVC 1 ; Enter kernel + SVC 1 // Enter kernel EXPORT _txm_module_priv _txm_module_priv - ; At this point, we are out of user mode. The original LR has been saved in the - ; thread control block. Simply call the kernel dispatch function. + // At this point, we are out of user mode. The original LR has been saved in the + // thread control block. Simply call the kernel dispatch function. BL _txm_module_manager_kernel_dispatch - ; Pickup the original LR value while still in privileged mode - LDR r2, =_tx_thread_current_ptr ; Build current thread pointer address - LDR r3, [r2] ; Pickup current thread pointer - LDR lr, [r3, #0xA0] ; Pickup saved LR from original call + // Pickup the original LR value while still in privileged mode + LDR r2, =_tx_thread_current_ptr // Build current thread pointer address + LDR r3, [r2] // Pickup current thread pointer + LDR lr, [r3, #0xA0] // Pickup saved LR from original call - SVC 2 ; Exit kernel and return to user mode + SVC 2 // Exit kernel and return to user mode EXPORT _txm_module_user_mode_exit _txm_module_user_mode_exit - BX lr ; Return to the caller -;} + BX lr // Return to the caller +// } ALIGN 32 END diff --git a/ports_module/cortex-m4/ac6/example_build/sample_threadx_module_manager/tx_initialize_low_level.S b/ports_module/cortex-m4/ac6/example_build/sample_threadx_module_manager/tx_initialize_low_level.S index 5dda196d..5d533b5b 100644 --- a/ports_module/cortex-m4/ac6/example_build/sample_threadx_module_manager/tx_initialize_low_level.S +++ b/ports_module/cortex-m4/ac6/example_build/sample_threadx_module_manager/tx_initialize_low_level.S @@ -46,7 +46,7 @@ SYSTICK_CYCLES = ((SYSTEM_CLOCK / 100) -1) /* FUNCTION RELEASE */ /* */ /* _tx_initialize_low_level Cortex-M4/AC6 */ -/* 6.1 */ +/* 6.1.2 */ /* AUTHOR */ /* */ /* William E. Lamie, Microsoft Corporation */ @@ -80,6 +80,8 @@ SYSTICK_CYCLES = ((SYSTEM_CLOCK / 100) -1) /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 11-09-2020 Scott Larson Modified comment(s), */ +/* resulting in version 6.1.2 */ /* */ /**************************************************************************/ // VOID _tx_initialize_low_level(VOID) @@ -105,6 +107,13 @@ _tx_initialize_low_level: LDR r1, =vector_table // Pickup address of vector table STR r1, [r0, #0xD08] // Set vector table address + /* Enable the cycle count register. */ + +// LDR r0, =0xE0001000 // Build address of DWT register +// LDR r1, [r0] // Pickup the current value +// ORR r1, r1, #1 // Set the CYCCNTENA bit +// STR r1, [r0] // Enable the cycle count register + /* Set system stack pointer from vector value. */ LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer @@ -112,14 +121,7 @@ _tx_initialize_low_level: LDR r1, [r1] // Pickup reset stack pointer STR r1, [r0] // Save system stack pointer - /* Enable the cycle count register. */ - - LDR r0, =0xE0001000 // Build address of DWT register - LDR r1, [r0] // Pickup the current value - ORR r1, r1, #1 // Set the CYCCNTENA bit - STR r1, [r0] // Enable the cycle count register - - /* Configure SysTick for 100Hz clock, or 16384 cycles if no reference. */ + /* Configure SysTick. */ MOV r0, #0xE000E000 // Build address of NVIC registers LDR r1, =SYSTICK_CYCLES diff --git a/ports_module/cortex-m4/ac6/inc/txm_module_port.h b/ports_module/cortex-m4/ac6/inc/txm_module_port.h index 26b99ba7..c504163b 100644 --- a/ports_module/cortex-m4/ac6/inc/txm_module_port.h +++ b/ports_module/cortex-m4/ac6/inc/txm_module_port.h @@ -26,7 +26,7 @@ /* APPLICATION INTERFACE DEFINITION RELEASE */ /* */ /* txm_module_port.h Cortex-M4/MPU/AC6 */ -/* 6.1 */ +/* 6.1.2 */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ @@ -41,6 +41,8 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 Andres Mlinar Initial Version 6.1 */ +/* 11-09-2020 Scott Larson Modified comment(s), */ +/* resulting in version 6.1.2 */ /* */ /**************************************************************************/ @@ -96,16 +98,6 @@ The following extensions must also be defined in tx_port.h: #define TXM_MODULE_KERNEL_STACK_SIZE 768 #endif -/* For the following 3 access control settings, change TEX and C, B, S (bits 21 through 16 of MPU_RASR) - * to reflect your system memory attributes (cache, shareable, memory type). */ -/* Code region access control: privileged read-only, outer & inner write-back, normal memory, shareable. */ -#define TXM_MODULE_MPU_CODE_ACCESS_CONTROL 0x06070000 -/* Data region access control: execute never, read/write, outer & inner write-back, normal memory, shareable. */ -#define TXM_MODULE_MPU_DATA_ACCESS_CONTROL 0x13070000 -/* Shared region access control: execute never, read-only, outer & inner write-back, normal memory, shareable. */ -#define TXM_MODULE_MPU_SHARED_ACCESS_CONTROL 0x12070000 - - /* Define constants specific to the tools the module can be built with for this particular modules port. */ #define TXM_MODULE_IAR_COMPILER 0x00000000 @@ -160,9 +152,9 @@ The following extensions must also be defined in tx_port.h: #define INLINE_DECLARE inline -/* Define the number of MPU entries assigned to the code and data sections. On Cortex-M parts, there can only be 7 total - entries, since ThreadX uses one for access to the kernel dispatch function. */ - +/* Define the number of MPU entries assigned to the code and data sections. + On Cortex-M4 parts, there are 8 total entries. ThreadX uses one for access + to the kernel entry function, thus 7 remain for code and data protection. */ #define TXM_MODULE_MANAGER_CODE_MPU_ENTRIES 4 #define TXM_MODULE_MANAGER_DATA_MPU_ENTRIES 3 #define TXM_MODULE_MANAGER_SHARED_MPU_INDEX 8 @@ -214,18 +206,6 @@ typedef struct TXM_MODULE_MANAGER_MEMORY_FAULT_INFO_STRUCT #define TXM_MODULE_MANAGER_FAULT_INFO \ TXM_MODULE_MANAGER_MEMORY_FAULT_INFO _txm_module_manager_memory_fault_info; -/* Define the macro to check the stack available in dispatch. */ -#define TXM_MODULE_MANAGER_CHECK_STACK_AVAILABLE \ - ULONG stack_available; \ - __asm("MOV %0, SP" : "=r"(stack_available)); \ - stack_available -= (ULONG)_tx_thread_current_ptr->tx_thread_stack_start; \ - if((stack_available < TXM_MODULE_MINIMUM_STACK_AVAILABLE) || \ - (stack_available > _tx_thread_current_ptr->tx_thread_stack_size)) \ - { \ - return(TX_SIZE_ERROR); \ - } - - /* Define the macro to check the code alignment. */ #define TXM_MODULE_MANAGER_CHECK_CODE_ALIGNMENT(module_location, code_alignment) \ @@ -340,6 +320,6 @@ ULONG _txm_module_manager_region_size_get(ULONG block_size); #define TXM_MODULE_MANAGER_VERSION_ID \ CHAR _txm_module_manager_version_id[] = \ - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Module Cortex-M4/MPU/AC6 Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Module Cortex-M4/MPU/AC6 Version 6.1.2 *"; #endif diff --git a/ports_module/cortex-m4/ac6/module_lib/src/txm_module_initialize.S b/ports_module/cortex-m4/ac6/module_lib/src/txm_module_initialize.S index 455e86b5..639c4208 100644 --- a/ports_module/cortex-m4/ac6/module_lib/src/txm_module_initialize.S +++ b/ports_module/cortex-m4/ac6/module_lib/src/txm_module_initialize.S @@ -2,6 +2,7 @@ /* */ /* Copyright (c) Microsoft Corporation. All rights reserved. */ /* */ +/* This software is licensed under the Microsoft Software License */ /* Terms for Microsoft Azure RTOS. Full text of the license can be */ /* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ /* and in the root directory of this software. */ @@ -19,11 +20,9 @@ /**************************************************************************/ /**************************************************************************/ - .global __use_two_region_memory .global __scatterload - .eabi_attribute Tag_ABI_PCS_RO_data, 1 .eabi_attribute Tag_ABI_PCS_R9_use, 1 .eabi_attribute Tag_ABI_PCS_RW_data, 2 @@ -34,7 +33,7 @@ /* FUNCTION RELEASE */ /* */ /* _txm_module_initialize Cortex-M4/MPU/AC6 */ -/* 6.1 */ +/* 6.1.2 */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ @@ -64,6 +63,8 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 Andres Mlinar Initial Version 6.1 */ +/* 11-09-2020 Scott Larson Modified comment(s), */ +/* resulting in version 6.1.2 */ /* */ /**************************************************************************/ // VOID _txm_module_initialize(VOID) diff --git a/ports_module/cortex-m4/ac6/module_manager/src/tx_thread_context_restore.S b/ports_module/cortex-m4/ac6/module_manager/src/tx_thread_context_restore.S index f6b24290..7420808c 100644 --- a/ports_module/cortex-m4/ac6/module_manager/src/tx_thread_context_restore.S +++ b/ports_module/cortex-m4/ac6/module_manager/src/tx_thread_context_restore.S @@ -20,7 +20,6 @@ /**************************************************************************/ /**************************************************************************/ - .text .align 4 .syntax unified @@ -29,7 +28,7 @@ /* FUNCTION RELEASE */ /* */ /* _tx_thread_context_restore Cortex-M4/AC6 */ -/* 6.1 */ +/* 6.1.2 */ /* AUTHOR */ /* */ /* William E. Lamie, Microsoft Corporation */ @@ -38,10 +37,6 @@ /* */ /* This function is only needed for legacy applications and it should */ /* not be called in any new development on a Cortex-M. */ -/* This function restores the interrupt context if it is processing a */ -/* nested interrupt. If not, it returns to the interrupt thread if no */ -/* preemption is necessary. Otherwise, if preemption is necessary or */ -/* if no thread was running, the function returns to the scheduler. */ /* */ /* INPUT */ /* */ @@ -53,7 +48,7 @@ /* */ /* CALLS */ /* */ -/* _tx_thread_schedule Thread scheduling routine */ +/* None */ /* */ /* CALLED BY */ /* */ @@ -64,6 +59,8 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 11-09-2020 Scott Larson Modified comment(s), */ +/* resulting in version 6.1.2 */ /* */ /**************************************************************************/ // VOID _tx_thread_context_restore(VOID) diff --git a/ports_module/cortex-m4/ac6/module_manager/src/tx_thread_context_save.S b/ports_module/cortex-m4/ac6/module_manager/src/tx_thread_context_save.S index b5f1d070..79938754 100644 --- a/ports_module/cortex-m4/ac6/module_manager/src/tx_thread_context_save.S +++ b/ports_module/cortex-m4/ac6/module_manager/src/tx_thread_context_save.S @@ -20,7 +20,6 @@ /**************************************************************************/ /**************************************************************************/ - .text .align 4 .syntax unified @@ -29,7 +28,7 @@ /* FUNCTION RELEASE */ /* */ /* _tx_thread_context_save Cortex-M4/AC6 */ -/* 6.1 */ +/* 6.1.2 */ /* AUTHOR */ /* */ /* William E. Lamie, Microsoft Corporation */ @@ -38,9 +37,6 @@ /* */ /* This function is only needed for legacy applications and it should */ /* not be called in any new development on a Cortex-M. */ -/* This function saves the context of an executing thread in the */ -/* beginning of interrupt processing. The function also ensures that */ -/* the system stack is used upon return to the calling ISR. */ /* */ /* INPUT */ /* */ @@ -63,6 +59,8 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 11-09-2020 Scott Larson Modified comment(s), */ +/* resulting in version 6.1.2 */ /* */ /**************************************************************************/ // VOID _tx_thread_context_save(VOID) diff --git a/ports_module/cortex-m4/ac6/module_manager/src/tx_thread_interrupt_control.S b/ports_module/cortex-m4/ac6/module_manager/src/tx_thread_interrupt_control.S index d8bde055..10d5f0b2 100644 --- a/ports_module/cortex-m4/ac6/module_manager/src/tx_thread_interrupt_control.S +++ b/ports_module/cortex-m4/ac6/module_manager/src/tx_thread_interrupt_control.S @@ -28,7 +28,7 @@ /* FUNCTION RELEASE */ /* */ /* _tx_thread_interrupt_control Cortex-M4/AC6 */ -/* 6.1 */ +/* 6.1.2 */ /* AUTHOR */ /* */ /* William E. Lamie, Microsoft Corporation */ @@ -59,6 +59,8 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 11-09-2020 Scott Larson Modified comment(s), */ +/* resulting in version 6.1.2 */ /* */ /**************************************************************************/ // UINT _tx_thread_interrupt_control(UINT new_posture) @@ -66,15 +68,9 @@ .global _tx_thread_interrupt_control .thumb_func _tx_thread_interrupt_control: - - // Pickup current interrupt lockout posture. - - MRS r1, PRIMASK // Pickup current interrupt lockout - - // Apply the new interrupt posture. - - MSR PRIMASK, r0 // Apply the new interrupt lockout - MOV r0, r1 // Transfer old to return register - BX lr // Return to caller + MRS r1, PRIMASK // Pickup current interrupt lockout + MSR PRIMASK, r0 // Apply the new interrupt lockout + MOV r0, r1 // Transfer old to return register + BX lr // Return to caller // } diff --git a/ports_module/cortex-m4/ac6/module_manager/src/tx_thread_schedule.S b/ports_module/cortex-m4/ac6/module_manager/src/tx_thread_schedule.S index 0bf01024..41d4b503 100644 --- a/ports_module/cortex-m4/ac6/module_manager/src/tx_thread_schedule.S +++ b/ports_module/cortex-m4/ac6/module_manager/src/tx_thread_schedule.S @@ -23,7 +23,6 @@ .global _tx_thread_current_ptr .global _tx_thread_execute_ptr .global _tx_timer_time_slice - .global _tx_thread_system_stack_ptr .global _tx_thread_preempt_disable .global _txm_module_manager_memory_fault_handler .global _txm_module_manager_memory_fault_info @@ -40,7 +39,7 @@ /* FUNCTION RELEASE */ /* */ /* _tx_thread_schedule Cortex-M4/MPU/AC6 */ -/* 6.1 */ +/* 6.1.2 */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ @@ -74,6 +73,10 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 Scott Larson Initial Version 6.1 */ +/* 11-09-2020 Scott Larson Modified comment(s), arrange */ +/* code to fix link error when */ +/* VFP is enabled, resulting */ +/* in version 6.1.2 */ /* */ /**************************************************************************/ // VOID _tx_thread_schedule(VOID) @@ -94,7 +97,7 @@ _tx_thread_schedule: /* Clear CONTROL.FPCA bit so FPU registers aren't unnecessarily stacked. */ -#ifdef __ARMVFP__ +#ifdef __ARM_FP MRS r0, CONTROL // Pickup current CONTROL register BIC r0, r0, #4 // Clear the FPCA bit MSR CONTROL, r0 // Setup new CONTROL register @@ -126,6 +129,7 @@ __tx_wait_here: /* Memory Exception Handler. */ + .global MemManage_Handler .global BusFault_Handler .global UsageFault_Handler @@ -194,7 +198,7 @@ UsageFault_Handler: // Bit 7 = 1 -> MMFAR is valid STRB r1, [r0] // Clear the MMFSR -#ifdef __ARMVFP__ +#ifdef __ARM_FP LDR r0, =0xE000EF34 // Cleanup FPU context: Load FPCCR address LDR r1, [r0] // Load FPCCR BIC r1, r1, #1 // Clear the lazy preservation active bit @@ -204,9 +208,7 @@ UsageFault_Handler: BL _txm_module_manager_memory_fault_handler // Call memory manager fault handler #ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY - /* Call the thread exit function to indicate the thread is no longer executing. */ - CPSID i // Disable interrupts BL _tx_execution_thread_exit // Call the thread exit function CPSIE i // Enable interrupts @@ -229,9 +231,10 @@ UsageFault_Handler: /* Generic context PendSV handler. */ .global PendSV_Handler + .global __tx_PendSVHandler + .syntax unified .thumb_func PendSV_Handler: - .global __tx_PendSVHandler .thumb_func __tx_PendSVHandler: @@ -240,9 +243,7 @@ __tx_PendSVHandler: __tx_ts_handler: #ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY - /* Call the thread exit function to indicate the thread is no longer executing. */ - CPSID i // Disable interrupts PUSH {r0, lr} // Save LR (and r0 just for alignment) BL _tx_execution_thread_exit // Call the thread exit function @@ -264,7 +265,7 @@ __tx_ts_handler: STR r3, [r0] // Set _tx_thread_current_ptr to NULL MRS r12, PSP // Pickup PSP pointer (thread's stack pointer) STMDB r12!, {r4-r11} // Save its remaining registers -#ifdef __ARMVFP__ +#ifdef __ARM_FP TST LR, #0x10 // Determine if the VFP extended frame is present BNE _skip_vfp_save VSTMDB r12!,{s16-s31} // Yes, save additional VFP registers @@ -295,16 +296,42 @@ __tx_ts_new: CPSID i // Disable interrupts LDR r1, [r2] // Is there another thread ready to execute? - CBZ r1, __tx_ts_wait // No, skip to the wait processing + CBNZ r1, __tx_ts_restore // Yes, schedule it - /* Yes, another thread is ready for else, make the current thread the new thread. */ + /* The following is the idle wait processing... in this case, no threads are ready for execution and the + system will simply be idle until an interrupt occurs that makes a thread ready. Note that interrupts + are disabled to allow use of WFI for waiting for a thread to arrive. */ + +__tx_ts_wait: + CPSID i // Disable interrupts + LDR r1, [r2] // Pickup the next thread to execute pointer + CBNZ r1, __tx_ts_ready // If non-NULL, a new thread is ready! +#ifdef TX_ENABLE_WFI + DSB // Ensure no outstanding memory transactions + WFI // Wait for interrupt + ISB // Ensure pipeline is flushed +#endif + CPSIE i // Enable interrupts + B __tx_ts_wait // Loop to continue waiting + + /* At this point, we have a new thread ready to go. Clear any newly pended PendSV - since we are + already in the handler! */ + +__tx_ts_ready: + MOV r7, #0x08000000 // Build clear PendSV value + MOV r8, #0xE000E000 // Build base NVIC address + STR r7, [r8, #0xD04] // Clear any PendSV + +__tx_ts_restore: + + /* A thread is ready, make the current thread the new thread + and enable interrupts. */ STR r1, [r0] // Setup the current thread pointer to the new thread CPSIE i // Enable interrupts /* Increment the thread run count. */ -__tx_ts_restore: LDR r7, [r1, #4] // Pickup the current thread run count LDR r4, =_tx_timer_time_slice // Build address of time-slice variable LDR r5, [r1, #24] // Pickup thread's current time-slice @@ -316,9 +343,7 @@ __tx_ts_restore: STR r5, [r4] // Setup global time-slice #ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY - /* Call the thread entry function to indicate the thread is executing. */ - PUSH {r0, r1} // Save r0 and r1 BL _tx_execution_thread_enter // Call the thread execution enter function POP {r0, r1} // Recover r0 and r1 @@ -345,16 +370,16 @@ __tx_ts_restore: // Use alias registers to quickly load MPU ADD r0, r0, #100 // Build address of MPU register start in thread control block - LDM r0!,{r2-r9} // Load MPU regions 0-3 - STM r1,{r2-r9} // Store MPU regions 0-3 - LDM r0!,{r2-r9} // Load MPU regions 4-7 - STM r1,{r2-r9} // Store MPU regions 4-7 + LDM r0!,{r2-r9} // Load first four MPU regions + STM r1,{r2-r9} // Store first four MPU regions + LDM r0,{r2-r9} // Load second four MPU regions + STM r1,{r2-r9} // Store second four MPU regions LDR r0, =0xE000ED94 // Build MPU control reg address MOV r1, #5 // Build enable value with background region enabled STR r1, [r0] // Enable MPU skip_mpu_setup: LDMIA r12!, {LR} // Pickup LR -#ifdef __ARMVFP__ +#ifdef __ARM_FP TST LR, #0x10 // Determine if the VFP extended frame is present BNE _skip_vfp_restore // If not, skip VFP restore VLDMIA r12!, {s16-s31} // Yes, restore additional VFP registers @@ -367,36 +392,6 @@ _skip_vfp_restore: BX lr // Return to thread! - /* The following is the idle wait processing... in this case, no threads are ready for execution and the - system will simply be idle until an interrupt occurs that makes a thread ready. Note that interrupts - are disabled to allow use of WFI for waiting for a thread to arrive. */ - -__tx_ts_wait: - CPSID i // Disable interrupts - LDR r1, [r2] // Pickup the next thread to execute pointer - STR r1, [r0] // Store it in the current pointer - CBNZ r1, __tx_ts_ready // If non-NULL, a new thread is ready! -#ifdef TX_ENABLE_WFI - DSB // Ensure no outstanding memory transactions - WFI // Wait for interrupt - ISB // Ensure pipeline is flushed -#endif - CPSIE i // Enable interrupts - B __tx_ts_wait // Loop to continue waiting - - /* At this point, we have a new thread ready to go. Clear any newly pended PendSV - since we are - already in the handler! */ - -__tx_ts_ready: - MOV r7, #0x08000000 // Build clear PendSV value - MOV r8, #0xE000E000 // Build base NVIC address - STR r7, [r8, #0xD04] // Clear any PendSV - - /* Re-enable interrupts and restore new thread. */ - - CPSIE i // Enable interrupts - B __tx_ts_restore // Restore the thread - /* SVC Handler. */ @@ -550,20 +545,16 @@ _txm_module_user_mode_exit: NOP // } -#ifdef TX_ENABLE_FPU_SUPPORT - +#ifdef __ARM_FP + .global tx_thread_fpu_disable + .thumb_func +tx_thread_fpu_disable: .global tx_thread_fpu_enable .thumb_func tx_thread_fpu_enable: /* Automatic VPF logic is supported, this function is present only for backward compatibility purposes and therefore simply returns. */ + BX LR // Return to caller - .global tx_thread_fpu_disable - .thumb_func -tx_thread_fpu_disable: - /* Automatic VPF logic is supported, this function is present only for - backward compatibility purposes and therefore simply returns. */ - BX LR // Return to caller #endif - diff --git a/ports_module/cortex-m4/ac6/module_manager/src/tx_thread_stack_build.S b/ports_module/cortex-m4/ac6/module_manager/src/tx_thread_stack_build.S index 1f006f32..ca5be793 100644 --- a/ports_module/cortex-m4/ac6/module_manager/src/tx_thread_stack_build.S +++ b/ports_module/cortex-m4/ac6/module_manager/src/tx_thread_stack_build.S @@ -20,7 +20,6 @@ /**************************************************************************/ /**************************************************************************/ - .text .align 4 .syntax unified @@ -29,7 +28,7 @@ /* FUNCTION RELEASE */ /* */ /* _tx_thread_stack_build Cortex-M4/AC6 */ -/* 6.1 */ +/* 6.1.2 */ /* AUTHOR */ /* */ /* William E. Lamie, Microsoft Corporation */ @@ -62,6 +61,8 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 11-09-2020 Scott Larson Modified comment(s), */ +/* resulting in version 6.1.2 */ /* */ /**************************************************************************/ // VOID _tx_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(VOID)) @@ -96,7 +97,7 @@ _tx_thread_stack_build: Stack Bottom: (higher memory address) */ LDR r2, [r0, #16] // Pickup end of stack area - BIC r2, r2, #0x7 // Align frame + BIC r2, r2, #0x7 // Align frame for 8-byte alignment SUB r2, r2, #68 // Subtract frame size LDR r3, =0xFFFFFFFD // Build initial LR value STR r3, [r2, #0] // Save on the stack diff --git a/ports_module/cortex-m4/ac6/module_manager/src/tx_timer_interrupt.S b/ports_module/cortex-m4/ac6/module_manager/src/tx_timer_interrupt.S index 0fceccd6..8ef8f9fd 100644 --- a/ports_module/cortex-m4/ac6/module_manager/src/tx_timer_interrupt.S +++ b/ports_module/cortex-m4/ac6/module_manager/src/tx_timer_interrupt.S @@ -20,7 +20,6 @@ /**************************************************************************/ /**************************************************************************/ - .global _tx_timer_time_slice .global _tx_timer_system_clock .global _tx_timer_current_ptr @@ -31,7 +30,6 @@ .global _tx_thread_time_slice .global _tx_timer_expiration_process - .text .align 4 .syntax unified @@ -40,7 +38,7 @@ /* FUNCTION RELEASE */ /* */ /* _tx_timer_interrupt Cortex-M4/AC6 */ -/* 6.1 */ +/* 6.1.2 */ /* AUTHOR */ /* */ /* William E. Lamie, Microsoft Corporation */ @@ -50,8 +48,7 @@ /* This function processes the hardware timer interrupt. This */ /* processing includes incrementing the system clock and checking for */ /* time slice and/or timer expiration. If either is found, the */ -/* interrupt context save/restore functions are called along with the */ -/* expiration functions. */ +/* expiration functions are called. */ /* */ /* INPUT */ /* */ @@ -75,6 +72,8 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 Scott Larson Initial Version 6.1 */ +/* 11-09-2020 Scott Larson Modified comment(s), */ +/* resulting in version 6.1.2 */ /* */ /**************************************************************************/ // VOID _tx_timer_interrupt(VOID) @@ -83,8 +82,7 @@ .thumb_func _tx_timer_interrupt: - /* Upon entry to this routine, it is assumed that context save has already - been called, and therefore the compiler scratch registers are available + /* Upon entry to this routine, it is assumed that the compiler scratch registers are available for use. */ /* Increment the system clock. */ @@ -176,7 +174,6 @@ __tx_timer_skip_wrap: __tx_timer_done: - /* See if anything has expired. */ // if ((_tx_timer_expired_time_slice) || (_tx_timer_expired)) // { @@ -192,7 +189,6 @@ __tx_timer_done: __tx_something_expired: - STMDB sp!, {r0, lr} // Save the lr register on the stack // and save r0 just to keep 8-byte alignment diff --git a/ports_module/cortex-m4/ac6/module_manager/src/txm_module_manager_thread_stack_build.S b/ports_module/cortex-m4/ac6/module_manager/src/txm_module_manager_thread_stack_build.S index 73c5793c..4d8f8fc0 100644 --- a/ports_module/cortex-m4/ac6/module_manager/src/txm_module_manager_thread_stack_build.S +++ b/ports_module/cortex-m4/ac6/module_manager/src/txm_module_manager_thread_stack_build.S @@ -23,13 +23,12 @@ .text .align 4 .syntax unified - /**************************************************************************/ /* */ /* FUNCTION RELEASE */ /* */ /* _txm_module_manager_thread_stack_build Cortex-M4/MPU/AC6 */ -/* 6.1 */ +/* 6.1.2 */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ @@ -62,6 +61,8 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 Scott Larson Initial Version 6.1 */ +/* 11-09-2020 Scott Larson Modified comment(s), */ +/* resulting in version 6.1.2 */ /* */ /**************************************************************************/ // VOID _txm_module_manager_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(TX_THREAD *, TXM_MODULE_INSTANCE *)) @@ -73,7 +74,7 @@ _txm_module_manager_thread_stack_build: /* Build a fake interrupt frame. The form of the fake interrupt stack on the Cortex-M should look like the following after it is built: - Stack Top: + Stack Top: LR Interrupted LR (LR at time of PENDSV) r4 Initial value for r4 r5 Initial value for r5 @@ -111,7 +112,7 @@ _txm_module_manager_thread_stack_build: STR r3, [r2, #28] // Store initial r10 STR r3, [r2, #32] // Store initial r11 - /* Hardware stack follows. */ + /* Hardware stack follows. */ STR r0, [r2, #36] // Store initial r0, which is the thread control block @@ -138,4 +139,3 @@ _txm_module_manager_thread_stack_build: STR r2, [r0, #8] // Save stack pointer in thread's control block BX lr // Return to caller // } - diff --git a/ports_module/cortex-m4/gnu/example_build/build_threadx.bat b/ports_module/cortex-m4/gnu/example_build/build_threadx.bat index 7d3e2b9b..e8aa0a1d 100644 --- a/ports_module/cortex-m4/gnu/example_build/build_threadx.bat +++ b/ports_module/cortex-m4/gnu/example_build/build_threadx.bat @@ -1,230 +1,230 @@ del tx.a -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb tx_initialize_low_level.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb ..\module_manager\src\tx_thread_stack_build.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb ..\module_manager\src\tx_thread_schedule.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb ..\module_manager\src\tx_thread_system_return.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb ..\module_manager\src\tx_thread_context_save.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb ..\module_manager\src\tx_thread_context_restore.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb ..\module_manager\src\tx_thread_interrupt_control.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb ..\module_manager\src\tx_timer_interrupt.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb ..\module_manager\src\txm_module_manager_thread_stack_build.S +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb tx_initialize_low_level.S +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb ..\module_manager\src\tx_thread_stack_build.S +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb ..\module_manager\src\tx_thread_schedule.S +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb ..\module_manager\src\tx_thread_system_return.S +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb ..\module_manager\src\tx_thread_context_save.S +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb ..\module_manager\src\tx_thread_context_restore.S +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb ..\module_manager\src\tx_thread_interrupt_control.S +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb ..\module_manager\src\tx_timer_interrupt.S +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb ..\module_manager\src\txm_module_manager_thread_stack_build.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_block_allocate.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_block_pool_cleanup.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_block_pool_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_block_pool_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_block_pool_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_block_pool_initialize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_block_pool_performance_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_block_pool_performance_system_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_block_pool_prioritize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_block_release.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_byte_allocate.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_byte_pool_cleanup.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_byte_pool_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_byte_pool_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_byte_pool_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_byte_pool_initialize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_byte_pool_performance_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_byte_pool_performance_system_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_byte_pool_prioritize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_byte_pool_search.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_byte_release.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_event_flags_cleanup.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_event_flags_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_event_flags_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_event_flags_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_event_flags_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_event_flags_initialize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_event_flags_performance_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_event_flags_performance_system_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_event_flags_set.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_event_flags_set_notify.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_initialize_high_level.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_initialize_kernel_enter.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_initialize_kernel_setup.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_mutex_cleanup.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_mutex_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_mutex_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_mutex_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_mutex_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_mutex_initialize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_mutex_performance_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_mutex_performance_system_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_mutex_prioritize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_mutex_priority_change.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_mutex_put.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_queue_cleanup.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_queue_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_queue_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_queue_flush.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_queue_front_send.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_queue_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_queue_initialize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_queue_performance_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_queue_performance_system_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_queue_prioritize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_queue_receive.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_queue_send.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_queue_send_notify.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_semaphore_ceiling_put.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_semaphore_cleanup.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_semaphore_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_semaphore_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_semaphore_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_semaphore_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_semaphore_initialize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_semaphore_performance_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_semaphore_performance_system_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_semaphore_prioritize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_semaphore_put.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_semaphore_put_notify.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_thread_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_thread_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_thread_entry_exit_notify.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_thread_identify.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_thread_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc 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-c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\module_manager\src\txm_module_manager_memory_fault_notify.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_memory_load.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_object_allocate.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_object_deallocate.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_object_pointer_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_object_pointer_get_extended.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_object_pool_create.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_properties_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_queue_notify_trampoline.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_semaphore_notify_trampoline.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\module_manager\src\txm_module_manager_mm_register_setup.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_start.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_stop.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_thread_create.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_thread_notify_trampoline.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_thread_reset.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_timer_notify_trampoline.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_unload.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_util.c arm-none-eabi-ar -r tx.a tx_thread_stack_build.o tx_thread_schedule.o tx_thread_system_return.o tx_thread_context_save.o tx_thread_context_restore.o tx_timer_interrupt.o diff --git a/ports_module/cortex-m4/gnu/example_build/build_threadx_module_library.bat b/ports_module/cortex-m4/gnu/example_build/build_threadx_module_library.bat index bf4af9e6..3c672eb3 100644 --- a/ports_module/cortex-m4/gnu/example_build/build_threadx_module_library.bat +++ b/ports_module/cortex-m4/gnu/example_build/build_threadx_module_library.bat @@ -1,102 +1,102 @@ del txm.a -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_block_allocate.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_block_pool_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_block_pool_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_block_pool_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_block_pool_performance_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_block_pool_performance_system_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_block_pool_prioritize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_block_release.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_byte_allocate.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_byte_pool_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_byte_pool_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_byte_pool_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_byte_pool_performance_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_byte_pool_performance_system_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_byte_pool_prioritize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_byte_release.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_event_flags_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_event_flags_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_event_flags_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_event_flags_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_event_flags_performance_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_event_flags_performance_system_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_event_flags_set.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_event_flags_set_notify.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_module_application_request.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_module_callback_request_thread_entry.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_module_object_allocate.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_module_object_deallocate.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_module_object_pointer_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\module_lib\src\txm_module_thread_shell_entry.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_module_thread_system_suspend.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_mutex_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_mutex_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_mutex_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_mutex_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_mutex_performance_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc 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-mfpu=vfpv4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_timer_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_timer_performance_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_timer_performance_system_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_trace_buffer_full_notify.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_trace_disable.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_trace_enable.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_trace_event_filter.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_trace_event_unfilter.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_trace_isr_enter_insert.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_trace_isr_exit_insert.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_trace_user_event_insert.c arm-none-eabi-ar -r txm.a txm_block_allocate.o txm_block_pool_create.o txm_block_pool_delete.o txm_block_pool_info_get.o txm_block_pool_performance_info_get.o txm_block_pool_performance_system_info_get.o arm-none-eabi-ar -r txm.a txm_block_pool_prioritize.o txm_block_release.o diff --git a/ports_module/cortex-m4/gnu/example_build/build_threadx_module_manager_sample.bat b/ports_module/cortex-m4/gnu/example_build/build_threadx_module_manager_sample.bat index 8d24580f..92045b92 100644 --- a/ports_module/cortex-m4/gnu/example_build/build_threadx_module_manager_sample.bat +++ b/ports_module/cortex-m4/gnu/example_build/build_threadx_module_manager_sample.bat @@ -1,4 +1,4 @@ -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc sample_threadx_module_manager.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb tx_simulator_startup.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb cortexm_crt0.S +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc sample_threadx_module_manager.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb tx_simulator_startup.S +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb cortexm_crt0.S arm-none-eabi-ld -A cortex-m4 -ereset_handler -T sample_threadx.ld tx_simulator_startup.o cortexm_crt0.o sample_threadx_module_manager.o tx.a libc.a -o sample_threadx_module_manager.axf -M > sample_threadx_module_manager.map diff --git a/ports_module/cortex-m4/gnu/example_build/build_threadx_module_sample.bat b/ports_module/cortex-m4/gnu/example_build/build_threadx_module_sample.bat index 37e68d0d..5a71cf8c 100644 --- a/ports_module/cortex-m4/gnu/example_build/build_threadx_module_sample.bat +++ b/ports_module/cortex-m4/gnu/example_build/build_threadx_module_sample.bat @@ -1,5 +1,5 @@ -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -fpie -fno-plt -mpic-data-is-text-relative -msingle-pic-base txm_module_preamble.s -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -fpie -fno-plt -mpic-data-is-text-relative -msingle-pic-base gcc_setup.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -fpie -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc sample_threadx_module.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -fpie -fno-plt -mpic-data-is-text-relative -msingle-pic-base txm_module_preamble.s +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -fpie -fno-plt -mpic-data-is-text-relative -msingle-pic-base gcc_setup.S +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -fpie -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc sample_threadx_module.c arm-none-eabi-ld -A cortex-m4 -T sample_threadx_module.ld txm_module_preamble.o gcc_setup.o sample_threadx_module.o -e _txm_module_thread_shell_entry txm.a -o sample_threadx_module.axf -M > sample_threadx_module.map diff --git a/ports_module/cortex-m4/gnu/example_build/tx_initialize_low_level.S b/ports_module/cortex-m4/gnu/example_build/tx_initialize_low_level.S index e7bac6a1..25a422d2 100644 --- a/ports_module/cortex-m4/gnu/example_build/tx_initialize_low_level.S +++ b/ports_module/cortex-m4/gnu/example_build/tx_initialize_low_level.S @@ -27,12 +27,12 @@ .global _tx_timer_interrupt .global __main .global _vectors - .global __tx_NMIHandler @ NMI - .global __tx_BadHandler @ HardFault - .global __tx_DBGHandler @ Monitor - .global __tx_PendSVHandler @ PendSV - .global __tx_SysTickHandler @ SysTick - .global __tx_IntHandler @ Int 0 + .global __tx_NMIHandler // NMI + .global __tx_BadHandler // HardFault + .global __tx_DBGHandler // Monitor + .global __tx_PendSVHandler // PendSV + .global __tx_SysTickHandler // SysTick + .global __tx_IntHandler // Int 0 SYSTEM_CLOCK = 6000000 SYSTICK_CYCLES = ((SYSTEM_CLOCK / 100) -1) @@ -45,7 +45,7 @@ SYSTICK_CYCLES = ((SYSTEM_CLOCK / 100) -1) /* FUNCTION RELEASE */ /* */ /* _tx_initialize_low_level Cortex-M4/GNU */ -/* 6.1 */ +/* 6.1.2 */ /* AUTHOR */ /* */ /* William E. Lamie, Microsoft Corporation */ @@ -79,63 +79,72 @@ SYSTICK_CYCLES = ((SYSTEM_CLOCK / 100) -1) /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 11-09-2020 Scott Larson Modified comment(s), */ +/* resulting in version 6.1.2 */ /* */ /**************************************************************************/ -//VOID _tx_initialize_low_level(VOID) -//{ +// VOID _tx_initialize_low_level(VOID) +// { .global _tx_initialize_low_level .thumb_func _tx_initialize_low_level: /* Disable interrupts during ThreadX initialization. */ + CPSID i /* Set base of available memory to end of non-initialised RAM area. */ - LDR r0, =_tx_initialize_unused_memory @ Build address of unused memory pointer - LDR r1, =__RAM_segment_used_end__ @ Build first free address - ADD r1, r1, #4 @ - STR r1, [r0] @ Setup first unused memory pointer + + LDR r0, =_tx_initialize_unused_memory // Build address of unused memory pointer + LDR r1, =__RAM_segment_used_end__ // Build first free address + ADD r1, r1, #4 // + STR r1, [r0] // Setup first unused memory pointer /* Setup Vector Table Offset Register. */ - MOV r0, #0xE000E000 @ Build address of NVIC registers - LDR r1, =_vectors @ Pickup address of vector table - STR r1, [r0, #0xD08] @ Set vector table address - - /* Set system stack pointer from vector value. */ - LDR r0, =_tx_thread_system_stack_ptr @ Build address of system stack pointer - LDR r1, =_vectors @ Pickup address of vector table - LDR r1, [r1] @ Pickup reset stack pointer - STR r1, [r0] @ Save system stack pointer + + MOV r0, #0xE000E000 // Build address of NVIC registers + LDR r1, =_vectors // Pickup address of vector table + STR r1, [r0, #0xD08] // Set vector table address /* Enable the cycle count register. */ - LDR r0, =0xE0001000 @ Build address of DWT register - LDR r1, [r0] @ Pickup the current value - ORR r1, r1, #1 @ Set the CYCCNTENA bit - STR r1, [r0] @ Enable the cycle count register - /* Configure SysTick for 100Hz clock, or 16384 cycles if no reference. */ - MOV r0, #0xE000E000 @ Build address of NVIC registers +// LDR r0, =0xE0001000 // Build address of DWT register +// LDR r1, [r0] // Pickup the current value +// ORR r1, r1, #1 // Set the CYCCNTENA bit +// STR r1, [r0] // Enable the cycle count register + + /* Set system stack pointer from vector value. */ + + LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer + LDR r1, =_vectors // Pickup address of vector table + LDR r1, [r1] // Pickup reset stack pointer + STR r1, [r0] // Save system stack pointer + + /* Configure SysTick. */ + + MOV r0, #0xE000E000 // Build address of NVIC registers LDR r1, =SYSTICK_CYCLES - STR r1, [r0, #0x14] @ Setup SysTick Reload Value - MOV r1, #0x7 @ Build SysTick Control Enable Value - STR r1, [r0, #0x10] @ Setup SysTick Control + STR r1, [r0, #0x14] // Setup SysTick Reload Value + MOV r1, #0x7 // Build SysTick Control Enable Value + STR r1, [r0, #0x10] // Setup SysTick Control /* Configure handler priorities. */ - LDR r1, =0x00000000 @ Rsrv, UsgF, BusF, MemM - STR r1, [r0, #0xD18] @ Setup System Handlers 4-7 Priority Registers - LDR r1, =0xFF000000 @ SVCl, Rsrv, Rsrv, Rsrv - STR r1, [r0, #0xD1C] @ Setup System Handlers 8-11 Priority Registers - @ Note: SVC must be lowest priority, which is 0xFF + LDR r1, =0x00000000 // Rsrv, UsgF, BusF, MemM + STR r1, [r0, #0xD18] // Setup System Handlers 4-7 Priority Registers - LDR r1, =0x40FF0000 @ SysT, PnSV, Rsrv, DbgM - STR r1, [r0, #0xD20] @ Setup System Handlers 12-15 Priority Registers - @ Note: PnSV must be lowest priority, which is 0xFF - + LDR r1, =0xFF000000 // SVCl, Rsrv, Rsrv, Rsrv + STR r1, [r0, #0xD1C] // Setup System Handlers 8-11 Priority Registers + // Note: SVC must be lowest priority, which is 0xFF + + LDR r1, =0x40FF0000 // SysT, PnSV, Rsrv, DbgM + STR r1, [r0, #0xD20] // Setup System Handlers 12-15 Priority Registers + // Note: PnSV must be lowest priority, which is 0xFF /* Return to caller. */ + BX lr -//} +// } /* Define shells for each of the unused vectors. */ diff --git a/ports_module/cortex-m4/gnu/example_build/txm_module_preamble.S b/ports_module/cortex-m4/gnu/example_build/txm_module_preamble.S index e2df9b29..a9413251 100644 --- a/ports_module/cortex-m4/gnu/example_build/txm_module_preamble.S +++ b/ports_module/cortex-m4/gnu/example_build/txm_module_preamble.S @@ -21,7 +21,7 @@ __txm_module_preamble: .dc.l 0x02000007 // Module Properties where: // Bits 31-24: Compiler ID // 0 -> IAR - // 1 -> RVDS + // 1 -> ARM // 2 -> GNU // Bits 23-3: Reserved // Bit 2: 0 -> Disable shared/external memory access diff --git a/ports_module/cortex-m4/gnu/inc/txm_module_port.h b/ports_module/cortex-m4/gnu/inc/txm_module_port.h index 107b99f6..554a3aad 100644 --- a/ports_module/cortex-m4/gnu/inc/txm_module_port.h +++ b/ports_module/cortex-m4/gnu/inc/txm_module_port.h @@ -26,7 +26,7 @@ /* APPLICATION INTERFACE DEFINITION RELEASE */ /* */ /* txm_module_port.h Cortex-M4/MPU/GNU */ -/* 6.1 */ +/* 6.1.2 */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ @@ -41,6 +41,8 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 Scott Larson Initial Version 6.1 */ +/* 11-09-2020 Scott Larson Modified comment(s), */ +/* resulting in version 6.1.2 */ /* */ /**************************************************************************/ @@ -150,9 +152,9 @@ The following extensions must also be defined in tx_port.h: #define INLINE_DECLARE inline -/* Define the number of MPU entries assigned to the code and data sections. On Cortex-M parts, there can only be 7 total - entries, since ThreadX uses one for access to the kernel dispatch function. */ - +/* Define the number of MPU entries assigned to the code and data sections. + On Cortex-M4 parts, there are 8 total entries. ThreadX uses one for access + to the kernel entry function, thus 7 remain for code and data protection. */ #define TXM_MODULE_MANAGER_CODE_MPU_ENTRIES 4 #define TXM_MODULE_MANAGER_DATA_MPU_ENTRIES 3 #define TXM_MODULE_MANAGER_SHARED_MPU_INDEX 8 @@ -318,6 +320,6 @@ ULONG _txm_module_manager_region_size_get(ULONG block_size); #define TXM_MODULE_MANAGER_VERSION_ID \ CHAR _txm_module_manager_version_id[] = \ - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Module Cortex-M4/MPU/GNU Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Module Cortex-M4/MPU/GNU Version 6.1.2 *"; #endif diff --git a/ports_module/cortex-m4/gnu/module_manager/src/tx_thread_context_restore.S b/ports_module/cortex-m4/gnu/module_manager/src/tx_thread_context_restore.S index 2101419a..e693ef46 100644 --- a/ports_module/cortex-m4/gnu/module_manager/src/tx_thread_context_restore.S +++ b/ports_module/cortex-m4/gnu/module_manager/src/tx_thread_context_restore.S @@ -1,87 +1,73 @@ -@/**************************************************************************/ -@/* */ -@/* Copyright (c) Microsoft Corporation. All rights reserved. */ -@/* */ -@/* This software is licensed under the Microsoft Software License */ -@/* Terms for Microsoft Azure RTOS. Full text of the license can be */ -@/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ -@/* and in the root directory of this software. */ -@/* */ -@/**************************************************************************/ -@ -@ -@/**************************************************************************/ -@/**************************************************************************/ -@/** */ -@/** ThreadX Component */ -@/** */ -@/** Thread */ -@/** */ -@/**************************************************************************/ -@/**************************************************************************/ -@ -@ - .global _tx_thread_system_state - .global _tx_thread_current_ptr - .global _tx_thread_system_stack_ptr - .global _tx_thread_execute_ptr - .global _tx_timer_time_slice - .global _tx_thread_schedule - .global _tx_thread_preempt_disable - .global _tx_execution_isr_exit -@ -@ +/**************************************************************************/ +/* */ +/* Copyright (c) Microsoft Corporation. All rights reserved. */ +/* */ +/* This software is licensed under the Microsoft Software License */ +/* Terms for Microsoft Azure RTOS. Full text of the license can be */ +/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ +/* and in the root directory of this software. */ +/* */ +/**************************************************************************/ + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ThreadX Component */ +/** */ +/** Thread */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + .text .align 4 .syntax unified -@/**************************************************************************/ -@/* */ -@/* FUNCTION RELEASE */ -@/* */ -@/* _tx_thread_context_restore Cortex-M4/GNU */ -@/* 6.1 */ -@/* AUTHOR */ -@/* */ -@/* William E. Lamie, Microsoft Corporation */ -@/* */ -@/* DESCRIPTION */ -@/* */ -@/* This function is only needed for legacy applications and it should */ -@/* not be called in any new development on a Cortex-M. */ -@/* This function restores the interrupt context if it is processing a */ -@/* nested interrupt. If not, it returns to the interrupt thread if no */ -@/* preemption is necessary. Otherwise, if preemption is necessary or */ -@/* if no thread was running, the function returns to the scheduler. */ -@/* */ -@/* INPUT */ -@/* */ -@/* None */ -@/* */ -@/* OUTPUT */ -@/* */ -@/* None */ -@/* */ -@/* CALLS */ -@/* */ -@/* _tx_thread_schedule Thread scheduling routine */ -@/* */ -@/* CALLED BY */ -@/* */ -@/* ISRs Interrupt Service Routines */ -@/* */ -@/* RELEASE HISTORY */ -@/* */ -@/* DATE NAME DESCRIPTION */ -@/* */ -@/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -@/* */ -@/**************************************************************************/ -@VOID _tx_thread_context_restore(VOID) -@{ +/**************************************************************************/ +/* */ +/* FUNCTION RELEASE */ +/* */ +/* _tx_thread_context_restore Cortex-M4/GNU */ +/* 6.1.2 */ +/* AUTHOR */ +/* */ +/* William E. Lamie, Microsoft Corporation */ +/* */ +/* DESCRIPTION */ +/* */ +/* This function is only needed for legacy applications and it should */ +/* not be called in any new development on a Cortex-M. */ +/* */ +/* INPUT */ +/* */ +/* None */ +/* */ +/* OUTPUT */ +/* */ +/* None */ +/* */ +/* CALLS */ +/* */ +/* None */ +/* */ +/* CALLED BY */ +/* */ +/* ISRs Interrupt Service Routines */ +/* */ +/* RELEASE HISTORY */ +/* */ +/* DATE NAME DESCRIPTION */ +/* */ +/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 11-09-2020 Scott Larson Modified comment(s), */ +/* resulting in version 6.1.2 */ +/* */ +/**************************************************************************/ +// VOID _tx_thread_context_restore(VOID) +// { .global _tx_thread_context_restore .thumb_func _tx_thread_context_restore: -@ -@ /* Not needed for this port - just return! */ + /* Not needed for this port - just return! */ BX lr -@} +// } diff --git a/ports_module/cortex-m4/gnu/module_manager/src/tx_thread_context_save.S b/ports_module/cortex-m4/gnu/module_manager/src/tx_thread_context_save.S index 03fe07ce..9d8ad6a1 100644 --- a/ports_module/cortex-m4/gnu/module_manager/src/tx_thread_context_save.S +++ b/ports_module/cortex-m4/gnu/module_manager/src/tx_thread_context_save.S @@ -1,81 +1,74 @@ -@/**************************************************************************/ -@/* */ -@/* Copyright (c) Microsoft Corporation. All rights reserved. */ -@/* */ -@/* This software is licensed under the Microsoft Software License */ -@/* Terms for Microsoft Azure RTOS. Full text of the license can be */ -@/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ -@/* and in the root directory of this software. */ -@/* */ -@/**************************************************************************/ -@ -@ -@/**************************************************************************/ -@/**************************************************************************/ -@/** */ -@/** ThreadX Component */ -@/** */ -@/** Thread */ -@/** */ -@/**************************************************************************/ -@/**************************************************************************/ -@ -@ - .global _tx_thread_system_state - .global _tx_thread_current_ptr - .global _tx_execution_isr_enter -@ -@ +/**************************************************************************/ +/* */ +/* Copyright (c) Microsoft Corporation. All rights reserved. */ +/* */ +/* This software is licensed under the Microsoft Software License */ +/* Terms for Microsoft Azure RTOS. Full text of the license can be */ +/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ +/* and in the root directory of this software. */ +/* */ +/**************************************************************************/ + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ThreadX Component */ +/** */ +/** Thread */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + .text .align 4 .syntax unified -@/**************************************************************************/ -@/* */ -@/* FUNCTION RELEASE */ -@/* */ -@/* _tx_thread_context_save Cortex-M4/GNU */ -@/* 6.1 */ -@/* AUTHOR */ -@/* */ -@/* William E. Lamie, Microsoft Corporation */ -@/* */ -@/* DESCRIPTION */ -@/* */ -@/* This function is only needed for legacy applications and it should */ -@/* not be called in any new development on a Cortex-M. */ -@/* This function saves the context of an executing thread in the */ -@/* beginning of interrupt processing. The function also ensures that */ -@/* the system stack is used upon return to the calling ISR. */ -@/* */ -@/* INPUT */ -@/* */ -@/* None */ -@/* */ -@/* OUTPUT */ -@/* */ -@/* None */ -@/* */ -@/* CALLS */ -@/* */ -@/* None */ -@/* */ -@/* CALLED BY */ -@/* */ -@/* ISRs */ -@/* */ -@/* RELEASE HISTORY */ -@/* */ -@/* DATE NAME DESCRIPTION */ -@/* */ -@/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -@/* */ -@/**************************************************************************/ -@VOID _tx_thread_context_save(VOID) -@{ +/**************************************************************************/ +/* */ +/* FUNCTION RELEASE */ +/* */ +/* _tx_thread_context_save Cortex-M4/GNU */ +/* 6.1.2 */ +/* AUTHOR */ +/* */ +/* William E. Lamie, Microsoft Corporation */ +/* */ +/* DESCRIPTION */ +/* */ +/* This function is only needed for legacy applications and it should */ +/* not be called in any new development on a Cortex-M. */ +/* */ +/* INPUT */ +/* */ +/* None */ +/* */ +/* OUTPUT */ +/* */ +/* None */ +/* */ +/* CALLS */ +/* */ +/* None */ +/* */ +/* CALLED BY */ +/* */ +/* ISRs */ +/* */ +/* RELEASE HISTORY */ +/* */ +/* DATE NAME DESCRIPTION */ +/* */ +/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 11-09-2020 Scott Larson Modified comment(s), */ +/* resulting in version 6.1.2 */ +/* */ +/**************************************************************************/ +// VOID _tx_thread_context_save(VOID) +// { .global _tx_thread_context_save .thumb_func _tx_thread_context_save: -@ -@ /* Not needed for this port - just return! */ + + /* Not needed for this port - just return! */ BX lr -@} +// } diff --git a/ports_module/cortex-m4/gnu/module_manager/src/tx_thread_interrupt_control.S b/ports_module/cortex-m4/gnu/module_manager/src/tx_thread_interrupt_control.S index 411db298..64a7a486 100644 --- a/ports_module/cortex-m4/gnu/module_manager/src/tx_thread_interrupt_control.S +++ b/ports_module/cortex-m4/gnu/module_manager/src/tx_thread_interrupt_control.S @@ -1,81 +1,76 @@ -@/**************************************************************************/ -@/* */ -@/* Copyright (c) Microsoft Corporation. All rights reserved. */ -@/* */ -@/* This software is licensed under the Microsoft Software License */ -@/* Terms for Microsoft Azure RTOS. Full text of the license can be */ -@/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ -@/* and in the root directory of this software. */ -@/* */ -@/**************************************************************************/ +/**************************************************************************/ +/* */ +/* Copyright (c) Microsoft Corporation. All rights reserved. */ +/* */ +/* This software is licensed under the Microsoft Software License */ +/* Terms for Microsoft Azure RTOS. Full text of the license can be */ +/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ +/* and in the root directory of this software. */ +/* */ +/**************************************************************************/ -@/**************************************************************************/ -@/**************************************************************************/ -@/** */ -@/** ThreadX Component */ -@/** */ -@/** Thread */ -@/** */ -@/**************************************************************************/ -@/**************************************************************************/ - +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ThreadX Component */ +/** */ +/** Thread */ +/** */ +/**************************************************************************/ +/**************************************************************************/ .text 32 .align 4 .syntax unified -@/**************************************************************************/ -@/* */ -@/* FUNCTION RELEASE */ -@/* */ -@/* _tx_thread_interrupt_control Cortex-M4/GNU */ -@/* 6.1 */ -@/* AUTHOR */ -@/* */ -@/* William E. Lamie, Microsoft Corporation */ -@/* */ -@/* DESCRIPTION */ -@/* */ -@/* This function is responsible for changing the interrupt lockout */ -@/* posture of the system. */ -@/* */ -@/* INPUT */ -@/* */ -@/* new_posture New interrupt lockout posture */ -@/* */ -@/* OUTPUT */ -@/* */ -@/* old_posture Old interrupt lockout posture */ -@/* */ -@/* CALLS */ -@/* */ -@/* None */ -@/* */ -@/* CALLED BY */ -@/* */ -@/* Application Code */ -@/* */ -@/* RELEASE HISTORY */ -@/* */ -@/* DATE NAME DESCRIPTION */ -@/* */ -@/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -@/* */ -@/**************************************************************************/ -@/* UINT _tx_thread_interrupt_control(UINT new_posture) -{ */ +/**************************************************************************/ +/* */ +/* FUNCTION RELEASE */ +/* */ +/* _tx_thread_interrupt_control Cortex-M4/GNU */ +/* 6.1.2 */ +/* AUTHOR */ +/* */ +/* William E. Lamie, Microsoft Corporation */ +/* */ +/* DESCRIPTION */ +/* */ +/* This function is responsible for changing the interrupt lockout */ +/* posture of the system. */ +/* */ +/* INPUT */ +/* */ +/* new_posture New interrupt lockout posture */ +/* */ +/* OUTPUT */ +/* */ +/* old_posture Old interrupt lockout posture */ +/* */ +/* CALLS */ +/* */ +/* None */ +/* */ +/* CALLED BY */ +/* */ +/* Application Code */ +/* */ +/* RELEASE HISTORY */ +/* */ +/* DATE NAME DESCRIPTION */ +/* */ +/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 11-09-2020 Scott Larson Modified comment(s), */ +/* resulting in version 6.1.2 */ +/* */ +/**************************************************************************/ +// UINT _tx_thread_interrupt_control(UINT new_posture) +// { .global _tx_thread_interrupt_control .thumb_func _tx_thread_interrupt_control: + MRS r1, PRIMASK // Pickup current interrupt lockout + MSR PRIMASK, r0 // Apply the new interrupt lockout + MOV r0, r1 // Transfer old to return register + BX lr // Return to caller -@/* Pickup current interrupt lockout posture. */ - - MRS r1, PRIMASK @ Pickup current interrupt lockout - -@/* Apply the new interrupt posture. */ - - MSR PRIMASK, r0 @ Apply the new interrupt lockout - MOV r0, r1 @ Transfer old to return register - BX lr @ Return to caller - -@/* } */ +// } diff --git a/ports_module/cortex-m4/gnu/module_manager/src/tx_thread_schedule.S b/ports_module/cortex-m4/gnu/module_manager/src/tx_thread_schedule.S index c7181bcf..5af04818 100644 --- a/ports_module/cortex-m4/gnu/module_manager/src/tx_thread_schedule.S +++ b/ports_module/cortex-m4/gnu/module_manager/src/tx_thread_schedule.S @@ -23,7 +23,6 @@ .global _tx_thread_current_ptr .global _tx_thread_execute_ptr .global _tx_timer_time_slice - .global _tx_thread_system_stack_ptr .global _tx_execution_thread_enter .global _tx_execution_thread_exit .global _tx_thread_preempt_disable @@ -38,7 +37,7 @@ /* FUNCTION RELEASE */ /* */ /* _tx_thread_schedule Cortex-M4/MPU/GNU */ -/* 6.1 */ +/* 6.1.2 */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ @@ -72,6 +71,10 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 Scott Larson Initial Version 6.1 */ +/* 11-09-2020 Scott Larson Modified comment(s), arrange */ +/* code to fix link error when */ +/* VFP is enabled, resulting */ +/* in version 6.1.2 */ /* */ /**************************************************************************/ // VOID _tx_thread_schedule(VOID) @@ -92,7 +95,7 @@ _tx_thread_schedule: /* Clear CONTROL.FPCA bit so FPU registers aren't unnecessarily stacked. */ -#ifdef __ARMVFP__ +#ifdef __ARM_PCS_VFP MRS r0, CONTROL // Pickup current CONTROL register BIC r0, r0, #4 // Clear the FPCA bit MSR CONTROL, r0 // Setup new CONTROL register @@ -124,6 +127,7 @@ __tx_wait_here: /* Memory Exception Handler. */ + .global MemManage_Handler .global BusFault_Handler .global UsageFault_Handler @@ -192,7 +196,7 @@ UsageFault_Handler: // Bit 7 = 1 -> MMFAR is valid STRB r1, [r0] // Clear the MMFSR -#ifdef __ARMVFP__ +#ifdef __ARM_PCS_VFP LDR r0, =0xE000EF34 // Cleanup FPU context: Load FPCCR address LDR r1, [r0] // Load FPCCR BIC r1, r1, #1 // Clear the lazy preservation active bit @@ -202,9 +206,7 @@ UsageFault_Handler: BL _txm_module_manager_memory_fault_handler // Call memory manager fault handler #ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY - /* Call the thread exit function to indicate the thread is no longer executing. */ - CPSID i // Disable interrupts BL _tx_execution_thread_exit // Call the thread exit function CPSIE i // Enable interrupts @@ -239,9 +241,7 @@ __tx_PendSVHandler: __tx_ts_handler: #ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY - /* Call the thread exit function to indicate the thread is no longer executing. */ - CPSID i // Disable interrupts PUSH {r0, lr} // Save LR (and r0 just for alignment) BL _tx_execution_thread_exit // Call the thread exit function @@ -263,7 +263,7 @@ __tx_ts_handler: STR r3, [r0] // Set _tx_thread_current_ptr to NULL MRS r12, PSP // Pickup PSP pointer (thread's stack pointer) STMDB r12!, {r4-r11} // Save its remaining registers -#ifdef __ARMVFP__ +#ifdef __ARM_PCS_VFP TST LR, #0x10 // Determine if the VFP extended frame is present BNE _skip_vfp_save VSTMDB r12!,{s16-s31} // Yes, save additional VFP registers @@ -294,16 +294,42 @@ __tx_ts_new: CPSID i // Disable interrupts LDR r1, [r2] // Is there another thread ready to execute? - CBZ r1, __tx_ts_wait // No, skip to the wait processing + CBNZ r1, __tx_ts_restore // Yes, schedule it - /* Yes, another thread is ready for else, make the current thread the new thread. */ + /* The following is the idle wait processing... in this case, no threads are ready for execution and the + system will simply be idle until an interrupt occurs that makes a thread ready. Note that interrupts + are disabled to allow use of WFI for waiting for a thread to arrive. */ + +__tx_ts_wait: + CPSID i // Disable interrupts + LDR r1, [r2] // Pickup the next thread to execute pointer + CBNZ r1, __tx_ts_ready // If non-NULL, a new thread is ready! +#ifdef TX_ENABLE_WFI + DSB // Ensure no outstanding memory transactions + WFI // Wait for interrupt + ISB // Ensure pipeline is flushed +#endif + CPSIE i // Enable interrupts + B __tx_ts_wait // Loop to continue waiting + + /* At this point, we have a new thread ready to go. Clear any newly pended PendSV - since we are + already in the handler! */ + +__tx_ts_ready: + MOV r7, #0x08000000 // Build clear PendSV value + MOV r8, #0xE000E000 // Build base NVIC address + STR r7, [r8, #0xD04] // Clear any PendSV + +__tx_ts_restore: + + /* A thread is ready, make the current thread the new thread + and enable interrupts. */ STR r1, [r0] // Setup the current thread pointer to the new thread CPSIE i // Enable interrupts /* Increment the thread run count. */ -__tx_ts_restore: LDR r7, [r1, #4] // Pickup the current thread run count LDR r4, =_tx_timer_time_slice // Build address of time-slice variable LDR r5, [r1, #24] // Pickup thread's current time-slice @@ -315,9 +341,7 @@ __tx_ts_restore: STR r5, [r4] // Setup global time-slice #ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY - /* Call the thread entry function to indicate the thread is executing. */ - PUSH {r0, r1} // Save r0 and r1 BL _tx_execution_thread_enter // Call the thread execution enter function POP {r0, r1} // Recover r0 and r1 @@ -353,7 +377,7 @@ __tx_ts_restore: STR r1, [r0] // Enable MPU skip_mpu_setup: LDMIA r12!, {LR} // Pickup LR -#ifdef __ARMVFP__ +#ifdef __ARM_PCS_VFP TST LR, #0x10 // Determine if the VFP extended frame is present BNE _skip_vfp_restore // If not, skip VFP restore VLDMIA r12!, {s16-s31} // Yes, restore additional VFP registers @@ -366,36 +390,6 @@ _skip_vfp_restore: BX lr // Return to thread! - /* The following is the idle wait processing... in this case, no threads are ready for execution and the - system will simply be idle until an interrupt occurs that makes a thread ready. Note that interrupts - are disabled to allow use of WFI for waiting for a thread to arrive. */ - -__tx_ts_wait: - CPSID i // Disable interrupts - LDR r1, [r2] // Pickup the next thread to execute pointer - STR r1, [r0] // Store it in the current pointer - CBNZ r1, __tx_ts_ready // If non-NULL, a new thread is ready! -#ifdef TX_ENABLE_WFI - DSB // Ensure no outstanding memory transactions - WFI // Wait for interrupt - ISB // Ensure pipeline is flushed -#endif - CPSIE i // Enable interrupts - B __tx_ts_wait // Loop to continue waiting - - /* At this point, we have a new thread ready to go. Clear any newly pended PendSV - since we are - already in the handler! */ - -__tx_ts_ready: - MOV r7, #0x08000000 // Build clear PendSV value - MOV r8, #0xE000E000 // Build base NVIC address - STR r7, [r8, #0xD04] // Clear any PendSV - - /* Re-enable interrupts and restore new thread. */ - - CPSIE i // Enable interrupts - B __tx_ts_restore // Restore the thread - /* SVC Handler. */ @@ -549,3 +543,17 @@ _txm_module_user_mode_exit: NOP NOP // } + +#ifdef __ARM_PCS_VFP + .global tx_thread_fpu_disable + .thumb_func +tx_thread_fpu_disable: + .global tx_thread_fpu_enable + .thumb_func +tx_thread_fpu_enable: + /* Automatic VPF logic is supported, this function is present only for + backward compatibility purposes and therefore simply returns. */ + + BX LR // Return to caller + +#endif diff --git a/ports_module/cortex-m4/gnu/module_manager/src/tx_thread_stack_build.S b/ports_module/cortex-m4/gnu/module_manager/src/tx_thread_stack_build.S index 91e51381..c2802386 100644 --- a/ports_module/cortex-m4/gnu/module_manager/src/tx_thread_stack_build.S +++ b/ports_module/cortex-m4/gnu/module_manager/src/tx_thread_stack_build.S @@ -1,135 +1,136 @@ -@/**************************************************************************/ -@/* */ -@/* Copyright (c) Microsoft Corporation. All rights reserved. */ -@/* */ -@/* This software is licensed under the Microsoft Software License */ -@/* Terms for Microsoft Azure RTOS. Full text of the license can be */ -@/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ -@/* and in the root directory of this software. */ -@/* */ -@/**************************************************************************/ -@ -@ -@/**************************************************************************/ -@/**************************************************************************/ -@/** */ -@/** ThreadX Component */ -@/** */ -@/** Thread */ -@/** */ -@/**************************************************************************/ -@/**************************************************************************/ -@ -@ +/**************************************************************************/ +/* */ +/* Copyright (c) Microsoft Corporation. All rights reserved. */ +/* */ +/* This software is licensed under the Microsoft Software License */ +/* Terms for Microsoft Azure RTOS. Full text of the license can be */ +/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ +/* and in the root directory of this software. */ +/* */ +/**************************************************************************/ + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ThreadX Component */ +/** */ +/** Thread */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + .text .align 4 .syntax unified -@/**************************************************************************/ -@/* */ -@/* FUNCTION RELEASE */ -@/* */ -@/* _tx_thread_stack_build Cortex-M4/GNU */ -@/* 6.1 */ -@/* AUTHOR */ -@/* */ -@/* William E. Lamie, Microsoft Corporation */ -@/* */ -@/* DESCRIPTION */ -@/* */ -@/* This function builds a stack frame on the supplied thread's stack. */ -@/* The stack frame results in a fake interrupt return to the supplied */ -@/* function pointer. */ -@/* */ -@/* INPUT */ -@/* */ -@/* thread_ptr Pointer to thread control blk */ -@/* function_ptr Pointer to return function */ -@/* */ -@/* OUTPUT */ -@/* */ -@/* None */ -@/* */ -@/* CALLS */ -@/* */ -@/* None */ -@/* */ -@/* CALLED BY */ -@/* */ -@/* _tx_thread_create Create thread service */ -@/* */ -@/* RELEASE HISTORY */ -@/* */ -@/* DATE NAME DESCRIPTION */ -@/* */ -@/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -@/* */ -@/**************************************************************************/ -@VOID _tx_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(VOID)) -@{ +/**************************************************************************/ +/* */ +/* FUNCTION RELEASE */ +/* */ +/* _tx_thread_stack_build Cortex-M4/GNU */ +/* 6.1.2 */ +/* AUTHOR */ +/* */ +/* William E. Lamie, Microsoft Corporation */ +/* */ +/* DESCRIPTION */ +/* */ +/* This function builds a stack frame on the supplied thread's stack. */ +/* The stack frame results in a fake interrupt return to the supplied */ +/* function pointer. */ +/* */ +/* INPUT */ +/* */ +/* thread_ptr Pointer to thread control blk */ +/* function_ptr Pointer to return function */ +/* */ +/* OUTPUT */ +/* */ +/* None */ +/* */ +/* CALLS */ +/* */ +/* None */ +/* */ +/* CALLED BY */ +/* */ +/* _tx_thread_create Create thread service */ +/* */ +/* RELEASE HISTORY */ +/* */ +/* DATE NAME DESCRIPTION */ +/* */ +/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 11-09-2020 Scott Larson Modified comment(s), */ +/* resulting in version 6.1.2 */ +/* */ +/**************************************************************************/ +// VOID _tx_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(VOID)) +// { .global _tx_thread_stack_build .thumb_func _tx_thread_stack_build: -@ -@ -@ /* Build a fake interrupt frame. The form of the fake interrupt stack -@ on the Cortex-M4 should look like the following after it is built: -@ -@ Stack Top: -@ LR Interrupted LR (LR at time of PENDSV) -@ r4 Initial value for r4 -@ r5 Initial value for r5 -@ r6 Initial value for r6 -@ r7 Initial value for r7 -@ r8 Initial value for r8 -@ r9 Initial value for r9 -@ r10 Initial value for r10 -@ r11 Initial value for r11 -@ r0 Initial value for r0 (Hardware stack starts here!!) -@ r1 Initial value for r1 -@ r2 Initial value for r2 -@ r3 Initial value for r3 -@ r12 Initial value for r12 -@ lr Initial value for lr -@ pc Initial value for pc -@ xPSR Initial value for xPSR -@ -@ Stack Bottom: (higher memory address) */ -@ - LDR r2, [r0, #16] @ Pickup end of stack area - BIC r2, r2, #0x7 @ Align frame - SUB r2, r2, #68 @ Subtract frame size - LDR r3, =0xFFFFFFFD @ Build initial LR value - STR r3, [r2, #0] @ Save on the stack -@ -@ /* Actually build the stack frame. */ -@ - MOV r3, #0 @ Build initial register value - STR r3, [r2, #4] @ Store initial r4 - STR r3, [r2, #8] @ Store initial r5 - STR r3, [r2, #12] @ Store initial r6 - STR r3, [r2, #16] @ Store initial r7 - STR r3, [r2, #20] @ Store initial r8 - STR r3, [r2, #24] @ Store initial r9 - STR r3, [r2, #28] @ Store initial r10 - STR r3, [r2, #32] @ Store initial r11 -@ -@ /* Hardware stack follows. */ -@ - STR r3, [r2, #36] @ Store initial r0 - STR r3, [r2, #40] @ Store initial r1 - STR r3, [r2, #44] @ Store initial r2 - STR r3, [r2, #48] @ Store initial r3 - STR r3, [r2, #52] @ Store initial r12 - MOV r3, #0xFFFFFFFF @ Poison EXC_RETURN value - STR r3, [r2, #56] @ Store initial lr - STR r1, [r2, #60] @ Store initial pc - MOV r3, #0x01000000 @ Only T-bit need be set - STR r3, [r2, #64] @ Store initial xPSR -@ -@ /* Setup stack pointer. */ -@ thread_ptr -> tx_thread_stack_ptr = r2; -@ - STR r2, [r0, #8] @ Save stack pointer in thread's - @ control block - BX lr @ Return to caller -@} + + + /* Build a fake interrupt frame. The form of the fake interrupt stack + on the Cortex-M should look like the following after it is built: + + Stack Top: + LR Interrupted LR (LR at time of PENDSV) + r4 Initial value for r4 + r5 Initial value for r5 + r6 Initial value for r6 + r7 Initial value for r7 + r8 Initial value for r8 + r9 Initial value for r9 + r10 Initial value for r10 + r11 Initial value for r11 + r0 Initial value for r0 (Hardware stack starts here!!) + r1 Initial value for r1 + r2 Initial value for r2 + r3 Initial value for r3 + r12 Initial value for r12 + lr Initial value for lr + pc Initial value for pc + xPSR Initial value for xPSR + + Stack Bottom: (higher memory address) */ + + LDR r2, [r0, #16] // Pickup end of stack area + BIC r2, r2, #0x7 // Align frame for 8-byte alignment + SUB r2, r2, #68 // Subtract frame size + LDR r3, =0xFFFFFFFD // Build initial LR value + STR r3, [r2, #0] // Save on the stack + + /* Actually build the stack frame. */ + + MOV r3, #0 // Build initial register value + STR r3, [r2, #4] // Store initial r4 + STR r3, [r2, #8] // Store initial r5 + STR r3, [r2, #12] // Store initial r6 + STR r3, [r2, #16] // Store initial r7 + STR r3, [r2, #20] // Store initial r8 + STR r3, [r2, #24] // Store initial r9 + STR r3, [r2, #28] // Store initial r10 + STR r3, [r2, #32] // Store initial r11 + + /* Hardware stack follows. */ + + STR r3, [r2, #36] // Store initial r0 + STR r3, [r2, #40] // Store initial r1 + STR r3, [r2, #44] // Store initial r2 + STR r3, [r2, #48] // Store initial r3 + STR r3, [r2, #52] // Store initial r12 + MOV r3, #0xFFFFFFFF // Poison EXC_RETURN value + STR r3, [r2, #56] // Store initial lr + STR r1, [r2, #60] // Store initial pc + MOV r3, #0x01000000 // Only T-bit need be set + STR r3, [r2, #64] // Store initial xPSR + + /* Setup stack pointer. */ + // thread_ptr -> tx_thread_stack_ptr = r2; + + STR r2, [r0, #8] // Save stack pointer in thread's + // control block + BX lr // Return to caller +// } diff --git a/ports_module/cortex-m4/gnu/module_manager/src/tx_thread_system_return.S b/ports_module/cortex-m4/gnu/module_manager/src/tx_thread_system_return.S index 32601837..2ffdaab4 100644 --- a/ports_module/cortex-m4/gnu/module_manager/src/tx_thread_system_return.S +++ b/ports_module/cortex-m4/gnu/module_manager/src/tx_thread_system_return.S @@ -1,88 +1,89 @@ -@/**************************************************************************/ -@/* */ -@/* Copyright (c) Microsoft Corporation. All rights reserved. */ -@/* */ -@/* This software is licensed under the Microsoft Software License */ -@/* Terms for Microsoft Azure RTOS. Full text of the license can be */ -@/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ -@/* and in the root directory of this software. */ -@/* */ -@/**************************************************************************/ -@ -@ -@/**************************************************************************/ -@/**************************************************************************/ -@/** */ -@/** ThreadX Component */ -@/** */ -@/** Thread */ -@/** */ -@/**************************************************************************/ -@/**************************************************************************/ +/**************************************************************************/ +/* */ +/* Copyright (c) Microsoft Corporation. All rights reserved. */ +/* */ +/* This software is licensed under the Microsoft Software License */ +/* Terms for Microsoft Azure RTOS. Full text of the license can be */ +/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ +/* and in the root directory of this software. */ +/* */ +/**************************************************************************/ +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ThreadX Component */ +/** */ +/** Thread */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + .text 32 .align 4 .syntax unified -@/**************************************************************************/ -@/* */ -@/* FUNCTION RELEASE */ -@/* */ -@/* _tx_thread_system_return Cortex-M4/GNU */ -@/* 6.1 */ -@/* AUTHOR */ -@/* */ -@/* William E. Lamie, Microsoft Corporation */ -@/* */ -@/* DESCRIPTION */ -@/* */ -@/* This function is target processor specific. It is used to transfer */ -@/* control from a thread back to the ThreadX system. Only a */ -@/* minimal context is saved since the compiler assumes temp registers */ -@/* are going to get slicked by a function call anyway. */ -@/* */ -@/* INPUT */ -@/* */ -@/* None */ -@/* */ -@/* OUTPUT */ -@/* */ -@/* None */ -@/* */ -@/* CALLS */ -@/* */ -@/* _tx_thread_schedule Thread scheduling loop */ -@/* */ -@/* CALLED BY */ -@/* */ -@/* ThreadX components */ -@/* */ -@/* RELEASE HISTORY */ -@/* */ -@/* DATE NAME DESCRIPTION */ -@/* */ -@/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -@/* */ -@/**************************************************************************/ -@/* VOID _tx_thread_system_return(VOID) -@{ */ +/**************************************************************************/ +/* */ +/* FUNCTION RELEASE */ +/* */ +/* _tx_thread_system_return Cortex-M4/GNU */ +/* 6.1.2 */ +/* AUTHOR */ +/* */ +/* William E. Lamie, Microsoft Corporation */ +/* */ +/* DESCRIPTION */ +/* */ +/* This function is target processor specific. It is used to transfer */ +/* control from a thread back to the ThreadX system. Only a */ +/* minimal context is saved since the compiler assumes temp registers */ +/* are going to get slicked by a function call anyway. */ +/* */ +/* INPUT */ +/* */ +/* None */ +/* */ +/* OUTPUT */ +/* */ +/* None */ +/* */ +/* CALLS */ +/* */ +/* _tx_thread_schedule Thread scheduling loop */ +/* */ +/* CALLED BY */ +/* */ +/* ThreadX components */ +/* */ +/* RELEASE HISTORY */ +/* */ +/* DATE NAME DESCRIPTION */ +/* */ +/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 11-09-2020 Scott Larson Modified comment(s), */ +/* resulting in version 6.1.2 */ +/* */ +/**************************************************************************/ +// VOID _tx_thread_system_return(VOID) +// { .thumb_func .global _tx_thread_system_return _tx_thread_system_return: -@ -@ /* Return to real scheduler via PendSV. Note that this routine is often -@ replaced with in-line assembly in tx_port.h to improved performance. */ -@ - MOV r0, #0x10000000 @ Load PENDSVSET bit - MOV r1, #0xE000E000 @ Load NVIC base - STR r0, [r1, #0xD04] @ Set PENDSVBIT in ICSR - MRS r0, IPSR @ Pickup IPSR - CMP r0, #0 @ Is it a thread returning? - BNE _isr_context @ If ISR, skip interrupt enable - MRS r1, PRIMASK @ Thread context returning, pickup PRIMASK - CPSIE i @ Enable interrupts - MSR PRIMASK, r1 @ Restore original interrupt posture -_isr_context: - BX lr @ Return to caller -@/* } */ + /* Return to real scheduler via PendSV. Note that this routine is often + replaced with in-line assembly in tx_port.h to improved performance. */ + + MOV r0, #0x10000000 // Load PENDSVSET bit + MOV r1, #0xE000E000 // Load NVIC base + STR r0, [r1, #0xD04] // Set PENDSVBIT in ICSR + MRS r0, IPSR // Pickup IPSR + CMP r0, #0 // Is it a thread returning? + BNE _isr_context // If ISR, skip interrupt enable + MRS r1, PRIMASK // Thread context returning, pickup PRIMASK + CPSIE i // Enable interrupts + MSR PRIMASK, r1 // Restore original interrupt posture +_isr_context: + BX lr // Return to caller + +// } diff --git a/ports_module/cortex-m4/gnu/module_manager/src/tx_timer_interrupt.S b/ports_module/cortex-m4/gnu/module_manager/src/tx_timer_interrupt.S index 0691e893..50202fdb 100644 --- a/ports_module/cortex-m4/gnu/module_manager/src/tx_timer_interrupt.S +++ b/ports_module/cortex-m4/gnu/module_manager/src/tx_timer_interrupt.S @@ -1,26 +1,25 @@ -@/**************************************************************************/ -@/* */ -@/* Copyright (c) Microsoft Corporation. All rights reserved. */ -@/* */ -@/* This software is licensed under the Microsoft Software License */ -@/* Terms for Microsoft Azure RTOS. Full text of the license can be */ -@/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ -@/* and in the root directory of this software. */ -@/* */ -@/**************************************************************************/ -@ -@ -@/**************************************************************************/ -@/**************************************************************************/ -@/** */ -@/** ThreadX Component */ -@/** */ -@/** Timer */ -@/** */ -@/**************************************************************************/ -@/**************************************************************************/ -@ -@ +/**************************************************************************/ +/* */ +/* Copyright (c) Microsoft Corporation. All rights reserved. */ +/* */ +/* This software is licensed under the Microsoft Software License */ +/* Terms for Microsoft Azure RTOS. Full text of the license can be */ +/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ +/* and in the root directory of this software. */ +/* */ +/**************************************************************************/ + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ThreadX Component */ +/** */ +/** Timer */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + .global _tx_timer_time_slice .global _tx_timer_system_clock .global _tx_timer_current_ptr @@ -30,228 +29,224 @@ .global _tx_timer_expired .global _tx_thread_time_slice .global _tx_timer_expiration_process -@ -@ + .text .align 4 .syntax unified -@/**************************************************************************/ -@/* */ -@/* FUNCTION RELEASE */ -@/* */ -@/* _tx_timer_interrupt Cortex-M4/GNU */ -@/* 6.1 */ -@/* AUTHOR */ -@/* */ -@/* William E. Lamie, Microsoft Corporation */ -@/* */ -@/* DESCRIPTION */ -@/* */ -@/* This function processes the hardware timer interrupt. This */ -@/* processing includes incrementing the system clock and checking for */ -@/* time slice and/or timer expiration. If either is found, the */ -@/* interrupt context save/restore functions are called along with the */ -@/* expiration functions. */ -@/* */ -@/* INPUT */ -@/* */ -@/* None */ -@/* */ -@/* OUTPUT */ -@/* */ -@/* None */ -@/* */ -@/* CALLS */ -@/* */ -@/* _tx_timer_expiration_process Timer expiration processing */ -@/* _tx_thread_time_slice Time slice interrupted thread */ -@/* */ -@/* CALLED BY */ -@/* */ -@/* interrupt vector */ -@/* */ -@/* RELEASE HISTORY */ -@/* */ -@/* DATE NAME DESCRIPTION */ -@/* */ -@/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -@/* */ -@/**************************************************************************/ -@VOID _tx_timer_interrupt(VOID) -@{ +/**************************************************************************/ +/* */ +/* FUNCTION RELEASE */ +/* */ +/* _tx_timer_interrupt Cortex-M4/GNU */ +/* 6.1.2 */ +/* AUTHOR */ +/* */ +/* William E. Lamie, Microsoft Corporation */ +/* */ +/* DESCRIPTION */ +/* */ +/* This function processes the hardware timer interrupt. This */ +/* processing includes incrementing the system clock and checking for */ +/* time slice and/or timer expiration. If either is found, the */ +/* expiration functions are called. */ +/* */ +/* INPUT */ +/* */ +/* None */ +/* */ +/* OUTPUT */ +/* */ +/* None */ +/* */ +/* CALLS */ +/* */ +/* _tx_timer_expiration_process Timer expiration processing */ +/* _tx_thread_time_slice Time slice interrupted thread */ +/* */ +/* CALLED BY */ +/* */ +/* interrupt vector */ +/* */ +/* RELEASE HISTORY */ +/* */ +/* DATE NAME DESCRIPTION */ +/* */ +/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 11-09-2020 Scott Larson Modified comment(s), */ +/* resulting in version 6.1.2 */ +/* */ +/**************************************************************************/ +// VOID _tx_timer_interrupt(VOID) +// { .global _tx_timer_interrupt .thumb_func _tx_timer_interrupt: -@ -@ /* Upon entry to this routine, it is assumed that context save has already -@ been called, and therefore the compiler scratch registers are available -@ for use. */ -@ -@ /* Increment the system clock. */ -@ _tx_timer_system_clock++; -@ - LDR r1, =_tx_timer_system_clock @ Pickup address of system clock - LDR r0, [r1, #0] @ Pickup system clock - ADD r0, r0, #1 @ Increment system clock - STR r0, [r1, #0] @ Store new system clock -@ -@ /* Test for time-slice expiration. */ -@ if (_tx_timer_time_slice) -@ { -@ - LDR r3, =_tx_timer_time_slice @ Pickup address of time-slice - LDR r2, [r3, #0] @ Pickup time-slice - CMP r2, #0 @ Is it non-active? - BEQ __tx_timer_no_time_slice @ Yes, skip time-slice processing -@ -@ /* Decrement the time_slice. */ -@ _tx_timer_time_slice--; -@ - SUB r2, r2, #1 @ Decrement the time-slice - STR r2, [r3, #0] @ Store new time-slice value -@ -@ /* Check for expiration. */ -@ if (__tx_timer_time_slice == 0) -@ - CMP r2, #0 @ Has it expired? - BNE __tx_timer_no_time_slice @ No, skip expiration processing -@ -@ /* Set the time-slice expired flag. */ -@ _tx_timer_expired_time_slice = TX_TRUE; -@ - LDR r3, =_tx_timer_expired_time_slice @ Pickup address of expired flag - MOV r0, #1 @ Build expired value - STR r0, [r3, #0] @ Set time-slice expiration flag -@ -@ } -@ + + /* Upon entry to this routine, it is assumed that the compiler scratch registers are available + for use. */ + + /* Increment the system clock. */ + // _tx_timer_system_clock++; + + LDR r1, =_tx_timer_system_clock // Pickup address of system clock + LDR r0, [r1, #0] // Pickup system clock + ADD r0, r0, #1 // Increment system clock + STR r0, [r1, #0] // Store new system clock + + /* Test for time-slice expiration. */ + // if (_tx_timer_time_slice) + // { + + LDR r3, =_tx_timer_time_slice // Pickup address of time-slice + LDR r2, [r3, #0] // Pickup time-slice + CBZ r2, __tx_timer_no_time_slice // Is it non-active? + // Yes, skip time-slice processing + + /* Decrement the time_slice. */ + // _tx_timer_time_slice--; + + SUB r2, r2, #1 // Decrement the time-slice + STR r2, [r3, #0] // Store new time-slice value + + /* Check for expiration. */ + // if (__tx_timer_time_slice == 0) + + CBNZ r2, __tx_timer_no_time_slice // Has it expired? + + /* Set the time-slice expired flag. */ + // _tx_timer_expired_time_slice = TX_TRUE; + + LDR r3, =_tx_timer_expired_time_slice // Pickup address of expired flag + MOV r0, #1 // Build expired value + STR r0, [r3, #0] // Set time-slice expiration flag + + // } + __tx_timer_no_time_slice: -@ -@ /* Test for timer expiration. */ -@ if (*_tx_timer_current_ptr) -@ { -@ - LDR r1, =_tx_timer_current_ptr @ Pickup current timer pointer address - LDR r0, [r1, #0] @ Pickup current timer - LDR r2, [r0, #0] @ Pickup timer list entry - CMP r2, #0 @ Is there anything in the list? - BEQ __tx_timer_no_timer @ No, just increment the timer -@ -@ /* Set expiration flag. */ -@ _tx_timer_expired = TX_TRUE; -@ - LDR r3, =_tx_timer_expired @ Pickup expiration flag address - MOV r2, #1 @ Build expired value - STR r2, [r3, #0] @ Set expired flag - B __tx_timer_done @ Finished timer processing -@ -@ } -@ else -@ { + + /* Test for timer expiration. */ + // if (*_tx_timer_current_ptr) + // { + + LDR r1, =_tx_timer_current_ptr // Pickup current timer pointer address + LDR r0, [r1, #0] // Pickup current timer + LDR r2, [r0, #0] // Pickup timer list entry + CBZ r2, __tx_timer_no_timer // Is there anything in the list? + // No, just increment the timer + + /* Set expiration flag. */ + // _tx_timer_expired = TX_TRUE; + + LDR r3, =_tx_timer_expired // Pickup expiration flag address + MOV r2, #1 // Build expired value + STR r2, [r3, #0] // Set expired flag + B __tx_timer_done // Finished timer processing + + // } + // else + // { __tx_timer_no_timer: -@ -@ /* No timer expired, increment the timer pointer. */ -@ _tx_timer_current_ptr++; -@ - ADD r0, r0, #4 @ Move to next timer -@ -@ /* Check for wrap-around. */ -@ if (_tx_timer_current_ptr == _tx_timer_list_end) -@ - LDR r3, =_tx_timer_list_end @ Pickup addr of timer list end - LDR r2, [r3, #0] @ Pickup list end - CMP r0, r2 @ Are we at list end? - BNE __tx_timer_skip_wrap @ No, skip wrap-around logic -@ -@ /* Wrap to beginning of list. */ -@ _tx_timer_current_ptr = _tx_timer_list_start; -@ - LDR r3, =_tx_timer_list_start @ Pickup addr of timer list start - LDR r0, [r3, #0] @ Set current pointer to list start -@ + + /* No timer expired, increment the timer pointer. */ + // _tx_timer_current_ptr++; + + ADD r0, r0, #4 // Move to next timer + + /* Check for wrap-around. */ + // if (_tx_timer_current_ptr == _tx_timer_list_end) + + LDR r3, =_tx_timer_list_end // Pickup addr of timer list end + LDR r2, [r3, #0] // Pickup list end + CMP r0, r2 // Are we at list end? + BNE __tx_timer_skip_wrap // No, skip wrap-around logic + + /* Wrap to beginning of list. */ + // _tx_timer_current_ptr = _tx_timer_list_start; + + LDR r3, =_tx_timer_list_start // Pickup addr of timer list start + LDR r0, [r3, #0] // Set current pointer to list start + __tx_timer_skip_wrap: -@ - STR r0, [r1, #0] @ Store new current timer pointer -@ } -@ + + STR r0, [r1, #0] // Store new current timer pointer + // } + __tx_timer_done: -@ -@ -@ /* See if anything has expired. */ -@ if ((_tx_timer_expired_time_slice) || (_tx_timer_expired)) -@ { -@ - LDR r3, =_tx_timer_expired_time_slice @ Pickup addr of expired flag - LDR r2, [r3, #0] @ Pickup time-slice expired flag - CMP r2, #0 @ Did a time-slice expire? - BNE __tx_something_expired @ If non-zero, time-slice expired - LDR r1, =_tx_timer_expired @ Pickup addr of other expired flag - LDR r0, [r1, #0] @ Pickup timer expired flag - CMP r0, #0 @ Did a timer expire? - BEQ __tx_timer_nothing_expired @ No, nothing expired -@ + + /* See if anything has expired. */ + // if ((_tx_timer_expired_time_slice) || (_tx_timer_expired)) + // { + + LDR r3, =_tx_timer_expired_time_slice // Pickup addr of expired flag + LDR r2, [r3, #0] // Pickup time-slice expired flag + CBNZ r2, __tx_something_expired // Did a time-slice expire? + // If non-zero, time-slice expired + LDR r1, =_tx_timer_expired // Pickup addr of other expired flag + LDR r0, [r1, #0] // Pickup timer expired flag + CBZ r0, __tx_timer_nothing_expired // Did a timer expire? + // No, nothing expired + __tx_something_expired: -@ -@ - STMDB sp!, {r0, lr} @ Save the lr register on the stack - @ and save r0 just to keep 8-byte alignment -@ -@ /* Did a timer expire? */ -@ if (_tx_timer_expired) -@ { -@ - LDR r1, =_tx_timer_expired @ Pickup addr of expired flag - LDR r0, [r1, #0] @ Pickup timer expired flag - CMP r0, #0 @ Check for timer expiration - BEQ __tx_timer_dont_activate @ If not set, skip timer activation -@ -@ /* Process timer expiration. */ -@ _tx_timer_expiration_process(); -@ - BL _tx_timer_expiration_process @ Call the timer expiration handling routine -@ -@ } + + STMDB sp!, {r0, lr} // Save the lr register on the stack + // and save r0 just to keep 8-byte alignment + + /* Did a timer expire? */ + // if (_tx_timer_expired) + // { + + LDR r1, =_tx_timer_expired // Pickup addr of expired flag + LDR r0, [r1, #0] // Pickup timer expired flag + CBZ r0, __tx_timer_dont_activate // Check for timer expiration + // If not set, skip timer activation + + /* Process timer expiration. */ + // _tx_timer_expiration_process(); + + BL _tx_timer_expiration_process // Call the timer expiration handling routine + + // } __tx_timer_dont_activate: -@ -@ /* Did time slice expire? */ -@ if (_tx_timer_expired_time_slice) -@ { -@ - LDR r3, =_tx_timer_expired_time_slice @ Pickup addr of time-slice expired - LDR r2, [r3, #0] @ Pickup the actual flag - CMP r2, #0 @ See if the flag is set - BEQ __tx_timer_not_ts_expiration @ No, skip time-slice processing -@ -@ /* Time slice interrupted thread. */ -@ _tx_thread_time_slice(); -@ - BL _tx_thread_time_slice @ Call time-slice processing - LDR r0, =_tx_thread_preempt_disable @ Build address of preempt disable flag - LDR r1, [r0] @ Is the preempt disable flag set? - CBNZ r1, __tx_timer_skip_time_slice @ Yes, skip the PendSV logic - LDR r0, =_tx_thread_current_ptr @ Build current thread pointer address - LDR r1, [r0] @ Pickup the current thread pointer - LDR r2, =_tx_thread_execute_ptr @ Build execute thread pointer address - LDR r3, [r2] @ Pickup the execute thread pointer - LDR r0, =0xE000ED04 @ Build address of control register - LDR r2, =0x10000000 @ Build value for PendSV bit - CMP r1, r3 @ Are they the same? - BEQ __tx_timer_skip_time_slice @ If the same, there was no time-slice performed - STR r2, [r0] @ Not the same, issue the PendSV for preemption + + /* Did time slice expire? */ + // if (_tx_timer_expired_time_slice) + // { + + LDR r3, =_tx_timer_expired_time_slice // Pickup addr of time-slice expired + LDR r2, [r3, #0] // Pickup the actual flag + CBZ r2, __tx_timer_not_ts_expiration // See if the flag is set + // No, skip time-slice processing + + /* Time slice interrupted thread. */ + // _tx_thread_time_slice(); + + BL _tx_thread_time_slice // Call time-slice processing + LDR r0, =_tx_thread_preempt_disable // Build address of preempt disable flag + LDR r1, [r0] // Is the preempt disable flag set? + CBNZ r1, __tx_timer_skip_time_slice // Yes, skip the PendSV logic + LDR r0, =_tx_thread_current_ptr // Build current thread pointer address + LDR r1, [r0] // Pickup the current thread pointer + LDR r2, =_tx_thread_execute_ptr // Build execute thread pointer address + LDR r3, [r2] // Pickup the execute thread pointer + LDR r0, =0xE000ED04 // Build address of control register + LDR r2, =0x10000000 // Build value for PendSV bit + CMP r1, r3 // Are they the same? + BEQ __tx_timer_skip_time_slice // If the same, there was no time-slice performed + STR r2, [r0] // Not the same, issue the PendSV for preemption __tx_timer_skip_time_slice: -@ -@ } -@ + + // } + __tx_timer_not_ts_expiration: -@ - LDMIA sp!, {r0, lr} @ Recover lr register (r0 is just there for - @ the 8-byte stack alignment -@ -@ } -@ + + LDMIA sp!, {r0, lr} // Recover lr register (r0 is just there for + // the 8-byte stack alignment + + // } + __tx_timer_nothing_expired: - DSB @ Complete all memory access - BX lr @ Return to caller -@ -@} + DSB // Complete all memory access + BX lr // Return to caller + +// } diff --git a/ports_module/cortex-m4/gnu/module_manager/src/txm_module_manager_thread_stack_build.s b/ports_module/cortex-m4/gnu/module_manager/src/txm_module_manager_thread_stack_build.s index 62f8f7d3..4eb822cf 100644 --- a/ports_module/cortex-m4/gnu/module_manager/src/txm_module_manager_thread_stack_build.s +++ b/ports_module/cortex-m4/gnu/module_manager/src/txm_module_manager_thread_stack_build.s @@ -23,13 +23,12 @@ .text .align 4 .syntax unified - /**************************************************************************/ /* */ /* FUNCTION RELEASE */ /* */ /* _txm_module_manager_thread_stack_build Cortex-M4/MPU/GNU */ -/* 6.1 */ +/* 6.1.2 */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ @@ -62,6 +61,8 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 Scott Larson Initial Version 6.1 */ +/* 11-09-2020 Scott Larson Modified comment(s), */ +/* resulting in version 6.1.2 */ /* */ /**************************************************************************/ // VOID _txm_module_manager_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(TX_THREAD *, TXM_MODULE_INSTANCE *)) @@ -73,7 +74,7 @@ _txm_module_manager_thread_stack_build: /* Build a fake interrupt frame. The form of the fake interrupt stack on the Cortex-M should look like the following after it is built: - Stack Top: + Stack Top: LR Interrupted LR (LR at time of PENDSV) r4 Initial value for r4 r5 Initial value for r5 @@ -111,7 +112,7 @@ _txm_module_manager_thread_stack_build: STR r3, [r2, #28] // Store initial r10 STR r3, [r2, #32] // Store initial r11 - /* Hardware stack follows. */ + /* Hardware stack follows. */ STR r0, [r2, #36] // Store initial r0, which is the thread control block @@ -137,3 +138,4 @@ _txm_module_manager_thread_stack_build: STR r2, [r0, #8] // Save stack pointer in thread's control block BX lr // Return to caller +// } diff --git a/ports_module/cortex-m4/iar/example_build/ThreadX_Modules_Cortex-M4_IAR.pdf b/ports_module/cortex-m4/iar/example_build/ThreadX_Modules_Cortex-M4_IAR.pdf deleted file mode 100644 index 87f965715375e72a31759970b83221b4a30e9a59..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 1602104 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