Added memory barrier before thread scheduling for ARMv8-A ThreadX SMP. (#280)

ports_arch/ARMv8-A/threadx_smp/common/src/tx_thread_context_restore.S

@@ -70,7 +70,8 @@
 /*                                            FIFO queueing,              */
 /*                                            resulting in version 6.1.11 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -294,6 +295,7 @@ __tx_thread_dont_save_ts:
 
     /* Set bit indicating this thread is ready for execution.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x2, #1                              // Build ready flag
     STR     w2, [x0, #260]                      // Set thread's ready flag
     DMB     ISH                                 // Ensure that accesses to shared resource have completed

ports_arch/ARMv8-A/threadx_smp/common/src/tx_thread_system_return.S

@@ -67,7 +67,8 @@
 /*                                             added ARMv8.2-A support,   */
 /*                                            resulting in version 6.1.10 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -173,6 +174,7 @@ __tx_thread_dont_save_ts:
 
     /* Set ready bit in thread control block.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x3, #1                              // Build ready value
     STR     w3, [x6, #260]                      // Make the thread ready
     DMB     ISH                                 //

ports_smp/cortex_a35_smp/ac6/src/tx_thread_context_restore.S

@@ -70,7 +70,8 @@
 /*                                            FIFO queueing,              */
 /*                                            resulting in version 6.1.11 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -294,6 +295,7 @@ __tx_thread_dont_save_ts:
 
     /* Set bit indicating this thread is ready for execution.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x2, #1                              // Build ready flag
     STR     w2, [x0, #260]                      // Set thread's ready flag
     DMB     ISH                                 // Ensure that accesses to shared resource have completed

ports_smp/cortex_a35_smp/ac6/src/tx_thread_system_return.S

@@ -67,7 +67,8 @@
 /*                                             added ARMv8.2-A support,   */
 /*                                            resulting in version 6.1.10 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -173,6 +174,7 @@ __tx_thread_dont_save_ts:
 
     /* Set ready bit in thread control block.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x3, #1                              // Build ready value
     STR     w3, [x6, #260]                      // Make the thread ready
     DMB     ISH                                 //

ports_smp/cortex_a35_smp/gnu/src/tx_thread_context_restore.S

@@ -70,7 +70,8 @@
 /*                                            FIFO queueing,              */
 /*                                            resulting in version 6.1.11 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -294,6 +295,7 @@ __tx_thread_dont_save_ts:
 
     /* Set bit indicating this thread is ready for execution.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x2, #1                              // Build ready flag
     STR     w2, [x0, #260]                      // Set thread's ready flag
     DMB     ISH                                 // Ensure that accesses to shared resource have completed

ports_smp/cortex_a35_smp/gnu/src/tx_thread_system_return.S

@@ -67,7 +67,8 @@
 /*                                             added ARMv8.2-A support,   */
 /*                                            resulting in version 6.1.10 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -173,6 +174,7 @@ __tx_thread_dont_save_ts:
 
     /* Set ready bit in thread control block.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x3, #1                              // Build ready value
     STR     w3, [x6, #260]                      // Make the thread ready
     DMB     ISH                                 //

ports_smp/cortex_a53_smp/ac6/src/tx_thread_context_restore.S

@@ -70,7 +70,8 @@
 /*                                            FIFO queueing,              */
 /*                                            resulting in version 6.1.11 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -294,6 +295,7 @@ __tx_thread_dont_save_ts:
 
     /* Set bit indicating this thread is ready for execution.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x2, #1                              // Build ready flag
     STR     w2, [x0, #260]                      // Set thread's ready flag
     DMB     ISH                                 // Ensure that accesses to shared resource have completed

ports_smp/cortex_a53_smp/ac6/src/tx_thread_system_return.S

@@ -67,7 +67,8 @@
 /*                                             added ARMv8.2-A support,   */
 /*                                            resulting in version 6.1.10 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -173,6 +174,7 @@ __tx_thread_dont_save_ts:
 
     /* Set ready bit in thread control block.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x3, #1                              // Build ready value
     STR     w3, [x6, #260]                      // Make the thread ready
     DMB     ISH                                 //

ports_smp/cortex_a53_smp/gnu/src/tx_thread_context_restore.S

@@ -70,7 +70,8 @@
 /*                                            FIFO queueing,              */
 /*                                            resulting in version 6.1.11 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -294,6 +295,7 @@ __tx_thread_dont_save_ts:
 
     /* Set bit indicating this thread is ready for execution.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x2, #1                              // Build ready flag
     STR     w2, [x0, #260]                      // Set thread's ready flag
     DMB     ISH                                 // Ensure that accesses to shared resource have completed

ports_smp/cortex_a53_smp/gnu/src/tx_thread_system_return.S

@@ -67,7 +67,8 @@
 /*                                             added ARMv8.2-A support,   */
 /*                                            resulting in version 6.1.10 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -173,6 +174,7 @@ __tx_thread_dont_save_ts:
 
     /* Set ready bit in thread control block.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x3, #1                              // Build ready value
     STR     w3, [x6, #260]                      // Make the thread ready
     DMB     ISH                                 //

ports_smp/cortex_a55_smp/ac6/src/tx_thread_context_restore.S

@@ -70,7 +70,8 @@
 /*                                            FIFO queueing,              */
 /*                                            resulting in version 6.1.11 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -294,6 +295,7 @@ __tx_thread_dont_save_ts:
 
     /* Set bit indicating this thread is ready for execution.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x2, #1                              // Build ready flag
     STR     w2, [x0, #260]                      // Set thread's ready flag
     DMB     ISH                                 // Ensure that accesses to shared resource have completed

ports_smp/cortex_a55_smp/ac6/src/tx_thread_system_return.S

@@ -67,7 +67,8 @@
 /*                                             added ARMv8.2-A support,   */
 /*                                            resulting in version 6.1.10 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -173,6 +174,7 @@ __tx_thread_dont_save_ts:
 
     /* Set ready bit in thread control block.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x3, #1                              // Build ready value
     STR     w3, [x6, #260]                      // Make the thread ready
     DMB     ISH                                 //

ports_smp/cortex_a55_smp/gnu/src/tx_thread_context_restore.S

@@ -70,7 +70,8 @@
 /*                                            FIFO queueing,              */
 /*                                            resulting in version 6.1.11 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -294,6 +295,7 @@ __tx_thread_dont_save_ts:
 
     /* Set bit indicating this thread is ready for execution.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x2, #1                              // Build ready flag
     STR     w2, [x0, #260]                      // Set thread's ready flag
     DMB     ISH                                 // Ensure that accesses to shared resource have completed

ports_smp/cortex_a55_smp/gnu/src/tx_thread_system_return.S

@@ -67,7 +67,8 @@
 /*                                             added ARMv8.2-A support,   */
 /*                                            resulting in version 6.1.10 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -173,6 +174,7 @@ __tx_thread_dont_save_ts:
 
     /* Set ready bit in thread control block.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x3, #1                              // Build ready value
     STR     w3, [x6, #260]                      // Make the thread ready
     DMB     ISH                                 //

ports_smp/cortex_a57_smp/ac6/src/tx_thread_context_restore.S

@@ -70,7 +70,8 @@
 /*                                            FIFO queueing,              */
 /*                                            resulting in version 6.1.11 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -294,6 +295,7 @@ __tx_thread_dont_save_ts:
 
     /* Set bit indicating this thread is ready for execution.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x2, #1                              // Build ready flag
     STR     w2, [x0, #260]                      // Set thread's ready flag
     DMB     ISH                                 // Ensure that accesses to shared resource have completed

ports_smp/cortex_a57_smp/ac6/src/tx_thread_system_return.S

@@ -67,7 +67,8 @@
 /*                                             added ARMv8.2-A support,   */
 /*                                            resulting in version 6.1.10 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -173,6 +174,7 @@ __tx_thread_dont_save_ts:
 
     /* Set ready bit in thread control block.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x3, #1                              // Build ready value
     STR     w3, [x6, #260]                      // Make the thread ready
     DMB     ISH                                 //

ports_smp/cortex_a57_smp/gnu/src/tx_thread_context_restore.S

@@ -70,7 +70,8 @@
 /*                                            FIFO queueing,              */
 /*                                            resulting in version 6.1.11 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -294,6 +295,7 @@ __tx_thread_dont_save_ts:
 
     /* Set bit indicating this thread is ready for execution.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x2, #1                              // Build ready flag
     STR     w2, [x0, #260]                      // Set thread's ready flag
     DMB     ISH                                 // Ensure that accesses to shared resource have completed

ports_smp/cortex_a57_smp/gnu/src/tx_thread_system_return.S

@@ -67,7 +67,8 @@
 /*                                             added ARMv8.2-A support,   */
 /*                                            resulting in version 6.1.10 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -173,6 +174,7 @@ __tx_thread_dont_save_ts:
 
     /* Set ready bit in thread control block.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x3, #1                              // Build ready value
     STR     w3, [x6, #260]                      // Make the thread ready
     DMB     ISH                                 //

ports_smp/cortex_a65_smp/ac6/src/tx_thread_context_restore.S

@@ -70,7 +70,8 @@
 /*                                            FIFO queueing,              */
 /*                                            resulting in version 6.1.11 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -294,6 +295,7 @@ __tx_thread_dont_save_ts:
 
     /* Set bit indicating this thread is ready for execution.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x2, #1                              // Build ready flag
     STR     w2, [x0, #260]                      // Set thread's ready flag
     DMB     ISH                                 // Ensure that accesses to shared resource have completed

ports_smp/cortex_a65_smp/ac6/src/tx_thread_system_return.S

@@ -67,7 +67,8 @@
 /*                                             added ARMv8.2-A support,   */
 /*                                            resulting in version 6.1.10 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -173,6 +174,7 @@ __tx_thread_dont_save_ts:
 
     /* Set ready bit in thread control block.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x3, #1                              // Build ready value
     STR     w3, [x6, #260]                      // Make the thread ready
     DMB     ISH                                 //

ports_smp/cortex_a65_smp/gnu/src/tx_thread_context_restore.S

@@ -70,7 +70,8 @@
 /*                                            FIFO queueing,              */
 /*                                            resulting in version 6.1.11 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -294,6 +295,7 @@ __tx_thread_dont_save_ts:
 
     /* Set bit indicating this thread is ready for execution.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x2, #1                              // Build ready flag
     STR     w2, [x0, #260]                      // Set thread's ready flag
     DMB     ISH                                 // Ensure that accesses to shared resource have completed

ports_smp/cortex_a65_smp/gnu/src/tx_thread_system_return.S

@@ -67,7 +67,8 @@
 /*                                             added ARMv8.2-A support,   */
 /*                                            resulting in version 6.1.10 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -173,6 +174,7 @@ __tx_thread_dont_save_ts:
 
     /* Set ready bit in thread control block.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x3, #1                              // Build ready value
     STR     w3, [x6, #260]                      // Make the thread ready
     DMB     ISH                                 //

ports_smp/cortex_a65ae_smp/ac6/src/tx_thread_context_restore.S

@@ -70,7 +70,8 @@
 /*                                            FIFO queueing,              */
 /*                                            resulting in version 6.1.11 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -294,6 +295,7 @@ __tx_thread_dont_save_ts:
 
     /* Set bit indicating this thread is ready for execution.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x2, #1                              // Build ready flag
     STR     w2, [x0, #260]                      // Set thread's ready flag
     DMB     ISH                                 // Ensure that accesses to shared resource have completed

ports_smp/cortex_a65ae_smp/ac6/src/tx_thread_system_return.S

@@ -67,7 +67,8 @@
 /*                                             added ARMv8.2-A support,   */
 /*                                            resulting in version 6.1.10 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -173,6 +174,7 @@ __tx_thread_dont_save_ts:
 
     /* Set ready bit in thread control block.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x3, #1                              // Build ready value
     STR     w3, [x6, #260]                      // Make the thread ready
     DMB     ISH                                 //

ports_smp/cortex_a65ae_smp/gnu/src/tx_thread_context_restore.S

@@ -70,7 +70,8 @@
 /*                                            FIFO queueing,              */
 /*                                            resulting in version 6.1.11 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -294,6 +295,7 @@ __tx_thread_dont_save_ts:
 
     /* Set bit indicating this thread is ready for execution.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x2, #1                              // Build ready flag
     STR     w2, [x0, #260]                      // Set thread's ready flag
     DMB     ISH                                 // Ensure that accesses to shared resource have completed

ports_smp/cortex_a65ae_smp/gnu/src/tx_thread_system_return.S

@@ -67,7 +67,8 @@
 /*                                             added ARMv8.2-A support,   */
 /*                                            resulting in version 6.1.10 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -173,6 +174,7 @@ __tx_thread_dont_save_ts:
 
     /* Set ready bit in thread control block.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x3, #1                              // Build ready value
     STR     w3, [x6, #260]                      // Make the thread ready
     DMB     ISH                                 //

ports_smp/cortex_a72_smp/ac6/src/tx_thread_context_restore.S

@@ -70,7 +70,8 @@
 /*                                            FIFO queueing,              */
 /*                                            resulting in version 6.1.11 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -294,6 +295,7 @@ __tx_thread_dont_save_ts:
 
     /* Set bit indicating this thread is ready for execution.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x2, #1                              // Build ready flag
     STR     w2, [x0, #260]                      // Set thread's ready flag
     DMB     ISH                                 // Ensure that accesses to shared resource have completed

ports_smp/cortex_a72_smp/ac6/src/tx_thread_system_return.S

@@ -67,7 +67,8 @@
 /*                                             added ARMv8.2-A support,   */
 /*                                            resulting in version 6.1.10 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -173,6 +174,7 @@ __tx_thread_dont_save_ts:
 
     /* Set ready bit in thread control block.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x3, #1                              // Build ready value
     STR     w3, [x6, #260]                      // Make the thread ready
     DMB     ISH                                 //

ports_smp/cortex_a72_smp/gnu/src/tx_thread_context_restore.S

@@ -70,7 +70,8 @@
 /*                                            FIFO queueing,              */
 /*                                            resulting in version 6.1.11 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -294,6 +295,7 @@ __tx_thread_dont_save_ts:
 
     /* Set bit indicating this thread is ready for execution.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x2, #1                              // Build ready flag
     STR     w2, [x0, #260]                      // Set thread's ready flag
     DMB     ISH                                 // Ensure that accesses to shared resource have completed

ports_smp/cortex_a72_smp/gnu/src/tx_thread_system_return.S

@@ -67,7 +67,8 @@
 /*                                             added ARMv8.2-A support,   */
 /*                                            resulting in version 6.1.10 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -173,6 +174,7 @@ __tx_thread_dont_save_ts:
 
     /* Set ready bit in thread control block.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x3, #1                              // Build ready value
     STR     w3, [x6, #260]                      // Make the thread ready
     DMB     ISH                                 //

ports_smp/cortex_a73_smp/ac6/src/tx_thread_context_restore.S

@@ -70,7 +70,8 @@
 /*                                            FIFO queueing,              */
 /*                                            resulting in version 6.1.11 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -294,6 +295,7 @@ __tx_thread_dont_save_ts:
 
     /* Set bit indicating this thread is ready for execution.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x2, #1                              // Build ready flag
     STR     w2, [x0, #260]                      // Set thread's ready flag
     DMB     ISH                                 // Ensure that accesses to shared resource have completed

ports_smp/cortex_a73_smp/ac6/src/tx_thread_system_return.S

@@ -67,7 +67,8 @@
 /*                                             added ARMv8.2-A support,   */
 /*                                            resulting in version 6.1.10 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -173,6 +174,7 @@ __tx_thread_dont_save_ts:
 
     /* Set ready bit in thread control block.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x3, #1                              // Build ready value
     STR     w3, [x6, #260]                      // Make the thread ready
     DMB     ISH                                 //

ports_smp/cortex_a73_smp/gnu/src/tx_thread_context_restore.S

@@ -70,7 +70,8 @@
 /*                                            FIFO queueing,              */
 /*                                            resulting in version 6.1.11 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -294,6 +295,7 @@ __tx_thread_dont_save_ts:
 
     /* Set bit indicating this thread is ready for execution.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x2, #1                              // Build ready flag
     STR     w2, [x0, #260]                      // Set thread's ready flag
     DMB     ISH                                 // Ensure that accesses to shared resource have completed

ports_smp/cortex_a73_smp/gnu/src/tx_thread_system_return.S

@@ -67,7 +67,8 @@
 /*                                             added ARMv8.2-A support,   */
 /*                                            resulting in version 6.1.10 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -173,6 +174,7 @@ __tx_thread_dont_save_ts:
 
     /* Set ready bit in thread control block.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x3, #1                              // Build ready value
     STR     w3, [x6, #260]                      // Make the thread ready
     DMB     ISH                                 //

ports_smp/cortex_a75_smp/ac6/src/tx_thread_context_restore.S

@@ -70,7 +70,8 @@
 /*                                            FIFO queueing,              */
 /*                                            resulting in version 6.1.11 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -294,6 +295,7 @@ __tx_thread_dont_save_ts:
 
     /* Set bit indicating this thread is ready for execution.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x2, #1                              // Build ready flag
     STR     w2, [x0, #260]                      // Set thread's ready flag
     DMB     ISH                                 // Ensure that accesses to shared resource have completed

ports_smp/cortex_a75_smp/ac6/src/tx_thread_system_return.S

@@ -67,7 +67,8 @@
 /*                                             added ARMv8.2-A support,   */
 /*                                            resulting in version 6.1.10 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -173,6 +174,7 @@ __tx_thread_dont_save_ts:
 
     /* Set ready bit in thread control block.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x3, #1                              // Build ready value
     STR     w3, [x6, #260]                      // Make the thread ready
     DMB     ISH                                 //

ports_smp/cortex_a75_smp/gnu/src/tx_thread_context_restore.S

@@ -70,7 +70,8 @@
 /*                                            FIFO queueing,              */
 /*                                            resulting in version 6.1.11 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -294,6 +295,7 @@ __tx_thread_dont_save_ts:
 
     /* Set bit indicating this thread is ready for execution.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x2, #1                              // Build ready flag
     STR     w2, [x0, #260]                      // Set thread's ready flag
     DMB     ISH                                 // Ensure that accesses to shared resource have completed

ports_smp/cortex_a75_smp/gnu/src/tx_thread_system_return.S

@@ -67,7 +67,8 @@
 /*                                             added ARMv8.2-A support,   */
 /*                                            resulting in version 6.1.10 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -173,6 +174,7 @@ __tx_thread_dont_save_ts:
 
     /* Set ready bit in thread control block.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x3, #1                              // Build ready value
     STR     w3, [x6, #260]                      // Make the thread ready
     DMB     ISH                                 //

ports_smp/cortex_a76_smp/ac6/src/tx_thread_context_restore.S

@@ -70,7 +70,8 @@
 /*                                            FIFO queueing,              */
 /*                                            resulting in version 6.1.11 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -294,6 +295,7 @@ __tx_thread_dont_save_ts:
 
     /* Set bit indicating this thread is ready for execution.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x2, #1                              // Build ready flag
     STR     w2, [x0, #260]                      // Set thread's ready flag
     DMB     ISH                                 // Ensure that accesses to shared resource have completed

ports_smp/cortex_a76_smp/ac6/src/tx_thread_system_return.S

@@ -67,7 +67,8 @@
 /*                                             added ARMv8.2-A support,   */
 /*                                            resulting in version 6.1.10 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -173,6 +174,7 @@ __tx_thread_dont_save_ts:
 
     /* Set ready bit in thread control block.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x3, #1                              // Build ready value
     STR     w3, [x6, #260]                      // Make the thread ready
     DMB     ISH                                 //

ports_smp/cortex_a76_smp/gnu/src/tx_thread_context_restore.S

@@ -70,7 +70,8 @@
 /*                                            FIFO queueing,              */
 /*                                            resulting in version 6.1.11 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -294,6 +295,7 @@ __tx_thread_dont_save_ts:
 
     /* Set bit indicating this thread is ready for execution.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x2, #1                              // Build ready flag
     STR     w2, [x0, #260]                      // Set thread's ready flag
     DMB     ISH                                 // Ensure that accesses to shared resource have completed

ports_smp/cortex_a76_smp/gnu/src/tx_thread_system_return.S

@@ -67,7 +67,8 @@
 /*                                             added ARMv8.2-A support,   */
 /*                                            resulting in version 6.1.10 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -173,6 +174,7 @@ __tx_thread_dont_save_ts:
 
     /* Set ready bit in thread control block.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x3, #1                              // Build ready value
     STR     w3, [x6, #260]                      // Make the thread ready
     DMB     ISH                                 //

ports_smp/cortex_a76ae_smp/ac6/src/tx_thread_context_restore.S

@@ -70,7 +70,8 @@
 /*                                            FIFO queueing,              */
 /*                                            resulting in version 6.1.11 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -294,6 +295,7 @@ __tx_thread_dont_save_ts:
 
     /* Set bit indicating this thread is ready for execution.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x2, #1                              // Build ready flag
     STR     w2, [x0, #260]                      // Set thread's ready flag
     DMB     ISH                                 // Ensure that accesses to shared resource have completed

ports_smp/cortex_a76ae_smp/ac6/src/tx_thread_system_return.S

@@ -67,7 +67,8 @@
 /*                                             added ARMv8.2-A support,   */
 /*                                            resulting in version 6.1.10 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -173,6 +174,7 @@ __tx_thread_dont_save_ts:
 
     /* Set ready bit in thread control block.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x3, #1                              // Build ready value
     STR     w3, [x6, #260]                      // Make the thread ready
     DMB     ISH                                 //

ports_smp/cortex_a76ae_smp/gnu/src/tx_thread_context_restore.S

@@ -70,7 +70,8 @@
 /*                                            FIFO queueing,              */
 /*                                            resulting in version 6.1.11 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -294,6 +295,7 @@ __tx_thread_dont_save_ts:
 
     /* Set bit indicating this thread is ready for execution.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x2, #1                              // Build ready flag
     STR     w2, [x0, #260]                      // Set thread's ready flag
     DMB     ISH                                 // Ensure that accesses to shared resource have completed

ports_smp/cortex_a76ae_smp/gnu/src/tx_thread_system_return.S

@@ -67,7 +67,8 @@
 /*                                             added ARMv8.2-A support,   */
 /*                                            resulting in version 6.1.10 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -173,6 +174,7 @@ __tx_thread_dont_save_ts:
 
     /* Set ready bit in thread control block.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x3, #1                              // Build ready value
     STR     w3, [x6, #260]                      // Make the thread ready
     DMB     ISH                                 //

ports_smp/cortex_a77_smp/ac6/src/tx_thread_context_restore.S

@@ -70,7 +70,8 @@
 /*                                            FIFO queueing,              */
 /*                                            resulting in version 6.1.11 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -294,6 +295,7 @@ __tx_thread_dont_save_ts:
 
     /* Set bit indicating this thread is ready for execution.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x2, #1                              // Build ready flag
     STR     w2, [x0, #260]                      // Set thread's ready flag
     DMB     ISH                                 // Ensure that accesses to shared resource have completed

ports_smp/cortex_a77_smp/ac6/src/tx_thread_system_return.S

@@ -67,7 +67,8 @@
 /*                                             added ARMv8.2-A support,   */
 /*                                            resulting in version 6.1.10 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -173,6 +174,7 @@ __tx_thread_dont_save_ts:
 
     /* Set ready bit in thread control block.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x3, #1                              // Build ready value
     STR     w3, [x6, #260]                      // Make the thread ready
     DMB     ISH                                 //

ports_smp/cortex_a77_smp/gnu/src/tx_thread_context_restore.S

@@ -70,7 +70,8 @@
 /*                                            FIFO queueing,              */
 /*                                            resulting in version 6.1.11 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -294,6 +295,7 @@ __tx_thread_dont_save_ts:
 
     /* Set bit indicating this thread is ready for execution.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x2, #1                              // Build ready flag
     STR     w2, [x0, #260]                      // Set thread's ready flag
     DMB     ISH                                 // Ensure that accesses to shared resource have completed

ports_smp/cortex_a77_smp/gnu/src/tx_thread_system_return.S

@@ -67,7 +67,8 @@
 /*                                             added ARMv8.2-A support,   */
 /*                                            resulting in version 6.1.10 */
 /*  xx-xx-xxxx     Tiejun Zhou              Modified comment(s), added    */
-/*                                            #include tx_user.h,         */
+/*                                            #include tx_user.h, added   */
+/*                                            memory barrier,             */
 /*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
@@ -173,6 +174,7 @@ __tx_thread_dont_save_ts:
 
     /* Set ready bit in thread control block.  */
 
+    DMB     ISH                                 // Ensure that accesses to shared resource have completed
     MOV     x3, #1                              // Build ready value
     STR     w3, [x6, #260]                      // Make the thread ready
     DMB     ISH                                 //