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Added memory barrier before thread scheduling for ARMv8-A ThreadX SMP. (#280)

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TiejunZhou
2023-06-26 09:21:06 +08:00
committed by GitHub
parent 08380caa77
commit 8ff9910ddc
50 changed files with 150 additions and 50 deletions
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4
ports_smp/cortex_a76ae_smp/ac6/src/tx_thread_context_restore.S
View File

@@ -70,7 +70,8 @@
/* FIFO queueing, */
/* resulting in version 6.1.11 */
/* xx-xx-xxxx Tiejun Zhou Modified comment(s), added */
/* #include tx_user.h, */
/* #include tx_user.h, added */
/* memory barrier, */
/* resulting in version 6.x */
/* */
/**************************************************************************/
@@ -294,6 +295,7 @@ __tx_thread_dont_save_ts:
/* Set bit indicating this thread is ready for execution. */
DMB ISH // Ensure that accesses to shared resource have completed
MOV x2, #1 // Build ready flag
STR w2, [x0, #260] // Set thread's ready flag
DMB ISH // Ensure that accesses to shared resource have completed

4
ports_smp/cortex_a76ae_smp/ac6/src/tx_thread_system_return.S
View File

@@ -67,7 +67,8 @@
/* added ARMv8.2-A support, */
/* resulting in version 6.1.10 */
/* xx-xx-xxxx Tiejun Zhou Modified comment(s), added */
/* #include tx_user.h, */
/* #include tx_user.h, added */
/* memory barrier, */
/* resulting in version 6.x */
/* */
/**************************************************************************/
@@ -173,6 +174,7 @@ __tx_thread_dont_save_ts:
/* Set ready bit in thread control block. */
DMB ISH // Ensure that accesses to shared resource have completed
MOV x3, #1 // Build ready value
STR w3, [x6, #260] // Make the thread ready
DMB ISH //

4
ports_smp/cortex_a76ae_smp/gnu/src/tx_thread_context_restore.S
View File

@@ -70,7 +70,8 @@
/* FIFO queueing, */
/* resulting in version 6.1.11 */
/* xx-xx-xxxx Tiejun Zhou Modified comment(s), added */
/* #include tx_user.h, */
/* #include tx_user.h, added */
/* memory barrier, */
/* resulting in version 6.x */
/* */
/**************************************************************************/
@@ -294,6 +295,7 @@ __tx_thread_dont_save_ts:
/* Set bit indicating this thread is ready for execution. */
DMB ISH // Ensure that accesses to shared resource have completed
MOV x2, #1 // Build ready flag
STR w2, [x0, #260] // Set thread's ready flag
DMB ISH // Ensure that accesses to shared resource have completed

4
ports_smp/cortex_a76ae_smp/gnu/src/tx_thread_system_return.S
View File

@@ -67,7 +67,8 @@
/* added ARMv8.2-A support, */
/* resulting in version 6.1.10 */
/* xx-xx-xxxx Tiejun Zhou Modified comment(s), added */
/* #include tx_user.h, */
/* #include tx_user.h, added */
/* memory barrier, */
/* resulting in version 6.x */
/* */
/**************************************************************************/
@@ -173,6 +174,7 @@ __tx_thread_dont_save_ts:
/* Set ready bit in thread control block. */
DMB ISH // Ensure that accesses to shared resource have completed
MOV x3, #1 // Build ready value
STR w3, [x6, #260] // Make the thread ready
DMB ISH //