mirror of
https://github.com/eclipse-threadx/threadx.git
synced 2025-11-16 12:34:48 +00:00
Release 6.2.0
This commit is contained in:
@@ -11,36 +11,39 @@
|
||||
/**************************************************************************/
|
||||
|
||||
/**************************************************************************/
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||||
/** */
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** Port Specific */
|
||||
/** */
|
||||
/**************************************************************************/
|
||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This file contains data type definitions that make the ThreadX */
|
||||
/* real-time kernel function identically on a variety of different */
|
||||
/* processor architectures. For example, the size or number of bits */
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||||
/* in an "int" data type vary between microprocessor architectures and */
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||||
/* even C compilers for the same microprocessor. ThreadX does not */
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/* directly use native C data types. Instead, ThreadX creates its */
|
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/* own special types that can be mapped to actual data types by this */
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/* file to guarantee consistency in the interface and functionality. */
|
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/**************************************************************************/
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 11-09-2020 Cadence Design Systems Initial Version 6.1.2 */
|
||||
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
|
||||
/* macro definition, */
|
||||
/* resulting in version 6.1.6 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This file contains data type definitions that make the ThreadX */
|
||||
/* real-time kernel function identically on a variety of different */
|
||||
/* processor architectures. For example, the size or number of bits */
|
||||
/* in an "int" data type vary between microprocessor architectures and */
|
||||
/* even C compilers for the same microprocessor. ThreadX does not */
|
||||
/* directly use native C data types. Instead, ThreadX creates its */
|
||||
/* own special types that can be mapped to actual data types by this */
|
||||
/* file to guarantee consistency in the interface and functionality. */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 11-09-2020 Cadence Design Systems Initial Version 6.1.2 */
|
||||
/* 04-02-2021 Bhupendra Naphade Modified comment(s), updated */
|
||||
/* macro definition, */
|
||||
/* resulting in version 6.1.6 */
|
||||
/* 10-31-2022 Scott Larson Modified comment(s), removed */
|
||||
/* EPK extension, */
|
||||
/* resulting in version 6.2.0 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
|
||||
#ifndef TX_PORT_H
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#define TX_PORT_H
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@@ -62,7 +65,7 @@
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/* Some generic C sources call memset() and need this (else compiler warns).
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Until the generic sources take care of this, do it here. */
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||||
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#include <string.h>
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|
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@@ -74,7 +77,7 @@
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||||
The C library reent structure can be quite large so it is placed
|
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at the end of TX_THREAD, and a pointer to it is defined near the
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beginning of TX_THREAD where assembly code can easily get to it
|
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beginning of TX_THREAD where assembly code can easily get to it
|
||||
at a fixed offset.
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*/
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||||
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@@ -108,7 +111,7 @@ extern void _tx_clib_thread_setup(struct TX_THREAD_STRUCT *thread_ptr);
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#endif
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||||
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||||
|
||||
/* Define ThreadX basic types for this port. */
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||||
/* Define ThreadX basic types for this port. */
|
||||
|
||||
#define VOID void
|
||||
typedef char CHAR;
|
||||
@@ -135,11 +138,11 @@ typedef unsigned short USHORT;
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||||
/*
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Define the minimum stack size for a thread on this processor.
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If the size supplied during thread creation is less than TX_MINIMUM_STACK,
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the thread create call will return an error. The minimum allows for a
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the thread create call will return an error. The minimum allows for a
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thread whose entry function makes no calls and needs no local frame.
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||||
TX_MINIMUM_STACK_BASIC allows the entry function to at least call
|
||||
tx_thread_relinquish(). An extra 0x10 bytes is allowed in all cases to
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||||
allow for stack pointer alignment to 16 bytes. There is an additional premium
|
||||
TX_MINIMUM_STACK_BASIC allows the entry function to at least call
|
||||
tx_thread_relinquish(). An extra 0x10 bytes is allowed in all cases to
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||||
allow for stack pointer alignment to 16 bytes. There is an additional premium
|
||||
for the stack checking functionality of TX_ENABLE_STACK_CHECKING.
|
||||
In Xtensa, all these amounts depend on the function call ABI used by the
|
||||
configuration (in general, Call0 ABI needs about 0x20 bytes less stack space
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@@ -147,8 +150,8 @@ typedef unsigned short USHORT;
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Optimization usually requires less stack.
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TX_MINIMUM_STACK_BASIC is a MINIMUM for threads that call tx_thread_relinquish()
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||||
only. Threads that do more, and in particular call C library functions such as
|
||||
printf(), need much more stack space and it is up to the application developer
|
||||
only. Threads that do more, and in particular call C library functions such as
|
||||
printf(), need much more stack space and it is up to the application developer
|
||||
to determine how much.
|
||||
*/
|
||||
|
||||
@@ -186,15 +189,15 @@ typedef unsigned short USHORT;
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||||
/*
|
||||
Minimum stack size for the ThreadX system stack on this processor.
|
||||
This is just a useful starting point for an application, it is not
|
||||
checked by ThreadX. The minimum system stack size allows for the
|
||||
possible depth of interrupt nesting (XCHAL_EXCM_LEVEL-1 interrupt
|
||||
checked by ThreadX. The minimum system stack size allows for the
|
||||
possible depth of interrupt nesting (XCHAL_EXCM_LEVEL-1 interrupt
|
||||
stack frames and XCHAL_EXCM_LEVEL interrupt handlers including timer),
|
||||
assuming very basic interrupt handlers (allows 1 call12). It needs to
|
||||
be increased to support the application's real interrupt handlers (and
|
||||
timer interrupt if TX_TIMER_PROCESS_IN_ISR). The system stack is located
|
||||
where the stack pointer is inside tx_kernel_enter() which is usually from
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||||
main(), and so is determined by the development tools. It grows downward
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||||
toward the first available memory pointer passed to tx_application_define().
|
||||
assuming very basic interrupt handlers (allows 1 call12). It needs to
|
||||
be increased to support the application's real interrupt handlers (and
|
||||
timer interrupt if TX_TIMER_PROCESS_IN_ISR). The system stack is located
|
||||
where the stack pointer is inside tx_kernel_enter() which is usually from
|
||||
main(), and so is determined by the development tools. It grows downward
|
||||
toward the first available memory pointer passed to tx_application_define().
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||||
An application should allow sufficient space for the system stack.
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||||
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||||
For XEA3, allow a minimum of XCHAL_NUM_INTLEVELS nested interrupts. The stack
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@@ -235,12 +238,12 @@ typedef unsigned short USHORT;
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#ifndef __ASSEMBLER__
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#ifndef TX_TIMER_THREAD_PRIORITY
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#define TX_TIMER_THREAD_PRIORITY 0 /* Default timer thread priority */
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#ifndef TX_TIMER_THREAD_PRIORITY
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#define TX_TIMER_THREAD_PRIORITY 0 /* Default timer thread priority */
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||||
#endif
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||||
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||||
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||||
/* Define various constants for the ThreadX Xtensa port. */
|
||||
/* Define various constants for the ThreadX Xtensa port. */
|
||||
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||||
#if XCHAL_HAVE_XEA3
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||||
#define TX_INT_DISABLE 0x8 /* Disable interrupts value */
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||||
@@ -252,9 +255,9 @@ typedef unsigned short USHORT;
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||||
|
||||
|
||||
/*
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||||
Define the clock source for trace event entry time stamp. The following
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||||
two item are port specific. For example, if the time source is at the
|
||||
address 0x0a800024 and is 16-bits in size, the clock source constants
|
||||
Define the clock source for trace event entry time stamp. The following
|
||||
two item are port specific. For example, if the time source is at the
|
||||
address 0x0a800024 and is 16-bits in size, the clock source constants
|
||||
would be:
|
||||
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||||
#define TX_TRACE_TIME_SOURCE *((ULONG *) 0x0a800024)
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||||
@@ -313,9 +316,9 @@ typedef unsigned short USHORT;
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||||
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||||
/*
|
||||
Determine whether or not stack checking is enabled. By default, ThreadX
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||||
stack checking is disabled. When the following is defined, ThreadX thread
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||||
stack checking is disabled. When the following is defined, ThreadX thread
|
||||
stack checking is enabled. If enabled (TX_ENABLE_STACK_CHECKING is defined),
|
||||
the TX_DISABLE_STACK_FILLING define is canceled, thereby forcing the stack
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||||
the TX_DISABLE_STACK_FILLING define is canceled, thereby forcing the stack
|
||||
fill which is necessary for the stack checking logic.
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||||
*/
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||||
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||||
@@ -326,7 +329,7 @@ typedef unsigned short USHORT;
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||||
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||||
/*
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||||
Define the TX_THREAD control block extensions for this port. The main
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reason for the multiple macros is so that backward compatibility can
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reason for the multiple macros is so that backward compatibility can
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be maintained with existing ThreadX kernel awareness modules.
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||||
*/
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||||
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||||
@@ -350,10 +353,7 @@ typedef unsigned short USHORT;
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||||
#define TX_THREAD_EXTENSION_2
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||||
/* Execution profile related */
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||||
#define TX_THREAD_EXTENSION_3 \
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unsigned long long tx_thread_execution_time_total; \
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unsigned long tx_thread_execution_time_last_start;
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||||
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#define TX_THREAD_EXTENSION_3
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||||
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||||
/* Define the port extensions of the remaining ThreadX objects. */
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||||
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@@ -366,11 +366,11 @@ typedef unsigned short USHORT;
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#define TX_TIMER_EXTENSION
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||||
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||||
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||||
/* Define the user extension field of the thread control block. Nothing
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||||
/* Define the user extension field of the thread control block. Nothing
|
||||
additional is needed for this port so it is defined as white space. */
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||||
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||||
#ifndef TX_THREAD_USER_EXTENSION
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#define TX_THREAD_USER_EXTENSION
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#define TX_THREAD_USER_EXTENSION
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#endif
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||||
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||||
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||||
@@ -470,8 +470,8 @@ extern int xt_timer_intnum;
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/* Define the version ID of ThreadX. This may be utilized by the application. */
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#ifdef TX_THREAD_INIT
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CHAR _tx_version_id[] =
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"Copyright (c) Microsoft Corporation. * Azure RTOS Xtensa Version 6.1.9 *";
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||||
CHAR _tx_version_id[] =
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"Copyright (c) Microsoft Corporation. All rights reserved. * Azure RTOS Xtensa Version 6.2.0 *";
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||||
#else
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extern CHAR _tx_version_id[];
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||||
#endif
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||||
|
||||
@@ -34,8 +34,8 @@
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||||
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** Thread */
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||||
/** */
|
||||
@@ -51,19 +51,21 @@
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||||
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||||
.text
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||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function restores the interrupt context if it is processing a */
|
||||
/* nested interrupt. If not, it returns to the interrupt thread if no */
|
||||
/* preemption is necessary. Otherwise, if preemption is necessary or */
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||||
/* if no thread was running, the function returns to the scheduler. */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* 12-31-2020 Cadence Design Systems Initial Version 6.1.3 */
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function restores the interrupt context if it is processing a */
|
||||
/* nested interrupt. If not, it returns to the interrupt thread if no */
|
||||
/* preemption is necessary. Otherwise, if preemption is necessary or */
|
||||
/* if no thread was running, the function returns to the scheduler. */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* 12-31-2020 Cadence Design Systems Initial Version 6.1.3 */
|
||||
/* 10-31-2022 Scott Larson Updated EPK definitions, */
|
||||
/* resulting in version 6.2.0 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
|
||||
// VOID _tx_thread_context_restore(VOID)
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// {
|
||||
@@ -73,16 +75,16 @@
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_tx_thread_context_restore:
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||||
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/*
|
||||
Please note: Control flow might seem strange. This is because it has been
|
||||
optimized to avoid taken branches in the longest normal path (the critical
|
||||
one for worst-case latency), presumed to be a non-nested interrupt that
|
||||
Please note: Control flow might seem strange. This is because it has been
|
||||
optimized to avoid taken branches in the longest normal path (the critical
|
||||
one for worst-case latency), presumed to be a non-nested interrupt that
|
||||
preempts) and to hide pipeline interlock cycles where possible.
|
||||
*/
|
||||
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/* Lockout interrupts. */
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XT_INTS_DISABLE(a0)
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||||
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#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
|
||||
#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
|
||||
/* Call the ISR exit function to indicate an ISR is complete. */
|
||||
#ifdef __XTENSA_CALL0_ABI__
|
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call0 _tx_execution_isr_exit
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@@ -106,7 +108,7 @@ _tx_thread_context_restore:
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||||
.Ln_tx_thread_not_nested_restore:
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||||
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/* Determine if a thread was interrupted and no preemption is required. */
|
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// else if (((_tx_thread_current_ptr)
|
||||
// else if (((_tx_thread_current_ptr)
|
||||
// && (_tx_thread_current_ptr == _tx_thread_execute_ptr))
|
||||
// || (_tx_thread_preempt_disable))
|
||||
// {
|
||||
@@ -124,7 +126,7 @@ _tx_thread_context_restore:
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||||
|
||||
// /* the no-preempt case has moved down so we fall-thru to preempt */
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||||
bgei a3, 1, .L_tx_thread_no_preempt_restore
|
||||
|
||||
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||||
// }
|
||||
// else
|
||||
// {
|
||||
@@ -137,7 +139,7 @@ _tx_thread_context_restore:
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||||
/* Store standard preserved registers. */
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||||
/*
|
||||
Call0 ABI callee-saved regs a12-15 need to be saved before preemption.
|
||||
However a12-13 were saved for scratch by _tx_thread_context_save().
|
||||
However a12-13 were saved for scratch by _tx_thread_context_save().
|
||||
*/
|
||||
#ifdef __XTENSA_CALL0_ABI__ /* Call0: now save callee-save regs */
|
||||
s32i a14, a3, XT_STK_A14
|
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@@ -151,7 +153,7 @@ _tx_thread_context_restore:
|
||||
l32i a4, a3, 0 /* a4 = _tx_timer_time_slice */
|
||||
beqz a4, .L_tx_thread_dont_save_ts
|
||||
|
||||
// _tx_thread_current_ptr -> tx_thread_time_slice
|
||||
// _tx_thread_current_ptr -> tx_thread_time_slice
|
||||
// = _tx_timer_time_slice;
|
||||
// _tx_timer_time_slice = 0; */
|
||||
s32i a4, a2, tx_thread_time_slice
|
||||
@@ -175,7 +177,7 @@ _tx_thread_context_restore:
|
||||
|
||||
.L_tx_thread_idle_system_restore:
|
||||
|
||||
/*
|
||||
/*
|
||||
Return via the scheduler.
|
||||
Scheduler returns eventually to this function's caller as if called by it.
|
||||
At this point we are still on the system stack.
|
||||
@@ -202,8 +204,8 @@ _tx_thread_context_restore:
|
||||
call0 _xt_context_restore
|
||||
|
||||
/*
|
||||
Must return via the exit dispatcher corresponding to the entrypoint
|
||||
from which this was called. Interruptee's A0, A1, PS, PC are restored
|
||||
Must return via the exit dispatcher corresponding to the entrypoint
|
||||
from which this was called. Interruptee's A0, A1, PS, PC are restored
|
||||
and the interrupt stack frame is deallocated in the exit dispatcher.
|
||||
At this point we are on the thread's stack.
|
||||
*/
|
||||
|
||||
@@ -34,8 +34,8 @@
|
||||
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** Thread */
|
||||
/** */
|
||||
@@ -49,21 +49,23 @@
|
||||
|
||||
.text
|
||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function waits for a thread control block pointer to appear in */
|
||||
/* the _tx_thread_execute_ptr variable. Once a thread pointer appears */
|
||||
/* in the variable, the corresponding thread is resumed. */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 12-31-2020 Cadence Design Systems Initial Version 6.1.3 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function waits for a thread control block pointer to appear in */
|
||||
/* the _tx_thread_execute_ptr variable. Once a thread pointer appears */
|
||||
/* in the variable, the corresponding thread is resumed. */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 12-31-2020 Cadence Design Systems Initial Version 6.1.3 */
|
||||
/* 10-31-2022 Scott Larson Updated EPK definitions, */
|
||||
/* resulting in version 6.2.0 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
|
||||
// VOID _tx_thread_schedule(VOID)
|
||||
// {
|
||||
@@ -96,8 +98,8 @@ _tx_thread_schedule:
|
||||
Note on Windowed ABI:
|
||||
Callers of this don't expect it to return to them. Most use 'call0'.
|
||||
The only windowed (C) caller is _tx_initialize_kernel_enter().
|
||||
There are no args or results to pass. So we don't really care if the
|
||||
window gets rotated. We can omit the 'entry' altogether and avoid the
|
||||
There are no args or results to pass. So we don't really care if the
|
||||
window gets rotated. We can omit the 'entry' altogether and avoid the
|
||||
need for a special "no entry" entrypoint to this function.
|
||||
*/
|
||||
|
||||
@@ -108,11 +110,11 @@ _tx_thread_schedule:
|
||||
call0 scheduler_return
|
||||
#endif
|
||||
|
||||
/*
|
||||
/*
|
||||
Wait for a thread to execute (Idle Loop).
|
||||
First ensure interrupts (except hi-pri) are disabled so result
|
||||
First ensure interrupts (except hi-pri) are disabled so result
|
||||
of reading _tx_thread_execute_ptr can't change before testing.
|
||||
While there's no thread ready, enable interrupts and wait in a
|
||||
While there's no thread ready, enable interrupts and wait in a
|
||||
low power state, then disable interrupts and repeat the test.
|
||||
*/
|
||||
// do
|
||||
@@ -130,7 +132,7 @@ _tx_thread_schedule:
|
||||
// while(_tx_thread_execute_ptr == TX_NULL);
|
||||
|
||||
.L_tx_thread_schedule_ready:
|
||||
|
||||
|
||||
/* Yes! We have a thread to execute. Lockout interrupts and
|
||||
transfer control to it. Interrupts are already disabled. */
|
||||
|
||||
@@ -170,7 +172,7 @@ _tx_thread_schedule:
|
||||
// SP = _tx_thread_execute_ptr -> tx_thread_stack_ptr;
|
||||
l32i sp, a2, tx_thread_stack_ptr
|
||||
|
||||
#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
|
||||
#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
|
||||
/* Call the thread entry function to indicate the thread is executing. */
|
||||
#ifdef __XTENSA_CALL0_ABI__
|
||||
call0 _tx_execution_thread_enter
|
||||
@@ -197,8 +199,8 @@ _tx_thread_schedule:
|
||||
|
||||
/* In Call0 ABI, restore callee-saved regs (A12, A13 already restored). */
|
||||
#ifdef __XTENSA_CALL0_ABI__
|
||||
l32i a14, sp, XT_STK_A14
|
||||
l32i a15, sp, XT_STK_A15
|
||||
l32i a14, sp, XT_STK_A14
|
||||
l32i a15, sp, XT_STK_A15
|
||||
#endif
|
||||
|
||||
#if XCHAL_CP_NUM > 0
|
||||
@@ -207,25 +209,25 @@ _tx_thread_schedule:
|
||||
|
||||
/*
|
||||
This does not return to its caller, but to the selected thread.
|
||||
Must return via the exit dispatcher corresponding to the entrypoint
|
||||
from which this was called. Interruptee's A0, A1, PS, PC are restored
|
||||
Must return via the exit dispatcher corresponding to the entrypoint
|
||||
from which this was called. Interruptee's A0, A1, PS, PC are restored
|
||||
and the interrupt stack frame is deallocated in the exit dispatcher.
|
||||
*/
|
||||
l32i a0, sp, XT_STK_EXIT
|
||||
l32i a0, sp, XT_STK_EXIT
|
||||
ret
|
||||
|
||||
.L_tx_thread_synch_return:
|
||||
|
||||
/* Here we return from a solicited entry with a solicited stack frame. */
|
||||
movi a0, TX_FALSE
|
||||
l32i a3, sp, XT_STK_PS
|
||||
l32i a3, sp, XT_STK_PS
|
||||
s32i a0, a2, tx_thread_solicited
|
||||
|
||||
#ifdef __XTENSA_CALL0_ABI__
|
||||
l32i a12, sp, XT_STK_A12
|
||||
l32i a13, sp, XT_STK_A13
|
||||
l32i a14, sp, XT_STK_A14
|
||||
l32i a15, sp, XT_STK_A15
|
||||
l32i a12, sp, XT_STK_A12
|
||||
l32i a13, sp, XT_STK_A13
|
||||
l32i a14, sp, XT_STK_A14
|
||||
l32i a15, sp, XT_STK_A15
|
||||
#endif
|
||||
|
||||
l32i a0, sp, XT_STK_PC /* return address */
|
||||
|
||||
@@ -34,8 +34,8 @@
|
||||
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** Thread */
|
||||
/** */
|
||||
@@ -48,21 +48,23 @@
|
||||
|
||||
.text
|
||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function is target processor specific. It is used to transfer */
|
||||
/* control from a thread back to the system. Only a minimal context */
|
||||
/* is saved since the compiler assumes temp registers are going to get */
|
||||
/* slicked by a function call anyway. */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* 12-31-2020 Cadence Design Systems Initial Version 6.1.3 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function is target processor specific. It is used to transfer */
|
||||
/* control from a thread back to the system. Only a minimal context */
|
||||
/* is saved since the compiler assumes temp registers are going to get */
|
||||
/* slicked by a function call anyway. */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* 12-31-2020 Cadence Design Systems Initial Version 6.1.3 */
|
||||
/* 10-31-2022 Scott Larson Updated EPK definitions, */
|
||||
/* resulting in version 6.2.0 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
|
||||
// VOID _tx_thread_system_return(VOID)
|
||||
// {
|
||||
@@ -91,7 +93,7 @@ _tx_thread_system_return:
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
|
||||
#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
|
||||
/* Call the thread exit function to indicate the thread is no longer executing. */
|
||||
#ifdef __XTENSA_CALL0_ABI__
|
||||
call0 _tx_execution_thread_exit
|
||||
@@ -144,7 +146,7 @@ _tx_thread_system_return:
|
||||
call0 _xt_coproc_savecs
|
||||
|
||||
/* Clear CPENABLE and give up all co-procs. */
|
||||
s16i a5, a4, tx_thread_cp_state + XT_CPENABLE
|
||||
s16i a5, a4, tx_thread_cp_state + XT_CPENABLE
|
||||
wsr a5, CPENABLE /* disable all co-processors */
|
||||
#endif
|
||||
|
||||
@@ -276,7 +278,7 @@ _tx_thread_system_return:
|
||||
wsr a0, CPENABLE /* disable all co-processors */
|
||||
#endif
|
||||
|
||||
/*
|
||||
/*
|
||||
Return via the scheduler.
|
||||
Scheduler returns eventually to this function's caller as if called by it.
|
||||
*/
|
||||
|
||||
Reference in New Issue
Block a user