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6.1 minor release

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This commit is contained in:
Scott Larson
2020-09-30 15:42:41 -07:00
parent 7287542cc8
commit 1b5816a206
3038 changed files with 377204 additions and 8606 deletions
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7
ports/cortex_m4/ac5/example_build/tx_initialize_low_level.s
View File

@@ -97,7 +97,7 @@ Reset_Handler
;/* FUNCTION RELEASE */
;/* */
;/* _tx_initialize_low_level Cortex-M4/AC5 */
;/* 6.0.2 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation. */
@@ -130,10 +130,7 @@ Reset_Handler
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 08-14-2020 Scott Larson Modified comment(s), clean up */
;/* whitespace, resulting */
;/* in version 6.0.2 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_initialize_low_level(VOID)

6
ports/cortex_m4/ac5/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h Cortex-M4/AC5 */
/* 6.0.1 */
/* 6.1 */
/* */
/* AUTHOR */
/* */
@@ -47,7 +47,7 @@
/* */
/* DATE NAME DESCRIPTION */
/* */
/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* */
/**************************************************************************/
@@ -454,7 +454,7 @@ void tx_thread_fpu_disable(void);
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M4/AC5 Version 6.0 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M4/AC5 Version 6.1 *";
#else
#ifdef TX_MISRA_ENABLE
extern CHAR _tx_version_id[100];

7
ports/cortex_m4/ac5/readme_threadx.txt
View File

@@ -197,12 +197,7 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
08-14-2020 ThreadX update of Cortex-M4/AC5 port. The following files were
changed/added for port specific version 6.0.2:
tx_thread_context_save.s Fixed register names.
*.s Modified comments and whitespace.
06/30/2020 Initial ThreadX 6.0.1 version for Cortex-M4 using AC5 tools.
09-30-2020 Initial ThreadX 6.1 version for Cortex-M4 using AC5 tools.
Copyright(c) 1996-2020 Microsoft Corporation

7
ports/cortex_m4/ac5/src/tx_thread_context_restore.s
View File

@@ -33,7 +33,7 @@
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_context_restore Cortex-M4/AC5 */
;/* 6.0.2 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -67,10 +67,7 @@
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 08-14-2020 Scott Larson Modified comment(s), clean up */
;/* whitespace, resulting */
;/* in version 6.0.2 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_context_restore(VOID)

7
ports/cortex_m4/ac5/src/tx_thread_context_save.s
View File

@@ -33,7 +33,7 @@
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_context_save Cortex-M4/AC5 */
;/* 6.0.2 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -66,10 +66,7 @@
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 08-14-2020 Scott Larson Modified comment(s), clean up */
;/* whitespace, resulting */
;/* in version 6.0.2 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_context_save(VOID)

7
ports/cortex_m4/ac5/src/tx_thread_interrupt_control.s
View File

@@ -27,7 +27,7 @@
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_interrupt_control Cortex-M4/AC5 */
;/* 6.0.2 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -57,10 +57,7 @@
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 08-14-2020 Scott Larson Modified comment(s), clean up */
;/* whitespace, resulting */
;/* in version 6.0.2 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;UINT _tx_thread_interrupt_control(UINT new_posture)

7
ports/cortex_m4/ac5/src/tx_thread_interrupt_disable.s
View File

@@ -27,7 +27,7 @@
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_interrupt_disable Cortex-M4/AC5 */
;/* 6.0.2 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation. */
@@ -57,10 +57,7 @@
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 08-14-2020 Scott Larson Modified comment(s), clean up */
;/* whitespace, resulting */
;/* in version 6.0.2 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;UINT _tx_thread_interrupt_disable(UINT new_posture)

7
ports/cortex_m4/ac5/src/tx_thread_interrupt_restore.s
View File

@@ -27,7 +27,7 @@
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_interrupt_restore Cortex-M4/AC5 */
;/* 6.0.2 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation. */
@@ -57,10 +57,7 @@
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 08-14-2020 Scott Larson Modified comment(s), clean up */
;/* whitespace, resulting */
;/* in version 6.0.2 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_interrupt_restore(UINT new_posture)

7
ports/cortex_m4/ac5/src/tx_thread_schedule.s
View File

@@ -39,7 +39,7 @@
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_schedule Cortex-M4/AC5 */
;/* 6.0.2 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -72,10 +72,7 @@
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 08-14-2020 Scott Larson Modified comment(s), clean up */
;/* whitespace, resulting */
;/* in version 6.0.2 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_schedule(VOID)

18
ports/cortex_m4/ac5/src/tx_thread_stack_build.s
View File

@@ -20,15 +20,6 @@
;/**************************************************************************/
;/**************************************************************************/
;
;
;#define TX_SOURCE_CODE
;
;
;/* Include necessary system files. */
;
;#include "tx_api.h"
;#include "tx_thread.h"
;
;
AREA ||.text||, CODE, READONLY
;/**************************************************************************/
@@ -36,7 +27,7 @@
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_stack_build Cortex-M4/AC5 */
;/* 6.0.2 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -68,10 +59,7 @@
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 08-14-2020 Scott Larson Modified comment(s), clean up */
;/* whitespace, resulting */
;/* in version 6.0.2 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(VOID))
@@ -122,7 +110,7 @@ _tx_thread_stack_build
STR r3, [r2, #28] ; Store initial r10
STR r3, [r2, #32] ; Store initial r11
;
; /* Hardware stack follows. /
; /* Hardware stack follows. */
;
STR r3, [r2, #36] ; Store initial r0
STR r3, [r2, #40] ; Store initial r1

7
ports/cortex_m4/ac5/src/tx_thread_system_return.s
View File

@@ -27,7 +27,7 @@
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_system_return Cortex-M4/AC5 */
;/* 6.0.2 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -59,10 +59,7 @@
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 08-14-2020 Scott Larson Modified comment(s), clean up */
;/* whitespace, resulting */
;/* in version 6.0.2 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_system_return(VOID)

7
ports/cortex_m4/ac5/src/tx_timer_interrupt.s
View File

@@ -42,7 +42,7 @@
;/* FUNCTION RELEASE */
;/* */
;/* _tx_timer_interrupt Cortex-M4/AC5 */
;/* 6.0.2 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -76,10 +76,7 @@
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 08-14-2020 Scott Larson Modified comment(s), clean up */
;/* whitespace, resulting */
;/* in version 6.0.2 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_timer_interrupt(VOID)

7
ports/cortex_m4/ac6/example_build/sample_threadx/tx_initialize_low_level.S
View File

@@ -47,7 +47,7 @@ SYSTICK_CYCLES = ((SYSTEM_CLOCK / 100) -1)
@/* FUNCTION RELEASE */
@/* */
@/* _tx_initialize_low_level Cortex-M4/AC6 */
@/* 6.0.2 */
@/* 6.1 */
@/* AUTHOR */
@/* */
@/* William E. Lamie, Microsoft Corporation */
@@ -80,10 +80,7 @@ SYSTICK_CYCLES = ((SYSTEM_CLOCK / 100) -1)
@/* */
@/* DATE NAME DESCRIPTION */
@/* */
@/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
@/* 08-14-2020 Scott Larson Modified comment(s), clean up */
@/* whitespace, resulting */
@/* in version 6.0.2 */
@/* 09-30-2020 William E. Lamie Initial Version 6.1 */
@/* */
@/**************************************************************************/
@VOID _tx_initialize_low_level(VOID)

6
ports/cortex_m4/ac6/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h Cortex-M4/AC6 */
/* 6.0.1 */
/* 6.1 */
/* */
/* AUTHOR */
/* */
@@ -47,7 +47,7 @@
/* */
/* DATE NAME DESCRIPTION */
/* */
/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* */
/**************************************************************************/
@@ -485,7 +485,7 @@ void tx_thread_fpu_disable(void);
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M4/AC6 Version 6.0.1 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M4/AC6 Version 6.1 *";
#else
extern CHAR _tx_version_id[];
#endif

7
ports/cortex_m4/ac6/readme_threadx.txt
View File

@@ -211,12 +211,7 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
08-14-2020 ThreadX update of Cortex-M4/AC6 port. The following files were
changed/added for port specific version 6.0.2:
*.S Modified comments and whitespace.
06/30/2020 Initial ThreadX 6.0.1 version for Cortex-M4 using AC6 tools.
09-30-2020 Initial ThreadX 6.1 version for Cortex-M4 using AC6 tools.
Copyright(c) 1996-2020 Microsoft Corporation

7
ports/cortex_m4/ac6/src/tx_thread_context_restore.S
View File

@@ -38,7 +38,7 @@
@/* FUNCTION RELEASE */
@/* */
@/* _tx_thread_context_restore Cortex-M4/AC6 */
@/* 6.0.2 */
@/* 6.1 */
@/* AUTHOR */
@/* */
@/* William E. Lamie, Microsoft Corporation */
@@ -72,10 +72,7 @@
@/* */
@/* DATE NAME DESCRIPTION */
@/* */
@/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
@/* 08-14-2020 Scott Larson Modified comment(s), clean up */
@/* whitespace, resulting */
@/* in version 6.0.2 */
@/* 09-30-2020 William E. Lamie Initial Version 6.1 */
@/* */
@/**************************************************************************/
@VOID _tx_thread_context_restore(VOID)

7
ports/cortex_m4/ac6/src/tx_thread_context_save.S
View File

@@ -33,7 +33,7 @@
@/* FUNCTION RELEASE */
@/* */
@/* _tx_thread_context_save Cortex-M4/AC6 */
@/* 6.0.2 */
@/* 6.1 */
@/* AUTHOR */
@/* */
@/* William E. Lamie, Microsoft Corporation */
@@ -66,10 +66,7 @@
@/* */
@/* DATE NAME DESCRIPTION */
@/* */
@/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
@/* 08-14-2020 Scott Larson Modified comment(s), clean up */
@/* whitespace, resulting */
@/* in version 6.0.2 */
@/* 09-30-2020 William E. Lamie Initial Version 6.1 */
@/* */
@/**************************************************************************/
@VOID _tx_thread_context_save(VOID)

7
ports/cortex_m4/ac6/src/tx_thread_interrupt_control.S
View File

@@ -29,7 +29,7 @@
@/* FUNCTION RELEASE */
@/* */
@/* _tx_thread_interrupt_control Cortex-M4/AC6 */
@/* 6.0.2 */
@/* 6.1 */
@/* AUTHOR */
@/* */
@/* William E. Lamie, Microsoft Corporation */
@@ -59,10 +59,7 @@
@/* */
@/* DATE NAME DESCRIPTION */
@/* */
@/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
@/* 08-14-2020 Scott Larson Modified comment(s), clean up */
@/* whitespace, resulting */
@/* in version 6.0.2 */
@/* 09-30-2020 William E. Lamie Initial Version 6.1 */
@/* */
@/**************************************************************************/
@/* UINT _tx_thread_interrupt_control(UINT new_posture)

7
ports/cortex_m4/ac6/src/tx_thread_schedule.S
View File

@@ -35,7 +35,7 @@
@/* FUNCTION RELEASE */
@/* */
@/* _tx_thread_schedule Cortex-M4/AC6 */
@/* 6.0.2 */
@/* 6.1 */
@/* AUTHOR */
@/* */
@/* William E. Lamie, Microsoft Corporation */
@@ -68,10 +68,7 @@
@/* */
@/* DATE NAME DESCRIPTION */
@/* */
@/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
@/* 08-14-2020 Scott Larson Modified comment(s), clean up */
@/* whitespace, resulting */
@/* in version 6.0.2 */
@/* 09-30-2020 William E. Lamie Initial Version 6.1 */
@/* */
@/**************************************************************************/
@VOID _tx_thread_schedule(VOID)

7
ports/cortex_m4/ac6/src/tx_thread_stack_build.S
View File

@@ -29,7 +29,7 @@
@/* FUNCTION RELEASE */
@/* */
@/* _tx_thread_stack_build Cortex-M4/AC6 */
@/* 6.0.2 */
@/* 6.1 */
@/* AUTHOR */
@/* */
@/* William E. Lamie, Microsoft Corporation */
@@ -61,10 +61,7 @@
@/* */
@/* DATE NAME DESCRIPTION */
@/* */
@/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
@/* 08-14-2020 Scott Larson Modified comment(s), clean up */
@/* whitespace, resulting */
@/* in version 6.0.2 */
@/* 09-30-2020 William E. Lamie Initial Version 6.1 */
@/* */
@/**************************************************************************/
@VOID _tx_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(VOID))

7
ports/cortex_m4/ac6/src/tx_thread_system_return.S
View File

@@ -29,7 +29,7 @@
@/* FUNCTION RELEASE */
@/* */
@/* _tx_thread_system_return Cortex-M4/AC6 */
@/* 6.0.2 */
@/* 6.1 */
@/* AUTHOR */
@/* */
@/* William E. Lamie, Microsoft Corporation */
@@ -61,10 +61,7 @@
@/* */
@/* DATE NAME DESCRIPTION */
@/* */
@/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
@/* 08-14-2020 Scott Larson Modified comment(s), clean up */
@/* whitespace, resulting */
@/* in version 6.0.2 */
@/* 09-30-2020 William E. Lamie Initial Version 6.1 */
@/* */
@/**************************************************************************/
@/* VOID _tx_thread_system_return(VOID)

7
ports/cortex_m4/ac6/src/tx_timer_interrupt.S
View File

@@ -40,7 +40,7 @@
@/* FUNCTION RELEASE */
@/* */
@/* _tx_timer_interrupt Cortex-M4/AC6 */
@/* 6.0.2 */
@/* 6.1 */
@/* AUTHOR */
@/* */
@/* William E. Lamie, Microsoft Corporation */
@@ -74,10 +74,7 @@
@/* */
@/* DATE NAME DESCRIPTION */
@/* */
@/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
@/* 08-14-2020 Scott Larson Modified comment(s), clean up */
@/* whitespace, resulting */
@/* in version 6.0.2 */
@/* 09-30-2020 William E. Lamie Initial Version 6.1 */
@/* */
@/**************************************************************************/
@VOID _tx_timer_interrupt(VOID)

13
ports/cortex_m4/ghs/example_build/azure_rtos_workspace.gpj Normal file
View File

@@ -0,0 +1,13 @@
#!gbuild
primaryTarget=arm_standalone.tgt
[Project]
-bsp generic
-G
-littleendian
-cpu=cortexm4
-fsingle
sample_threadx.gpj [Program]
sample_threadx_el.gpj [Program]
tx.gpj [Library]
txe.gpj [Library]
..\readme_threadx.txt

40
ports/cortex_m4/ghs/example_build/reset.arm Normal file
View File

@@ -0,0 +1,40 @@
#
#
#/* Define the Cortex-M4 vector area. */
#
.section ".reset", .text
.globl __vectors
__vectors:
.data.w __ghsend_stack # Reset and system stack ptr
.data.w __Reset_Handler # Reset goes to Reset Handler
.data.w __tx_NMIHandler # NMI
.data.w __tx_BadHandler # HardFault
.data.w 0 # MemManage
.data.w 0 # BusFault
.data.w 0 # UsageFault
.data.w 0 # 7
.data.w 0 # 8
.data.w 0 # 9
.data.w 0 # 10
.data.w __tx_SVCallHandler # SVCall
.data.w __tx_DBGHandler # Monitor
.data.w 0 # 13
.data.w __tx_PendSVHandler # PendSV
.data.w __tx_SysTickHandler # SysTick
.data.w __tx_IntHandler # Int 0
.data.w __tx_IntHandler # Int 1
.data.w __tx_IntHandler # Int 2
.data.w __tx_IntHandler # Int 3
.type __vectors,$object
.size __vectors,.-__vectors
#
#
.globl __Reset_Handler
__Reset_Handler:
CPSID i # Disable interrupts
LDR r0,=_start # Build address of GHS startup code
BX r0 # Enter GHS startup
.type __Reset_Handler,$function
.size __Reset_Handler,.-__Reset_Handler

369
ports/cortex_m4/ghs/example_build/sample_threadx.c Normal file
View File

@@ -0,0 +1,369 @@
/* This is a small demo of the high-performance ThreadX kernel. It includes examples of eight
threads of different priorities, using a message queue, semaphore, mutex, event flags group,
byte pool, and block pool. */
#include "tx_api.h"
#define DEMO_STACK_SIZE 1024
#define DEMO_BYTE_POOL_SIZE 9120
#define DEMO_BLOCK_POOL_SIZE 100
#define DEMO_QUEUE_SIZE 100
/* Define the ThreadX object control blocks... */
TX_THREAD thread_0;
TX_THREAD thread_1;
TX_THREAD thread_2;
TX_THREAD thread_3;
TX_THREAD thread_4;
TX_THREAD thread_5;
TX_THREAD thread_6;
TX_THREAD thread_7;
TX_QUEUE queue_0;
TX_SEMAPHORE semaphore_0;
TX_MUTEX mutex_0;
TX_EVENT_FLAGS_GROUP event_flags_0;
TX_BYTE_POOL byte_pool_0;
TX_BLOCK_POOL block_pool_0;
/* Define the counters used in the demo application... */
ULONG thread_0_counter;
ULONG thread_1_counter;
ULONG thread_1_messages_sent;
ULONG thread_2_counter;
ULONG thread_2_messages_received;
ULONG thread_3_counter;
ULONG thread_4_counter;
ULONG thread_5_counter;
ULONG thread_6_counter;
ULONG thread_7_counter;
/* Define thread prototypes. */
void thread_0_entry(ULONG thread_input);
void thread_1_entry(ULONG thread_input);
void thread_2_entry(ULONG thread_input);
void thread_3_and_4_entry(ULONG thread_input);
void thread_5_entry(ULONG thread_input);
void thread_6_and_7_entry(ULONG thread_input);
/* Define main entry point. */
int main()
{
/* Enter the ThreadX kernel. */
tx_kernel_enter();
}
/* Define what the initial system looks like. */
void tx_application_define(void *first_unused_memory)
{
CHAR *pointer = TX_NULL;
/* Create a byte memory pool from which to allocate the thread stacks. */
tx_byte_pool_create(&byte_pool_0, "byte pool 0", first_unused_memory, DEMO_BYTE_POOL_SIZE);
/* Put system definition stuff in here, e.g. thread creates and other assorted
create information. */
/* Allocate the stack for thread 0. */
tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
/* Create the main thread. */
tx_thread_create(&thread_0, "thread 0", thread_0_entry, 0,
pointer, DEMO_STACK_SIZE,
1, 1, TX_NO_TIME_SLICE, TX_AUTO_START);
/* Allocate the stack for thread 1. */
tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
/* Create threads 1 and 2. These threads pass information through a ThreadX
message queue. It is also interesting to note that these threads have a time
slice. */
tx_thread_create(&thread_1, "thread 1", thread_1_entry, 1,
pointer, DEMO_STACK_SIZE,
16, 16, 4, TX_AUTO_START);
/* Allocate the stack for thread 2. */
tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
tx_thread_create(&thread_2, "thread 2", thread_2_entry, 2,
pointer, DEMO_STACK_SIZE,
16, 16, 4, TX_AUTO_START);
/* Allocate the stack for thread 3. */
tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
/* Create threads 3 and 4. These threads compete for a ThreadX counting semaphore.
An interesting thing here is that both threads share the same instruction area. */
tx_thread_create(&thread_3, "thread 3", thread_3_and_4_entry, 3,
pointer, DEMO_STACK_SIZE,
8, 8, TX_NO_TIME_SLICE, TX_AUTO_START);
/* Allocate the stack for thread 4. */
tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
tx_thread_create(&thread_4, "thread 4", thread_3_and_4_entry, 4,
pointer, DEMO_STACK_SIZE,
8, 8, TX_NO_TIME_SLICE, TX_AUTO_START);
/* Allocate the stack for thread 5. */
tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
/* Create thread 5. This thread simply pends on an event flag which will be set
by thread_0. */
tx_thread_create(&thread_5, "thread 5", thread_5_entry, 5,
pointer, DEMO_STACK_SIZE,
4, 4, TX_NO_TIME_SLICE, TX_AUTO_START);
/* Allocate the stack for thread 6. */
tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
/* Create threads 6 and 7. These threads compete for a ThreadX mutex. */
tx_thread_create(&thread_6, "thread 6", thread_6_and_7_entry, 6,
pointer, DEMO_STACK_SIZE,
8, 8, TX_NO_TIME_SLICE, TX_AUTO_START);
/* Allocate the stack for thread 7. */
tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
tx_thread_create(&thread_7, "thread 7", thread_6_and_7_entry, 7,
pointer, DEMO_STACK_SIZE,
8, 8, TX_NO_TIME_SLICE, TX_AUTO_START);
/* Allocate the message queue. */
tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_QUEUE_SIZE*sizeof(ULONG), TX_NO_WAIT);
/* Create the message queue shared by threads 1 and 2. */
tx_queue_create(&queue_0, "queue 0", TX_1_ULONG, pointer, DEMO_QUEUE_SIZE*sizeof(ULONG));
/* Create the semaphore used by threads 3 and 4. */
tx_semaphore_create(&semaphore_0, "semaphore 0", 1);
/* Create the event flags group used by threads 1 and 5. */
tx_event_flags_create(&event_flags_0, "event flags 0");
/* Create the mutex used by thread 6 and 7 without priority inheritance. */
tx_mutex_create(&mutex_0, "mutex 0", TX_NO_INHERIT);
/* Allocate the memory for a small block pool. */
tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_BLOCK_POOL_SIZE, TX_NO_WAIT);
/* Create a block memory pool to allocate a message buffer from. */
tx_block_pool_create(&block_pool_0, "block pool 0", sizeof(ULONG), pointer, DEMO_BLOCK_POOL_SIZE);
/* Allocate a block and release the block memory. */
tx_block_allocate(&block_pool_0, (VOID **) &pointer, TX_NO_WAIT);
/* Release the block back to the pool. */
tx_block_release(pointer);
}
/* Define the test threads. */
void thread_0_entry(ULONG thread_input)
{
UINT status;
/* This thread simply sits in while-forever-sleep loop. */
while(1)
{
/* Increment the thread counter. */
thread_0_counter++;
/* Sleep for 10 ticks. */
tx_thread_sleep(10);
/* Set event flag 0 to wakeup thread 5. */
status = tx_event_flags_set(&event_flags_0, 0x1, TX_OR);
/* Check status. */
if (status != TX_SUCCESS)
break;
}
}
void thread_1_entry(ULONG thread_input)
{
UINT status;
/* This thread simply sends messages to a queue shared by thread 2. */
while(1)
{
/* Increment the thread counter. */
thread_1_counter++;
/* Send message to queue 0. */
status = tx_queue_send(&queue_0, &thread_1_messages_sent, TX_WAIT_FOREVER);
/* Check completion status. */
if (status != TX_SUCCESS)
break;
/* Increment the message sent. */
thread_1_messages_sent++;
}
}
void thread_2_entry(ULONG thread_input)
{
ULONG received_message;
UINT status;
/* This thread retrieves messages placed on the queue by thread 1. */
while(1)
{
/* Increment the thread counter. */
thread_2_counter++;
/* Retrieve a message from the queue. */
status = tx_queue_receive(&queue_0, &received_message, TX_WAIT_FOREVER);
/* Check completion status and make sure the message is what we
expected. */
if ((status != TX_SUCCESS) || (received_message != thread_2_messages_received))
break;
/* Otherwise, all is okay. Increment the received message count. */
thread_2_messages_received++;
}
}
void thread_3_and_4_entry(ULONG thread_input)
{
UINT status;
/* This function is executed from thread 3 and thread 4. As the loop
below shows, these function compete for ownership of semaphore_0. */
while(1)
{
/* Increment the thread counter. */
if (thread_input == 3)
thread_3_counter++;
else
thread_4_counter++;
/* Get the semaphore with suspension. */
status = tx_semaphore_get(&semaphore_0, TX_WAIT_FOREVER);
/* Check status. */
if (status != TX_SUCCESS)
break;
/* Sleep for 2 ticks to hold the semaphore. */
tx_thread_sleep(2);
/* Release the semaphore. */
status = tx_semaphore_put(&semaphore_0);
/* Check status. */
if (status != TX_SUCCESS)
break;
}
}
void thread_5_entry(ULONG thread_input)
{
UINT status;
ULONG actual_flags;
/* This thread simply waits for an event in a forever loop. */
while(1)
{
/* Increment the thread counter. */
thread_5_counter++;
/* Wait for event flag 0. */
status = tx_event_flags_get(&event_flags_0, 0x1, TX_OR_CLEAR,
&actual_flags, TX_WAIT_FOREVER);
/* Check status. */
if ((status != TX_SUCCESS) || (actual_flags != 0x1))
break;
}
}
void thread_6_and_7_entry(ULONG thread_input)
{
UINT status;
/* This function is executed from thread 6 and thread 7. As the loop
below shows, these function compete for ownership of mutex_0. */
while(1)
{
/* Increment the thread counter. */
if (thread_input == 6)
thread_6_counter++;
else
thread_7_counter++;
/* Get the mutex with suspension. */
status = tx_mutex_get(&mutex_0, TX_WAIT_FOREVER);
/* Check status. */
if (status != TX_SUCCESS)
break;
/* Get the mutex again with suspension. This shows
that an owning thread may retrieve the mutex it
owns multiple times. */
status = tx_mutex_get(&mutex_0, TX_WAIT_FOREVER);
/* Check status. */
if (status != TX_SUCCESS)
break;
/* Sleep for 2 ticks to hold the mutex. */
tx_thread_sleep(2);
/* Release the mutex. */
status = tx_mutex_put(&mutex_0);
/* Check status. */
if (status != TX_SUCCESS)
break;
/* Release the mutex again. This will actually
release ownership since it was obtained twice. */
status = tx_mutex_put(&mutex_0);
/* Check status. */
if (status != TX_SUCCESS)
break;
}
}

17
ports/cortex_m4/ghs/example_build/sample_threadx.con Normal file
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@@ -0,0 +1,17 @@
target_connection {
{
title = "Simulator"
type = "Custom"
short_type = "Custom"
args = "simarm -cpu=cortexm4 -fpu -rom_use_entry"
command = "simarm -cpu=cortexm4 -fpu -rom_use_entry"
logfile = ""
mode = "download"
setup_script = ""
run_mode_partner = ""
run_mode_policy = ""
sane = "yes"
log = "no"
timestamp = "0"
}
}

11
ports/cortex_m4/ghs/example_build/sample_threadx.gpj Normal file
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@@ -0,0 +1,11 @@
#!gbuild
[Program]
-I../../../../common/inc
-I../../../../ports_common_green/inc
-I../inc
reset.arm
tx_initialize_low_level.arm
sample_threadx.c
tx.a
sample_threadx.ld
sample_threadx.con

45
ports/cortex_m4/ghs/example_build/sample_threadx.ld Normal file
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@@ -0,0 +1,45 @@
# The following explains what the default Green Hills sections are for:
#
# picbase - base of the text sections, relocatable in -pic mode
# text - text section
# syscall - syscall section, for host I/O under Multi
# fixaddr/fixtype - for PIC/PID fixups
# rodata - read only data
# romdata - the ROM image of .data
# romsdata - the ROM image of .sdata
# secinfo - section information section, used by the start-up code
# pidbase - base of the data sections, relocatable in -pid mode
# sdabase - base of the small data area section pointer
# sbss - small BSS (zeroed data) section
# sdata - small data section
# data - non-zeroed writeable data section
# bss - zeroed data section
# heap - the heap, grows upward
# stack - the stack, grows downward
-sec
{
.reset 0x000000 :
.picbase 0x1000 :
.text :
.comment :
.intercall :
.interfunc :
.syscall :
.fixaddr :
.fixtype :
.rodata :
.romdata ROM(.data) :
.romsdata ROM(.sdata) :
.secinfo :
.pidbase align(16) :
.sdabase :
.sbss :
.sdata :
.data :
.bss :
.heap align(16) pad(0x10000) :
.stack align(16) pad(0x1000) :
.free_mem align(16) pad(0x10000) :
.sys_regs 0xE0000000 pad(0xe000) :
}

13
ports/cortex_m4/ghs/example_build/sample_threadx_el.gpj Normal file
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@@ -0,0 +1,13 @@
#!gbuild
[Program]
-DTX_ENABLE_EVENT_LOGGING
-I../../../../common/inc
-I../../../../ports_common_green/inc
-I../inc
reset.arm
tx_initialize_low_level.arm
sample_threadx.c
txe.a
sample_threadx_el.ld
sample_threadx.con
readme_threadx.txt

46
ports/cortex_m4/ghs/example_build/sample_threadx_el.ld Normal file
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@@ -0,0 +1,46 @@
# The following explains what the default Green Hills sections are for:
#
# picbase - base of the text sections, relocatable in -pic mode
# text - text section
# syscall - syscall section, for host I/O under Multi
# fixaddr/fixtype - for PIC/PID fixups
# rodata - read only data
# romdata - the ROM image of .data
# romsdata - the ROM image of .sdata
# secinfo - section information section, used by the start-up code
# pidbase - base of the data sections, relocatable in -pid mode
# sdabase - base of the small data area section pointer
# sbss - small BSS (zeroed data) section
# sdata - small data section
# data - non-zeroed writeable data section
# bss - zeroed data section
# heap - the heap, grows upward
# stack - the stack, grows downward
-sec
{
.reset 0x000000 :
.picbase 0x1000 :
.text :
.comment :
.intercall :
.interfunc :
.syscall :
.fixaddr :
.fixtype :
.rodata :
.romdata ROM(.data) :
.romsdata ROM(.sdata) :
.secinfo :
.pidbase align(16) :
.sdabase :
.sbss :
.sdata :
.data :
.bss :
.heap align(16) pad(0x1000) :
.stack align(16) pad(0x1000) :
.eventlog align(16) pad(0x10000) :
.free_mem align(16) pad(0x10000) :
.sys_regs 0xE0000000 pad(0xe000) :
}

215
ports/cortex_m4/ghs/example_build/tx.gpj Normal file
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@@ -0,0 +1,215 @@
#!gbuild
[Library]
-I../../../../common/inc
-I../inc
..\..\..\..\common\inc\tx_api.h
..\..\..\..\common\inc\tx_block_pool.h
..\..\..\..\common\inc\tx_byte_pool.h
..\..\..\..\common\inc\tx_event_flags.h
..\..\..\..\common\inc\tx_initialize.h
..\..\..\..\common\inc\tx_mutex.h
..\..\..\..\common\inc\tx_queue.h
..\..\..\..\common\inc\tx_semaphore.h
..\..\..\..\common\inc\tx_thread.h
..\..\..\..\common\inc\tx_timer.h
..\..\..\..\common\inc\tx_trace.h
..\..\..\..\common\inc\tx_user_sample.h
..\inc\tx_port.h
..\inc\tx_el.h
..\inc\tx_ghs.h
..\src\tx_el.c
..\src\tx_ghs.c
..\src\tx_ghse.c
..\src\tx_thread_context_restore.arm
..\src\tx_thread_context_save.arm
..\src\tx_thread_interrupt_control.arm
..\src\tx_thread_interrupt_disable.arm
..\src\tx_thread_interrupt_restore.arm
..\src\tx_thread_schedule.arm
..\src\tx_thread_stack_build.arm
..\src\tx_thread_system_return.arm
..\src\tx_timer_interrupt.arm
..\..\..\..\common\src\tx_block_allocate.c
..\..\..\..\common\src\tx_block_pool_cleanup.c
..\..\..\..\common\src\tx_block_pool_create.c
..\..\..\..\common\src\tx_block_pool_delete.c
..\..\..\..\common\src\tx_block_pool_info_get.c
..\..\..\..\common\src\tx_block_pool_initialize.c
..\..\..\..\common\src\tx_block_pool_performance_info_get.c
..\..\..\..\common\src\tx_block_pool_performance_system_info_get.c
..\..\..\..\common\src\tx_block_pool_prioritize.c
..\..\..\..\common\src\tx_block_release.c
..\..\..\..\common\src\tx_byte_allocate.c
..\..\..\..\common\src\tx_byte_pool_cleanup.c
..\..\..\..\common\src\tx_byte_pool_create.c
..\..\..\..\common\src\tx_byte_pool_delete.c
..\..\..\..\common\src\tx_byte_pool_info_get.c
..\..\..\..\common\src\tx_byte_pool_initialize.c
..\..\..\..\common\src\tx_byte_pool_performance_info_get.c
..\..\..\..\common\src\tx_byte_pool_performance_system_info_get.c
..\..\..\..\common\src\tx_byte_pool_prioritize.c
..\..\..\..\common\src\tx_byte_pool_search.c
..\..\..\..\common\src\tx_byte_release.c
..\..\..\..\common\src\tx_event_flags_cleanup.c
..\..\..\..\common\src\tx_event_flags_create.c
..\..\..\..\common\src\tx_event_flags_delete.c
..\..\..\..\common\src\tx_event_flags_get.c
..\..\..\..\common\src\tx_event_flags_info_get.c
..\..\..\..\common\src\tx_event_flags_initialize.c
..\..\..\..\common\src\tx_event_flags_performance_info_get.c
..\..\..\..\common\src\tx_event_flags_performance_system_info_get.c
..\..\..\..\common\src\tx_event_flags_set.c
..\..\..\..\common\src\tx_event_flags_set_notify.c
..\..\..\..\common\src\tx_initialize_high_level.c
..\..\..\..\common\src\tx_initialize_kernel_enter.c
..\..\..\..\common\src\tx_initialize_kernel_setup.c
..\..\..\..\common\src\tx_mutex_cleanup.c
..\..\..\..\common\src\tx_mutex_create.c
..\..\..\..\common\src\tx_mutex_delete.c
..\..\..\..\common\src\tx_mutex_get.c
..\..\..\..\common\src\tx_mutex_info_get.c
..\..\..\..\common\src\tx_mutex_initialize.c
..\..\..\..\common\src\tx_mutex_performance_info_get.c
..\..\..\..\common\src\tx_mutex_performance_system_info_get.c
..\..\..\..\common\src\tx_mutex_prioritize.c
..\..\..\..\common\src\tx_mutex_priority_change.c
..\..\..\..\common\src\tx_mutex_put.c
..\..\..\..\common\src\tx_queue_cleanup.c
..\..\..\..\common\src\tx_queue_create.c
..\..\..\..\common\src\tx_queue_delete.c
..\..\..\..\common\src\tx_queue_flush.c
..\..\..\..\common\src\tx_queue_front_send.c
..\..\..\..\common\src\tx_queue_info_get.c
..\..\..\..\common\src\tx_queue_initialize.c
..\..\..\..\common\src\tx_queue_performance_info_get.c
..\..\..\..\common\src\tx_queue_performance_system_info_get.c
..\..\..\..\common\src\tx_queue_prioritize.c
..\..\..\..\common\src\tx_queue_receive.c
..\..\..\..\common\src\tx_queue_send.c
..\..\..\..\common\src\tx_queue_send_notify.c
..\..\..\..\common\src\tx_semaphore_ceiling_put.c
..\..\..\..\common\src\tx_semaphore_cleanup.c
..\..\..\..\common\src\tx_semaphore_create.c
..\..\..\..\common\src\tx_semaphore_delete.c
..\..\..\..\common\src\tx_semaphore_get.c
..\..\..\..\common\src\tx_semaphore_info_get.c
..\..\..\..\common\src\tx_semaphore_initialize.c
..\..\..\..\common\src\tx_semaphore_performance_info_get.c
..\..\..\..\common\src\tx_semaphore_performance_system_info_get.c
..\..\..\..\common\src\tx_semaphore_prioritize.c
..\..\..\..\common\src\tx_semaphore_put.c
..\..\..\..\common\src\tx_semaphore_put_notify.c
..\..\..\..\common\src\tx_thread_create.c
..\..\..\..\common\src\tx_thread_delete.c
..\..\..\..\common\src\tx_thread_entry_exit_notify.c
..\..\..\..\common\src\tx_thread_identify.c
..\..\..\..\common\src\tx_thread_info_get.c
..\..\..\..\common\src\tx_thread_initialize.c
..\..\..\..\common\src\tx_thread_performance_info_get.c
..\..\..\..\common\src\tx_thread_performance_system_info_get.c
..\..\..\..\common\src\tx_thread_preemption_change.c
..\..\..\..\common\src\tx_thread_priority_change.c
..\..\..\..\common\src\tx_thread_relinquish.c
..\..\..\..\common\src\tx_thread_reset.c
..\..\..\..\common\src\tx_thread_resume.c
..\..\..\..\common\src\tx_thread_shell_entry.c
..\..\..\..\common\src\tx_thread_sleep.c
..\..\..\..\common\src\tx_thread_stack_analyze.c
..\..\..\..\common\src\tx_thread_stack_error_handler.c
..\..\..\..\common\src\tx_thread_stack_error_notify.c
..\..\..\..\common\src\tx_thread_suspend.c
..\..\..\..\common\src\tx_thread_system_preempt_check.c
..\..\..\..\common\src\tx_thread_system_resume.c
..\..\..\..\common\src\tx_thread_system_suspend.c
..\..\..\..\common\src\tx_thread_terminate.c
..\..\..\..\common\src\tx_thread_time_slice.c
..\..\..\..\common\src\tx_thread_time_slice_change.c
..\..\..\..\common\src\tx_thread_timeout.c
..\..\..\..\common\src\tx_thread_wait_abort.c
..\..\..\..\common\src\tx_time_get.c
..\..\..\..\common\src\tx_time_set.c
..\..\..\..\common\src\tx_timer_activate.c
..\..\..\..\common\src\tx_timer_change.c
..\..\..\..\common\src\tx_timer_create.c
..\..\..\..\common\src\tx_timer_deactivate.c
..\..\..\..\common\src\tx_timer_delete.c
..\..\..\..\common\src\tx_timer_expiration_process.c
..\..\..\..\common\src\tx_timer_info_get.c
..\..\..\..\common\src\tx_timer_initialize.c
..\..\..\..\common\src\tx_timer_performance_info_get.c
..\..\..\..\common\src\tx_timer_performance_system_info_get.c
..\..\..\..\common\src\tx_timer_system_activate.c
..\..\..\..\common\src\tx_timer_system_deactivate.c
..\..\..\..\common\src\tx_timer_thread_entry.c
..\..\..\..\common\src\tx_trace_buffer_full_notify.c
..\..\..\..\common\src\tx_trace_disable.c
..\..\..\..\common\src\tx_trace_enable.c
..\..\..\..\common\src\tx_trace_event_filter.c
..\..\..\..\common\src\tx_trace_event_unfilter.c
..\..\..\..\common\src\tx_trace_initialize.c
..\..\..\..\common\src\tx_trace_interrupt_control.c
..\..\..\..\common\src\tx_trace_isr_enter_insert.c
..\..\..\..\common\src\tx_trace_isr_exit_insert.c
..\..\..\..\common\src\tx_trace_object_register.c
..\..\..\..\common\src\tx_trace_object_unregister.c
..\..\..\..\common\src\tx_trace_user_event_insert.c
..\..\..\..\common\src\txe_block_allocate.c
..\..\..\..\common\src\txe_block_pool_create.c
..\..\..\..\common\src\txe_block_pool_delete.c
..\..\..\..\common\src\txe_block_pool_info_get.c
..\..\..\..\common\src\txe_block_pool_prioritize.c
..\..\..\..\common\src\txe_block_release.c
..\..\..\..\common\src\txe_byte_allocate.c
..\..\..\..\common\src\txe_byte_pool_create.c
..\..\..\..\common\src\txe_byte_pool_delete.c
..\..\..\..\common\src\txe_byte_pool_info_get.c
..\..\..\..\common\src\txe_byte_pool_prioritize.c
..\..\..\..\common\src\txe_byte_release.c
..\..\..\..\common\src\txe_event_flags_create.c
..\..\..\..\common\src\txe_event_flags_delete.c
..\..\..\..\common\src\txe_event_flags_get.c
..\..\..\..\common\src\txe_event_flags_info_get.c
..\..\..\..\common\src\txe_event_flags_set.c
..\..\..\..\common\src\txe_event_flags_set_notify.c
..\..\..\..\common\src\txe_mutex_create.c
..\..\..\..\common\src\txe_mutex_delete.c
..\..\..\..\common\src\txe_mutex_get.c
..\..\..\..\common\src\txe_mutex_info_get.c
..\..\..\..\common\src\txe_mutex_prioritize.c
..\..\..\..\common\src\txe_mutex_put.c
..\..\..\..\common\src\txe_queue_create.c
..\..\..\..\common\src\txe_queue_delete.c
..\..\..\..\common\src\txe_queue_flush.c
..\..\..\..\common\src\txe_queue_front_send.c
..\..\..\..\common\src\txe_queue_info_get.c
..\..\..\..\common\src\txe_queue_prioritize.c
..\..\..\..\common\src\txe_queue_receive.c
..\..\..\..\common\src\txe_queue_send.c
..\..\..\..\common\src\txe_queue_send_notify.c
..\..\..\..\common\src\txe_semaphore_ceiling_put.c
..\..\..\..\common\src\txe_semaphore_create.c
..\..\..\..\common\src\txe_semaphore_delete.c
..\..\..\..\common\src\txe_semaphore_get.c
..\..\..\..\common\src\txe_semaphore_info_get.c
..\..\..\..\common\src\txe_semaphore_prioritize.c
..\..\..\..\common\src\txe_semaphore_put.c
..\..\..\..\common\src\txe_semaphore_put_notify.c
..\..\..\..\common\src\txe_thread_create.c
..\..\..\..\common\src\txe_thread_delete.c
..\..\..\..\common\src\txe_thread_entry_exit_notify.c
..\..\..\..\common\src\txe_thread_info_get.c
..\..\..\..\common\src\txe_thread_preemption_change.c
..\..\..\..\common\src\txe_thread_priority_change.c
..\..\..\..\common\src\txe_thread_relinquish.c
..\..\..\..\common\src\txe_thread_reset.c
..\..\..\..\common\src\txe_thread_resume.c
..\..\..\..\common\src\txe_thread_suspend.c
..\..\..\..\common\src\txe_thread_terminate.c
..\..\..\..\common\src\txe_thread_time_slice_change.c
..\..\..\..\common\src\txe_thread_wait_abort.c
..\..\..\..\common\src\txe_timer_activate.c
..\..\..\..\common\src\txe_timer_change.c
..\..\..\..\common\src\txe_timer_create.c
..\..\..\..\common\src\txe_timer_deactivate.c
..\..\..\..\common\src\txe_timer_delete.c
..\..\..\..\common\src\txe_timer_info_get.c

232
ports/cortex_m4/ghs/example_build/tx_initialize_low_level.arm Normal file
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@@ -0,0 +1,232 @@
/**************************************************************************/
/* */
/* Copyright (c) Microsoft Corporation. All rights reserved. */
/* */
/* This software is licensed under the Microsoft Software License */
/* Terms for Microsoft Azure RTOS. Full text of the license can be */
/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
/* and in the root directory of this software. */
/* */
/**************************************************************************/
/**************************************************************************/
/**************************************************************************/
/** */
/** ThreadX Component */
/** */
/** Initialize */
/** */
/**************************************************************************/
/**************************************************************************/
SYSTEM_CLOCK = 6000000
SYSTICK_CYCLES = ((SYSTEM_CLOCK / 100) -1)
.text
.align 4
/**************************************************************************/
/* */
/* FUNCTION RELEASE */
/* */
/* _tx_initialize_low_level Cortex-M4/GHS */
/* 6.1 */
/* AUTHOR */
/* */
/* William E. Lamie, Microsoft Corporation */
/* */
/* DESCRIPTION */
/* */
/* This function is responsible for any low-level processor */
/* initialization, including setting up interrupt vectors, setting */
/* up a periodic timer interrupt source, saving the system stack */
/* pointer for use in ISR processing later, and finding the first */
/* available RAM memory address for tx_application_define. */
/* */
/* INPUT */
/* */
/* None */
/* */
/* OUTPUT */
/* */
/* None */
/* */
/* CALLS */
/* */
/* None */
/* */
/* CALLED BY */
/* */
/* _tx_initialize_kernel_enter ThreadX entry function */
/* */
/* RELEASE HISTORY */
/* */
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* */
/**************************************************************************/
/* VOID _tx_initialize_low_level(VOID)
{ */
.globl _tx_initialize_low_level
_tx_initialize_low_level:
/* Disable interrupts. */
CPSID i ; Disable interrupts
/* Save the system stack pointer. */
/* _tx_thread_system_stack_ptr = (VOID_PTR) (sp); */
LDR r1,=_tx_thread_system_stack_ptr ; Pickup address of system stack ptr
STR sp, [r1] ; Save system stack
/* Save the first available memory address. */
/* _tx_initialize_unused_memory = (VOID_PTR) __ghsbegin_free_mem; */
LDR r0,=__ghsbegin_free_mem ; Pickup free memory address
LDR r2,=_tx_initialize_unused_memory ; Pickup unused memory ptr address
STR r0, [r2] ; Save first free memory address
/* Enable the cycle count register. */
LDR r0, =0xE0001000 ; Build address of DWT register
LDR r1, [r0] ; Pickup the current value
ORR r1, r1, 1 ; Set the CYCCNTENA bit
STR r1, [r0] ; Enable the cycle count register
/* Setup Vector Table Offset Register. */
MOV r0, 0xE000E000 ; Build address of NVIC registers
LDR r1, =__vectors ; Pickup address of vector table
STR r1, [r0, 0xD08] ; Set vector table address
/* Configure SysTick for 100Hz clock, or 16384 cycles if no reference. */
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, 0x14] ; Setup SysTick Reload Value
MOV r1, 0x7 ; Build SysTick Control Enable Value
STR r1, [r0, 0x10] ; Setup SysTick Control
/* Configure handler priorities. */
LDR r1, =0x00000000 ; Rsrv, UsgF, BusF, MemM
STR r1, [r0, 0xD18] ; Setup System Handlers 4-7 Priority Registers
LDR r1, =0xFF000000 ; SVCl, Rsrv, Rsrv, Rsrv
STR r1, [r0, 0xD1C] ; Setup System Handlers 8-11 Priority Registers
; Note: SVC must be lowest priority, which is 0xFF
LDR r1, =0x40FF0000 ; SysT, PnSV, Rsrv, DbgM
STR r1, [r0, 0xD20] ; Setup System Handlers 12-15 Priority Registers
; Note: PnSV must be lowest priority, which is 0xFF
#ifdef __VFP__
LDR r0, =0xE000EF34 ; Pickup FPCCR
LDR r1, [r0] ;
LDR r2, =0x3FFFFFFF ; Build mask to clear ASPEN and LSPEN
AND r1, r1, r2 ; Clear the ASPEN and LSPEN bits
STR r1, [r0] ; Update FPCCR
#endif
/* Return to caller. */
BX lr ; Return to caller
.type _tx_initialize_low_level,$function
.size _tx_initialize_low_level,.-_tx_initialize_low_level
/* } */
/* Define shells for each of the interrupt vectors. */
.globl __tx_BadHandler
__tx_BadHandler:
B __tx_BadHandler
.type __tx_BadHandler,$function
.size __tx_BadHandler,.-__tx_BadHandler
.globl __tx_IntHandler
__tx_IntHandler:
PUSH {lr}
BL _tx_thread_context_save
#ifdef TX_ENABLE_EVENT_LOGGING
MOV r0, 0 ; Build interrupt code
BL _tx_el_interrupt ; Call interrupt event logging
#endif
; /* Do interrupt handler work here */
; /* .... */
#ifdef TX_ENABLE_EVENT_LOGGING
MOV r0, 0 ; Build interrupt code
BL _tx_el_interrupt_end ; Call interrupt event logging
#endif
B _tx_thread_context_restore
.type __tx_IntHandler,$function
.size __tx_IntHandler,.-__tx_IntHandler
.globl __tx_SysTickHandler
__tx_SysTickHandler:
PUSH {lr}
BL _tx_thread_context_save
#ifdef TX_ENABLE_EVENT_LOGGING
MOV r0, 15 ; Build interrupt code
BL _tx_el_interrupt ; Call interrupt event logging
#endif
BL _tx_timer_interrupt
#ifdef TX_ENABLE_EVENT_LOGGING
MOV r0, 15 ; Build interrupt code
BL _tx_el_interrupt_end ; Call interrupt event logging
#endif
B _tx_thread_context_restore
.type __tx_SysTickHandler,$function
.size __tx_SysTickHandler,.-__tx_SysTickHandler
.globl __tx_NMIHandler
__tx_NMIHandler:
B __tx_NMIHandler
.type __tx_NMIHandler,$function
.size __tx_NMIHandler,.-__tx_NMIHandler
.globl __tx_DBGHandler
__tx_DBGHandler:
B __tx_DBGHandler
.type __tx_DBGHandler,$function
.size __tx_DBGHandler,.-__tx_DBGHandler
.globl __tx_SVCallHandler
__tx_SVCallHandler:
B __tx_SVCallHandler
.type __tx_SVCallHandler,$function
.size __tx_SVCallHandler,.-__tx_SVCallHandler
/* Reference build options and version ID to ensure they come in. */
BUILD_OPTIONS:
.data.w _tx_build_options
VERSION_ID:
.data.w _tx_version_id

216
ports/cortex_m4/ghs/example_build/txe.gpj Normal file
View File

@@ -0,0 +1,216 @@
#!gbuild
[Library]
-DTX_ENABLE_EVENT_LOGGING
-I../../../../common/inc
-I../inc
..\..\..\..\common\inc\tx_api.h
..\..\..\..\common\inc\tx_block_pool.h
..\..\..\..\common\inc\tx_byte_pool.h
..\..\..\..\common\inc\tx_event_flags.h
..\..\..\..\common\inc\tx_initialize.h
..\..\..\..\common\inc\tx_mutex.h
..\..\..\..\common\inc\tx_queue.h
..\..\..\..\common\inc\tx_semaphore.h
..\..\..\..\common\inc\tx_thread.h
..\..\..\..\common\inc\tx_timer.h
..\..\..\..\common\inc\tx_trace.h
..\..\..\..\common\inc\tx_user_sample.h
..\inc\tx_port.h
..\inc\tx_el.h
..\inc\tx_ghs.h
..\src\tx_el.c
..\src\tx_ghs.c
..\src\tx_ghse.c
..\src\tx_thread_context_restore.arm
..\src\tx_thread_context_save.arm
..\src\tx_thread_interrupt_control.arm
..\src\tx_thread_interrupt_disable.arm
..\src\tx_thread_interrupt_restore.arm
..\src\tx_thread_schedule.arm
..\src\tx_thread_stack_build.arm
..\src\tx_thread_system_return.arm
..\src\tx_timer_interrupt.arm
..\..\..\..\common\src\tx_block_allocate.c
..\..\..\..\common\src\tx_block_pool_cleanup.c
..\..\..\..\common\src\tx_block_pool_create.c
..\..\..\..\common\src\tx_block_pool_delete.c
..\..\..\..\common\src\tx_block_pool_info_get.c
..\..\..\..\common\src\tx_block_pool_initialize.c
..\..\..\..\common\src\tx_block_pool_performance_info_get.c
..\..\..\..\common\src\tx_block_pool_performance_system_info_get.c
..\..\..\..\common\src\tx_block_pool_prioritize.c
..\..\..\..\common\src\tx_block_release.c
..\..\..\..\common\src\tx_byte_allocate.c
..\..\..\..\common\src\tx_byte_pool_cleanup.c
..\..\..\..\common\src\tx_byte_pool_create.c
..\..\..\..\common\src\tx_byte_pool_delete.c
..\..\..\..\common\src\tx_byte_pool_info_get.c
..\..\..\..\common\src\tx_byte_pool_initialize.c
..\..\..\..\common\src\tx_byte_pool_performance_info_get.c
..\..\..\..\common\src\tx_byte_pool_performance_system_info_get.c
..\..\..\..\common\src\tx_byte_pool_prioritize.c
..\..\..\..\common\src\tx_byte_pool_search.c
..\..\..\..\common\src\tx_byte_release.c
..\..\..\..\common\src\tx_event_flags_cleanup.c
..\..\..\..\common\src\tx_event_flags_create.c
..\..\..\..\common\src\tx_event_flags_delete.c
..\..\..\..\common\src\tx_event_flags_get.c
..\..\..\..\common\src\tx_event_flags_info_get.c
..\..\..\..\common\src\tx_event_flags_initialize.c
..\..\..\..\common\src\tx_event_flags_performance_info_get.c
..\..\..\..\common\src\tx_event_flags_performance_system_info_get.c
..\..\..\..\common\src\tx_event_flags_set.c
..\..\..\..\common\src\tx_event_flags_set_notify.c
..\..\..\..\common\src\tx_initialize_high_level.c
..\..\..\..\common\src\tx_initialize_kernel_enter.c
..\..\..\..\common\src\tx_initialize_kernel_setup.c
..\..\..\..\common\src\tx_mutex_cleanup.c
..\..\..\..\common\src\tx_mutex_create.c
..\..\..\..\common\src\tx_mutex_delete.c
..\..\..\..\common\src\tx_mutex_get.c
..\..\..\..\common\src\tx_mutex_info_get.c
..\..\..\..\common\src\tx_mutex_initialize.c
..\..\..\..\common\src\tx_mutex_performance_info_get.c
..\..\..\..\common\src\tx_mutex_performance_system_info_get.c
..\..\..\..\common\src\tx_mutex_prioritize.c
..\..\..\..\common\src\tx_mutex_priority_change.c
..\..\..\..\common\src\tx_mutex_put.c
..\..\..\..\common\src\tx_queue_cleanup.c
..\..\..\..\common\src\tx_queue_create.c
..\..\..\..\common\src\tx_queue_delete.c
..\..\..\..\common\src\tx_queue_flush.c
..\..\..\..\common\src\tx_queue_front_send.c
..\..\..\..\common\src\tx_queue_info_get.c
..\..\..\..\common\src\tx_queue_initialize.c
..\..\..\..\common\src\tx_queue_performance_info_get.c
..\..\..\..\common\src\tx_queue_performance_system_info_get.c
..\..\..\..\common\src\tx_queue_prioritize.c
..\..\..\..\common\src\tx_queue_receive.c
..\..\..\..\common\src\tx_queue_send.c
..\..\..\..\common\src\tx_queue_send_notify.c
..\..\..\..\common\src\tx_semaphore_ceiling_put.c
..\..\..\..\common\src\tx_semaphore_cleanup.c
..\..\..\..\common\src\tx_semaphore_create.c
..\..\..\..\common\src\tx_semaphore_delete.c
..\..\..\..\common\src\tx_semaphore_get.c
..\..\..\..\common\src\tx_semaphore_info_get.c
..\..\..\..\common\src\tx_semaphore_initialize.c
..\..\..\..\common\src\tx_semaphore_performance_info_get.c
..\..\..\..\common\src\tx_semaphore_performance_system_info_get.c
..\..\..\..\common\src\tx_semaphore_prioritize.c
..\..\..\..\common\src\tx_semaphore_put.c
..\..\..\..\common\src\tx_semaphore_put_notify.c
..\..\..\..\common\src\tx_thread_create.c
..\..\..\..\common\src\tx_thread_delete.c
..\..\..\..\common\src\tx_thread_entry_exit_notify.c
..\..\..\..\common\src\tx_thread_identify.c
..\..\..\..\common\src\tx_thread_info_get.c
..\..\..\..\common\src\tx_thread_initialize.c
..\..\..\..\common\src\tx_thread_performance_info_get.c
..\..\..\..\common\src\tx_thread_performance_system_info_get.c
..\..\..\..\common\src\tx_thread_preemption_change.c
..\..\..\..\common\src\tx_thread_priority_change.c
..\..\..\..\common\src\tx_thread_relinquish.c
..\..\..\..\common\src\tx_thread_reset.c
..\..\..\..\common\src\tx_thread_resume.c
..\..\..\..\common\src\tx_thread_shell_entry.c
..\..\..\..\common\src\tx_thread_sleep.c
..\..\..\..\common\src\tx_thread_stack_analyze.c
..\..\..\..\common\src\tx_thread_stack_error_handler.c
..\..\..\..\common\src\tx_thread_stack_error_notify.c
..\..\..\..\common\src\tx_thread_suspend.c
..\..\..\..\common\src\tx_thread_system_preempt_check.c
..\..\..\..\common\src\tx_thread_system_resume.c
..\..\..\..\common\src\tx_thread_system_suspend.c
..\..\..\..\common\src\tx_thread_terminate.c
..\..\..\..\common\src\tx_thread_time_slice.c
..\..\..\..\common\src\tx_thread_time_slice_change.c
..\..\..\..\common\src\tx_thread_timeout.c
..\..\..\..\common\src\tx_thread_wait_abort.c
..\..\..\..\common\src\tx_time_get.c
..\..\..\..\common\src\tx_time_set.c
..\..\..\..\common\src\tx_timer_activate.c
..\..\..\..\common\src\tx_timer_change.c
..\..\..\..\common\src\tx_timer_create.c
..\..\..\..\common\src\tx_timer_deactivate.c
..\..\..\..\common\src\tx_timer_delete.c
..\..\..\..\common\src\tx_timer_expiration_process.c
..\..\..\..\common\src\tx_timer_info_get.c
..\..\..\..\common\src\tx_timer_initialize.c
..\..\..\..\common\src\tx_timer_performance_info_get.c
..\..\..\..\common\src\tx_timer_performance_system_info_get.c
..\..\..\..\common\src\tx_timer_system_activate.c
..\..\..\..\common\src\tx_timer_system_deactivate.c
..\..\..\..\common\src\tx_timer_thread_entry.c
..\..\..\..\common\src\tx_trace_buffer_full_notify.c
..\..\..\..\common\src\tx_trace_disable.c
..\..\..\..\common\src\tx_trace_enable.c
..\..\..\..\common\src\tx_trace_event_filter.c
..\..\..\..\common\src\tx_trace_event_unfilter.c
..\..\..\..\common\src\tx_trace_initialize.c
..\..\..\..\common\src\tx_trace_interrupt_control.c
..\..\..\..\common\src\tx_trace_isr_enter_insert.c
..\..\..\..\common\src\tx_trace_isr_exit_insert.c
..\..\..\..\common\src\tx_trace_object_register.c
..\..\..\..\common\src\tx_trace_object_unregister.c
..\..\..\..\common\src\tx_trace_user_event_insert.c
..\..\..\..\common\src\txe_block_allocate.c
..\..\..\..\common\src\txe_block_pool_create.c
..\..\..\..\common\src\txe_block_pool_delete.c
..\..\..\..\common\src\txe_block_pool_info_get.c
..\..\..\..\common\src\txe_block_pool_prioritize.c
..\..\..\..\common\src\txe_block_release.c
..\..\..\..\common\src\txe_byte_allocate.c
..\..\..\..\common\src\txe_byte_pool_create.c
..\..\..\..\common\src\txe_byte_pool_delete.c
..\..\..\..\common\src\txe_byte_pool_info_get.c
..\..\..\..\common\src\txe_byte_pool_prioritize.c
..\..\..\..\common\src\txe_byte_release.c
..\..\..\..\common\src\txe_event_flags_create.c
..\..\..\..\common\src\txe_event_flags_delete.c
..\..\..\..\common\src\txe_event_flags_get.c
..\..\..\..\common\src\txe_event_flags_info_get.c
..\..\..\..\common\src\txe_event_flags_set.c
..\..\..\..\common\src\txe_event_flags_set_notify.c
..\..\..\..\common\src\txe_mutex_create.c
..\..\..\..\common\src\txe_mutex_delete.c
..\..\..\..\common\src\txe_mutex_get.c
..\..\..\..\common\src\txe_mutex_info_get.c
..\..\..\..\common\src\txe_mutex_prioritize.c
..\..\..\..\common\src\txe_mutex_put.c
..\..\..\..\common\src\txe_queue_create.c
..\..\..\..\common\src\txe_queue_delete.c
..\..\..\..\common\src\txe_queue_flush.c
..\..\..\..\common\src\txe_queue_front_send.c
..\..\..\..\common\src\txe_queue_info_get.c
..\..\..\..\common\src\txe_queue_prioritize.c
..\..\..\..\common\src\txe_queue_receive.c
..\..\..\..\common\src\txe_queue_send.c
..\..\..\..\common\src\txe_queue_send_notify.c
..\..\..\..\common\src\txe_semaphore_ceiling_put.c
..\..\..\..\common\src\txe_semaphore_create.c
..\..\..\..\common\src\txe_semaphore_delete.c
..\..\..\..\common\src\txe_semaphore_get.c
..\..\..\..\common\src\txe_semaphore_info_get.c
..\..\..\..\common\src\txe_semaphore_prioritize.c
..\..\..\..\common\src\txe_semaphore_put.c
..\..\..\..\common\src\txe_semaphore_put_notify.c
..\..\..\..\common\src\txe_thread_create.c
..\..\..\..\common\src\txe_thread_delete.c
..\..\..\..\common\src\txe_thread_entry_exit_notify.c
..\..\..\..\common\src\txe_thread_info_get.c
..\..\..\..\common\src\txe_thread_preemption_change.c
..\..\..\..\common\src\txe_thread_priority_change.c
..\..\..\..\common\src\txe_thread_relinquish.c
..\..\..\..\common\src\txe_thread_reset.c
..\..\..\..\common\src\txe_thread_resume.c
..\..\..\..\common\src\txe_thread_suspend.c
..\..\..\..\common\src\txe_thread_terminate.c
..\..\..\..\common\src\txe_thread_time_slice_change.c
..\..\..\..\common\src\txe_thread_wait_abort.c
..\..\..\..\common\src\txe_timer_activate.c
..\..\..\..\common\src\txe_timer_change.c
..\..\..\..\common\src\txe_timer_create.c
..\..\..\..\common\src\txe_timer_deactivate.c
..\..\..\..\common\src\txe_timer_delete.c
..\..\..\..\common\src\txe_timer_info_get.c

765
ports/cortex_m4/ghs/inc/tx_el.h Normal file
View File

@@ -0,0 +1,765 @@
/**************************************************************************/
/* */
/* Copyright (c) Microsoft Corporation. All rights reserved. */
/* */
/* This software is licensed under the Microsoft Software License */
/* Terms for Microsoft Azure RTOS. Full text of the license can be */
/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
/* and in the root directory of this software. */
/* */
/**************************************************************************/
/**************************************************************************/
/**************************************************************************/
/** */
/** ThreadX Component */
/** */
/** ThreadX/GHS Event Log (EL) */
/** */
/**************************************************************************/
/**************************************************************************/
/**************************************************************************/
/* */
/* COMPONENT DEFINITION RELEASE */
/* */
/* tx_el.h PORTABLE C/GHS */
/* 6.1 */
/* AUTHOR */
/* */
/* William E. Lamie, Microsoft Corporation */
/* */
/* DESCRIPTION */
/* */
/* This file defines the ThreadX event log functions for the GHS MULTI */
/* EventAnalyzer. It is assumed that tx_api.h and tx_port.h have */
/* already been included. */
/* */
/* RELEASE HISTORY */
/* */
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* */
/**************************************************************************/
#ifndef TX_EL_H
#define TX_EL_H
/* Define Event Log specific data definitions. */
#define TX_EL_VERSION_ID 2 /* Event log version ID */
#define TX_EL_HEADER_SIZE 24 /* Event log header size */
#define TX_EL_TNIS 16 /* Number of thread names supported */
/* If the application needs to */
/* track more thread names, just */
/* increase this number and re- */
/* build the ThreadX library. */
#define TX_EL_TNI_ENTRY_SIZE 44 /* Thread name entries are 44 bytes */
#define TX_EL_TNI_NAME_SIZE 34 /* Thread name size in TNI */
#define TX_EL_NO_MORE_TNI_ROOM 1 /* Error return from thread register*/
#define TX_EL_NAME_NOT_FOUND 2 /* Error return from un-register */
#define TX_EL_EVENT_SIZE 32 /* Number of bytes in each event */
#define TX_EL_VALID_ENTRY 1 /* Valid log entry */
#define TX_EL_INVALID_ENTRY 0 /* Invalid log entry */
/* Define necessary offsets. */
#define TX_EL_TNI_VALID_OFFSET 34
#define TX_EL_TNI_THREAD_ID_OFFSET 36
#define TX_EL_TNI_THREAD_PRIORITY_OFF 40
#define TX_EL_EVENT_TYPE_OFFSET 0
#define TX_EL_EVENT_SUBTYPE_OFFSET 2
#define TX_EL_EVENT_TIME_UPPER_OFFSET 4
#define TX_EL_EVENT_TIME_LOWER_OFFSET 8
#define TX_EL_EVENT_THREAD_OFFSET 12
#define TX_EL_EVENT_INFO_1_OFFSET 16
#define TX_EL_EVENT_INFO_2_OFFSET 20
#define TX_EL_EVENT_INFO_3_OFFSET 24
#define TX_EL_EVENT_INFO_4_OFFSET 28
/* Undefine constants that might be been defined previously by tx_api.h. */
#undef TX_EL_INITIALIZE
#undef TX_EL_THREAD_REGISTER
#undef TX_EL_THREAD_UNREGISTER
#undef TX_EL_THREAD_STATUS_CHANGE_INSERT
#undef TX_EL_BYTE_ALLOCATE_INSERT
#undef TX_EL_BYTE_POOL_CREATE_INSERT
#undef TX_EL_BYTE_POOL_DELETE_INSERT
#undef TX_EL_BYTE_RELEASE_INSERT
#undef TX_EL_BLOCK_ALLOCATE_INSERT
#undef TX_EL_BLOCK_POOL_CREATE_INSERT
#undef TX_EL_BLOCK_POOL_DELETE_INSERT
#undef TX_EL_BLOCK_RELEASE_INSERT
#undef TX_EL_EVENT_FLAGS_CREATE_INSERT
#undef TX_EL_EVENT_FLAGS_DELETE_INSERT
#undef TX_EL_EVENT_FLAGS_GET_INSERT
#undef TX_EL_EVENT_FLAGS_SET_INSERT
#undef TX_EL_INTERRUPT_CONTROL_INSERT
#undef TX_EL_QUEUE_CREATE_INSERT
#undef TX_EL_QUEUE_DELETE_INSERT
#undef TX_EL_QUEUE_FLUSH_INSERT
#undef TX_EL_QUEUE_RECEIVE_INSERT
#undef TX_EL_QUEUE_SEND_INSERT
#undef TX_EL_SEMAPHORE_CREATE_INSERT
#undef TX_EL_SEMAPHORE_DELETE_INSERT
#undef TX_EL_SEMAPHORE_GET_INSERT
#undef TX_EL_SEMAPHORE_PUT_INSERT
#undef TX_EL_THREAD_CREATE_INSERT
#undef TX_EL_THREAD_DELETE_INSERT
#undef TX_EL_THREAD_IDENTIFY_INSERT
#undef TX_EL_THREAD_PREEMPTION_CHANGE_INSERT
#undef TX_EL_THREAD_PRIORITY_CHANGE_INSERT
#undef TX_EL_THREAD_RELINQUISH_INSERT
#undef TX_EL_THREAD_RESUME_INSERT
#undef TX_EL_THREAD_SLEEP_INSERT
#undef TX_EL_THREAD_SUSPEND_INSERT
#undef TX_EL_THREAD_TERMINATE_INSERT
#undef TX_EL_THREAD_TIME_SLICE_CHANGE_INSERT
#undef TX_EL_TIME_GET_INSERT
#undef TX_EL_TIME_SET_INSERT
#undef TX_EL_TIMER_ACTIVATE_INSERT
#undef TX_EL_TIMER_CHANGE_INSERT
#undef TX_EL_TIMER_CREATE_INSERT
#undef TX_EL_TIMER_DEACTIVATE_INSERT
#undef TX_EL_TIMER_DELETE_INSERT
#undef TX_EL_BLOCK_POOL_INFO_GET_INSERT
#undef TX_EL_BLOCK_POOL_PRIORITIZE_INSERT
#undef TX_EL_BYTE_POOL_INFO_GET_INSERT
#undef TX_EL_BYTE_POOL_PRIORITIZE_INSERT
#undef TX_EL_EVENT_FLAGS_INFO_GET_INSERT
#undef TX_EL_MUTEX_CREATE_INSERT
#undef TX_EL_MUTEX_DELETE_INSERT
#undef TX_EL_MUTEX_GET_INSERT
#undef TX_EL_MUTEX_INFO_GET_INSERT
#undef TX_EL_MUTEX_PRIORITIZE_INSERT
#undef TX_EL_MUTEX_PUT_INSERT
#undef TX_EL_QUEUE_INFO_GET_INSERT
#undef TX_EL_QUEUE_FRONT_SEND_INSERT
#undef TX_EL_QUEUE_PRIORITIZE_INSERT
#undef TX_EL_SEMAPHORE_INFO_GET_INSERT
#undef TX_EL_SEMAPHORE_PRIORITIZE_INSERT
#undef TX_EL_THREAD_INFO_GET_INSERT
#undef TX_EL_THREAD_WAIT_ABORT_INSERT
#undef TX_EL_TIMER_INFO_GET_INSERT
#undef TX_EL_BLOCK_POOL_PERFORMANCE_INFO_GET_INSERT
#undef TX_EL_BLOCK_POOL_PERFORMANCE_SYSTEM_INFO_GET_INSERT
#undef TX_EL_BYTE_POOL_PERFORMANCE_INFO_GET_INSERT
#undef TX_EL_BYTE_POOL_PERFORMANCE_SYSTEM_INFO_GET_INSERT
#undef TX_EL_EVENT_FLAGS_PERFORMANCE_INFO_GET_INSERT
#undef TX_EL_EVENT_FLAGS_PERFORMANCE_SYSTEM_INFO_GET_INSERT
#undef TX_EL_EVENT_FLAGS_SET_NOTIFY_INSERT
#undef TX_EL_MUTEX_PERFORMANCE_INFO_GET_INSERT
#undef TX_EL_MUTEX_PERFORMANCE_SYSTEM_INFO_GET_INSERT
#undef TX_EL_QUEUE_PERFORMANCE_INFO_GET_INSERT
#undef TX_EL_QUEUE_PERFORMANCE_SYSTEM_INFO_GET_INSERT
#undef TX_EL_QUEUE_SEND_NOTIFY_INSERT
#undef TX_EL_SEMAPHORE_CEILING_PUT_INSERT
#undef TX_EL_SEMAPHORE_PERFORMANCE_INFO_GET_INSERT
#undef TX_EL_SEMAPHORE_PERFORMANCE_SYSTEM_INFO_GET_INSERT
#undef TX_EL_SEMAPHORE_PUT_NOTIFY_INSERT
#undef TX_EL_THREAD_ENTRY_EXIT_NOTIFY_INSERT
#undef TX_EL_THREAD_RESET_INSERT
#undef TX_EL_THREAD_PERFORMANCE_INFO_GET_INSERT
#undef TX_EL_THREAD_PERFORMANCE_SYSTEM_INFO_GET_INSERT
#undef TX_EL_THREAD_STACK_ERROR_NOTIFY_INSERT
#undef TX_EL_TIMER_PERFORMANCE_INFO_GET_INSERT
#undef TX_EL_TIMER_PERFORMANCE_SYSTEM_INFO_GET_INSERT
/* Define Event Types. */
#define TX_EL_THREAD_CHANGE 1
#define TX_EL_INTERRUPT 2
#define TX_EL_THREADX_CALL 3
#define TX_EL_USER_EVENT 4
#define TX_EL_THREAD_STATUS_CHANGE 5
#define TX_EL_REFRESH 6 /* Not implemented */
#define TX_EL_TIMER 7 /* Not implemented */
#define TX_EL_TIMESOURCE_DELTA 8 /* Not implemented */
/* Define TX_EL_THREADX_CALL event sub-types. */
#define TX_EL_BYTE_ALLOCATE 0
#define TX_EL_BYTE_POOL_CREATE 1
#define TX_EL_BYTE_POOL_DELETE 2
#define TX_EL_BYTE_RELEASE 3
#define TX_EL_BLOCK_ALLOCATE 4
#define TX_EL_BLOCK_POOL_CREATE 5
#define TX_EL_BLOCK_POOL_DELETE 6
#define TX_EL_BLOCK_RELEASE 7
#define TX_EL_EVENT_FLAGS_CREATE 8
#define TX_EL_EVENT_FLAGS_DELETE 9
#define TX_EL_EVENT_FLAGS_GET 10
#define TX_EL_EVENT_FLAGS_SET 11
#define TX_EL_INTERRUPT_CONTROL 12
#define TX_EL_QUEUE_CREATE 13
#define TX_EL_QUEUE_DELETE 14
#define TX_EL_QUEUE_FLUSH 15
#define TX_EL_QUEUE_RECEIVE 16
#define TX_EL_QUEUE_SEND 17
#define TX_EL_SEMAPHORE_CREATE 18
#define TX_EL_SEMAPHORE_DELETE 19
#define TX_EL_SEMAPHORE_GET 20
#define TX_EL_SEMAPHORE_PUT 21
#define TX_EL_THREAD_CREATE 22
#define TX_EL_THREAD_DELETE 23
#define TX_EL_THREAD_IDENTIFY 24
#define TX_EL_THREAD_PREEMPTION_CHANGE 25
#define TX_EL_THREAD_PRIORITY_CHANGE 26
#define TX_EL_THREAD_RELINQUISH 27
#define TX_EL_THREAD_RESUME 28
#define TX_EL_THREAD_SLEEP 29
#define TX_EL_THREAD_SUSPEND 30
#define TX_EL_THREAD_TERMINATE 31
#define TX_EL_THREAD_TIME_SLICE_CHANGE 32
#define TX_EL_TIME_GET 33
#define TX_EL_TIME_SET 34
#define TX_EL_TIMER_ACTIVATE 35
#define TX_EL_TIMER_CHANGE 36
#define TX_EL_TIMER_CREATE 37
#define TX_EL_TIMER_DEACTIVATE 38
#define TX_EL_TIMER_DELETE 39
#define TX_EL_BLOCK_POOL_INFO_GET 40
#define TX_EL_BLOCK_POOL_PRIORITIZE 41
#define TX_EL_BYTE_POOL_INFO_GET 42
#define TX_EL_BYTE_POOL_PRIORITIZE 43
#define TX_EL_EVENT_FLAGS_INFO_GET 44
#define TX_EL_MUTEX_CREATE 45
#define TX_EL_MUTEX_DELETE 46
#define TX_EL_MUTEX_GET 47
#define TX_EL_MUTEX_INFO_GET 48
#define TX_EL_MUTEX_PRIORITIZE 49
#define TX_EL_MUTEX_PUT 50
#define TX_EL_QUEUE_INFO_GET 51
#define TX_EL_QUEUE_FRONT_SEND 52
#define TX_EL_QUEUE_PRIORITIZE 53
#define TX_EL_SEMAPHORE_INFO_GET 54
#define TX_EL_SEMAPHORE_PRIORITIZE 55
#define TX_EL_THREAD_INFO_GET 56
#define TX_EL_THREAD_WAIT_ABORT 57
#define TX_EL_TIMER_INFO_GET 58
#define TX_EL_BLOCK_POOL_PERFORMANCE_INFO_GET 59
#define TX_EL_BLOCK_POOL_PERFORMANCE_SYSTEM_INFO_GET 60
#define TX_EL_BYTE_POOL_PERFORMANCE_INFO_GET 61
#define TX_EL_BYTE_POOL_PERFORMANCE_SYSTEM_INFO_GET 62
#define TX_EL_EVENT_FLAGS_PERFORMANCE_INFO_GET 63
#define TX_EL_EVENT_FLAGS_PERFORMANCE_SYSTEM_INFO_GET 64
#define TX_EL_EVENT_FLAGS_SET_NOTIFY 65
#define TX_EL_MUTEX_PERFORMANCE_INFO_GET 66
#define TX_EL_MUTEX_PERFORMANCE_SYSTEM_INFO_GET 67
#define TX_EL_QUEUE_PERFORMANCE_INFO_GET 68
#define TX_EL_QUEUE_PERFORMANCE_SYSTEM_INFO_GET 69
#define TX_EL_QUEUE_SEND_NOTIFY 70
#define TX_EL_SEMAPHORE_CEILING_PUT 71
#define TX_EL_SEMAPHORE_PERFORMANCE_INFO_GET 72
#define TX_EL_SEMAPHORE_PERFORMANCE_SYSTEM_INFO_GET 73
#define TX_EL_SEMAPHORE_PUT_NOTIFY 74
#define TX_EL_THREAD_ENTRY_EXIT_NOTIFY 75
#define TX_EL_THREAD_RESET 76
#define TX_EL_THREAD_PERFORMANCE_INFO_GET 77
#define TX_EL_THREAD_PERFORMANCE_SYSTEM_INFO_GET 78
#define TX_EL_THREAD_STACK_ERROR_NOTIFY 79
#define TX_EL_TIMER_PERFORMANCE_INFO_GET 80
#define TX_EL_TIMER_PERFORMANCE_SYSTEM_INFO_GET 81
/* Define ThreadX sub-types. */
#define TX_EL_INTERRUPT_SUB_TYPE 1
#define TX_EL_END_OF_INTERRUPT 3
/* Define event logging filters, which may be used by the application program to
dynamically enable/disable events in run-time. */
#define TX_EL_FILTER_STATUS_CHANGE 0x0001
#define TX_EL_FILTER_INTERRUPTS 0x0002
#define TX_EL_FILTER_THREAD_CALLS 0x0004
#define TX_EL_FILTER_TIMER_CALLS 0x0008
#define TX_EL_FILTER_EVENT_FLAG_CALLS 0x0010
#define TX_EL_FILTER_SEMAPHORE_CALLS 0x0020
#define TX_EL_FILTER_QUEUE_CALLS 0x0040
#define TX_EL_FILTER_BLOCK_CALLS 0x0080
#define TX_EL_FILTER_BYTE_CALLS 0x0100
#define TX_EL_FILTER_MUTEX_CALLS 0x0200
#define TX_EL_FILTER_ALL_EVENTS 0xFFFF
#define TX_EL_ENABLE_ALL_EVENTS 0x0000
/* Define filter macros that are inserted in-line with the other macros below. */
#ifdef TX_ENABLE_EVENT_FILTERS
#define TX_EL_NO_STATUS_EVENTS if (!(_tx_el_event_filter & TX_EL_FILTER_STATUS_CHANGE)) {
#define TX_EL_NO_INTERRUPT_EVENTS if (!(_tx_el_event_filter & TX_EL_FILTER_INTERRUPTS)) {
#define TX_EL_NO_THREAD_EVENTS if (!(_tx_el_event_filter & TX_EL_FILTER_THREAD_CALLS)) {
#define TX_EL_NO_TIMER_EVENTS if (!(_tx_el_event_filter & TX_EL_FILTER_TIMER_CALLS)) {
#define TX_EL_NO_EVENT_FLAG_EVENTS if (!(_tx_el_event_filter & TX_EL_FILTER_EVENT_FLAG_CALLS)) {
#define TX_EL_NO_SEMAPHORE_EVENTS if (!(_tx_el_event_filter & TX_EL_FILTER_SEMAPHORE_CALLS)) {
#define TX_EL_NO_QUEUE_EVENTS if (!(_tx_el_event_filter & TX_EL_FILTER_QUEUE_CALLS)) {
#define TX_EL_NO_BLOCK_EVENTS if (!(_tx_el_event_filter & TX_EL_FILTER_BLOCK_CALLS)) {
#define TX_EL_NO_BYTE_EVENTS if (!(_tx_el_event_filter & TX_EL_FILTER_BYTE_CALLS)) {
#define TX_EL_NO_MUTEX_EVENTS if (!(_tx_el_event_filter & TX_EL_FILTER_MUTEX_CALLS)) {
#define TX_EL_END_FILTER }
#else
#define TX_EL_NO_STATUS_EVENTS
#define TX_EL_NO_INTERRUPT_EVENTS
#define TX_EL_NO_THREAD_EVENTS
#define TX_EL_NO_TIMER_EVENTS
#define TX_EL_NO_EVENT_FLAG_EVENTS
#define TX_EL_NO_SEMAPHORE_EVENTS
#define TX_EL_NO_QUEUE_EVENTS
#define TX_EL_NO_BLOCK_EVENTS
#define TX_EL_NO_BYTE_EVENTS
#define TX_EL_NO_MUTEX_EVENTS
#define TX_EL_END_FILTER
#endif
/* Define externs and constants for non-event log source modules. This is for
the in-line macros below. */
#ifndef TX_EL_SOURCE_CODE
extern UCHAR *_tx_el_tni_start;
extern UCHAR **_tx_el_current_event;
extern UCHAR *_tx_el_event_area_start;
extern UCHAR *_tx_el_event_area_end;
extern UINT _tx_el_maximum_events;
extern ULONG _tx_el_total_events;
extern TX_THREAD *_tx_thread_current_ptr;
extern UINT _tx_el_event_filter;
extern ULONG _tx_el_time_base_upper;
extern ULONG _tx_el_time_base_lower;
/* Define macros for event logging functions. */
#define TX_EL_THREAD_CREATE_INSERT TX_EL_NO_THREAD_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO4(TX_EL_THREAD_CREATE, thread_ptr, stack_start, stack_size, priority); TX_EL_END_FILTER
#define TX_EL_EVENT_FLAGS_SET_INSERT TX_EL_NO_EVENT_FLAG_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO3(TX_EL_EVENT_FLAGS_SET, group_ptr, flags_to_set, set_option); TX_EL_END_FILTER
#define TX_EL_THREAD_DELETE_INSERT TX_EL_NO_THREAD_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(TX_EL_THREAD_DELETE, thread_ptr); TX_EL_END_FILTER
#define TX_EL_THREAD_INFO_GET_INSERT TX_EL_NO_THREAD_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(TX_EL_THREAD_INFO_GET, thread_ptr); TX_EL_END_FILTER
#define TX_EL_THREAD_TIME_SLICE_CHANGE_INSERT TX_EL_NO_THREAD_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO3(TX_EL_THREAD_TIME_SLICE_CHANGE, thread_ptr, thread_ptr -> tx_thread_new_time_slice, new_time_slice); TX_EL_END_FILTER
#define TX_EL_THREAD_TERMINATE_INSERT TX_EL_NO_THREAD_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(TX_EL_THREAD_TERMINATE, thread_ptr); TX_EL_END_FILTER
#define TX_EL_THREAD_SLEEP_INSERT TX_EL_NO_THREAD_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(TX_EL_THREAD_SLEEP, timer_ticks); TX_EL_END_FILTER
#define TX_EL_THREAD_SUSPEND_INSERT TX_EL_NO_THREAD_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(TX_EL_THREAD_SUSPEND, thread_ptr); TX_EL_END_FILTER
#define TX_EL_THREAD_RELINQUISH_INSERT TX_EL_NO_THREAD_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO0(TX_EL_THREAD_RELINQUISH); TX_EL_END_FILTER
#define TX_EL_THREAD_RESUME_INSERT TX_EL_NO_THREAD_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(TX_EL_THREAD_RESUME, thread_ptr); TX_EL_END_FILTER
#define TX_EL_THREAD_PRIORITY_CHANGE_INSERT TX_EL_NO_THREAD_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO3(TX_EL_THREAD_PRIORITY_CHANGE, thread_ptr, thread_ptr -> tx_thread_priority, new_priority); TX_EL_END_FILTER
#define TX_EL_THREAD_PREEMPTION_CHANGE_INSERT TX_EL_NO_THREAD_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO3(TX_EL_THREAD_PREEMPTION_CHANGE, thread_ptr, thread_ptr -> tx_thread_preempt_threshold, new_threshold); TX_EL_END_FILTER
#define TX_EL_THREAD_WAIT_ABORT_INSERT TX_EL_NO_THREAD_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(TX_EL_THREAD_WAIT_ABORT, thread_ptr); TX_EL_END_FILTER
#define TX_EL_THREAD_ENTRY_EXIT_NOTIFY_INSERT TX_EL_NO_THREAD_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO2(TX_EL_THREAD_ENTRY_EXIT_NOTIFY, thread_ptr, thread_entry_exit_notify); TX_EL_END_FILTER
#define TX_EL_THREAD_RESET_INSERT TX_EL_NO_THREAD_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(TX_EL_THREAD_RESET, thread_ptr); TX_EL_END_FILTER
#define TX_EL_THREAD_PERFORMANCE_INFO_GET_INSERT TX_EL_NO_THREAD_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(TX_EL_THREAD_PERFORMANCE_INFO_GET, thread_ptr); TX_EL_END_FILTER
#define TX_EL_THREAD_PERFORMANCE_SYSTEM_INFO_GET_INSERT TX_EL_NO_THREAD_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO0(TX_EL_THREAD_PERFORMANCE_SYSTEM_INFO_GET); TX_EL_END_FILTER
#define TX_EL_THREAD_STACK_ERROR_NOTIFY_INSERT TX_EL_NO_THREAD_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(TX_EL_THREAD_STACK_ERROR_NOTIFY, stack_error_handler); TX_EL_END_FILTER
#define TX_EL_TIME_SET_INSERT TX_EL_NO_TIMER_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(TX_EL_TIME_SET, new_time); TX_EL_END_FILTER
#define TX_EL_TIME_GET_INSERT TX_EL_NO_TIMER_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(TX_EL_TIME_GET, _tx_timer_system_clock); TX_EL_END_FILTER
#define TX_EL_TIMER_DELETE_INSERT TX_EL_NO_TIMER_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(TX_EL_TIMER_DELETE, timer_ptr); TX_EL_END_FILTER
#define TX_EL_TIMER_CREATE_INSERT TX_EL_NO_TIMER_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO4(TX_EL_TIMER_CREATE, timer_ptr, initial_ticks, reschedule_ticks, auto_activate); TX_EL_END_FILTER
#define TX_EL_TIMER_CHANGE_INSERT TX_EL_NO_TIMER_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO3(TX_EL_TIMER_CHANGE, timer_ptr, initial_ticks, reschedule_ticks); TX_EL_END_FILTER
#define TX_EL_THREAD_IDENTIFY_INSERT TX_EL_NO_THREAD_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO0(TX_EL_THREAD_IDENTIFY); TX_EL_END_FILTER
#define TX_EL_TIMER_DEACTIVATE_INSERT TX_EL_NO_TIMER_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(TX_EL_TIMER_DEACTIVATE, timer_ptr); TX_EL_END_FILTER
#define TX_EL_TIMER_ACTIVATE_INSERT TX_EL_NO_TIMER_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(TX_EL_TIMER_ACTIVATE, timer_ptr); TX_EL_END_FILTER
#define TX_EL_TIMER_INFO_GET_INSERT TX_EL_NO_TIMER_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(TX_EL_TIMER_INFO_GET, timer_ptr); TX_EL_END_FILTER
#define TX_EL_TIMER_PERFORMANCE_INFO_GET_INSERT TX_EL_NO_TIMER_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(TX_EL_TIMER_PERFORMANCE_INFO_GET, timer_ptr); TX_EL_END_FILTER
#define TX_EL_TIMER_PERFORMANCE_SYSTEM_INFO_GET_INSERT TX_EL_NO_TIMER_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO0(TX_EL_TIMER_PERFORMANCE_SYSTEM_INFO_GET); TX_EL_END_FILTER
#define TX_EL_SEMAPHORE_PUT_INSERT TX_EL_NO_SEMAPHORE_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO2(TX_EL_SEMAPHORE_PUT, semaphore_ptr, semaphore_ptr -> tx_semaphore_count); TX_EL_END_FILTER
#define TX_EL_SEMAPHORE_GET_INSERT TX_EL_NO_SEMAPHORE_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO2(TX_EL_SEMAPHORE_GET, semaphore_ptr, semaphore_ptr -> tx_semaphore_count); TX_EL_END_FILTER
#define TX_EL_SEMAPHORE_DELETE_INSERT TX_EL_NO_SEMAPHORE_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(TX_EL_SEMAPHORE_DELETE, semaphore_ptr); TX_EL_END_FILTER
#define TX_EL_SEMAPHORE_CREATE_INSERT TX_EL_NO_SEMAPHORE_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO2(TX_EL_SEMAPHORE_CREATE, semaphore_ptr, initial_count); TX_EL_END_FILTER
#define TX_EL_SEMAPHORE_INFO_GET_INSERT TX_EL_NO_SEMAPHORE_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(TX_EL_SEMAPHORE_INFO_GET, semaphore_ptr); TX_EL_END_FILTER
#define TX_EL_SEMAPHORE_PRIORITIZE_INSERT TX_EL_NO_SEMAPHORE_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(TX_EL_SEMAPHORE_PRIORITIZE, semaphore_ptr); TX_EL_END_FILTER
#define TX_EL_SEMAPHORE_CEILING_PUT_INSERT TX_EL_NO_SEMAPHORE_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO3(TX_EL_SEMAPHORE_CEILING_PUT, semaphore_ptr, semaphore_ptr -> tx_semaphore_count, ceiling); TX_EL_END_FILTER
#define TX_EL_SEMAPHORE_PERFORMANCE_INFO_GET_INSERT TX_EL_NO_SEMAPHORE_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(TX_EL_SEMAPHORE_PERFORMANCE_INFO_GET, semaphore_ptr); TX_EL_END_FILTER
#define TX_EL_SEMAPHORE_PERFORMANCE_SYSTEM_INFO_GET_INSERT TX_EL_NO_SEMAPHORE_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO0(TX_EL_SEMAPHORE_PERFORMANCE_SYSTEM_INFO_GET); TX_EL_END_FILTER
#define TX_EL_SEMAPHORE_PUT_NOTIFY_INSERT TX_EL_NO_SEMAPHORE_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO2(TX_EL_SEMAPHORE_PUT_NOTIFY, semaphore_ptr, semaphore_put_notify); TX_EL_END_FILTER
#define TX_EL_QUEUE_FRONT_SEND_INSERT TX_EL_NO_QUEUE_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO2(TX_EL_QUEUE_FRONT_SEND, queue_ptr, source_ptr); TX_EL_END_FILTER
#define TX_EL_QUEUE_SEND_INSERT TX_EL_NO_QUEUE_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO2(TX_EL_QUEUE_SEND, queue_ptr, source_ptr); TX_EL_END_FILTER
#define TX_EL_QUEUE_RECEIVE_INSERT TX_EL_NO_QUEUE_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO2(TX_EL_QUEUE_RECEIVE, queue_ptr, destination_ptr); TX_EL_END_FILTER
#define TX_EL_QUEUE_FLUSH_INSERT TX_EL_NO_QUEUE_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(TX_EL_QUEUE_FLUSH, queue_ptr); TX_EL_END_FILTER
#define TX_EL_QUEUE_DELETE_INSERT TX_EL_NO_QUEUE_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(TX_EL_QUEUE_DELETE, queue_ptr); TX_EL_END_FILTER
#define TX_EL_QUEUE_CREATE_INSERT TX_EL_NO_QUEUE_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO4(TX_EL_QUEUE_CREATE, queue_ptr, queue_start, queue_size, message_size); TX_EL_END_FILTER
#define TX_EL_QUEUE_INFO_GET_INSERT TX_EL_NO_QUEUE_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(TX_EL_QUEUE_INFO_GET, queue_ptr); TX_EL_END_FILTER
#define TX_EL_QUEUE_PRIORITIZE_INSERT TX_EL_NO_QUEUE_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(TX_EL_QUEUE_PRIORITIZE, queue_ptr); TX_EL_END_FILTER
#define TX_EL_QUEUE_PERFORMANCE_INFO_GET_INSERT TX_EL_NO_QUEUE_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(TX_EL_QUEUE_PERFORMANCE_INFO_GET, queue_ptr); TX_EL_END_FILTER
#define TX_EL_QUEUE_PERFORMANCE_SYSTEM_INFO_GET_INSERT TX_EL_NO_QUEUE_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO0(TX_EL_QUEUE_PERFORMANCE_SYSTEM_INFO_GET); TX_EL_END_FILTER
#define TX_EL_QUEUE_SEND_NOTIFY_INSERT TX_EL_NO_QUEUE_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO2(TX_EL_QUEUE_SEND_NOTIFY, queue_ptr, queue_send_notify); TX_EL_END_FILTER
#define TX_EL_EVENT_FLAGS_GET_INSERT TX_EL_NO_EVENT_FLAG_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO3(TX_EL_EVENT_FLAGS_GET, group_ptr, requested_flags, get_option); TX_EL_END_FILTER
#define TX_EL_EVENT_FLAGS_DELETE_INSERT TX_EL_NO_EVENT_FLAG_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(TX_EL_EVENT_FLAGS_DELETE, group_ptr); TX_EL_END_FILTER
#define TX_EL_EVENT_FLAGS_CREATE_INSERT TX_EL_NO_EVENT_FLAG_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(TX_EL_EVENT_FLAGS_CREATE, group_ptr); TX_EL_END_FILTER
#define TX_EL_EVENT_FLAGS_INFO_GET_INSERT TX_EL_NO_EVENT_FLAG_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(TX_EL_EVENT_FLAGS_INFO_GET, group_ptr); TX_EL_END_FILTER
#define TX_EL_EVENT_FLAGS_PERFORMANCE_INFO_GET_INSERT TX_EL_NO_EVENT_FLAG_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(TX_EL_EVENT_FLAGS_PERFORMANCE_INFO_GET, group_ptr); TX_EL_END_FILTER
#define TX_EL_EVENT_FLAGS_PERFORMANCE_SYSTEM_INFO_GET_INSERT TX_EL_NO_EVENT_FLAG_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO0(TX_EL_EVENT_FLAGS_PERFORMANCE_SYSTEM_INFO_GET); TX_EL_END_FILTER
#define TX_EL_EVENT_FLAGS_SET_NOTIFY_INSERT TX_EL_NO_EVENT_FLAG_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO2(TX_EL_EVENT_FLAGS_SET_NOTIFY, group_ptr, events_set_notify); TX_EL_END_FILTER
#define TX_EL_BYTE_RELEASE_INSERT TX_EL_NO_BYTE_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO2(TX_EL_BYTE_RELEASE, pool_ptr, memory_ptr); TX_EL_END_FILTER
#define TX_EL_BYTE_POOL_DELETE_INSERT TX_EL_NO_BYTE_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(TX_EL_BYTE_POOL_DELETE, pool_ptr); TX_EL_END_FILTER
#define TX_EL_BYTE_POOL_CREATE_INSERT TX_EL_NO_BYTE_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO3(TX_EL_BYTE_POOL_CREATE, pool_ptr, pool_start, pool_size); TX_EL_END_FILTER
#define TX_EL_BYTE_POOL_INFO_GET_INSERT TX_EL_NO_BYTE_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(TX_EL_BYTE_POOL_INFO_GET, pool_ptr); TX_EL_END_FILTER
#define TX_EL_BYTE_POOL_PRIORITIZE_INSERT TX_EL_NO_BYTE_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(TX_EL_BYTE_POOL_PRIORITIZE, pool_ptr); TX_EL_END_FILTER
#define TX_EL_BYTE_ALLOCATE_INSERT TX_EL_NO_BYTE_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO3(TX_EL_BYTE_ALLOCATE, pool_ptr, memory_ptr, memory_size); TX_EL_END_FILTER
#define TX_EL_BYTE_POOL_PERFORMANCE_INFO_GET_INSERT TX_EL_NO_BYTE_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(TX_EL_BYTE_POOL_PERFORMANCE_INFO_GET, pool_ptr); TX_EL_END_FILTER
#define TX_EL_BYTE_POOL_PERFORMANCE_SYSTEM_INFO_GET_INSERT TX_EL_NO_BYTE_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO0(TX_EL_BYTE_POOL_PERFORMANCE_SYSTEM_INFO_GET); TX_EL_END_FILTER
#define TX_EL_BLOCK_RELEASE_INSERT TX_EL_NO_BLOCK_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO2(TX_EL_BLOCK_RELEASE, pool_ptr, block_ptr); TX_EL_END_FILTER
#define TX_EL_BLOCK_POOL_DELETE_INSERT TX_EL_NO_BLOCK_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(TX_EL_BLOCK_POOL_DELETE, pool_ptr); TX_EL_END_FILTER
#define TX_EL_BLOCK_POOL_CREATE_INSERT TX_EL_NO_BLOCK_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO4(TX_EL_BLOCK_POOL_CREATE, pool_ptr, pool_start, pool_size, block_size); TX_EL_END_FILTER
#define TX_EL_BLOCK_POOL_INFO_GET_INSERT TX_EL_NO_BLOCK_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(TX_EL_BLOCK_POOL_INFO_GET, pool_ptr); TX_EL_END_FILTER
#define TX_EL_BLOCK_POOL_PRIORITIZE_INSERT TX_EL_NO_BLOCK_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(TX_EL_BLOCK_POOL_PRIORITIZE, pool_ptr); TX_EL_END_FILTER
#define TX_EL_BLOCK_ALLOCATE_INSERT TX_EL_NO_BLOCK_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO2(TX_EL_BLOCK_ALLOCATE, pool_ptr, block_ptr); TX_EL_END_FILTER
#define TX_EL_BLOCK_POOL_PERFORMANCE_INFO_GET_INSERT TX_EL_NO_BLOCK_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(TX_EL_BLOCK_POOL_PERFORMANCE_INFO_GET, pool_ptr); TX_EL_END_FILTER
#define TX_EL_BLOCK_POOL_PERFORMANCE_SYSTEM_INFO_GET_INSERT TX_EL_NO_BLOCK_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO0(TX_EL_BLOCK_POOL_PERFORMANCE_SYSTEM_INFO_GET); TX_EL_END_FILTER
#define TX_EL_MUTEX_CREATE_INSERT TX_EL_NO_MUTEX_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO2(TX_EL_MUTEX_CREATE, mutex_ptr, inherit); TX_EL_END_FILTER
#define TX_EL_MUTEX_DELETE_INSERT TX_EL_NO_MUTEX_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(TX_EL_MUTEX_DELETE, mutex_ptr); TX_EL_END_FILTER
#define TX_EL_MUTEX_GET_INSERT TX_EL_NO_MUTEX_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO3(TX_EL_MUTEX_GET, mutex_ptr, mutex_ptr -> tx_mutex_owner, mutex_ptr -> tx_mutex_ownership_count); TX_EL_END_FILTER
#define TX_EL_MUTEX_INFO_GET_INSERT TX_EL_NO_MUTEX_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(TX_EL_MUTEX_INFO_GET, mutex_ptr); TX_EL_END_FILTER
#define TX_EL_MUTEX_PRIORITIZE_INSERT TX_EL_NO_MUTEX_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(TX_EL_MUTEX_PRIORITIZE, mutex_ptr); TX_EL_END_FILTER
#define TX_EL_MUTEX_PUT_INSERT TX_EL_NO_MUTEX_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO3(TX_EL_MUTEX_PUT, mutex_ptr, mutex_ptr -> tx_mutex_owner, mutex_ptr -> tx_mutex_ownership_count); TX_EL_END_FILTER
#define TX_EL_MUTEX_PERFORMANCE_INFO_GET_INSERT TX_EL_NO_MUTEX_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(TX_EL_MUTEX_PERFORMANCE_INFO_GET, mutex_ptr); TX_EL_END_FILTER
#define TX_EL_MUTEX_PERFORMANCE_SYSTEM_INFO_GET_INSERT TX_EL_NO_MUTEX_EVENTS TX_EL_KERNEL_CALL_EVENT_INSERT_INFO0(TX_EL_MUTEX_PERFORMANCE_SYSTEM_INFO_GET); TX_EL_END_FILTER
#endif
/* Define Event Log function prototypes. */
VOID _tx_el_initialize(VOID);
UINT _tx_el_thread_register(TX_THREAD *thread_ptr);
UINT _tx_el_thread_unregister(TX_THREAD *thread_ptr);
VOID _tx_el_user_event_insert(UINT sub_type, ULONG info_1, ULONG info_2,
ULONG info_3, ULONG info_4);
VOID _tx_el_thread_running(TX_THREAD *thread_ptr);
VOID _tx_el_thread_preempted(TX_THREAD *thread_ptr);
VOID _tx_el_interrupt(UINT interrupt_number);
VOID _tx_el_interrupt_end(UINT interrupt_number);
VOID _tx_el_interrupt_control_call(void);
VOID _tx_el_event_log_on(void);
VOID _tx_el_event_log_off(void);
VOID _tx_el_event_filter_set(UINT filter);
/* Define macros that are used inside the ThreadX source code.
If event logging is disabled, these macros will be defined
as white space. */
#ifdef TX_ENABLE_EVENT_LOGGING
#ifndef TX_NO_EVENT_INFO
#define TX_EL_KERNEL_CALL_EVENT_INSERT_INFO4(a, b, c, d, e) \
{ \
UCHAR *entry_ptr; \
ULONG upper_tbu; \
entry_ptr = *_tx_el_current_event; \
*((unsigned short *) entry_ptr) = TX_EL_THREADX_CALL; \
*((unsigned short *) (entry_ptr + TX_EL_EVENT_SUBTYPE_OFFSET)) = (unsigned short) a; \
do { \
upper_tbu = read_tbu(); \
*((ULONG *) (entry_ptr + TX_EL_EVENT_TIME_UPPER_OFFSET)) = upper_tbu; \
*((ULONG *) (entry_ptr + TX_EL_EVENT_TIME_LOWER_OFFSET)) =\
(ULONG) read_tbl();\
} while (upper_tbu != read_tbu()); \
*((ULONG *) (entry_ptr + TX_EL_EVENT_THREAD_OFFSET)) =\
(ULONG) _tx_thread_current_ptr;\
*((ULONG *) (entry_ptr + TX_EL_EVENT_INFO_1_OFFSET)) =\
(ULONG) b;\
*((ULONG *) (entry_ptr + TX_EL_EVENT_INFO_2_OFFSET)) =\
(ULONG) c;\
*((ULONG *) (entry_ptr + TX_EL_EVENT_INFO_3_OFFSET)) =\
(ULONG) d;\
*((ULONG *) (entry_ptr + TX_EL_EVENT_INFO_4_OFFSET)) =\
(ULONG) e;\
entry_ptr = entry_ptr + TX_EL_EVENT_SIZE;\
if (entry_ptr >= _tx_el_event_area_end) \
{\
entry_ptr = _tx_el_event_area_start;\
}\
*_tx_el_current_event = entry_ptr;\
}
#define TX_EL_KERNEL_CALL_EVENT_INSERT_INFO3(a, b, c, d) \
{ \
UCHAR *entry_ptr; \
ULONG upper_tbu; \
entry_ptr = *_tx_el_current_event; \
*((unsigned short *) entry_ptr) = TX_EL_THREADX_CALL; \
*((unsigned short *) (entry_ptr + TX_EL_EVENT_SUBTYPE_OFFSET)) = (unsigned short) a; \
do { \
upper_tbu = read_tbu(); \
*((ULONG *) (entry_ptr + TX_EL_EVENT_TIME_UPPER_OFFSET)) = upper_tbu; \
*((ULONG *) (entry_ptr + TX_EL_EVENT_TIME_LOWER_OFFSET)) =\
(ULONG) read_tbl();\
} while (upper_tbu != read_tbu()); \
*((ULONG *) (entry_ptr + TX_EL_EVENT_THREAD_OFFSET)) =\
(ULONG) _tx_thread_current_ptr;\
*((ULONG *) (entry_ptr + TX_EL_EVENT_INFO_1_OFFSET)) =\
(ULONG) b;\
*((ULONG *) (entry_ptr + TX_EL_EVENT_INFO_2_OFFSET)) =\
(ULONG) c;\
*((ULONG *) (entry_ptr + TX_EL_EVENT_INFO_3_OFFSET)) =\
(ULONG) d;\
entry_ptr = entry_ptr + TX_EL_EVENT_SIZE;\
if (entry_ptr >= _tx_el_event_area_end) \
{\
entry_ptr = _tx_el_event_area_start;\
}\
*_tx_el_current_event = entry_ptr;\
}
#define TX_EL_KERNEL_CALL_EVENT_INSERT_INFO2(a, b, c) \
{ \
UCHAR *entry_ptr; \
ULONG upper_tbu; \
entry_ptr = *_tx_el_current_event; \
*((unsigned short *) entry_ptr) = TX_EL_THREADX_CALL; \
*((unsigned short *) (entry_ptr + TX_EL_EVENT_SUBTYPE_OFFSET)) = (unsigned short) a; \
do { \
upper_tbu = read_tbu(); \
*((ULONG *) (entry_ptr + TX_EL_EVENT_TIME_UPPER_OFFSET)) = upper_tbu; \
*((ULONG *) (entry_ptr + TX_EL_EVENT_TIME_LOWER_OFFSET)) =\
(ULONG) read_tbl();\
} while (upper_tbu != read_tbu()); \
*((ULONG *) (entry_ptr + TX_EL_EVENT_THREAD_OFFSET)) =\
(ULONG) _tx_thread_current_ptr;\
*((ULONG *) (entry_ptr + TX_EL_EVENT_INFO_1_OFFSET)) =\
(ULONG) b;\
*((ULONG *) (entry_ptr + TX_EL_EVENT_INFO_2_OFFSET)) =\
(ULONG) c;\
entry_ptr = entry_ptr + TX_EL_EVENT_SIZE;\
if (entry_ptr >= _tx_el_event_area_end) \
{\
entry_ptr = _tx_el_event_area_start;\
}\
*_tx_el_current_event = entry_ptr;\
}
#define TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(a, b) \
{ \
UCHAR *entry_ptr; \
ULONG upper_tbu; \
entry_ptr = *_tx_el_current_event; \
*((unsigned short *) entry_ptr) = TX_EL_THREADX_CALL; \
*((unsigned short *) (entry_ptr + TX_EL_EVENT_SUBTYPE_OFFSET)) = (unsigned short) a; \
do { \
upper_tbu = read_tbu(); \
*((ULONG *) (entry_ptr + TX_EL_EVENT_TIME_UPPER_OFFSET)) = upper_tbu; \
*((ULONG *) (entry_ptr + TX_EL_EVENT_TIME_LOWER_OFFSET)) =\
(ULONG) read_tbl();\
} while (upper_tbu != read_tbu()); \
*((ULONG *) (entry_ptr + TX_EL_EVENT_THREAD_OFFSET)) =\
(ULONG) _tx_thread_current_ptr;\
*((ULONG *) (entry_ptr + TX_EL_EVENT_INFO_1_OFFSET)) =\
(ULONG) b;\
entry_ptr = entry_ptr + TX_EL_EVENT_SIZE;\
if (entry_ptr >= _tx_el_event_area_end) \
{\
entry_ptr = _tx_el_event_area_start;\
}\
*_tx_el_current_event = entry_ptr;\
}
#define TX_EL_KERNEL_CALL_EVENT_INSERT_INFO0(a) \
{ \
UCHAR *entry_ptr; \
ULONG upper_tbu; \
entry_ptr = *_tx_el_current_event; \
*((unsigned short *) entry_ptr) = TX_EL_THREADX_CALL; \
*((unsigned short *) (entry_ptr + TX_EL_EVENT_SUBTYPE_OFFSET)) = (unsigned short) a; \
do { \
upper_tbu = read_tbu(); \
*((ULONG *) (entry_ptr + TX_EL_EVENT_TIME_UPPER_OFFSET)) = upper_tbu; \
*((ULONG *) (entry_ptr + TX_EL_EVENT_TIME_LOWER_OFFSET)) =\
(ULONG) read_tbl();\
} while (upper_tbu != read_tbu()); \
*((ULONG *) (entry_ptr + TX_EL_EVENT_THREAD_OFFSET)) =\
(ULONG) _tx_thread_current_ptr;\
entry_ptr = entry_ptr + TX_EL_EVENT_SIZE;\
if (entry_ptr >= _tx_el_event_area_end) \
{\
entry_ptr = _tx_el_event_area_start;\
}\
*_tx_el_current_event = entry_ptr;\
}
#define TX_EL_THREAD_STATUS_CHANGE_INSERT(a, b) \
{ \
UCHAR *entry_ptr; \
ULONG upper_tbu; \
TX_EL_NO_STATUS_EVENTS \
entry_ptr = *_tx_el_current_event; \
*((unsigned short *) entry_ptr) = TX_EL_THREAD_STATUS_CHANGE; \
*((unsigned short *) (entry_ptr + TX_EL_EVENT_SUBTYPE_OFFSET)) = (unsigned short) b; \
do { \
upper_tbu = read_tbu(); \
*((ULONG *) (entry_ptr + TX_EL_EVENT_TIME_UPPER_OFFSET)) = upper_tbu; \
*((ULONG *) (entry_ptr + TX_EL_EVENT_TIME_LOWER_OFFSET)) =\
(ULONG) read_tbl();\
} while (upper_tbu != read_tbu()); \
*((ULONG *) (entry_ptr + TX_EL_EVENT_THREAD_OFFSET)) =\
(ULONG) a;\
entry_ptr = entry_ptr + TX_EL_EVENT_SIZE;\
if (entry_ptr >= _tx_el_event_area_end) \
{\
entry_ptr = _tx_el_event_area_start;\
}\
*_tx_el_current_event = entry_ptr;\
TX_EL_END_FILTER \
}
#define TX_EL_THREAD_REGISTER(a) \
_tx_el_thread_register(a);
#define TX_EL_THREAD_UNREGISTER(a) \
_tx_el_thread_unregister(a);
#define TX_EL_INITIALIZE _tx_el_initialize();
#else
#define TX_EL_KERNEL_CALL_EVENT_INSERT_INFO4(a, b, c, d, e) \
{ \
UCHAR *entry_ptr; \
ULONG upper_tbu; \
entry_ptr = *_tx_el_current_event; \
*((unsigned short *) entry_ptr) = TX_EL_THREADX_CALL; \
*((unsigned short *) (entry_ptr + TX_EL_EVENT_SUBTYPE_OFFSET)) = (unsigned short) a; \
do { \
upper_tbu = read_tbu(); \
*((ULONG *) (entry_ptr + TX_EL_EVENT_TIME_UPPER_OFFSET)) = upper_tbu; \
*((ULONG *) (entry_ptr + TX_EL_EVENT_TIME_LOWER_OFFSET)) =\
(ULONG) read_tbl();\
} while (upper_tbu != read_tbu()); \
*((ULONG *) (entry_ptr + TX_EL_EVENT_THREAD_OFFSET)) =\
(ULONG) _tx_thread_current_ptr;\
entry_ptr = entry_ptr + TX_EL_EVENT_SIZE;\
if (entry_ptr >= _tx_el_event_area_end) \
{\
entry_ptr = _tx_el_event_area_start;\
}\
*_tx_el_current_event = entry_ptr;\
}
#define TX_EL_KERNEL_CALL_EVENT_INSERT_INFO3(a, b, c, d) \
{ \
UCHAR *entry_ptr; \
ULONG upper_tbu; \
entry_ptr = *_tx_el_current_event; \
*((unsigned short *) entry_ptr) = TX_EL_THREADX_CALL; \
*((unsigned short *) (entry_ptr + TX_EL_EVENT_SUBTYPE_OFFSET)) = (unsigned short) a; \
do { \
upper_tbu = read_tbu(); \
*((ULONG *) (entry_ptr + TX_EL_EVENT_TIME_UPPER_OFFSET)) = upper_tbu; \
*((ULONG *) (entry_ptr + TX_EL_EVENT_TIME_LOWER_OFFSET)) =\
(ULONG) read_tbl();\
} while (upper_tbu != read_tbu()); \
*((ULONG *) (entry_ptr + TX_EL_EVENT_THREAD_OFFSET)) =\
(ULONG) _tx_thread_current_ptr;\
entry_ptr = entry_ptr + TX_EL_EVENT_SIZE;\
if (entry_ptr >= _tx_el_event_area_end) \
{\
entry_ptr = _tx_el_event_area_start;\
}\
*_tx_el_current_event = entry_ptr;\
}
#define TX_EL_KERNEL_CALL_EVENT_INSERT_INFO2(a, b, c) \
{ \
UCHAR *entry_ptr; \
ULONG upper_tbu; \
entry_ptr = *_tx_el_current_event; \
*((unsigned short *) entry_ptr) = TX_EL_THREADX_CALL; \
*((unsigned short *) (entry_ptr + TX_EL_EVENT_SUBTYPE_OFFSET)) = (unsigned short) a; \
do { \
upper_tbu = read_tbu(); \
*((ULONG *) (entry_ptr + TX_EL_EVENT_TIME_UPPER_OFFSET)) = upper_tbu; \
*((ULONG *) (entry_ptr + TX_EL_EVENT_TIME_LOWER_OFFSET)) =\
(ULONG) read_tbl();\
} while (upper_tbu != read_tbu()); \
*((ULONG *) (entry_ptr + TX_EL_EVENT_THREAD_OFFSET)) =\
(ULONG) _tx_thread_current_ptr;\
entry_ptr = entry_ptr + TX_EL_EVENT_SIZE;\
if (entry_ptr >= _tx_el_event_area_end) \
{\
entry_ptr = _tx_el_event_area_start;\
}\
*_tx_el_current_event = entry_ptr;\
}
#define TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(a, b) \
{ \
UCHAR *entry_ptr; \
ULONG upper_tbu; \
entry_ptr = *_tx_el_current_event; \
*((unsigned short *) entry_ptr) = TX_EL_THREADX_CALL; \
*((unsigned short *) (entry_ptr + TX_EL_EVENT_SUBTYPE_OFFSET)) = (unsigned short) a; \
do { \
upper_tbu = read_tbu(); \
*((ULONG *) (entry_ptr + TX_EL_EVENT_TIME_UPPER_OFFSET)) = upper_tbu; \
*((ULONG *) (entry_ptr + TX_EL_EVENT_TIME_LOWER_OFFSET)) =\
(ULONG) read_tbl();\
} while (upper_tbu != read_tbu()); \
*((ULONG *) (entry_ptr + TX_EL_EVENT_THREAD_OFFSET)) =\
(ULONG) _tx_thread_current_ptr;\
entry_ptr = entry_ptr + TX_EL_EVENT_SIZE;\
if (entry_ptr >= _tx_el_event_area_end) \
{\
entry_ptr = _tx_el_event_area_start;\
}\
*_tx_el_current_event = entry_ptr;\
}
#define TX_EL_KERNEL_CALL_EVENT_INSERT_INFO0(a) \
{ \
UCHAR *entry_ptr; \
ULONG upper_tbu; \
entry_ptr = *_tx_el_current_event; \
*((unsigned short *) entry_ptr) = TX_EL_THREADX_CALL; \
*((unsigned short *) (entry_ptr + TX_EL_EVENT_SUBTYPE_OFFSET)) = (unsigned short) a; \
do { \
upper_tbu = read_tbu(); \
*((ULONG *) (entry_ptr + TX_EL_EVENT_TIME_UPPER_OFFSET)) = upper_tbu; \
*((ULONG *) (entry_ptr + TX_EL_EVENT_TIME_LOWER_OFFSET)) =\
(ULONG) read_tbl();\
} while (upper_tbu != read_tbu()); \
*((ULONG *) (entry_ptr + TX_EL_EVENT_THREAD_OFFSET)) =\
(ULONG) _tx_thread_current_ptr;\
entry_ptr = entry_ptr + TX_EL_EVENT_SIZE;\
if (entry_ptr >= _tx_el_event_area_end) \
{\
entry_ptr = _tx_el_event_area_start;\
}\
*_tx_el_current_event = entry_ptr;\
}
#define TX_EL_THREAD_STATUS_CHANGE_INSERT(a, b) \
{ \
UCHAR *entry_ptr; \
ULONG upper_tbu; \
TX_EL_NO_STATUS_EVENTS \
entry_ptr = *_tx_el_current_event; \
*((unsigned short *) entry_ptr) = TX_EL_THREAD_STATUS_CHANGE; \
*((unsigned short *) (entry_ptr + TX_EL_EVENT_SUBTYPE_OFFSET)) = (unsigned short) b; \
do { \
upper_tbu = read_tbu(); \
*((ULONG *) (entry_ptr + TX_EL_EVENT_TIME_UPPER_OFFSET)) = upper_tbu; \
*((ULONG *) (entry_ptr + TX_EL_EVENT_TIME_LOWER_OFFSET)) =\
(ULONG) read_tbl();\
} while (upper_tbu != read_tbu()); \
*((ULONG *) (entry_ptr + TX_EL_EVENT_THREAD_OFFSET)) =\
(ULONG) a;\
entry_ptr = entry_ptr + TX_EL_EVENT_SIZE;\
if (entry_ptr >= _tx_el_event_area_end) \
{\
entry_ptr = _tx_el_event_area_start;\
}\
*_tx_el_current_event = entry_ptr;\
TX_EL_END_FILTER \
}
#define TX_EL_THREAD_REGISTER(a) \
_tx_el_thread_register(a);
#define TX_EL_THREAD_UNREGISTER(a) \
_tx_el_thread_unregister(a);
#define TX_EL_INITIALIZE _tx_el_initialize();
#endif
#else
#define TX_EL_KERNEL_CALL_EVENT_INSERT_INFO4(a, b, c, d, e)
#define TX_EL_KERNEL_CALL_EVENT_INSERT_INFO3(a, b, c, d)
#define TX_EL_KERNEL_CALL_EVENT_INSERT_INFO2(a, b, c)
#define TX_EL_KERNEL_CALL_EVENT_INSERT_INFO1(a, b)
#define TX_EL_KERNEL_CALL_EVENT_INSERT_INFO0(a)
#define TX_EL_THREAD_STATUS_CHANGE_INSERT(a, b)
#define TX_EL_THREAD_REGISTER(a)
#define TX_EL_THREAD_UNREGISTER(a)
#define TX_EL_INITIALIZE
#endif
#endif

77
ports/cortex_m4/ghs/inc/tx_ghs.h Normal file
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@@ -0,0 +1,77 @@
/*
* ThreadX C/C++ Library Support
*
* Copyright 1983-2019 Green Hills Software LLC.
*
* This program is the property of Green Hills Software LLC.,
* its contents are proprietary information and no part of it
* is to be disclosed to anyone except employees of Green Hills
* Software LLC., or as agreed in writing signed by the President
* of Green Hills Software LLC.
*/
#ifndef _TX_GHS_H_
#define _TX_GHS_H_
#include <signal.h>
#include <stdio.h>
#include <time.h>
#include <setjmp.h>
#if defined(__ghs) && (__GHS_VERSION_NUMBER >= 500)
extern void *__ghs_GetThreadLocalStorageItem(int specifier);
/* Thread-local storage routines for Green Hills releases 5.x and beyond.
The following specifiers are used when calling
__ghs_GetThreadLocalStorageItem.
If __ghs_GetThreadLocalStorageItem is customized to
return a per-thread errno value, define the preprocessor symbol
USE_THREAD_LOCAL_ERRNO in ind_errn.c.
*/
enum __ghs_ThreadLocalStorage_specifier {
__ghs_TLS_asctime_buff,
__ghs_TLS_tmpnam_space,
__ghs_TLS_strtok_saved_pos,
__ghs_TLS_Errno,
__ghs_TLS_gmtime_temp,
__ghs_TLS___eh_globals,
__ghs_TLS_SignalHandlers
};
#else
/* Thread-local storage routines for Green Hills releases 4.x and 3.x . */
typedef void (*SignalHandler)(int);
typedef struct
{
int Errno; /* errno. */
SignalHandler SignalHandlers[_SIGMAX]; /* signal() buffer. */
char tmpnam_space[L_tmpnam]; /* tmpnam(NULL) buffer. */
char asctime_buff[30]; /* . */
char *strtok_saved_pos; /* strtok() position. */
struct tm gmtime_temp; /* gmtime() and localtime() buffer. */
void *__eh_globals; /* Pointer for C++ exception handling. */
} ThreadLocalStorage;
ThreadLocalStorage *GetThreadLocalStorage(void);
#endif
void __ghsLock(void);
void __ghsUnlock(void);
int __ghs_SaveSignalContext(jmp_buf);
void __ghs_RestoreSignalContext(jmp_buf);
/* prototypes for FILE lock routines. */
void __ghs_flock_file(void *);
void __ghs_funlock_file(void *);
int __ghs_ftrylock_file(void *);
void __ghs_flock_create(void **);
void __ghs_flock_destroy(void *);
/* prototype for GHS/ThreadX error shell checking. */
void __ghs_rnerr(char *errMsg, int stackLevels, int stackTraceDisplay, void *hexVal);
#endif /* _TX_GHS_H_ */

396
ports/cortex_m4/ghs/inc/tx_port.h Normal file
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@@ -0,0 +1,396 @@
/**************************************************************************/
/* */
/* Copyright (c) Microsoft Corporation. All rights reserved. */
/* */
/* This software is licensed under the Microsoft Software License */
/* Terms for Microsoft Azure RTOS. Full text of the license can be */
/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
/* and in the root directory of this software. */
/* */
/**************************************************************************/
/**************************************************************************/
/**************************************************************************/
/** */
/** ThreadX Component */
/** */
/** Port Specific */
/** */
/**************************************************************************/
/**************************************************************************/
/**************************************************************************/
/* */
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h Cortex-M4/GHS */
/* 6.1 */
/* */
/* AUTHOR */
/* */
/* William E. Lamie, Microsoft Corporation */
/* */
/* DESCRIPTION */
/* */
/* This file contains data type definitions that make the ThreadX */
/* real-time kernel function identically on a variety of different */
/* processor architectures. For example, the size or number of bits */
/* in an "int" data type vary between microprocessor architectures and */
/* even C compilers for the same microprocessor. ThreadX does not */
/* directly use native C data types. Instead, ThreadX creates its */
/* own special types that can be mapped to actual data types by this */
/* file to guarantee consistency in the interface and functionality. */
/* */
/* RELEASE HISTORY */
/* */
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* */
/**************************************************************************/
#ifndef TX_PORT_H
#define TX_PORT_H
/* Determine if the optional ThreadX user define file should be used. */
#ifdef TX_INCLUDE_USER_DEFINE_FILE
/* Yes, include the user defines in tx_user.h. The defines in this file may
alternately be defined on the command line. */
#include "tx_user.h"
#endif
/* Define compiler library include files. */
#include <stdlib.h>
#include <string.h>
#include <arm_ghs.h>
#include "tx_ghs.h"
/* Define ThreadX basic types for this port. */
#define VOID void
typedef char CHAR;
typedef unsigned char UCHAR;
typedef int INT;
typedef unsigned int UINT;
typedef long LONG;
typedef unsigned long ULONG;
typedef short SHORT;
typedef unsigned short USHORT;
/* Define the priority levels for ThreadX. Legal values range
from 32 to 1024 and MUST be evenly divisible by 32. */
#ifndef TX_MAX_PRIORITIES
#define TX_MAX_PRIORITIES 32
#endif
/* Define the minimum stack for a ThreadX thread on this processor. If the size supplied during
thread creation is less than this value, the thread create call will return an error. */
#ifndef TX_MINIMUM_STACK
#define TX_MINIMUM_STACK 200 /* Minimum stack size for this port */
#endif
/* Define the system timer thread's default stack size and priority. These are only applicable
if TX_TIMER_PROCESS_IN_ISR is not defined. */
#ifndef TX_TIMER_THREAD_STACK_SIZE
#define TX_TIMER_THREAD_STACK_SIZE 1024 /* Default timer thread stack size */
#endif
#ifndef TX_TIMER_THREAD_PRIORITY
#define TX_TIMER_THREAD_PRIORITY 0 /* Default timer thread priority */
#endif
/* Define various constants for the ThreadX ARM Cortex-M port. */
#define TX_INT_DISABLE 1 /* Disable interrupts */
#define TX_INT_ENABLE 0 /* Enable interrupts */
/* Define the clock source for trace event entry time stamp. The following two item are port specific.
For example, if the time source is at the address 0x0a800024 and is 16-bits in size, the clock
source constants would be:
#define TX_TRACE_TIME_SOURCE *((ULONG *) 0x0a800024)
#define TX_TRACE_TIME_MASK 0x0000FFFFUL
*/
#ifndef TX_TRACE_TIME_SOURCE
#define TX_TRACE_TIME_SOURCE *((ULONG *) 0xE0001004)
#endif
#ifndef TX_TRACE_TIME_MASK
#define TX_TRACE_TIME_MASK 0xFFFFFFFFUL
#endif
/* Define constants for Green Hills EventAnalyzer. */
/* Define the number of ticks per second. This informs the EventAnalyzer what the timestamps
represent. By default, this is set to 1,000,000 i.e., one tick every microsecond. */
#define TX_EL_TICKS_PER_SECOND 1000000
/* Define the method of how to get the upper and lower 32-bits of the time stamp. By default, simply
simulate the time-stamp source with a counter. */
#define read_tbu() _tx_el_time_base_upper
#define read_tbl() ++_tx_el_time_base_lower
/* Define the port specific options for the _tx_build_options variable. This variable indicates
how the ThreadX library was built. */
#define TX_PORT_SPECIFIC_BUILD_OPTIONS (0)
/* Define the in-line initialization constant so that modules with in-line
initialization capabilities can prevent their initialization from being
a function call. */
#define TX_INLINE_INITIALIZATION
/* Determine whether or not stack checking is enabled. By default, ThreadX stack checking is
disabled. When the following is defined, ThreadX thread stack checking is enabled. If stack
checking is enabled (TX_ENABLE_STACK_CHECKING is defined), the TX_DISABLE_STACK_FILLING
define is negated, thereby forcing the stack fill which is necessary for the stack checking
logic. */
#ifdef TX_ENABLE_STACK_CHECKING
#undef TX_DISABLE_STACK_FILLING
#endif
/* Define the TX_THREAD control block extensions for this port. The main reason
for the multiple macros is so that backward compatibility can be maintained with
existing ThreadX kernel awareness modules. */
#define TX_THREAD_EXTENSION_0
#define TX_THREAD_EXTENSION_1
#define TX_THREAD_EXTENSION_2 VOID * tx_thread_eh_globals; \
int Errno; /* errno. */ \
char * strtok_saved_pos; /* strtok() position. */
#ifndef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
#define TX_THREAD_EXTENSION_3
#else
#define TX_THREAD_EXTENSION_3 unsigned long long tx_thread_execution_time_total; \
unsigned long long tx_thread_execution_time_last_start;
#endif
/* Define the port extensions of the remaining ThreadX objects. */
#define TX_BLOCK_POOL_EXTENSION
#define TX_BYTE_POOL_EXTENSION
#define TX_EVENT_FLAGS_GROUP_EXTENSION
#define TX_MUTEX_EXTENSION
#define TX_QUEUE_EXTENSION
#define TX_SEMAPHORE_EXTENSION
#define TX_TIMER_EXTENSION
/* Define the user extension field of the thread control block. Nothing
additional is needed for this port so it is defined as white space. */
#ifndef TX_THREAD_USER_EXTENSION
#define TX_THREAD_USER_EXTENSION
#endif
/* Define the macros for processing extensions in tx_thread_create, tx_thread_delete,
tx_thread_shell_entry, and tx_thread_terminate. */
#if (__GHS_VERSION_NUMBER >= 500)
#define TX_THREAD_CREATE_EXTENSION(thread_ptr) \
{ \
extern void __tx_cpp_exception_init(TX_THREAD *thread_ptr); \
__tx_cpp_exception_init(thread_ptr); \
}
#else
#define TX_THREAD_CREATE_EXTENSION(thread_ptr) \
{ \
#pragma weak __cpp_exception_init \
extern void __cpp_exception_init(void **); \
static void (*const cpp_init_funcp)(void **) = __cpp_exception_init; \
if (cpp_init_funcp) \
__cpp_exception_init(&(thread_ptr -> tx_thread_eh_globals)); \
}
#endif
#if (__GHS_VERSION_NUMBER >= 500)
#define TX_THREAD_DELETE_EXTENSION(thread_ptr) \
{ \
extern void __tx_cpp_exception_cleanup(TX_THREAD *thread_ptr); \
__tx_cpp_exception_cleanup(thread_ptr); \
}
#else
#define TX_THREAD_DELETE_EXTENSION(thread_ptr) \
{ \
#pragma weak __cpp_exception_cleanup \
extern void __cpp_exception_cleanup(void **); \
static void (*const cpp_cleanup_funcp)(void **) = \
__cpp_exception_cleanup; \
if (cpp_cleanup_funcp) \
__cpp_exception_cleanup(&(thread_ptr -> tx_thread_eh_globals)); \
}
#endif
#define TX_THREAD_COMPLETED_EXTENSION(thread_ptr)
#define TX_THREAD_TERMINATED_EXTENSION(thread_ptr)
/* Define the ThreadX object creation extensions for the remaining objects. */
#define TX_BLOCK_POOL_CREATE_EXTENSION(pool_ptr)
#define TX_BYTE_POOL_CREATE_EXTENSION(pool_ptr)
#define TX_EVENT_FLAGS_GROUP_CREATE_EXTENSION(group_ptr)
#define TX_MUTEX_CREATE_EXTENSION(mutex_ptr)
#define TX_QUEUE_CREATE_EXTENSION(queue_ptr)
#define TX_SEMAPHORE_CREATE_EXTENSION(semaphore_ptr)
#define TX_TIMER_CREATE_EXTENSION(timer_ptr)
/* Define the ThreadX object deletion extensions for the remaining objects. */
#define TX_BLOCK_POOL_DELETE_EXTENSION(pool_ptr)
#define TX_BYTE_POOL_DELETE_EXTENSION(pool_ptr)
#define TX_EVENT_FLAGS_GROUP_DELETE_EXTENSION(group_ptr)
#define TX_MUTEX_DELETE_EXTENSION(mutex_ptr)
#define TX_QUEUE_DELETE_EXTENSION(queue_ptr)
#define TX_SEMAPHORE_DELETE_EXTENSION(semaphore_ptr)
#define TX_TIMER_DELETE_EXTENSION(timer_ptr)
/* Define the get system state macro. */
#ifndef TX_THREAD_GET_SYSTEM_STATE
#define TX_THREAD_GET_SYSTEM_STATE() (_tx_thread_system_state | __MRS(__IPSR))
#endif
/* Define the check for whether or not to call the _tx_thread_system_return function. A non-zero value
indicates that _tx_thread_system_return should not be called. This overrides the definition in tx_thread.h
for Cortex-M since so we don't waste time checking the _tx_thread_system_state variable that is always
zero after initialization for Cortex-M ports. */
#ifndef TX_THREAD_SYSTEM_RETURN_CHECK
#define TX_THREAD_SYSTEM_RETURN_CHECK(c) (c) = ((ULONG) _tx_thread_preempt_disable);
#endif
/* Define the macro to ensure _tx_thread_preempt_disable is set early in initialization in order to
prevent early scheduling on Cortex-M parts. */
#define TX_PORT_SPECIFIC_POST_INITIALIZATION _tx_thread_preempt_disable++;
/* Determine if the ARM architecture has the CLZ instruction. This is available on
architectures v5 and above. If available, redefine the macro for calculating the
lowest bit set. */
#ifndef TX_DISABLE_INLINE
#define TX_LOWEST_SET_BIT_CALCULATE(m, b) m = m & ((ULONG) (-((LONG) m))); \
b = __CLZ32(m); \
b = 31 - b;
#endif
/* Define ThreadX interrupt lockout and restore macros for protection on
access of critical kernel information. The restore interrupt macro must
restore the interrupt posture of the running thread prior to the value
present prior to the disable macro. In most cases, the save area macro
is used to define a local function save area for the disable and restore
macros. */
#ifdef TX_DISABLE_INLINE
UINT _tx_thread_interrupt_disable(VOID);
VOID _tx_thread_interrupt_restore(UINT previous_posture);
#define TX_INTERRUPT_SAVE_AREA register int interrupt_save;
#define TX_DISABLE interrupt_save = _tx_thread_interrupt_control(TX_INT_DISABLE);
#define TX_RESTORE _tx_thread_interrupt_control(interrupt_save);
#else
#define TX_INTERRUPT_SAVE_AREA register int interrupt_save;
/* Define ThreadX interrupt lockout and restore macros using
asm macros. */
asm int disable_ints(void)
{
%
MRS r0,PRIMASK
MOV r1,1
MSR PRIMASK,r1
%error
}
asm void restore_ints(int a)
{
%reg a
MSR PRIMASK,a
%mem a
LDR r0,a
MSR PRIMASK,r0
%error
}
#define TX_DISABLE interrupt_save = disable_ints();
#define TX_RESTORE restore_ints(interrupt_save);
#endif
/* Define FPU extension for the Cortex-M4. Each is assumed to be called in the context of the executing
thread. These are no longer needed, but are preserved for backward compatibility only. */
void tx_thread_fpu_enable(void);
void tx_thread_fpu_disable(void);
/* Define the interrupt lockout macros for each ThreadX object. */
#define TX_BLOCK_POOL_DISABLE TX_DISABLE
#define TX_BYTE_POOL_DISABLE TX_DISABLE
#define TX_EVENT_FLAGS_GROUP_DISABLE TX_DISABLE
#define TX_MUTEX_DISABLE TX_DISABLE
#define TX_QUEUE_DISABLE TX_DISABLE
#define TX_SEMAPHORE_DISABLE TX_DISABLE
/* Define the version ID of ThreadX. This may be utilized by the application. */
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M4/GHS Version 6.1 *";
#else
extern CHAR _tx_version_id[];
#endif
#endif

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Microsoft's Azure RTOS ThreadX for Cortex-M4
Using the Green Hills Software Tools
1. Open the ThreadX Project Workspace
In order to build the ThreadX library and the ThreadX demonstration first load
the Azure RTOS Workspace azure_rtos_workspace.gpj, which is located inside the
"example_build" directory.
2. Building the ThreadX run-time Library
Building the ThreadX library is easy; simply select the MULTI project file
tx.gpj and then select the build button. You should now observe the
compilation and assembly of the ThreadX library. This project build produces
the ThreadX library file tx.a.
3. Demonstration System
The ThreadX demonstration is designed to execute under the MULTI environment
on the Green Hills Cortex-M4 simulator. The instructions that follow describe
how to get the ThreadX evaluation running under the MULTI Cortex-M4 simulation
environment.
Building the demonstration is easy; simply select the MULTI project file
sample_threadx.gpj. At this point, select the "Project Build" button and observe
the compilation, assembly, and linkage of the ThreadX demonstration application.
After the demonstration is built, invoke the MULTI ARM simulator by selecting
the simulator connection from within the sample_threadx.con connection file.
Once connected to the simulator, select the "Debug" button. You should now
observe the main function of sample_threadx.c.
You are now ready to execute the ThreadX demonstration system. Select
breakpoints and data watches to observe the execution of the sample_threadx.c
application.
4. EventAnalyzer Demonstration
To build a demonstration system that also logs events for the MULTI EventAnalyzer,
perform the same steps as the regular demo, except build the ThreadX library with
txe.gpj file and use the sample_threadx_el.gpj build file to build the demonstration.
The resulting image will log all system events, which can then be displayed by the
MULTI EventAnalyzer.
5. System Initialization
The system entry point using the Green Hills tools is at the label _start.
This is defined within the crt0.arm file supplied by Green Hills. In addition,
this is where all static and global preset C variable initialization
processing is called from.
After the Green Hills startup function returns, ThreadX initialization is
called. The main initialization function is _tx_initialize_low_level and
is located in the file tx_initialize_low_level.arm. This function is responsible
for setting up various system data structures, interrupt vectors, and the
periodic timer interrupt source of ThreadX.
In addition, _tx_initialize_low_level determines where the first available
RAM memory address is located. This address is supplied to tx_application_define.
By default, the first available RAM memory address is assumed to start at the
beginning of the ThreadX section .free_mem. If changes are made to the
sample_threadx.ld file, the .free_mem section should remain the last allocated
section in the main RAM area. The starting address of this section is passed
to tx_application_define.
6. Register Usage and Stack Frames
The following defines the saved context stack frames for context switches
that occur as a result of interrupt handling or from thread-level API calls.
All suspended threads have the same stack frame in the Cortex-M4 version of
ThreadX. The top of the suspended thread's stack is pointed to by
tx_thread_stack_ptr in the associated thread control block TX_THREAD.
Non-FPU Stack Frame:
Stack Offset Stack Contents
0x00 r4
0x04 r5
0x08 r6
0x0C r7
0x10 r8
0x14 r9
0x18 r10
0x1C r11
0x20 r0 (Hardware stack starts here!!)
0x24 r1
0x28 r2
0x2C r3
0x30 r12
0x34 lr
0x38 pc
0x3C xPSR
FPU Stack Frame (only interrupted thread with FPU enabled):
Stack Offset Stack Contents
0x00 s0
0x04 s1
0x08 s2
0x0C s3
0x10 s4
0x14 s5
0x18 s6
0x1C s7
0x20 s8
0x24 s9
0x28 s10
0x2C s11
0x30 s12
0x34 s13
0x38 s14
0x3C s15
0x40 s16
0x44 s17
0x48 s18
0x4C s19
0x50 s20
0x54 s21
0x58 s22
0x5C s23
0x60 s24
0x64 s25
0x68 s26
0x6C s27
0x70 s28
0x74 s29
0x78 s30
0x7C s31
0x80 fpscr
0x84 r4
0x88 r5
0x8C r6
0x90 r7
0x94 r8
0x98 r9
0x9C r10 (sl)
0xA0 r11
0xA4 r0 (Hardware stack starts here!!)
0xA8 r1
0xAC r2
0xB0 r3
0xB4 r12
0xB8 lr
0xBC pc
0xC0 xPSR
7. Improving Performance
The distribution version of ThreadX is built without any compiler
optimizations. This makes it easy to debug because you can trace or set
breakpoints inside of ThreadX itself. Of course, this costs some
performance. To make ThreadX run faster, you can change the tx.gpj project
to disable debug information and enable the desired optimizations.
In addition, you can eliminate the ThreadX basic API error checking by
compiling your application code with the symbol TX_DISABLE_ERROR_CHECKING
defined before tx_api.h is included.
8. Interrupt Handling
ThreadX provides complete and high-performance interrupt handling for Cortex-M4
targets. There are a certain set of requirements that are defined in the
following sub-sections:
8.1 Vector Area
The Cortex-M4 vectors start at the label __tx_vectors. The application may modify
the vector area according to its needs.
8.2 Managed Interrupts
A ThreadX managed interrupt is defined below. By following these conventions, the
application ISR is then allowed access to various ThreadX services from the ISR.
Here is the standard template for managed ISRs in ThreadX:
.globl __tx_IntHandler
__tx_IntHandler:
PUSH {lr}
BL _tx_thread_context_save
/* Do interrupt handler work here */
B _tx_thread_context_restore
9. FPU Support
By default, FPU support is disabled for each thread. If saving the context of the FPU registers
is needed, the ThreadX library should be re-built with TX_ENABLE_FPU_SUPPORT defined. In addition,
the following API call must be made from the context of the application thread - before
the FPU usage:
void tx_thread_fpu_enable(void);
After this API is called in the application, FPU registers will be saved/restored for this thread if it
is preempted via an interrupt. All other suspension of the this thread will not require the FPU registers
to be saved/restored.
To disable FPU register context saving, simply call the following API:
void tx_thread_fpu_disable(void);
10. Revision History
For generic code revision information, please refer to the readme_threadx_generic.txt
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
05/19/2020 Initial ThreadX version of Cortex-M4/Green Hills port.
Copyright(c) 1996-2020 Microsoft Corporation
https://azure.com/rtos

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/*
* ThreadX C/C++ Library Support
*
* Copyright 1983-2019 Green Hills Software LLC.
*
* This program is the property of Green Hills Software LLC.,
* its contents are proprietary information and no part of it
* is to be disclosed to anyone except employees of Green Hills
* Software LLC., or as agreed in writing signed by the President
* of Green Hills Software LLC.
*/
#include "tx_ghs.h"
#ifndef TX_DISABLE_ERROR_CHECKING
#define TX_DISABLE_ERROR_CHECKING
#endif
#include "tx_api.h"
#include <setjmp.h>
#include <string.h>
/* Allow these routines to access the following ThreadX global variables. */
extern ULONG _tx_thread_created_count;
extern TX_THREAD *_tx_thread_created_ptr;
extern TX_THREAD *_tx_thread_current_ptr;
#if defined(__ghs) && (__GHS_VERSION_NUMBER >= 500)
/* Thread-local storage routines for Green Hills releases 5.x and above. */
/*
Thread-Local (Per-Thread) Library Data Retrieval
================================================
__ghs_ThreadLocalStorage_specifier defines all library data items
that the Green Hills libraries allow to be allocated per-thread.
An implementation can choose which of these data items to allocate
for each thread. For example, an implementation may choose to
allocate an errno value for each thread, but not the strtok_saved_pos
pointer. The application could then use strtok_r instead of strtok for
correct operation.
To add per-thread library data, define one of the
TX_THREAD_EXTENSION_* macros in tx_port.h to include the data item
or items in each thread control block TX_THREAD.
If C++ with exceptions is being used, the __eh_globals entry must be
allocated for each thread. This is typically done by default using
TX_THREAD_EXTENSION_1 in tx_port.h.
If __ghs_GetThreadLocalStorageItem is customized to return a
per-thread errno value, you should also:
* Customize the System Library for your project
* Define the preprocessor symbol USE_THREAD_LOCAL_ERRNO in
src/libsys/ind_errn.c
If you customize the System Library, you should remove ind_thrd.c
from the libsys.gpj subproject.
*/
/* Provide global __eh_globals value to support C++ exception handling
outside a thread context. This name also forces this module to be
included in the linked program instead of the ind_thrd.o module from
the System Library libsys.a.
*/
static void *__eh_globals;
#pragma ghs startnomisra
void *__ghs_GetThreadLocalStorageItem(int specifier)
{
void *ptlsitem = (void *)0;
switch (specifier) {
case (int)__ghs_TLS_Errno:
/* Set ptslsitem to the address of the per-thread errno value.
The per-thread errno value should have the type int.
If returning a per-thread errno value, follow the steps
above.
This item is used by numerous library functions.
*/
break;
case (int)__ghs_TLS_SignalHandlers:
/* Set ptslsitem to the address of the per-thread SignalHandlers
array. The per-thread SignalHandlers array should have the
array type as in the following declaration:
SignalHandler SignalHandlers[_SIGMAX];
The SignalHandler type and _SIGMAX constant are defined in
ind_thrd.h.
This item is used by the library functions signal() and
raise().
*/
break;
case (int)__ghs_TLS_asctime_buff:
/* Set ptslsitem to the address of the per-thread asctime_buff
array. The per-thread asctime_buff array should have the
array type as in the following declaration:
char asctime_buff[30];
This item is used by the library functions asctime() and
ctime(). The library provides asctime_r() and ctime_r(),
inherently thread-safe versions of these functions.
*/
break;
case (int)__ghs_TLS_tmpnam_space:
/* Set ptslsitem to the address of the per-thread tmpnam_space
array. The per-thread tmpnam_space array should have the
array type as in the following declaration:
char tmpnam_space[L_tmpnam];
The constant is defined in <stdio.h>
This item is used by the library function tmpnam() when
passed NULL. The library provides tmpnam_r(), an
inherently thread-safe version of tmpnam().
*/
break;
case (int)__ghs_TLS_strtok_saved_pos:
/* Set ptslsitem to the address of the per-thread
strtok_saved_pos pointer. The per-thread strtok_saved_pos
pointer should have the type "char *".
This item is used by the library function strtok().
The library provides strtok_r(), an inherently thread-safe
version of strtok().
*/
break;
case (int)__ghs_TLS_gmtime_temp:
/* Set ptslsitem to the address of the per-thread gmtime_temp
value. The per-thread gmtime_temp value should have the
type "struct tm" defined in time.h, included by indos.h.
This item is used by the library functions gmtime() and
localtime(). The library provides gmtime_r() and
localtime_r(), inherently thread-safe versions of these
functions.
*/
break;
case (int)__ghs_TLS___eh_globals:
/* Set ptslsitem to the address of the per-thread __eh_globals
value. The per-thread __eh_globals value should have the
type "void *".
This item is used by C++ exception handling.
*/
if (_tx_thread_current_ptr)
ptlsitem = (void *)&(_tx_thread_current_ptr->tx_thread_eh_globals);
else
/* Use the global __eh_globals pointer. */
ptlsitem = (void *)&__eh_globals;
break;
}
return ptlsitem;
}
#pragma ghs endnomisra
#else
/* Thread-local storage routines for Green Hills releases 4.x and 3.x . */
/*
* ThreadX C and C++ thread-safe library support routines.
*
* This implementation merely tries to guarantee thread safety within
* individual C library calls such as malloc() and free(), but it does
* not attempt to solve the problems associated with the following
* multithreaded issues:
*
* 1. Use of errno. This can be made thread-safe by adding errno
* to TX_THREAD_PORT_EXTENSION and using that within a modified
* version of libsys/ind_errno.c.
*
* 2. Thread safety ACROSS library calls. Certain C library calls either
* return pointers to statically-allocated data structures or maintain
* state across calls. These include strtok(), asctime(), gmtime(),
* tmpnam(NULL), signal(). To make such C library routines thread-safe
* would require adding a ThreadLocalStorage struct to the thread control
* block TX_THREAD. Since relatively few applications make use of these
* library routines, the implementation provided here uses a single, global
* ThreadLocalStorage data structure rather than greatly increasing the size
* of the thread control block TX_THREAD.
*
* The ThreadX global variable _tx_thread_current_ptr points to the
* current thread's control block TX_THREAD. If a ThreadLocalStorage struct
* called tx_tls is placed in TX_THREAD, the function GetThreadLocalStorage
* should be modified to return &(_tx_thread_current_ptr->tx_tls).
*/
static ThreadLocalStorage GlobalTLS;
ThreadLocalStorage *GetThreadLocalStorage()
{
return &GlobalTLS;
}
#endif
/*
* Use a global ThreadX mutex to implement thread safety within C and C++
* library routines.
*
*/
TX_MUTEX __ghLockMutex;
/*
* Acquire general lock. Blocks until the lock becomes available.
* Use tx_mutex_get to implement __ghsLock
*/
void __ghsLock(void)
{
tx_mutex_get(&__ghLockMutex, TX_WAIT_FOREVER);
}
/*
* Release general lock
* Use tx_mutex_put to implement __ghsUnlock
*/
void __ghsUnlock(void)
{
tx_mutex_put(&__ghLockMutex);
}
/* ThreadX Initialization function prototype. */
void _tx_initialize_kernel_setup(void);
void __gh_lock_init(void)
{
/* Initialize the low-level portions of ThreadX. */
_tx_initialize_kernel_setup();
/* Create the global thread lock mutex. */
tx_mutex_create(&__ghLockMutex, "__ghLockMutex", TX_NO_INHERIT);
}
/*
Saving State Across setjmp() Calls
==================================
These routines can be used to save and restore arbitrary state
across calls to setjmp() and longjmp().
*/
int __ghs_SaveSignalContext(jmp_buf jmpbuf)
{
return 0;
}
/* Restore arbitrary state across a longjmp() */
void __ghs_RestoreSignalContext(jmp_buf jmpbuf)
{
}
#if defined(__GHS_VERSION_NUMBER) && (__GHS_VERSION_NUMBER < 560)
/*
C++ Exception Handling
======================
These routines allow C++ exceptions to be used in multiple threads.
The default implementation uses __ghs_GetThreadLocalStorageItem
to return a thread-specific __eh_globals pointer.
*/
/* Must be called after __cpp_exception_init() is called to allocate
* and initialize the per-thread exception handling structure */
void *__get_eh_globals(void)
{
#if defined(__ghs) && (__GHS_VERSION_NUMBER >= 500)
return *(void **)__ghs_GetThreadLocalStorageItem(__ghs_TLS___eh_globals);
#else
if (_tx_thread_current_ptr)
/* Return thread-specific __eh_globals pointer. */
return _tx_thread_current_ptr->tx_thread_eh_globals;
else
/* Return the global __eh_globals pointer. */
return GlobalTLS.__eh_globals;
#endif
}
#endif
#if defined(__ghs) && (__GHS_VERSION_NUMBER >= 500)
#pragma weak __cpp_exception_init
extern void __cpp_exception_init(void **);
#pragma weak __cpp_exception_cleanup
extern void __cpp_exception_cleanup(void **);
/* __tx_cpp_exception_init retrieves the eh_globals field from
thread-local storage and calls __cpp_exception_init.
*/
void __tx_cpp_exception_init(TX_THREAD *thread_ptr) {
void **peh_globals;
if(__cpp_exception_init) {
if (thread_ptr)
peh_globals = &(thread_ptr->tx_thread_eh_globals);
else
/* Use the global __eh_globals pointer. */
peh_globals = &__eh_globals;
__cpp_exception_init(peh_globals);
}
}
/* __tx_cpp_exception_cleanup retrieves the eh_globals field from
thread-local storage and calls __cpp_exception_cleanup.
*/
void __tx_cpp_exception_cleanup(TX_THREAD *thread_ptr) {
void **peh_globals;
if(__cpp_exception_cleanup) {
if (thread_ptr)
peh_globals = &(thread_ptr->tx_thread_eh_globals);
else
/* Use the global __eh_globals pointer. */
peh_globals = &__eh_globals;
__cpp_exception_cleanup(peh_globals);
}
}
/* __ghs_cpp_exception_init is called from ind_crt1.o to initialize
exceptions for the global context.
*/
void __ghs_cpp_exception_init() {
__tx_cpp_exception_init((void *)0);
}
/* __ghs_cpp_exception_cleanup is called from ind_exit.o to clean up
exceptions for the global context.
*/
void __ghs_cpp_exception_cleanup(TX_THREAD *thread_ptr) {
__tx_cpp_exception_cleanup((void *)0);
}
#endif
/*
File Locks
======================
These routines can be customized to implement per-file locks to allow
thread-safe I/O.
*/
/* Acquire lock for FILE *addr */
void __ghs_flock_file(void *addr)
{
tx_mutex_get((TX_MUTEX *)addr, TX_WAIT_FOREVER);
}
/* Release lock for FILE *addr */
void __ghs_funlock_file(void *addr)
{
tx_mutex_put((TX_MUTEX *)addr);
}
/* Non blocking acquire lock for FILE *addr. May return -1 if */
/* not implemented. Returns 0 on success and nonzero otherwise. */
int __ghs_ftrylock_file(void *addr)
{
return -1;
}
/* Calls to initialize local lock data structures before they */
/* are used. */
void __ghs_flock_create(void **addr)
{
*addr = (void *)(&__ghLockMutex);
}
void __ghs_flock_destroy(void *addr) {}
/*
* ThreadX Peak Stack Checking support routines.
*
* All of these routines are called by MULTI's ThreadX-aware debugging
* package to determine the peak stack use for one thread or for all threads.
*
* These routines are included in this file in order to guarantee that they will
* be available while debugging with MULTI. These routines are not referenced by
* any other part of the ThreadX system.
*
* _txs_thread_stack_check: return the peak stack usage for a thread.
*
* _txs_thread_stack_check_2: store the peak stack usage for all threads
* in the tx_thread_stack_size field of each thread
* control block, TX_THREAD. This routine takes
* advantage of the redundancy within the TX_THREAD
* structure since tx_thread_stack_size can be computed
* from the tx_thread_stack_start and tx_thread_stack_end
* fields of TX_THREAD.
*
* _txs_thread_stack_check_2_fixup: clean up from the _txs_thread_stack_check_2
* call by computing the stack size for each
* thread and storing the result in the
* tx_thread_stack_size field of each thread control
* block TX_THREAD.
*
* These three routines do not support architectures such as i960 or StarCore
* where the stack grows up instead of down.
*
*/
#ifndef TX_DISABLE_STACK_CHECKING
ULONG _txs_thread_stack_check(TX_THREAD *thread_ptr)
{
CHAR *cp; /* Pointer inside thread's stack. */
/* Search through the thread's stack to find the highest address modified. */
for ( cp = (CHAR *)thread_ptr->tx_thread_stack_start;
cp <= (CHAR *)thread_ptr->tx_thread_stack_end; ++cp ) {
/* Check if this byte in the stack contains something other than TX_STACK_FILL. */
if (*cp != (char)TX_STACK_FILL) {
/* Assume cp points to the locating marking the peak stack use.
Return the number of bytes from cp up to and including the
end of the stack. */
return (((ULONG)thread_ptr->tx_thread_stack_end) - (ULONG)cp + 1);
}
}
return thread_ptr->tx_thread_stack_size;
}
int _txs_thread_stack_check_2(void) {
CHAR * cp; /* Pointer inside thread's stack. */
TX_THREAD * tp; /* Pointer to each thread. */
/* If no threads are created, return immediately. */
if (!_tx_thread_created_count)
return 0;
/* Start iterating through the threads in the system. Assume that we always
have at least one thread (the system timer thread) in the system. */
tp = _tx_thread_created_ptr;
do {
/* Search through the thread's stack to find the highest address modified. */
for ( cp = (CHAR *)tp->tx_thread_stack_start; cp <= (CHAR *)tp->tx_thread_stack_end;
++cp ) {
/* Check if this byte in the stack contains something other than TX_STACK_FILL. */
if (*cp != (char)TX_STACK_FILL) {
/* Assume cp points to the locating marking the peak stack use.
Store the number of bytes from cp up to and including the
end of the stack in the tx_thread_stack_size field. */
tp->tx_thread_stack_size = ((ULONG)tp->tx_thread_stack_end) - (ULONG)cp + 1;
break;
}
}
/* Continue with the next thread. */
tp = tp->tx_thread_created_next;
/* Loop until we point to the first thread again. */
} while ( tp != _tx_thread_created_ptr );
return 0;
}
int _txs_thread_stack_check_2_fixup(void) {
TX_THREAD * tp; /* Pointer to each thread. */
/* If no threads are created, return immediately. */
if (!_tx_thread_created_count)
return 0;
/* Start iterating through the threads in the system. Assume that we always
have at least one thread (the system timer thread) in the system. */
tp = _tx_thread_created_ptr;
do {
/* Compute the tx_thread_stack_size field by using the tx_thread_stack_end and
tx_thread_stack_start fields. */
tp->tx_thread_stack_size = (ULONG)tp->tx_thread_stack_end-(ULONG)tp->tx_thread_stack_start+1;
/* Continue with the next thread. */
tp = tp->tx_thread_created_next;
/* Loop until we point to the first thread again. */
} while ( tp != _tx_thread_created_ptr );
return 0;
}
#endif /* TX_DISABLE_STACK_CHECKING */

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/*
* ThreadX C++ Library Support
*
* Copyright 1983-2019 Green Hills Software LLC.
*
* This program is the property of Green Hills Software LLC.,
* its contents are proprietary information and no part of it
* is to be disclosed to anyone except employees of Green Hills
* Software LLC., or as agreed in writing signed by the President
* of Green Hills Software LLC.
*/
#include "tx_ghs.h"
#ifndef TX_DISABLE_ERROR_CHECKING
#define TX_DISABLE_ERROR_CHECKING
#endif
#include "tx_api.h"
/*
C++ Exception Handling
======================
These routines allow C++ exceptions to be used in multiple threads.
The default implementation uses __ghs_GetThreadLocalStorageItem
to return a thread-specific __eh_globals pointer.
*/
#if defined(__ghs) && (__GHS_VERSION_NUMBER >= 560)
#ifdef _WIN32
/* Windows uses a different linker, so include a stub routine, never called,
to pull in __cpp_exception_init and __cpp_exception_cleanup */
extern void __cpp_exception_init(void **);
extern void __cpp_exception_cleanup(void **);
void __tx_win32_pull_in_exceptions(void) {
__cpp_exception_init(0);
__cpp_exception_cleanup(0);
}
#else
#pragma ghs reference __cpp_exception_init
#pragma ghs reference __cpp_exception_cleanup
#endif
/* Must be called after __cpp_exception_init() is called to allocate
* and initialize the per-thread exception handling structure */
void *__get_eh_globals(void)
{
return *(void **)__ghs_GetThreadLocalStorageItem(__ghs_TLS___eh_globals);
}
#endif

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;/**************************************************************************/
;/* */
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
;/* */
;/* This software is licensed under the Microsoft Software License */
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
;/* and in the root directory of this software. */
;/* */
;/**************************************************************************/
;
;
;/**************************************************************************/
;/**************************************************************************/
;/** */
;/** ThreadX Component */
;/** */
;/** Thread */
;/** */
;/**************************************************************************/
;/**************************************************************************/
;
;
.text
.align 4
;/**************************************************************************/
;/* */
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_context_restore Cortex-M4/GHS */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
;/* */
;/* DESCRIPTION */
;/* */
;/* This function is only needed for legacy applications and it should */
;/* not be called in any new development on a Cortex-M. */
;/* This function restores the interrupt context if it is processing a */
;/* nested interrupt. If not, it returns to the interrupt thread if no */
;/* preemption is necessary. Otherwise, if preemption is necessary or */
;/* if no thread was running, the function returns to the scheduler. */
;/* */
;/* INPUT */
;/* */
;/* None */
;/* */
;/* OUTPUT */
;/* */
;/* None */
;/* */
;/* CALLS */
;/* */
;/* [_tx_execution_isr_exit] Execution profiling ISR exit */
;/* */
;/* CALLED BY */
;/* */
;/* ISRs Interrupt Service Routines */
;/* */
;/* RELEASE HISTORY */
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_context_restore(VOID)
;{
.globl _tx_thread_context_restore
_tx_thread_context_restore:
#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
;
; /* Call the ISR exit function to indicate an ISR is complete. */
;
PUSH {r0, lr} ; Save return address
BL _tx_execution_isr_exit ; Call the ISR exit function
POP {r0, lr} ; Save return address
#endif
;
POP {lr}
BX lr
;
;}
.type _tx_thread_context_restore,$function
.size _tx_thread_context_restore,.-_tx_thread_context_restore

85
ports/cortex_m4/ghs/src/tx_thread_context_save.arm Normal file
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@@ -0,0 +1,85 @@
;/**************************************************************************/
;/* */
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
;/* */
;/* This software is licensed under the Microsoft Software License */
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
;/* and in the root directory of this software. */
;/* */
;/**************************************************************************/
;
;
;/**************************************************************************/
;/**************************************************************************/
;/** */
;/** ThreadX Component */
;/** */
;/** Thread */
;/** */
;/**************************************************************************/
;/**************************************************************************/
;
;
.text
.align 4
;/**************************************************************************/
;/* */
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_context_save Cortex-M4/GHS */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
;/* */
;/* DESCRIPTION */
;/* */
;/* This function is only needed for legacy applications and it should */
;/* not be called in any new development on a Cortex-M. */
;/* This function saves the context of an executing thread in the */
;/* beginning of interrupt processing. The function also ensures that */
;/* the system stack is used upon return to the calling ISR. */
;/* */
;/* INPUT */
;/* */
;/* None */
;/* */
;/* OUTPUT */
;/* */
;/* None */
;/* */
;/* CALLS */
;/* */
;/* None */
;/* */
;/* CALLED BY */
;/* */
;/* ISRs */
;/* */
;/* RELEASE HISTORY */
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_context_save(VOID)
;{
.globl _tx_thread_context_save
_tx_thread_context_save:
#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
;
; /* Call the ISR enter function to indicate an ISR is starting. */
;
PUSH {r0, lr} ; Save return address
BL _tx_execution_isr_enter ; Call the ISR enter function
POP {r0, lr} ; Recover return address
#endif
;
; /* Context is already saved - just return! */
;
BX lr
;}
.type _tx_thread_context_save,$function
.size _tx_thread_context_save,.-_tx_thread_context_save

75
ports/cortex_m4/ghs/src/tx_thread_interrupt_control.arm Normal file
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@@ -0,0 +1,75 @@
;/**************************************************************************/
;/* */
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
;/* */
;/* This software is licensed under the Microsoft Software License */
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
;/* and in the root directory of this software. */
;/* */
;/**************************************************************************/
;
;
;/**************************************************************************/
;/**************************************************************************/
;/** */
;/** ThreadX Component */
;/** */
;/** Thread */
;/** */
;/**************************************************************************/
;/**************************************************************************/
;
;
.text
.align 4
;/**************************************************************************/
;/* */
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_interrupt_control Cortex-M4/GHS */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
;/* */
;/* DESCRIPTION */
;/* */
;/* This function is responsible for changing the interrupt lockout */
;/* posture of the system. */
;/* */
;/* INPUT */
;/* */
;/* new_posture New interrupt lockout posture */
;/* */
;/* OUTPUT */
;/* */
;/* old_posture Old interrupt lockout posture */
;/* */
;/* CALLS */
;/* */
;/* None */
;/* */
;/* CALLED BY */
;/* */
;/* Application Code */
;/* */
;/* RELEASE HISTORY */
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;UINT _tx_thread_interrupt_control(UINT new_posture)
;{
.globl _tx_thread_interrupt_control
_tx_thread_interrupt_control:
MRS r1, PRIMASK ; Pickup current interrupt lockout
MSR PRIMASK, r0 ; Apply the new interrupt lockout
MOV r0, r1 ; Transfer old to return register
BX lr ; Return to caller
;
;}
.type _tx_thread_interrupt_control,$function
.size _tx_thread_interrupt_control,.-_tx_thread_interrupt_control

85
ports/cortex_m4/ghs/src/tx_thread_interrupt_disable.arm Normal file
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@@ -0,0 +1,85 @@
;/**************************************************************************/
;/* */
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
;/* */
;/* This software is licensed under the Microsoft Software License */
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
;/* and in the root directory of this software. */
;/* */
;/**************************************************************************/
;
;
;/**************************************************************************/
;/**************************************************************************/
;/** */
;/** ThreadX Component */
;/** */
;/** Thread */
;/** */
;/**************************************************************************/
;/**************************************************************************/
;
;#define TX_SOURCE_CODE
;
;
;/* Include necessary system files. */
;
;#include "tx_api.h"
;#include "tx_thread.h"
;
;
.text
.align 4
;/**************************************************************************/
;/* */
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_interrupt_restore Cortex-M4/GHS */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
;/* */
;/* DESCRIPTION */
;/* */
;/* This function is responsible for disabling interrupts and returning */
;/* the previous interrupt lockout posture. */
;/* */
;/* INPUT */
;/* */
;/* old_posture Old interrupt lockout posture */
;/* */
;/* OUTPUT */
;/* */
;/* None */
;/* */
;/* CALLS */
;/* */
;/* None */
;/* */
;/* CALLED BY */
;/* */
;/* Application Code */
;/* */
;/* RELEASE HISTORY */
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;UINT _tx_thread_interrupt_disable(UINT new_posture)
;{
.globl _tx_thread_interrupt_disable
_tx_thread_interrupt_disable:
;
; /* Return current interrupt lockout posture. */
;
MRS r0, PRIMASK
CPSID i
BX lr
;
;}
.type _tx_thread_interrupt_disable,$function
.size _tx_thread_interrupt_disable,.-_tx_thread_interrupt_disable

76
ports/cortex_m4/ghs/src/tx_thread_interrupt_restore.arm Normal file
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@@ -0,0 +1,76 @@
;/**************************************************************************/
;/* */
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
;/* */
;/* This software is licensed under the Microsoft Software License */
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
;/* and in the root directory of this software. */
;/* */
;/**************************************************************************/
;
;
;/**************************************************************************/
;/**************************************************************************/
;/** */
;/** ThreadX Component */
;/** */
;/** Thread */
;/** */
;/**************************************************************************/
;/**************************************************************************/
;
;
.text
.align 4
;/**************************************************************************/
;/* */
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_interrupt_restore Cortex-M4/GHS */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
;/* */
;/* DESCRIPTION */
;/* */
;/* This function is responsible for restoring the previous */
;/* interrupt lockout posture. */
;/* */
;/* INPUT */
;/* */
;/* None */
;/* */
;/* OUTPUT */
;/* */
;/* previous_posture Previous interrupt posture */
;/* */
;/* CALLS */
;/* */
;/* None */
;/* */
;/* CALLED BY */
;/* */
;/* Application Code */
;/* */
;/* RELEASE HISTORY */
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_interrupt_restore(UINT new_posture)
;{
.globl _tx_thread_interrupt_restore
_tx_thread_interrupt_restore:
;
; /* Restore previous interrupt lockout posture. */
;
MSR PRIMASK, r0
BX lr
;
;}
.type _tx_thread_interrupt_restore,$function
.size _tx_thread_interrupt_restore,.-_tx_thread_interrupt_restore

282
ports/cortex_m4/ghs/src/tx_thread_schedule.arm Normal file
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@@ -0,0 +1,282 @@
;/**************************************************************************/
;/* */
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
;/* */
;/* This software is licensed under the Microsoft Software License */
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
;/* and in the root directory of this software. */
;/* */
;/**************************************************************************/
;
;
;/**************************************************************************/
;/**************************************************************************/
;/** */
;/** ThreadX Component */
;/** */
;/** Thread */
;/** */
;/**************************************************************************/
;/**************************************************************************/
;
;
.text
.align 4
;/**************************************************************************/
;/* */
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_schedule Cortex-M4/GHS */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
;/* */
;/* DESCRIPTION */
;/* */
;/* This function waits for a thread control block pointer to appear in */
;/* the _tx_thread_execute_ptr variable. Once a thread pointer appears */
;/* in the variable, the corresponding thread is resumed. */
;/* */
;/* INPUT */
;/* */
;/* None */
;/* */
;/* OUTPUT */
;/* */
;/* None */
;/* */
;/* CALLS */
;/* */
;/* None */
;/* */
;/* CALLED BY */
;/* */
;/* _tx_initialize_kernel_enter ThreadX entry function */
;/* _tx_thread_system_return Return to system from thread */
;/* _tx_thread_context_restore Restore thread's context */
;/* */
;/* RELEASE HISTORY */
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_schedule(VOID)
;{
.globl _tx_thread_schedule
_tx_thread_schedule:
;
; /* This function should only ever be called on Cortex-M
; from the first schedule request. Subsequent scheduling occurs
; from the PendSV handling routines below. */
;
; /* Clear the preempt-disable flag to enable rescheduling after initialization on Cortex-M targets. */
;
MOV r0, #0 ; Build value for TX_FALSE
LDR r2, =_tx_thread_preempt_disable ; Build address of preempt disable flag
STR r0, [r2, #0] ; Clear preempt disable flag
;
; /* Clear CONTROL.FPCA bit so VFP registers aren't unnecessarily stacked. */
;
#ifdef __VFP__
MRS r0, CONTROL ; Pickup current CONTROL register
BIC r0, r0, #4 ; Clear the FPCA bit
MSR CONTROL, r0 ; Setup new CONTROL register
#endif
;
; /* Enable interrupts */
;
CPSIE i
;
; /* Enter the scheduler for the first time. */
;
MOV r0, #0x10000000 ; Load PENDSVSET bit
MOV r1, #0xE000E000 ; Load NVIC base
STR r0, [r1, #0xD04] ; Set PENDSVBIT in ICSR
DSB ; Complete all memory accesses
ISB ; Flush pipeline
;
; /* Wait here for the PendSV to take place. */
;
__tx_wait_here:
B __tx_wait_here ; Wait for the PendSV to happen
.type _tx_thread_schedule,$function
.size _tx_thread_schedule,.-_tx_thread_schedule
;}
;
; /* Generic context PendSV handler. */
;
.globl PendSV_Handler
.globl __tx_PendSVHandler
PendSV_Handler:
__tx_PendSVHandler:
;
; /* Get current thread value and new thread pointer. */
;
__tx_ts_handler:
#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
;
; /* Call the thread exit function to indicate the thread is no longer executing. */
;
CPSID i ; Disable interrupts
PUSH {r0, lr} ; Save LR (and r0 just for alignment)
BL _tx_execution_thread_exit ; Call the thread exit function
POP {r0, lr} ; Recover LR
CPSIE i ; Enable interrupts
#endif
LDR r0, =_tx_thread_current_ptr ; Build current thread pointer address
LDR r2, =_tx_thread_execute_ptr ; Build execute thread pointer address
MOV r3, #0 ; Build NULL value
LDR r1, [r0] ; Pickup current thread pointer
;
; /* Determine if there is a current thread to finish preserving. */
;
CBZ r1, __tx_ts_new ; If NULL, skip preservation
;
; /* Recover PSP and preserve current thread context. */
;
STR r3, [r0] ; Set _tx_thread_current_ptr to NULL
MRS r12, PSP ; Pickup PSP pointer (thread's stack pointer)
STMDB r12!, {r4-r11} ; Save its remaining registers
#ifdef __VFP__
TST LR, #0x10 ; Determine if the VFP extended frame is present
BNE _skip_vfp_save
VSTMDB r12!,{s16-s31} ; Yes, save additional VFP registers
_skip_vfp_save:
#endif
LDR r4, =_tx_timer_time_slice ; Build address of time-slice variable
STR.W LR, [r12, #-0x4]! ; Save LR on the stack
;
; /* Determine if time-slice is active. If it isn't, skip time handling processing. */
;
LDR r5, [r4] ; Pickup current time-slice
STR r12, [r1, #8] ; Save the thread stack pointer
CBZ r5, __tx_ts_new ; If not active, skip processing
;
; /* Time-slice is active, save the current thread's time-slice and clear the global time-slice variable. */
;
STR r5, [r1, #24] ; Save current time-slice
;
; /* Clear the global time-slice. */
;
STR r3, [r4] ; Clear time-slice
;
;
; /* Executing thread is now completely preserved!!! */
;
__tx_ts_new:
;
; /* Now we are looking for a new thread to execute! */
;
CPSID i ; Disable interrupts
LDR r1, [r2] ; Is there another thread ready to execute?
CBZ r1, __tx_ts_wait ; No, skip to the wait processing
;
; /* Yes, another thread is ready for else, make the current thread the new thread. */
;
STR r1, [r0] ; Setup the current thread pointer to the new thread
CPSIE i ; Enable interrupts
;
; /* Increment the thread run count. */
;
__tx_ts_restore:
LDR r7, [r1, #4] ; Pickup the current thread run count
LDR r4, =_tx_timer_time_slice ; Build address of time-slice variable
LDR r5, [r1, #24] ; Pickup thread's current time-slice
ADD r7, r7, #1 ; Increment the thread run count
STR r7, [r1, #4] ; Store the new run count
;
; /* Setup global time-slice with thread's current time-slice. */
;
STR r5, [r4] ; Setup global time-slice
#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
;
; /* Call the thread entry function to indicate the thread is executing. */
;
PUSH {r0, r1} ; Save r0/r1
BL _tx_execution_thread_enter ; Call the thread execution enter function
POP {r0, r1} ; Recover r3
#endif
;
; /* Restore the thread context and PSP. */
;
LDR r12, [r1, #8] ; Pickup thread's stack pointer
LDR.W LR, [r12], #4 ; Pickup LR
#ifdef __VFP__
TST LR, #0x10 ; Determine if the VFP extended frame is present
BNE _skip_vfp_restore ; If not, skip VFP restore
VLDMIA r12!, {s16-s31} ; Yes, restore additional VFP registers
_skip_vfp_restore:
#endif
LDMIA r12!, {r4-r11} ; Recover thread's registers
MSR PSP, r12 ; Setup the thread's stack pointer
;
; /* Return to thread. */
;
BX lr ; Return to thread!
;
; /* The following is the idle wait processing... in this case, no threads are ready for execution and the
; system will simply be idle until an interrupt occurs that makes a thread ready. Note that interrupts
; are disabled to allow use of WFI for waiting for a thread to arrive. */
;
__tx_ts_wait:
CPSID i ; Disable interrupts
LDR r1, [r2] ; Pickup the next thread to execute pointer
STR r1, [r0] ; Store it in the current pointer
CBNZ r1, __tx_ts_ready ; If non-NULL, a new thread is ready!
#ifdef TX_ENABLE_WFI
DSB ; Ensure no outstanding memory transactions
WFI ; Wait for interrupt
ISB ; Ensure pipeline is flushed
#endif
CPSIE i ; Enable interrupts
B __tx_ts_wait ; Loop to continue waiting
;
; /* At this point, we have a new thread ready to go. Clear any newly pended PendSV - since we are
; already in the handler! */
;
__tx_ts_ready:
MOV r7, #0x08000000 ; Build clear PendSV value
MOV r8, #0xE000E000 ; Build base NVIC address
STR r7, [r8, #0xD04] ; Clear any PendSV
;
; /* Re-enable interrupts and restore new thread. */
;
CPSIE i ; Enable interrupts
B __tx_ts_restore ; Restore the thread
;}
;
.type __tx_PendSVHandler,$function
.size __tx_PendSVHandler,.-__tx_PendSVHandler
#ifdef __VFP__
.globl tx_thread_fpu_enable
tx_thread_fpu_enable:
;
; /* Automatic VPF logic is supported, this function is present only for
; backward compatibility purposes and therefore simply returns. */
;
BX LR ; Return to caller
.type tx_thread_fpu_enable,$function
.size tx_thread_fpu_enable,.-tx_thread_fpu_enable
.global tx_thread_fpu_disable
tx_thread_fpu_disable:
;
; /* Automatic VPF logic is supported, this function is present only for
; backward compatibility purposes and therefore simply returns. */
;
BX LR ; Return to caller
.type tx_thread_fpu_disable,$function
.size tx_thread_fpu_disable,.-tx_thread_fpu_disable
#endif

135
ports/cortex_m4/ghs/src/tx_thread_stack_build.arm Normal file
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@@ -0,0 +1,135 @@
;/**************************************************************************/
;/* */
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
;/* */
;/* This software is licensed under the Microsoft Software License */
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
;/* and in the root directory of this software. */
;/* */
;/**************************************************************************/
;
;
;/**************************************************************************/
;/**************************************************************************/
;/** */
;/** ThreadX Component */
;/** */
;/** Thread */
;/** */
;/**************************************************************************/
;/**************************************************************************/
;
;
.text
.align 4
;/**************************************************************************/
;/* */
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_stack_build Cortex-M4/GHS */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
;/* */
;/* DESCRIPTION */
;/* */
;/* This function builds a stack frame on the supplied thread's stack. */
;/* The stack frame results in a fake interrupt return to the supplied */
;/* function pointer. */
;/* */
;/* INPUT */
;/* */
;/* thread_ptr Pointer to thread control blk */
;/* function_ptr Pointer to return function */
;/* */
;/* OUTPUT */
;/* */
;/* None */
;/* */
;/* CALLS */
;/* */
;/* None */
;/* */
;/* CALLED BY */
;/* */
;/* _tx_thread_create Create thread service */
;/* */
;/* RELEASE HISTORY */
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(VOID))
;{
.globl _tx_thread_stack_build
_tx_thread_stack_build:
;
;
; /* Build a fake interrupt frame. The form of the fake interrupt stack
; on the Cortex-M should look like the following after it is built:
;
; Stack Top:
; LR Interrupted LR (LR at time of PENDSV)
; r4 Initial value for r4
; r5 Initial value for r5
; r6 Initial value for r6
; r7 Initial value for r7
; r8 Initial value for r8
; r9 Initial value for r9
; r10 Initial value for r10
; r11 Initial value for r11
; r0 Initial value for r0 (Hardware stack starts here!!)
; r1 Initial value for r1
; r2 Initial value for r2
; r3 Initial value for r3
; r12 Initial value for r12
; lr Initial value for lr
; pc Initial value for pc
; xPSR Initial value for xPSR
;
; Stack Bottom: (higher memory address) */
;
LDR r2, [r0, #16] ; Pickup end of stack area
BIC r2, r2, #0x7 ; Align frame for 8-byte alignment
SUB r2, r2, #68 ; Subtract frame size
LDR r3, =0xFFFFFFFD ; Build initial LR value
STR r3, [r2, #0] ; Save on the stack
;
; /* Actually build the stack frame. */
;
MOV r3, #0 ; Build initial register value
STR r3, [r2, #4] ; Store initial r4
STR r3, [r2, #8] ; Store initial r5
STR r3, [r2, #12] ; Store initial r6
STR r3, [r2, #16] ; Store initial r7
STR r3, [r2, #20] ; Store initial r8
STR r3, [r2, #24] ; Store initial r9
STR r3, [r2, #28] ; Store initial r10
STR r3, [r2, #32] ; Store initial r11
;
; /* Hardware stack follows. */
;
STR r3, [r2, #36] ; Store initial r0
STR r3, [r2, #40] ; Store initial r1
STR r3, [r2, #44] ; Store initial r2
STR r3, [r2, #48] ; Store initial r3
STR r3, [r2, #52] ; Store initial r12
MOV r3, #0xFFFFFFFF ; Poison EXC_RETURN value
STR r3, [r2, #56] ; Store initial lr
STR r1, [r2, #60] ; Store initial pc
MOV r3, #0x01000000 ; Only T-bit need be set
STR r3, [r2, #64] ; Store initial xPSR
;
; /* Setup stack pointer. */
; thread_ptr -> tx_thread_stack_ptr = r2;
;
STR r2, [r0, #8] ; Save stack pointer in thread's
; control block
BX lr ; Return to caller
;}
.type _tx_thread_stack_build,$function
.size _tx_thread_stack_build,.-_tx_thread_stack_build

87
ports/cortex_m4/ghs/src/tx_thread_system_return.arm Normal file
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@@ -0,0 +1,87 @@
;/**************************************************************************/
;/* */
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
;/* */
;/* This software is licensed under the Microsoft Software License */
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
;/* and in the root directory of this software. */
;/* */
;/**************************************************************************/
;
;
;/**************************************************************************/
;/**************************************************************************/
;/** */
;/** ThreadX Component */
;/** */
;/** Thread */
;/** */
;/**************************************************************************/
;/**************************************************************************/
;
;
.text
.align 4
;/**************************************************************************/
;/* */
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_system_return Cortex-M4/GHS */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
;/* */
;/* DESCRIPTION */
;/* */
;/* This function is target processor specific. It is used to transfer */
;/* control from a thread back to the ThreadX system. Only a */
;/* minimal context is saved since the compiler assumes temp registers */
;/* are going to get slicked by a function call anyway. */
;/* */
;/* INPUT */
;/* */
;/* None */
;/* */
;/* OUTPUT */
;/* */
;/* None */
;/* */
;/* CALLS */
;/* */
;/* _tx_thread_schedule Thread scheduling loop */
;/* */
;/* CALLED BY */
;/* */
;/* ThreadX components */
;/* */
;/* RELEASE HISTORY */
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_system_return(VOID)
;{
.globl _tx_thread_system_return
_tx_thread_system_return:
;
; /* Return to real scheduler via PendSV. Note that this routine is often
; replaced with in-line assembly in tx_port.h to improved performance. */
;
MOV r0, #0x10000000 ; Load PENDSVSET bit
MOV r1, #0xE000E000 ; Load NVIC base
STR r0, [r1, #0xD04] ; Set PENDSVBIT in ICSR
MRS r0, IPSR ; Pickup IPSR
CMP r0, #0 ; Is it a thread returning?
BNE _isr_context ; If ISR, skip interrupt enable
MRS r1, PRIMASK ; Thread context returning, pickup PRIMASK
CPSIE i ; Enable interrupts
MSR PRIMASK, r1 ; Restore original interrupt posture
_isr_context:
BX lr ; Return to caller
;}
.type _tx_thread_system_return,$function
.size _tx_thread_system_return,.-_tx_thread_system_return

243
ports/cortex_m4/ghs/src/tx_timer_interrupt.arm Normal file
View File

@@ -0,0 +1,243 @@
;/**************************************************************************/
;/* */
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
;/* */
;/* This software is licensed under the Microsoft Software License */
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
;/* and in the root directory of this software. */
;/* */
;/**************************************************************************/
;
;
;/**************************************************************************/
;/**************************************************************************/
;/** */
;/** ThreadX Component */
;/** */
;/** Timer */
;/** */
;/**************************************************************************/
;/**************************************************************************/
;
;
.text
.align 4
;/**************************************************************************/
;/* */
;/* FUNCTION RELEASE */
;/* */
;/* _tx_timer_interrupt Cortex-M4/GHS */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
;/* */
;/* DESCRIPTION */
;/* */
;/* This function processes the hardware timer interrupt. This */
;/* processing includes incrementing the system clock and checking for */
;/* time slice and/or timer expiration. If either is found, the */
;/* expiration functions are called. */
;/* */
;/* INPUT */
;/* */
;/* None */
;/* */
;/* OUTPUT */
;/* */
;/* None */
;/* */
;/* CALLS */
;/* */
;/* _tx_timer_expiration_process Timer expiration processing */
;/* _tx_thread_time_slice Time slice interrupted thread */
;/* */
;/* CALLED BY */
;/* */
;/* interrupt vector */
;/* */
;/* RELEASE HISTORY */
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_timer_interrupt(VOID)
;{
.globl _tx_timer_interrupt
_tx_timer_interrupt:
;
; /* Upon entry to this routine, it is assumed that the compiler scratch registers are available
; for use. */
;
; /* Increment the system clock. */
; _tx_timer_system_clock++;
;
LDR r1, =_tx_timer_system_clock ; Pickup address of system clock
LDR r0, [r1, #0] ; Pickup system clock
ADD r0, r0, #1 ; Increment system clock
STR r0, [r1, #0] ; Store new system clock
;
; /* Test for time-slice expiration. */
; if (_tx_timer_time_slice)
; {
;
LDR r3, =_tx_timer_time_slice ; Pickup address of time-slice
LDR r2, [r3, #0] ; Pickup time-slice
CBZ r2, __tx_timer_no_time_slice ; Is it non-active?
; Yes, skip time-slice processing
;
; /* Decrement the time_slice. */
; _tx_timer_time_slice--;
;
SUB r2, r2, #1 ; Decrement the time-slice
STR r2, [r3, #0] ; Store new time-slice value
;
; /* Check for expiration. */
; if (__tx_timer_time_slice == 0)
;
CBNZ r2, __tx_timer_no_time_slice ; Has it expired?
;
; /* Set the time-slice expired flag. */
; _tx_timer_expired_time_slice = TX_TRUE;
;
LDR r3, =_tx_timer_expired_time_slice ; Pickup address of expired flag
MOV r0, #1 ; Build expired value
STR r0, [r3, #0] ; Set time-slice expiration flag
;
; }
;
__tx_timer_no_time_slice:
;
; /* Test for timer expiration. */
; if (*_tx_timer_current_ptr)
; {
;
LDR r1, =_tx_timer_current_ptr ; Pickup current timer pointer addr
LDR r0, [r1, #0] ; Pickup current timer
LDR r2, [r0, #0] ; Pickup timer list entry
CBZ r2, __tx_timer_no_timer ; Is there anything in the list?
; No, just increment the timer
;
; /* Set expiration flag. */
; _tx_timer_expired = TX_TRUE;
;
LDR r3, =_tx_timer_expired ; Pickup expiration flag address
MOV r2, #1 ; Build expired value
STR r2, [r3, #0] ; Set expired flag
B __tx_timer_done ; Finished timer processing
;
; }
; else
; {
__tx_timer_no_timer:
;
; /* No timer expired, increment the timer pointer. */
; _tx_timer_current_ptr++;
;
ADD r0, r0, #4 ; Move to next timer
;
; /* Check for wrap-around. */
; if (_tx_timer_current_ptr == _tx_timer_list_end)
;
LDR r3, =_tx_timer_list_end ; Pickup addr of timer list end
LDR r2, [r3, #0] ; Pickup list end
CMP r0, r2 ; Are we at list end?
BNE __tx_timer_skip_wrap ; No, skip wrap-around logic
;
; /* Wrap to beginning of list. */
; _tx_timer_current_ptr = _tx_timer_list_start;
;
LDR r3, =_tx_timer_list_start ; Pickup addr of timer list start
LDR r0, [r3, #0] ; Set current pointer to list start
;
__tx_timer_skip_wrap:
;
STR r0, [r1, #0] ; Store new current timer pointer
; }
;
__tx_timer_done:
;
;
; /* See if anything has expired. */
; if ((_tx_timer_expired_time_slice) || (_tx_timer_expired))
; {
;
LDR r3, =_tx_timer_expired_time_slice ; Pickup addr of expired flag
LDR r2, [r3, #0] ; Pickup time-slice expired flag
CBNZ r2, __tx_something_expired ; Did a time-slice expire?
; If non-zero, time-slice expired
LDR r1, =_tx_timer_expired ; Pickup addr of other expired flag
LDR r0, [r1, #0] ; Pickup timer expired flag
CBZ r0, __tx_timer_nothing_expired ; Did a timer expire?
; No, nothing expired
;
__tx_something_expired:
;
;
STMDB sp!, {r0, lr} ; Save the lr register on the stack
; and save r0 just to keep 8-byte alignment
;
; /* Did a timer expire? */
; if (_tx_timer_expired)
; {
;
LDR r1, =_tx_timer_expired ; Pickup addr of expired flag
LDR r0, [r1, #0] ; Pickup timer expired flag
CBZ r0, __tx_timer_dont_activate ; Check for timer expiration
; If not set, skip timer activation
;
; /* Process timer expiration. */
; _tx_timer_expiration_process();
;
BL _tx_timer_expiration_process ; Call the timer expiration handling routine
;
; }
__tx_timer_dont_activate:
;
; /* Did time slice expire? */
; if (_tx_timer_expired_time_slice)
; {
;
LDR r3, =_tx_timer_expired_time_slice ; Pickup addr of time-slice expired
LDR r2, [r3, #0] ; Pickup the actual flag
CBZ r2, __tx_timer_not_ts_expiration ; See if the flag is set
; No, skip time-slice processing
;
; /* Time slice interrupted thread. */
; _tx_thread_time_slice();
BL _tx_thread_time_slice ; Call time-slice processing
LDR r0, =_tx_thread_preempt_disable ; Build address of preempt disable flag
LDR r1, [r0] ; Is the preempt disable flag set?
CBNZ r1, __tx_timer_skip_time_slice ; Yes, skip the PendSV logic
LDR r0, =_tx_thread_current_ptr ; Build current thread pointer address
LDR r1, [r0] ; Pickup the current thread pointer
LDR r2, =_tx_thread_execute_ptr ; Build execute thread pointer address
LDR r3, [r2] ; Pickup the execute thread pointer
LDR r0, =0xE000ED04 ; Build address of control register
LDR r2, =0x10000000 ; Build value for PendSV bit
CMP r1, r3 ; Are they the same?
BEQ __tx_timer_skip_time_slice ; If the same, there was no time-slice performed
STR r2, [r0] ; Not the same, issue the PendSV for preemption
__tx_timer_skip_time_slice:
;
; }
;
__tx_timer_not_ts_expiration:
;
LDMIA sp!, {r0, lr} ; Recover lr register (r0 is just there for
; the 8-byte stack alignment
;
; }
;
__tx_timer_nothing_expired:
DSB ; Complete all memory access
BX lr ; Return to caller
;
;}
.type _tx_timer_interrupt,$function
.size _tx_timer_interrupt,.-_tx_timer_interrupt

84
ports/cortex_m4/ghs/src/txr_ghs.c Normal file
View File

@@ -0,0 +1,84 @@
/*
* ThreadX API Runtime Error Support
*
* Copyright 1983-2019 Green Hills Software LLC.
*
* This program is the property of Green Hills Software LLC.,
* its contents are proprietary information and no part of it
* is to be disclosed to anyone except employees of Green Hills
* Software LLC., or as agreed in writing signed by the President
* of Green Hills Software LLC.
*/
/* #include "tx_ghs.h" */
#ifndef TX_DISABLE_ERROR_CHECKING
#define TX_DISABLE_ERROR_CHECKING
#endif
#include "tx_api.h"
/* Customized ThreadX API runtime error support routine. */
void _rnerr(int num, int linenum, const char*str, void*ptr, ...);
/* __ghs_rnerr()
This is the custom runtime error checking routine.
This implementation uses the existing __rnerr() routine.
Another implementation could use the .syscall mechanism,
provided MULTI was modified to understand that.
*/
void __ghs_rnerr(char *errMsg, int stackLevels, int stackTraceDisplay, void *hexVal) {
TX_INTERRUPT_SAVE_AREA
int num;
/*
Initialize the stack levels value.
Add 3 to account for the calls to _rnerr, __rnerr, and
__ghs_rnerr.
If the implementation changes, calls to __ghs_rnerr
will not need to be changed.
Zero is not permitted, so substitute 3 in that case.
*/
num = (stackLevels+3) & 0xf;
if (!num) {
num = 3;
}
/*
Shift the stack levels value to bits 12..15 and
insert the stack trace display value in bit 11.
Bits 0..10 are unused.
*/
num = (num << 12) | (stackTraceDisplay ? 0x800 : 0);
/* This will mask all interrupts in the RTEC code, which is probably
unacceptable for many targets. */
TX_DISABLE
_rnerr(num, -1, (const char *)hexVal, (void *)errMsg);
TX_RESTORE
}
/* ThreadX thread stack checking runtime support routine. */
extern char __ghsbegin_stack[];
extern TX_THREAD *_tx_thread_current_ptr;
void __stkchk(void) {
int i;
if(_tx_thread_current_ptr)
{
if((unsigned)(&i) <=
(unsigned)(_tx_thread_current_ptr -> tx_thread_stack_start))
{
_rnerr(21, -1, 0, 0);
}
}
else
{
if((unsigned)(&i) <= (unsigned)__ghsbegin_stack)
{
_rnerr(21, -1, 0, 0);
}
}
}

10
ports/cortex_m4/gnu/example_build/tx_initialize_low_level.S
View File

@@ -49,7 +49,7 @@ SYSTICK_CYCLES = ((SYSTEM_CLOCK / 100) -1)
@/* FUNCTION RELEASE */
@/* */
@/* _tx_initialize_low_level Cortex-M4/GNU */
@/* 6.0.2 */
@/* 6.1 */
@/* AUTHOR */
@/* */
@/* William E. Lamie, Microsoft Corporation */
@@ -83,12 +83,10 @@ SYSTICK_CYCLES = ((SYSTEM_CLOCK / 100) -1)
@/* DATE NAME DESCRIPTION */
@/* */
@/* 05-19-2020 William E. Lamie Initial Version 6.0 */
@/* 06-30-2020 William E. Lamie Modified Comment(s), fixed */
@/* 09-30-2020 William E. Lamie Modified Comment(s), fixed */
@/* GNU assembly comment, */
@/* resulting in version 6.0.1 */
@/* 08-14-2020 Scott Larson Modified comment(s), clean up */
@/* whitespace, resulting */
@/* in version 6.0.2 */
@/* cleaned up whitespace, */
@/* resulting in version 6.1 */
@/* */
@/**************************************************************************/
@VOID _tx_initialize_low_level(VOID)

6
ports/cortex_m4/gnu/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h Cortex-M4/GNU */
/* 6.0 */
/* 6.1 */
/* */
/* AUTHOR */
/* */
@@ -48,6 +48,8 @@
/* DATE NAME DESCRIPTION */
/* */
/* 05-19-2020 William E. Lamie Initial Version 6.0 */
/* 09-30-2020 William E. Lamie Modified comment(s), */
/* resulting in version 6.1 */
/* */
/**************************************************************************/
@@ -485,7 +487,7 @@ void tx_thread_fpu_disable(void);
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M4/GNU Version 6.0 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M4/GNU Version 6.1 *";
#else
extern CHAR _tx_version_id[];
#endif

4
ports/cortex_m4/gnu/readme_threadx.txt
View File

@@ -208,8 +208,8 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
08-14-2020 ThreadX update of Cortex-M4/GNU port. The following files were
changed/added for port specific version 6.0.2:
09-30-2020 ThreadX update of Cortex-M4/GNU port. The following files were
changed/added for port specific version 6.1:
*.S Modified comments and whitespace.

7
ports/cortex_m4/gnu/src/tx_thread_context_restore.S
View File

@@ -39,7 +39,7 @@
@/* FUNCTION RELEASE */
@/* */
@/* _tx_thread_context_restore Cortex-M4/GNU */
@/* 6.0.2 */
@/* 6.1 */
@/* AUTHOR */
@/* */
@/* William E. Lamie, Microsoft Corporation */
@@ -74,9 +74,8 @@
@/* DATE NAME DESCRIPTION */
@/* */
@/* 05-19-2020 William E. Lamie Initial Version 6.0 */
@/* 08-14-2020 Scott Larson Modified comment(s), clean up */
@/* whitespace, resulting */
@/* in version 6.0.2 */
@/* 09-30-2020 William E. Lamie Modified comment(s), */
@/* resulting in version 6.1 */
@/* */
@/**************************************************************************/
@VOID _tx_thread_context_restore(VOID)

8
ports/cortex_m4/gnu/src/tx_thread_context_save.S
View File

@@ -34,7 +34,7 @@
@/* FUNCTION RELEASE */
@/* */
@/* _tx_thread_context_save Cortex-M4/GNU */
@/* 6.0.2 */
@/* 6.1 */
@/* AUTHOR */
@/* */
@/* William E. Lamie, Microsoft Corporation */
@@ -68,9 +68,9 @@
@/* DATE NAME DESCRIPTION */
@/* */
@/* 05-19-2020 William E. Lamie Initial Version 6.0 */
@/* 08-14-2020 Scott Larson Modified comment(s), clean up */
@/* whitespace, resulting */
@/* in version 6.0.2 */
@/* 09-30-2020 Scott Larson Modified comment(s), and */
@/* cleaned up whitespace, */
@/* resulting in version 6.1 */
@/* */
@/**************************************************************************/
@VOID _tx_thread_context_save(VOID)

7
ports/cortex_m4/gnu/src/tx_thread_interrupt_control.S
View File

@@ -29,7 +29,7 @@
@/* FUNCTION RELEASE */
@/* */
@/* _tx_thread_interrupt_control Cortex-M4/GNU */
@/* 6.0.2 */
@/* 6.1 */
@/* AUTHOR */
@/* */
@/* William E. Lamie, Microsoft Corporation */
@@ -60,9 +60,8 @@
@/* DATE NAME DESCRIPTION */
@/* */
@/* 05-19-2020 William E. Lamie Initial Version 6.0 */
@/* 08-14-2020 Scott Larson Modified comment(s), clean up */
@/* whitespace, resulting */
@/* in version 6.0.2 */
@/* 09-30-2020 William E. Lamie Modified comment(s), */
@/* resulting in version 6.1 */
@/* */
@/**************************************************************************/
@/* UINT _tx_thread_interrupt_control(UINT new_posture)

7
ports/cortex_m4/gnu/src/tx_thread_schedule.S
View File

@@ -37,7 +37,7 @@
@/* FUNCTION RELEASE */
@/* */
@/* _tx_thread_schedule Cortex-M4/GNU */
@/* 6.0.2 */
@/* 6.1 */
@/* AUTHOR */
@/* */
@/* William E. Lamie, Microsoft Corporation */
@@ -71,9 +71,8 @@
@/* DATE NAME DESCRIPTION */
@/* */
@/* 05-19-2020 William E. Lamie Initial Version 6.0 */
@/* 08-14-2020 Scott Larson Modified comment(s), clean up */
@/* whitespace, resulting */
@/* in version 6.0.2 */
@/* 09-30-2020 William E. Lamie Modified comment(s), */
@/* resulting in version 6.1 */
@/* */
@/**************************************************************************/
@VOID _tx_thread_schedule(VOID)

14
ports/cortex_m4/gnu/src/tx_thread_stack_build.S
View File

@@ -29,7 +29,7 @@
@/* FUNCTION RELEASE */
@/* */
@/* _tx_thread_stack_build Cortex-M4/GNU */
@/* 6.0.2 */
@/* 6.1 */
@/* AUTHOR */
@/* */
@/* William E. Lamie, Microsoft Corporation */
@@ -62,14 +62,12 @@
@/* DATE NAME DESCRIPTION */
@/* */
@/* 05-19-2020 William E. Lamie Initial Version 6.0 */
@/* 06-30-2020 William E. Lamie Modified Comment(s), setting */
@/* R10 to top of stack is not */
@/* needed. Removed references */
@/* to stack frame, resulting */
@/* in version 6.0.1 */
@/* 08-14-2020 William E. Lamie Modified Comment(s), clean up */
@/* 09-30-2020 William E. Lamie Modified Comment(s), setting */
@/* R10 to top of stack is not */
@/* needed. Removed references */
@/* to stack frame, clean up */
@/* whitespace, resulting */
@/* in version 6.0.2 */
@/* in version 6.1 */
@/* */
@/**************************************************************************/
@VOID _tx_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(VOID))

7
ports/cortex_m4/gnu/src/tx_thread_system_return.S
View File

@@ -29,7 +29,7 @@
@/* FUNCTION RELEASE */
@/* */
@/* _tx_thread_system_return Cortex-M4/GNU */
@/* 6.0.2 */
@/* 6.1 */
@/* AUTHOR */
@/* */
@/* William E. Lamie, Microsoft Corporation */
@@ -62,9 +62,8 @@
@/* DATE NAME DESCRIPTION */
@/* */
@/* 05-19-2020 William E. Lamie Initial Version 6.0 */
@/* 08-14-2020 Scott Larson Modified comment(s), clean up */
@/* whitespace, resulting */
@/* in version 6.0.2 */
@/* 09-30-2020 William E. Lamie Modified comment(s), */
@/* resulting in version 6.1 */
@/* */
@/**************************************************************************/
@/* VOID _tx_thread_system_return(VOID)

7
ports/cortex_m4/gnu/src/tx_timer_interrupt.S
View File

@@ -40,7 +40,7 @@
@/* FUNCTION RELEASE */
@/* */
@/* _tx_timer_interrupt Cortex-M4/GNU */
@/* 6.0.2 */
@/* 6.1 */
@/* AUTHOR */
@/* */
@/* William E. Lamie, Microsoft Corporation */
@@ -75,9 +75,8 @@
@/* DATE NAME DESCRIPTION */
@/* */
@/* 05-19-2020 William E. Lamie Initial Version 6.0 */
@/* 08-14-2020 Scott Larson Modified comment(s), clean up */
@/* whitespace, resulting */
@/* in version 6.0.2 */
@/* 09-30-2020 William E. Lamie Modified comment(s), */
@/* resulting in version 6.1 */
@/* */
@/**************************************************************************/
@VOID _tx_timer_interrupt(VOID)

7
ports/cortex_m4/iar/example_build/tx_initialize_low_level.s
View File

@@ -45,7 +45,7 @@ __tx_free_memory_start
;/* FUNCTION RELEASE */
;/* */
;/* _tx_initialize_low_level Cortex-M4/IAR */
;/* 6.0.2 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -78,10 +78,7 @@ __tx_free_memory_start
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 08-14-2020 Scott Larson Modified comment(s), clean up */
;/* whitespace, resulting */
;/* in version 6.0.2 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_initialize_low_level(VOID)

10
ports/cortex_m4/iar/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h Cortex-M4/IAR */
/* 6.0.1 */
/* 6.1 */
/* */
/* AUTHOR */
/* */
@@ -47,7 +47,7 @@
/* */
/* DATE NAME DESCRIPTION */
/* */
/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* */
/**************************************************************************/
@@ -117,7 +117,7 @@ typedef unsigned short USHORT;
#endif
/* Define various constants for the ThreadX Cortex-M3 port. */
/* Define various constants for the ThreadX ARM Cortex-M port. */
#define TX_INT_DISABLE 1 /* Disable interrupts */
#define TX_INT_ENABLE 0 /* Enable interrupts */
@@ -347,7 +347,7 @@ void _tx_misra_vfp_touch(void);
#else
#define TX_THREAD_COMPLETED_EXTENSION(thread_ptr)
#define TX_THREAD_TERMINATED_EXTENSION(thread_ptr)
#define TX_THREAD_TERMINATED_EXTENSION(thread_ptr)
#endif
@@ -477,7 +477,7 @@ void tx_thread_fpu_disable(void);
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M4/IAR Version 6.0 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M4/IAR Version 6.1 *";
#else
#ifdef TX_MISRA_ENABLE
extern CHAR _tx_version_id[100];

7
ports/cortex_m4/iar/readme_threadx.txt
View File

@@ -214,12 +214,7 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
08-14-2020 ThreadX update of Cortex-M4/IAR port. The following files were
changed/added for port specific version 6.0.2:
*.s Modified comments and whitespace.
06/30/2020 Initial ThreadX 6.0.1 version for Cortex-M4 using IAR's ARM tools.
09-30-2020 Initial ThreadX 6.1 version for Cortex-M4 using IAR's ARM tools.
Copyright(c) 1996-2020 Microsoft Corporation

2
ports/cortex_m4/iar/src/tx_misra.s
View File

@@ -107,7 +107,7 @@
SECTION `.data`:DATA:REORDER:NOROOT(2)
DATA
// 51 CHAR _tx_version_id[100] = "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX 6.0 MISRA C Compliant *";
// 51 CHAR _tx_version_id[100] = "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX 6.1 MISRA C Compliant *";
_tx_version_id:
DC8 43H, 6FH, 70H, 79H, 72H, 69H, 67H, 68H
DC8 74H, 20H, 28H, 63H, 29H, 20H, 31H, 39H

7
ports/cortex_m4/iar/src/tx_thread_context_restore.s
View File

@@ -31,7 +31,7 @@
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_context_restore Cortex-M4/IAR */
;/* 6.0.2 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -65,10 +65,7 @@
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 08-14-2020 Scott Larson Modified comment(s), clean up */
;/* whitespace, resulting */
;/* in version 6.0.2 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_context_restore(VOID)

7
ports/cortex_m4/iar/src/tx_thread_context_save.s
View File

@@ -31,7 +31,7 @@
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_context_save Cortex-M4/IAR */
;/* 6.0.2 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -64,10 +64,7 @@
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 08-14-2020 Scott Larson Modified comment(s), clean up */
;/* whitespace, resulting */
;/* in version 6.0.2 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_context_save(VOID)

18
ports/cortex_m4/iar/src/tx_thread_interrupt_control.s
View File

@@ -28,7 +28,7 @@
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_interrupt_control Cortex-M4/IAR */
;/* 6.0.2 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -58,23 +58,17 @@
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 08-14-2020 Scott Larson Modified comment(s), clean up */
;/* whitespace, resulting */
;/* in version 6.0.2 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;UINT _tx_thread_interrupt_control(UINT new_posture)
;{
PUBLIC _tx_thread_interrupt_control
_tx_thread_interrupt_control:
;
; /* Pickup current interrupt lockout posture. */
;
MRS r1, PRIMASK
MSR PRIMASK, r0
MOV r0, r1
BX lr
MRS r1, PRIMASK ; Pickup current interrupt lockout
MSR PRIMASK, r0 ; Apply the new interrupt lockout
MOV r0, r1 ; Transfer old to return register
BX lr ; Return to caller
;
;}
END

7
ports/cortex_m4/iar/src/tx_thread_interrupt_disable.s
View File

@@ -28,7 +28,7 @@
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_interrupt_restore Cortex-M4/IAR */
;/* 6.0.2 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -58,10 +58,7 @@
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 08-14-2020 Scott Larson Modified comment(s), clean up */
;/* whitespace, resulting */
;/* in version 6.0.2 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;UINT _tx_thread_interrupt_disable(UINT new_posture)

7
ports/cortex_m4/iar/src/tx_thread_interrupt_restore.s
View File

@@ -28,7 +28,7 @@
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_interrupt_restore Cortex-M4/IAR */
;/* 6.0.2 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -58,10 +58,7 @@
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 08-14-2020 Scott Larson Modified comment(s), clean up */
;/* whitespace, resulting */
;/* in version 6.0.2 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_interrupt_restore(UINT new_posture)

7
ports/cortex_m4/iar/src/tx_thread_schedule.s
View File

@@ -37,7 +37,7 @@
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_schedule Cortex-M4/IAR */
;/* 6.0.2 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -70,10 +70,7 @@
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 08-14-2020 Scott Larson Modified comment(s), clean up */
;/* whitespace, resulting */
;/* in version 6.0.2 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_schedule(VOID)

9
ports/cortex_m4/iar/src/tx_thread_stack_build.s
View File

@@ -28,7 +28,7 @@
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_stack_build Cortex-M4/IAR */
;/* 6.0.2 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -60,10 +60,7 @@
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 08-14-2020 Scott Larson Modified comment(s), clean up */
;/* whitespace, resulting */
;/* in version 6.0.2 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(VOID))
@@ -114,7 +111,7 @@ _tx_thread_stack_build:
STR r3, [r2, #28] ; Store initial r10
STR r3, [r2, #32] ; Store initial r11
;
; /* Hardware stack follows. /
; /* Hardware stack follows. */
;
STR r3, [r2, #36] ; Store initial r0
STR r3, [r2, #40] ; Store initial r1

7
ports/cortex_m4/iar/src/tx_thread_system_return.s
View File

@@ -28,7 +28,7 @@
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_system_return Cortex-M4/IAR */
;/* 6.0.2 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -60,10 +60,7 @@
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 08-14-2020 Scott Larson Modified comment(s), clean up */
;/* whitespace, resulting */
;/* in version 6.0.2 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_system_return(VOID)

7
ports/cortex_m4/iar/src/tx_timer_interrupt.s
View File

@@ -42,7 +42,7 @@
;/* FUNCTION RELEASE */
;/* */
;/* _tx_timer_interrupt Cortex-M4/IAR */
;/* 6.0.2 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -75,10 +75,7 @@
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 08-14-2020 Scott Larson Modified comment(s), clean up */
;/* whitespace, resulting */
;/* in version 6.0.2 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_timer_interrupt(VOID)

9
ports/cortex_m4/keil/example_build/tx_initialize_low_level.s
View File

@@ -112,8 +112,8 @@ Reset_Handler
;/* */
;/* FUNCTION RELEASE */
;/* */
;/* _tx_initialize_low_level Cortex-M4/RVDS */
;/* 6.0.2 */
;/* _tx_initialize_low_level Cortex-M4/AC5 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -146,10 +146,7 @@ Reset_Handler
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 08-14-2020 Scott Larson Modified comment(s), clean up */
;/* whitespace, resulting */
;/* in version 6.0.2 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_initialize_low_level(VOID)

6
ports/cortex_m4/keil/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h Cortex-M4/Keil */
/* 6.0.1 */
/* 6.1 */
/* */
/* AUTHOR */
/* */
@@ -47,7 +47,7 @@
/* */
/* DATE NAME DESCRIPTION */
/* */
/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* */
/**************************************************************************/
@@ -454,7 +454,7 @@ void tx_thread_fpu_disable(void);
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M4/Keil Version 6.0 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M4/Keil Version 6.1 *";
#else
#ifdef TX_MISRA_ENABLE
extern CHAR _tx_version_id[100];

7
ports/cortex_m4/keil/readme_threadx.txt
View File

@@ -198,12 +198,7 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
08-14-2020 ThreadX update of Cortex-M4/Keil port. The following files were
changed/added for port specific version 6.0.2:
*.s Modified comments and whitespace.
06/30/2020 Initial ThreadX 6.0.1 version for Cortex-M4 using Keil tools.
09-30-2020 Initial ThreadX 6.1 version for Cortex-M4 using Keil tools.
Copyright(c) 1996-2020 Microsoft Corporation

9
ports/cortex_m4/keil/src/tx_thread_context_restore.s
View File

@@ -32,8 +32,8 @@
;/* */
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_context_restore Cortex-M4/AC5 */
;/* 6.0.2 */
;/* _tx_thread_context_restore Cortex-M4/AC5 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -67,10 +67,7 @@
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 08-14-2020 Scott Larson Modified comment(s), clean up */
;/* whitespace, resulting */
;/* in version 6.0.2 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_context_restore(VOID)

9
ports/cortex_m4/keil/src/tx_thread_context_save.s
View File

@@ -32,8 +32,8 @@
;/* */
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_context_save Cortex-M4/AC5 */
;/* 6.0.2 */
;/* _tx_thread_context_save Cortex-M4/AC5 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -66,10 +66,7 @@
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 08-14-2020 Scott Larson Modified comment(s), clean up */
;/* whitespace, resulting */
;/* in version 6.0.2 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_context_save(VOID)

9
ports/cortex_m4/keil/src/tx_thread_interrupt_control.s
View File

@@ -26,8 +26,8 @@
;/* */
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_interrupt_control Cortex-M4/AC5 */
;/* 6.0.2 */
;/* _tx_thread_interrupt_control Cortex-M4/AC5 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -57,10 +57,7 @@
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 08-14-2020 Scott Larson Modified comment(s), clean up */
;/* whitespace, resulting */
;/* in version 6.0.2 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;UINT _tx_thread_interrupt_control(UINT new_posture)

9
ports/cortex_m4/keil/src/tx_thread_interrupt_disable.s
View File

@@ -26,8 +26,8 @@
;/* */
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_interrupt_disable Cortex-M4/AC5 */
;/* 6.0.2 */
;/* _tx_thread_interrupt_disable Cortex-M4/AC5 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -57,10 +57,7 @@
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 08-14-2020 Scott Larson Modified comment(s), clean up */
;/* whitespace, resulting */
;/* in version 6.0.2 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;UINT _tx_thread_interrupt_disable(UINT new_posture)

9
ports/cortex_m4/keil/src/tx_thread_interrupt_restore.s
View File

@@ -26,8 +26,8 @@
;/* */
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_interrupt_restore Cortex-M4/AC5 */
;/* 6.0.2 */
;/* _tx_thread_interrupt_restore Cortex-M4/AC5 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -57,10 +57,7 @@
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 08-14-2020 Scott Larson Modified comment(s), clean up */
;/* whitespace, resulting */
;/* in version 6.0.2 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_interrupt_restore(UINT new_posture)

9
ports/cortex_m4/keil/src/tx_thread_schedule.s
View File

@@ -38,8 +38,8 @@
;/* */
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_schedule Cortex-M4/AC5 */
;/* 6.0.2 */
;/* _tx_thread_schedule Cortex-M4/AC5 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -72,10 +72,7 @@
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 08-14-2020 Scott Larson Modified comment(s), clean up */
;/* whitespace, resulting */
;/* in version 6.0.2 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_schedule(VOID)

18
ports/cortex_m4/keil/src/tx_thread_stack_build.s
View File

@@ -20,15 +20,6 @@
;/**************************************************************************/
;/**************************************************************************/
;
;
;#define TX_SOURCE_CODE
;
;
;/* Include necessary system files. */
;
;#include "tx_api.h"
;#include "tx_thread.h"
;
;
AREA ||.text||, CODE, READONLY
;/**************************************************************************/
@@ -36,7 +27,7 @@
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_stack_build Cortex-M4/AC5 */
;/* 6.0.2 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -68,10 +59,7 @@
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 08-14-2020 Scott Larson Modified comment(s), clean up */
;/* whitespace, resulting */
;/* in version 6.0.2 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(VOID))
@@ -122,7 +110,7 @@ _tx_thread_stack_build
STR r3, [r2, #28] ; Store initial r10
STR r3, [r2, #32] ; Store initial r11
;
; /* Hardware stack follows. /
; /* Hardware stack follows. */
;
STR r3, [r2, #36] ; Store initial r0
STR r3, [r2, #40] ; Store initial r1

9
ports/cortex_m4/keil/src/tx_thread_system_return.s
View File

@@ -26,8 +26,8 @@
;/* */
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_system_return Cortex-M4/AC5 */
;/* 6.0.2 */
;/* _tx_thread_system_return Cortex-M4/AC5 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -59,10 +59,7 @@
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 08-14-2020 Scott Larson Modified comment(s), clean up */
;/* whitespace, resulting */
;/* in version 6.0.2 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_system_return(VOID)

9
ports/cortex_m4/keil/src/tx_timer_interrupt.s
View File

@@ -41,8 +41,8 @@
;/* */
;/* FUNCTION RELEASE */
;/* */
;/* _tx_timer_interrupt Cortex-M4/AC5 */
;/* 6.0.2 */
;/* _tx_timer_interrupt Cortex-M4/AC5 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -76,10 +76,7 @@
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 08-14-2020 Scott Larson Modified comment(s), clean up */
;/* whitespace, resulting */
;/* in version 6.0.2 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_timer_interrupt(VOID)