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6.1 minor release

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This commit is contained in:
Scott Larson
2020-09-30 15:42:41 -07:00
parent 7287542cc8
commit 1b5816a206
3038 changed files with 377204 additions and 8606 deletions
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4
ports/arm11/ac5/example_build/tx_initialize_low_level.s
View File

@@ -119,7 +119,7 @@ __vectors
;/* FUNCTION RELEASE */
;/* */
;/* _tx_initialize_low_level ARM11/AC5 */
;/* 6.0.1 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -152,7 +152,7 @@ __vectors
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_initialize_low_level(VOID)

6
ports/arm11/ac5/inc/tx_port.h
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@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h ARM11/AC5 */
/* 6.0.1 */
/* 6.1 */
/* */
/* AUTHOR */
/* */
@@ -47,7 +47,7 @@
/* */
/* DATE NAME DESCRIPTION */
/* */
/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* */
/**************************************************************************/
@@ -317,7 +317,7 @@ unsigned int _tx_thread_interrupt_restore(UINT old_posture);
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX ARM11/AC5 Version 6.0.1 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX ARM11/AC5 Version 6.1 *";
#else
extern CHAR _tx_version_id[];
#endif

2
ports/arm11/ac5/readme_threadx.txt
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@@ -524,7 +524,7 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
06/30/2020 Initial ThreadX 6.0.1 version for Cortex-A5 using AC5 tools.
09-30-2020 Initial ThreadX 6.1 version for Cortex-A5 using AC5 tools.
Copyright(c) 1996-2020 Microsoft Corporation

4
ports/arm11/ac5/src/tx_thread_context_restore.s
View File

@@ -61,7 +61,7 @@ SVC_MODE_BITS EQU 0x13 ; SVC mode value
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_context_restore ARM11/AC5 */
;/* 6.0.1 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -93,7 +93,7 @@ SVC_MODE_BITS EQU 0x13 ; SVC mode value
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_context_restore(VOID)

4
ports/arm11/ac5/src/tx_thread_context_save.s
View File

@@ -51,7 +51,7 @@ DISABLE_INTS EQU 0x80 ; IRQ interrupts disabled
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_context_save ARM11/AC5 */
;/* 6.0.1 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -82,7 +82,7 @@ DISABLE_INTS EQU 0x80 ; IRQ interrupts disabled
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_context_save(VOID)

4
ports/arm11/ac5/src/tx_thread_fiq_context_restore.s
View File

@@ -63,7 +63,7 @@ SVC_MODE_BITS EQU 0x13 ; SVC mode value
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_fiq_context_restore ARM11/AC5 */
;/* 6.0.1 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -95,7 +95,7 @@ SVC_MODE_BITS EQU 0x13 ; SVC mode value
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_fiq_context_restore(VOID)

4
ports/arm11/ac5/src/tx_thread_fiq_context_save.s
View File

@@ -45,7 +45,7 @@
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_fiq_context_save ARM11/AC5 */
;/* 6.0.1 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -76,7 +76,7 @@
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
; VOID _tx_thread_fiq_context_save(VOID)

4
ports/arm11/ac5/src/tx_thread_fiq_nesting_end.s
View File

@@ -45,7 +45,7 @@ FIQ_MODE_BITS EQU 0x11 ; FIQ mode bits
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_fiq_nesting_end ARM11/AC5 */
;/* 6.0.1 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -84,7 +84,7 @@ FIQ_MODE_BITS EQU 0x11 ; FIQ mode bits
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_fiq_nesting_end(VOID)

4
ports/arm11/ac5/src/tx_thread_fiq_nesting_start.s
View File

@@ -41,7 +41,7 @@ SYS_MODE_BITS EQU 0x1F ; System mode bits
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_fiq_nesting_start ARM11/AC5 */
;/* 6.0.1 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -77,7 +77,7 @@ SYS_MODE_BITS EQU 0x1F ; System mode bits
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_fiq_nesting_start(VOID)

4
ports/arm11/ac5/src/tx_thread_interrupt_control.s
View File

@@ -42,7 +42,7 @@ INT_MASK EQU 0x80 ; Interrupt bit mask
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_interrupt_control ARM11/AC5 */
;/* 6.0.1 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -72,7 +72,7 @@ INT_MASK EQU 0x80 ; Interrupt bit mask
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;UINT _tx_thread_interrupt_control(UINT new_posture)

4
ports/arm11/ac5/src/tx_thread_interrupt_disable.s
View File

@@ -42,7 +42,7 @@ DISABLE_INTS EQU 0x80 ; IRQ interrupts disabled
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_interrupt_disable ARM11/AC5 */
;/* 6.0.1 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -71,7 +71,7 @@ DISABLE_INTS EQU 0x80 ; IRQ interrupts disabled
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;UINT _tx_thread_interrupt_disable(void)

4
ports/arm11/ac5/src/tx_thread_interrupt_restore.s
View File

@@ -35,7 +35,7 @@
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_interrupt_restore ARM11/AC5 */
;/* 6.0.1 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -65,7 +65,7 @@
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;UINT _tx_thread_interrupt_restore(UINT old_posture)

4
ports/arm11/ac5/src/tx_thread_irq_nesting_end.s
View File

@@ -45,7 +45,7 @@ IRQ_MODE_BITS EQU 0x12 ; IRQ mode bits
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_irq_nesting_end ARM11/AC5 */
;/* 6.0.1 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -84,7 +84,7 @@ IRQ_MODE_BITS EQU 0x12 ; IRQ mode bits
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_irq_nesting_end(VOID)

4
ports/arm11/ac5/src/tx_thread_irq_nesting_start.s
View File

@@ -41,7 +41,7 @@ SYS_MODE_BITS EQU 0x1F ; System mode bits
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_irq_nesting_start ARM11/AC5 */
;/* 6.0.1 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -77,7 +77,7 @@ SYS_MODE_BITS EQU 0x1F ; System mode bits
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_irq_nesting_start(VOID)

4
ports/arm11/ac5/src/tx_thread_schedule.s
View File

@@ -53,7 +53,7 @@ ENABLE_INTS EQU 0x80 ; IRQ Interrupts enabled mask
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_schedule ARM11/AC5 */
;/* 6.0.1 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -86,7 +86,7 @@ ENABLE_INTS EQU 0x80 ; IRQ Interrupts enabled mask
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_schedule(VOID)

4
ports/arm11/ac5/src/tx_thread_stack_build.s
View File

@@ -44,7 +44,7 @@ CPSR_MASK EQU 0x9F ; Mask initial CPSR, IRQ ints en
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_stack_build ARM11/AC5 */
;/* 6.0.1 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -76,7 +76,7 @@ CPSR_MASK EQU 0x9F ; Mask initial CPSR, IRQ ints en
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(VOID))

4
ports/arm11/ac5/src/tx_thread_system_return.s
View File

@@ -52,7 +52,7 @@ DISABLE_INTS EQU 0x80 ; IRQ interrupts disabled
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_system_return ARM11/AC5 */
;/* 6.0.1 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -84,7 +84,7 @@ DISABLE_INTS EQU 0x80 ; IRQ interrupts disabled
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_system_return(VOID)

4
ports/arm11/ac5/src/tx_thread_vectored_context_save.s
View File

@@ -51,7 +51,7 @@ DISABLE_INTS EQU 0x80 ; IRQ interrupts disabled
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_vectored_context_save ARM11/AC5 */
;/* 6.0.1 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -82,7 +82,7 @@ DISABLE_INTS EQU 0x80 ; IRQ interrupts disabled
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_vectored_context_save(VOID)

4
ports/arm11/ac5/src/tx_timer_interrupt.s
View File

@@ -50,7 +50,7 @@
;/* FUNCTION RELEASE */
;/* */
;/* _tx_timer_interrupt ARM11/AC5 */
;/* 6.0.1 */
;/* 6.1 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -84,7 +84,7 @@
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_timer_interrupt(VOID)