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Release 6.1.9

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Yuxin Zhou
2021-10-14 00:51:26 +00:00
parent 215df45d4b
commit 1af8404c54
1812 changed files with 60698 additions and 249862 deletions
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189
ports_module/rxv2/iar/example_build/hwsetup.c Normal file
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/* Adapted for use with IAR Embedded Workbench */
/***********************************************************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No
* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
* applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM
* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES
* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS
* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of
* this software. By using this software, you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*
* Copyright (C) 2012 Renesas Electronics Corporation. All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* File Name : hwsetup.c
* Version : 1.0
* Device(s) : RX
* H/W Platform : RX65N
* Description : Defines the initialisation routines used each time the MCU is restarted.
***********************************************************************************************************************/
/***********************************************************************************************************************
Includes <System Includes> , "Project Includes"
***********************************************************************************************************************/
#include <stdint.h>
#include <intrinsics.h>
/* Contains delcarations for the functions defined in this file */
#include "hwsetup.h"
/***********************************************************************************************************************
Private global variables and functions
***********************************************************************************************************************/
/* Clock configuration function delcaration */
void operating_frequency_set(void);
/* MCU I/O port configuration function delcaration */
//static void output_ports_configure(void);
/* Interrupt configuration function delcaration */
static void interrupts_configure(void);
/* MCU peripheral module configuration function declaration */
//static void peripheral_modules_enable(void);
/*******************************************************************************
* Function name: hardware_setup
* Description : Contains setup functions called at device restart
* Arguments : none
* Return value : none
*******************************************************************************/
void hardware_setup(void)
{
operating_frequency_set();
interrupts_configure();
}
/*******************************************************************************
* Function name: operating_frequency_set
* Description : Configures the clock settings for each of the device clocks
* Arguments : none
* Return value : none
*******************************************************************************/
void operating_frequency_set(void)
{
/*
Clock Description Frequency
----------------------------------------
Input Clock Frequency............ 24 MHz
Divisor.......................... 2
PLL frequency (x16).............. 192 MHz
Internal Clock Frequency......... 96 MHz
Peripheral Clock Frequency....... 48 MHz
USB Clock Frequency.............. 48 MHz
External Bus Clock Frequency..... 24 MHz */
volatile unsigned int i;
/* Protect off. */
SYSTEM.PRCR.WORD = 0xA50B;
/* Uncomment if not using sub-clock */
//SYSTEM.SOSCCR.BYTE = 0x01; /* stop sub-clock */
SYSTEM.SOSCCR.BYTE = 0x00; /* Enable sub-clock for RTC */
/* Wait 131,072 cycles * 12 MHz = 10.9 ms */
SYSTEM.MOSCWTCR.BYTE = 0x0D;
/* x16 @PLL, 2 divisor */
SYSTEM.PLLCR.WORD = 0x0F01;
/* EXTAL ON */
SYSTEM.MOSCCR.BYTE = 0x00;
/* PLL ON */
SYSTEM.PLLCR2.BYTE = 0x00;
for(i = 0;i< 0x168;i++)
{
/* Wait over 12ms */
__no_operation();
}
/* Setup system clocks
SCKCR - System Clock Control Register
b31:b28 FCK[3:0] 0x02 = Flash clock: PLL/4 = (192 / 4) = 48 MHz
b27:b24 ICK[3:0] 0x01 = System clock: PLL/2 = (192 / 2) = 96 MHz
b23 PSTOP1 0x00 = BCLK pin output is enabled
b19:b16 BCK[3:0] 0x03 = BCLK: PLL/8 = 24 MHz
b11:b8 PCKB[3:0] 0x02 = Peripheral clock B: PLL/4 = 48 MHz
*/
SYSTEM.SCKCR.LONG = 0x21031222; /* ICK=PLL/2,BCK,FCK,PCK=PLL/4 */
/* Setup IEBUS and USB clocks
SCKCR2 - System Clock Control Register 2
b7:b4 UCK[3:0] 0x03 = USB clock is PLL/4 = 48 MHz
b3:b0 IEBCK[3:0] 0x01 = IE Bus clock is PLL/2 = 96 MHz
*/
SYSTEM.SCKCR2.WORD = 0x0031;
/* ICLK, PCLKB, FCLK, BCLK, IECLK, and USBCLK all come from PLL circuit */
SYSTEM.SCKCR3.WORD = 0x0400;
/* Protect on. */
SYSTEM.PRCR.WORD = 0xA500;
}
/***********************************************************************************************************************
* Function name: interrupts_configure
* Description : Configures interrupts used
* Arguments : none
* Return value : none
***********************************************************************************************************************/
void interrupts_configure(void)
{
/* Protect off. */
SYSTEM.PRCR.WORD = 0xA50B;
/* Enable the bus error interrupt to catch accesses to illegal/reserved areas
of memory. */
/* Clear any pending interrupts */
IR(BSC,BUSERR) = 0;
/* Make this the highest priority interrupt (adjust as necessary for your
application) */
IPR(BSC,BUSERR) = 0x0F;
/* Enable the interrupt in the ICU */
IEN(BSC,BUSERR) = 1;
/* Enable illegal address interrupt in the BSC */
BSC.BEREN.BIT.IGAEN = 1;
}
/******************************************************************************
* Function name: buserr_isr
* Description : Sample ISR for bus error (must do hardware setup first!)
* By default, this demo code enables the Bus Error Interrupt.
* This interrupt will fire if the user tries to access code
* or data from one of the reserved areas in the memory map,
* including the areas covered by disabled chip selects.
* A nop statement is included here as a convenient place
* to set a breakpoint during debugging and development, and
* further handling should be added by the user for their
* application.
* Arguments : none
* Return value : none
******************************************************************************/
#pragma vector = VECT_BSC_BUSERR
__interrupt void buserr_isr(void)
{
/* To find the address that was accessed when the bus error occured, read
the register BSC.BERSR2.WORD. The upper 13 bits of this register
contain the upper 13-bits of the offending address (in 512K byte units).
*/
/* Add your own code here to handle this interrupt */
__no_operation();
}

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ports_module/rxv2/iar/example_build/hwsetup.h Normal file
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/* Adapted for use with IAR Embedded Workbench */
/***********************************************************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No
* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
* applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM
* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES
* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS
* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of
* this software. By using this software, you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*
* Copyright (C) 2012 Renesas Electronics Corporation. All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* File Name : hwsetup.h
* Version : 1.0
* Description : Hardware setup header file..
***********************************************************************************************************************/
/***********************************************************************************************************************
* History : DD.MM.YYYY Version Description
* : 26.10.2011 1.00 First Release
***********************************************************************************************************************/
/***********************************************************************************************************************
Macro definitions
***********************************************************************************************************************/
/* Multiple inclusion prevention macro */
#ifndef HWSETUP_H
#define HWSETUP_H
/***********************************************************************************************************************
Includes <System Includes> , "Project Includes"
***********************************************************************************************************************/
#include <iorx65n.h>
/***********************************************************************************************************************
Exported global functions (to be accessed by other files)
***********************************************************************************************************************/
/* Hardware setup funtion declaration */
void hardware_setup(void);
/* End of multiple inclusion prevention macro */
#endif

43
ports_module/rxv2/iar/example_build/low_level_init.c Normal file
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/*
* lowinit.c
*
* This module contains the function '__low_level_init', a function
* that is called before the 'main' function of the program. Normally
* low-level initializations - such as setting the prefered interrupt
* level or setting the watchdog - can be performed here.
*
* Note that this function is called before the data segments are
* initialized, this means that this function can't rely on the
* values of global or static variables.
*
* When this function returns zero, the startup code will inhibit the
* initialization of the data segments. The result is faster startup,
* the drawback is that neither global nor static data will be
* initialized.
*
*
* Copyright 2009-2010 IAR Systems AB.
*
* $Revision: 2717 $
*/
#pragma language=extended
#include <iorx65n.h>
#include <intrinsics.h>
#include "hwsetup.h"
__intrinsic
int __low_level_init ( void )
{
hardware_setup();
/*==================================*/
/* Choose if segment initialization */
/* should be done or not. */
/* Return: 0 to omit seg_init */
/* 1 to run seg_init */
/*==================================*/
return (1);
}
#pragma language=default

57
ports_module/rxv2/iar/example_build/sample_manager_linker.icf Normal file
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//-----------------------------------------------------------------------------
// ILINK command file template for the Renesas RX microcontroller R5F565N9
//-----------------------------------------------------------------------------
define exported symbol __link_file_version_4 = 1;
define memory mem with size = 4G;
// ID Code Protection
define exported symbol __ID_BYTES_1_4 = 0xFFFFFFFF;
define exported symbol __ID_BYTES_5_8 = 0xFFFFFFFF;
define exported symbol __ID_BYTES_9_12 = 0xFFFFFFFF;
define exported symbol __ID_BYTES_13_16 = 0xFFFFFFFF;
// Endian Select Register (MDE)
// Choose between Little endian=0xFFFFFFFF or Big endian=0xFFFFFFF8
define exported symbol __MDES = 0xFFFFFFFF;
// Option Function Select Register 0 (OFS0)
define exported symbol __OFS0 = 0xFFFFFFFF;
// Option Function Select Register 1 (OFS1)
define exported symbol __OFS1 = 0xFFFFFFFF;
define region ROM_region16 = mem:[from 0xFFFF8000 to 0xFFF10000];
define region RAM_region16 = mem:[from 0x00000004 to 0x0003FFFF];
define region ROM_region24 = mem:[from 0xFFF00000 to 0xFFF10000];
define region RAM_region24 = mem:[from 0x00000004 to 0x0003FFFF];
define region ROM_region32 = mem:[from 0xFFF00000 to 0xFFF10000];
define region RAM_region32 = mem:[from 0x00000004 to 0x0003FFFF];
initialize by copy { rw, ro section D, ro section D_1, ro section D_2 };
do not initialize { section .*.noinit };
define block HEAP with alignment = 4, size = _HEAP_SIZE { };
define block USTACK with alignment = 4, size = _USTACK_SIZE { };
define block ISTACK with alignment = 4, size = _ISTACK_SIZE { };
define block STACKS with fixed order { block ISTACK,
block USTACK };
place at address mem:0xFE7F5D00 { ro section .option_mem };
place at address mem:0xFFFFFF80 { ro section .exceptvect };
place at address mem:0xFFFFFFFC { ro section .resetvect };
"ROM16":place in ROM_region16 { ro section .code16*,
ro section .data16* };
"RAM16":place in RAM_region16 { rw section .data16*,
rw section __DLIB_PERTHREAD };
"ROM24":place in ROM_region24 { ro section .code24*,
ro section .data24* };
"RAM24":place in RAM_region24 { rw section .data24* };
"ROM32":place in ROM_region32 { ro };
"RAM32":place in RAM_region32 { rw,
ro section D,
ro section D_1,
ro section D_2,
block HEAP,
block STACKS,
last section FREEMEM };

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ports_module/rxv2/iar/example_build/sample_module_linker.icf Normal file
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//-----------------------------------------------------------------------------
// ILINK command file template for the Renesas RX microcontroller R5F565N
//-----------------------------------------------------------------------------
define exported symbol __link_file_version_4 = 1;
define memory mem with size = 4G;
// ID Code Protection
define exported symbol __ID_BYTES_1_4 = 0xFFFFFFFF;
define exported symbol __ID_BYTES_5_8 = 0xFFFFFFFF;
define exported symbol __ID_BYTES_9_12 = 0xFFFFFFFF;
define exported symbol __ID_BYTES_13_16 = 0xFFFFFFFF;
// Endian Select Register (MDE)
// Choose between Little endian=0xFFFFFFFF or Big endian=0xFFFFFFF8
define exported symbol __MDES = 0xFFFFFFFF;
// Option Function Select Register 0 (OFS0)
define exported symbol __OFS0 = 0xFFFFFFFF;
// Option Function Select Register 1 (OFS1)
define exported symbol __OFS1 = 0xFFFFFFFF;
//define region ROM_region16 = mem:[from 0xFFFF8000 to 0xFFFFFFFF];
define region RAM_region16 = mem:[from 0x00010000 to 0x00017FFF];
//define region ROM_region24 = mem:[from 0xFFF00000 to 0xFFFFFFFF];
//define region RAM_region24 = mem:[from 0x00000004 to 0x0001FFFF];
define region ROM_region32 = mem:[from 0xFFF10400 to 0xFFFFFFFF];
//define region RAM_region32 = mem:[from 0x00000004 to 0x0001FFFF];
//define region DATA_FLASH_region = mem:[from 0x00100000 to 0x00107FFF];
initialize by copy { rw, ro section D, ro section D_1, ro section D_2 };
do not initialize { section .*.noinit };
define block HEAP with alignment = 4, size = _HEAP_SIZE { };
//define block USTACK with alignment = 4, size = _USTACK_SIZE { };
//define block ISTACK with alignment = 4, size = _ISTACK_SIZE { };
//define block STACKS with fixed order { block ISTACK,
// block USTACK };
//place at address mem:0xFFFFFF80 { ro section .nmivec };
//"ROM16":place in ROM_region16 { ro section .code16*,
// ro section .data16* };
//"RAM16":place in RAM_region16 { rw section .data16*,
// rw section __DLIB_PERTHREAD };
//"ROM24":place in ROM_region24 { ro section .code24*,
// ro section .data24* };
//"RAM24":place in RAM_region24 { rw section .data24* };
//"ROM32":place in ROM_region32 { ro };
//"RAM32":place in RAM_region32 { rw,
// ro section D,
// ro section D_1,
// ro section D_2,
// block HEAP,
// block STACKS,
// last section FREEMEM };
//"DATAFLASH":place in DATA_FLASH_region
// { ro section .dataflash* };
define movable block ROPI with alignment = 4, fixed order, static base CB
{
ro object txm_module_preamble_rx65n.o,
ro,
ro data
};
define movable block RWPI with alignment = 8, fixed order, static base SB
{
rw section .sbdata*,
rw section .sbrel*,
rw section __DLIB_PERTHREAD,
block HEAP
};
place in ROM_region32 { block ROPI };
place in RAM_region16 { block RWPI };

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ports_module/rxv2/iar/example_build/sample_threadx_module.c Normal file
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/* This is a small demo of the high-performance ThreadX kernel running as a module. It includes
examples of eight threads of different priorities, using a message queue, semaphore, mutex,
event flags group, byte pool, and block pool. */
/* Specify that this is a module! */
#define TXM_MODULE
/* Include the ThreadX module definitions. */
#include "txm_module.h"
/* Define constants. */
#define DEMO_STACK_SIZE 1024
#define DEMO_BYTE_POOL_SIZE 9120
#define DEMO_BLOCK_POOL_SIZE 100
#define DEMO_QUEUE_SIZE 100
/* Define the pool space in the bss section of the module. ULONG is used to
get the word alignment. */
ULONG demo_module_pool_space[DEMO_BYTE_POOL_SIZE / 4];
/* Define the ThreadX object control blocks... */
TX_THREAD *thread_0;
TX_THREAD *thread_1;
TX_THREAD *thread_2;
TX_THREAD *thread_3;
TX_THREAD *thread_4;
TX_THREAD *thread_5;
TX_THREAD *thread_6;
TX_THREAD *thread_7;
TX_QUEUE *queue_0;
TX_SEMAPHORE *semaphore_0;
TX_MUTEX *mutex_0;
TX_EVENT_FLAGS_GROUP *event_flags_0;
TX_BYTE_POOL *byte_pool_0;
TX_BLOCK_POOL *block_pool_0;
/* Define the counters used in the demo application... */
ULONG thread_0_counter;
ULONG thread_1_counter;
ULONG thread_1_messages_sent;
ULONG thread_2_counter;
ULONG thread_2_messages_received;
ULONG thread_3_counter;
ULONG thread_4_counter;
ULONG thread_5_counter;
ULONG thread_6_counter;
ULONG thread_7_counter;
ULONG semaphore_0_puts;
ULONG event_0_sets;
ULONG queue_0_sends;
/* Define thread prototypes. */
void thread_0_entry(ULONG thread_input);
void thread_1_entry(ULONG thread_input);
void thread_2_entry(ULONG thread_input);
void thread_3_and_4_entry(ULONG thread_input);
void thread_5_entry(ULONG thread_input);
void thread_6_and_7_entry(ULONG thread_input);
void semaphore_0_notify(TX_SEMAPHORE *semaphore_ptr)
{
if (semaphore_ptr == semaphore_0)
semaphore_0_puts++;
}
void event_0_notify(TX_EVENT_FLAGS_GROUP *event_flag_group_ptr)
{
if (event_flag_group_ptr == event_flags_0)
event_0_sets++;
}
void queue_0_notify(TX_QUEUE *queue_ptr)
{
if (queue_ptr == queue_0)
queue_0_sends++;
}
/* Define the module start function. */
void demo_module_start(ULONG id)
{
CHAR *pointer;
/* Allocate all the objects. In MPU mode, modules cannot allocate control blocks within
their own memory area so they cannot corrupt the resident portion of ThreadX by overwriting
the control block(s). */
txm_module_object_allocate((void*)&thread_0, sizeof(TX_THREAD));
txm_module_object_allocate((void*)&thread_1, sizeof(TX_THREAD));
txm_module_object_allocate((void*)&thread_2, sizeof(TX_THREAD));
txm_module_object_allocate((void*)&thread_3, sizeof(TX_THREAD));
txm_module_object_allocate((void*)&thread_4, sizeof(TX_THREAD));
txm_module_object_allocate((void*)&thread_5, sizeof(TX_THREAD));
txm_module_object_allocate((void*)&thread_6, sizeof(TX_THREAD));
txm_module_object_allocate((void*)&thread_7, sizeof(TX_THREAD));
txm_module_object_allocate((void*)&queue_0, sizeof(TX_QUEUE));
txm_module_object_allocate((void*)&semaphore_0, sizeof(TX_SEMAPHORE));
txm_module_object_allocate((void*)&mutex_0, sizeof(TX_MUTEX));
txm_module_object_allocate((void*)&event_flags_0, sizeof(TX_EVENT_FLAGS_GROUP));
txm_module_object_allocate((void*)&byte_pool_0, sizeof(TX_BYTE_POOL));
txm_module_object_allocate((void*)&block_pool_0, sizeof(TX_BLOCK_POOL));
/* Create a byte memory pool from which to allocate the thread stacks. */
tx_byte_pool_create(byte_pool_0, "module byte pool 0", demo_module_pool_space, DEMO_BYTE_POOL_SIZE);
/* Put system definition stuff in here, e.g. thread creates and other assorted
create information. */
/* Allocate the stack for thread 0. */
tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
/* Create the main thread. */
tx_thread_create(thread_0, "module thread 0", thread_0_entry, 0,
pointer, DEMO_STACK_SIZE,
1, 1, TX_NO_TIME_SLICE, TX_AUTO_START);
/* Allocate the stack for thread 1. */
tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
/* Create threads 1 and 2. These threads pass information through a ThreadX
message queue. It is also interesting to note that these threads have a time
slice. */
tx_thread_create(thread_1, "module thread 1", thread_1_entry, 1,
pointer, DEMO_STACK_SIZE,
16, 16, 4, TX_AUTO_START);
/* Allocate the stack for thread 2. */
tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
tx_thread_create(thread_2, "module thread 2", thread_2_entry, 2,
pointer, DEMO_STACK_SIZE,
16, 16, 4, TX_AUTO_START);
/* Allocate the stack for thread 3. */
tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
/* Create threads 3 and 4. These threads compete for a ThreadX counting semaphore.
An interesting thing here is that both threads share the same instruction area. */
tx_thread_create(thread_3, "module thread 3", thread_3_and_4_entry, 3,
pointer, DEMO_STACK_SIZE,
8, 8, TX_NO_TIME_SLICE, TX_AUTO_START);
/* Allocate the stack for thread 4. */
tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
tx_thread_create(thread_4, "module thread 4", thread_3_and_4_entry, 4,
pointer, DEMO_STACK_SIZE,
8, 8, TX_NO_TIME_SLICE, TX_AUTO_START);
/* Allocate the stack for thread 5. */
tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
/* Create thread 5. This thread simply pends on an event flag which will be set
by thread_0. */
tx_thread_create(thread_5, "module thread 5", thread_5_entry, 5,
pointer, DEMO_STACK_SIZE,
4, 4, TX_NO_TIME_SLICE, TX_AUTO_START);
/* Allocate the stack for thread 6. */
tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
/* Create threads 6 and 7. These threads compete for a ThreadX mutex. */
tx_thread_create(thread_6, "module thread 6", thread_6_and_7_entry, 6,
pointer, DEMO_STACK_SIZE,
8, 8, TX_NO_TIME_SLICE, TX_AUTO_START);
/* Allocate the stack for thread 7. */
tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
tx_thread_create(thread_7, "module thread 7", thread_6_and_7_entry, 7,
pointer, DEMO_STACK_SIZE,
8, 8, TX_NO_TIME_SLICE, TX_AUTO_START);
/* Allocate the message queue. */
tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_QUEUE_SIZE*sizeof(ULONG), TX_NO_WAIT);
/* Create the message queue shared by threads 1 and 2. */
tx_queue_create(queue_0, "module queue 0", TX_1_ULONG, pointer, DEMO_QUEUE_SIZE*sizeof(ULONG));
tx_queue_send_notify(queue_0, queue_0_notify);
/* Create the semaphore used by threads 3 and 4. */
tx_semaphore_create(semaphore_0, "module semaphore 0", 1);
tx_semaphore_put_notify(semaphore_0, semaphore_0_notify);
/* Create the event flags group used by threads 1 and 5. */
tx_event_flags_create(event_flags_0, "module event flags 0");
tx_event_flags_set_notify(event_flags_0, event_0_notify);
/* Create the mutex used by thread 6 and 7 without priority inheritance. */
tx_mutex_create(mutex_0, "module mutex 0", TX_NO_INHERIT);
/* Allocate the memory for a small block pool. */
tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_BLOCK_POOL_SIZE, TX_NO_WAIT);
/* Create a block memory pool to allocate a message buffer from. */
tx_block_pool_create(block_pool_0, "module block pool 0", sizeof(ULONG), pointer, DEMO_BLOCK_POOL_SIZE);
/* Allocate a block and release the block memory. */
tx_block_allocate(block_pool_0, (VOID **) &pointer, TX_NO_WAIT);
/* Release the block back to the pool. */
tx_block_release(pointer);
}
/* Define the test threads. */
void thread_0_entry(ULONG thread_input)
{
UINT status;
/* This thread simply sits in while-forever-sleep loop. */
while(1)
{
/* Increment the thread counter. */
thread_0_counter++;
/* Sleep for 10 ticks. */
tx_thread_sleep(10);
/* Set event flag 0 to wakeup thread 5. */
status = tx_event_flags_set(event_flags_0, 0x1, TX_OR);
/* Check status. */
if (status != TX_SUCCESS)
break;
}
}
void thread_1_entry(ULONG thread_input)
{
UINT status;
/* This thread simply sends messages to a queue shared by thread 2. */
while(1)
{
/* Increment the thread counter. */
thread_1_counter++;
/* Send message to queue 0. */
status = tx_queue_send(queue_0, &thread_1_messages_sent, TX_WAIT_FOREVER);
/* Check completion status. */
if (status != TX_SUCCESS)
break;
/* Increment the message sent. */
thread_1_messages_sent++;
}
}
void thread_2_entry(ULONG thread_input)
{
ULONG received_message;
UINT status;
/* This thread retrieves messages placed on the queue by thread 1. */
while(1)
{
/* Write value to shared memory region. */
// *(ULONG *)0x00020000 = 0xCDCDCDCD;
/* Increment the thread counter. */
thread_2_counter++;
/* Retrieve a message from the queue. */
status = tx_queue_receive(queue_0, &received_message, TX_WAIT_FOREVER);
/* Check completion status and make sure the message is what we
expected. */
if ((status != TX_SUCCESS) || (received_message != thread_2_messages_received))
break;
/* Otherwise, all is okay. Increment the received message count. */
thread_2_messages_received++;
}
}
void thread_3_and_4_entry(ULONG thread_input)
{
UINT status;
/* This function is executed from thread 3 and thread 4. As the loop
below shows, these function compete for ownership of semaphore_0. */
while(1)
{
/* Increment the thread counter. */
if (thread_input == 3)
thread_3_counter++;
else
thread_4_counter++;
/* Get the semaphore with suspension. */
status = tx_semaphore_get(semaphore_0, TX_WAIT_FOREVER);
/* Check status. */
if (status != TX_SUCCESS)
break;
/* Sleep for 2 ticks to hold the semaphore. */
tx_thread_sleep(2);
/* Release the semaphore. */
status = tx_semaphore_put(semaphore_0);
/* Check status. */
if (status != TX_SUCCESS)
break;
}
}
void thread_5_entry(ULONG thread_input)
{
UINT status;
ULONG actual_flags;
/* This thread simply waits for an event in a forever loop. */
while(1)
{
/* Increment the thread counter. */
thread_5_counter++;
/* Wait for event flag 0. */
status = tx_event_flags_get(event_flags_0, 0x1, TX_OR_CLEAR,
&actual_flags, TX_WAIT_FOREVER);
/* Check status. */
if ((status != TX_SUCCESS) || (actual_flags != 0x1))
break;
}
}
void thread_6_and_7_entry(ULONG thread_input)
{
UINT status;
/* This function is executed from thread 6 and thread 7. As the loop
below shows, these function compete for ownership of mutex_0. */
while(1)
{
/* Increment the thread counter. */
if (thread_input == 6)
thread_6_counter++;
else
thread_7_counter++;
/* Get the mutex with suspension. */
status = tx_mutex_get(mutex_0, TX_WAIT_FOREVER);
/* Check status. */
if (status != TX_SUCCESS)
break;
/* Get the mutex again with suspension. This shows
that an owning thread may retrieve the mutex it
owns multiple times. */
status = tx_mutex_get(mutex_0, TX_WAIT_FOREVER);
/* Check status. */
if (status != TX_SUCCESS)
break;
/* Sleep for 2 ticks to hold the mutex. */
tx_thread_sleep(2);
/* Release the mutex. */
status = tx_mutex_put(mutex_0);
/* Check status. */
if (status != TX_SUCCESS)
break;
/* Release the mutex again. This will actually
release ownership since it was obtained twice. */
status = tx_mutex_put(mutex_0);
/* Check status. */
if (status != TX_SUCCESS)
break;
}
}

113
ports_module/rxv2/iar/example_build/sample_threadx_module_manager.c Normal file
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/* Small demonstration of the ThreadX module manager. */
#include "tx_api.h"
#include "txm_module.h"
#define DEMO_STACK_SIZE 1024
/* Define the ThreadX object control blocks... */
TX_THREAD module_manager;
TXM_MODULE_INSTANCE my_module;
/* Define the object pool area. */
UCHAR object_memory[8192];
/* Define the count of memory faults. */
ULONG memory_faults;
/* Define thread prototypes. */
void module_manager_entry(ULONG thread_input);
/* Define fault handler. */
VOID module_fault_handler(TX_THREAD *thread, TXM_MODULE_INSTANCE *module)
{
/* Just increment the fault counter. */
memory_faults++;
}
/* Define main entry point. */
int main()
{
/* Enter the ThreadX kernel. */
tx_kernel_enter();
}
/* Define what the initial system looks like. */
void tx_application_define(void *first_unused_memory)
{
CHAR *pointer = (CHAR*)first_unused_memory;
tx_thread_create(&module_manager, "Module Manager Thread", module_manager_entry, 0,
pointer, DEMO_STACK_SIZE,
1, 1, TX_NO_TIME_SLICE, TX_AUTO_START);
pointer = pointer + DEMO_STACK_SIZE;
}
/* Define the test threads. */
void module_manager_entry(ULONG thread_input)
{
/* Initialize the module manager. */
txm_module_manager_initialize((VOID *) 0x00018000, 0x00008000);
txm_module_manager_object_pool_create(object_memory, sizeof(object_memory));
/* Register a fault handler. */
txm_module_manager_memory_fault_notify(module_fault_handler);
/* Load the module that is already there, in this example it is placed there by the multiple image download. */
txm_module_manager_in_place_load(&my_module, "my module", (VOID *) 0xFFF10400);
/* Enable 128 byte read/write shared memory region at 0x00020000. */
txm_module_manager_external_memory_enable(&my_module, (void *) 0x00020000, 128, TXM_MODULE_MANAGER_SHARED_ATTRIBUTE_READ | TXM_MODULE_MANAGER_SHARED_ATTRIBUTE_WRITE);
/* Start the module. */
txm_module_manager_start(&my_module);
/* Sleep for a while.... */
tx_thread_sleep(1000);
/* Stop the module. */
txm_module_manager_stop(&my_module);
/* Unload the module. */
txm_module_manager_unload(&my_module);
/* Load the module that is already there. */
txm_module_manager_in_place_load(&my_module, "my module", (VOID *) 0xFFF10400);
/* Set maximum module priority to 5. */
txm_module_manager_maximum_module_priority_set(&my_module, 5);
/* Start the module again. */
txm_module_manager_start(&my_module);
/* Now just spin... */
while(1)
{
tx_thread_sleep(100);
}
}

99
ports_module/rxv2/iar/example_build/tx_initialize_low_level.s Normal file
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;/**************************************************************************/
;/* */
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
;/* */
;/* This software is licensed under the Microsoft Software License */
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
;/* and in the root directory of this software. */
;/* */
;/**************************************************************************/
;
;
;/**************************************************************************/
;/**************************************************************************/
;/** */
;/** ThreadX Component */
;/** */
;/** Initialize */
;/** */
;/**************************************************************************/
;/**************************************************************************/
;
extern __tx_initialize_unused_memory
section .text:CODE:ROOT
;
;/**************************************************************************/
;/* */
;/* FUNCTION RELEASE */
;/* */
;/* _tx_initialize_low_level RXv2/IAR */
;/* 6.x */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
;/* */
;/* DESCRIPTION */
;/* */
;/* This function is responsible for any low-level processor */
;/* initialization, including setting up interrupt vectors, setting */
;/* up a periodic timer interrupt source, saving the system stack */
;/* pointer for use in ISR processing later, and finding the first */
;/* available RAM memory address for tx_application_define. */
;/* */
;/* INPUT */
;/* */
;/* None */
;/* */
;/* OUTPUT */
;/* */
;/* None */
;/* */
;/* CALLS */
;/* */
;/* None */
;/* */
;/* CALLED BY */
;/* */
;/* _tx_initialize_kernel_enter ThreadX entry function */
;/* */
;/* RELEASE HISTORY */
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* xx-xx-xxxx William E. Lamie Initial Version 6.x */
;/* */
;/**************************************************************************/
public __tx_initialize_low_level
__tx_initialize_low_level:
; /* Save the first available memory address. */
; _tx_initialize_unused_memory = (VOID_PTR) &free_mem_start;
;
MOV.L #__tx_free_memory_start, R1 ; Pickup unused memory address
MOV.L #__tx_initialize_unused_memory,R2
MOV.L R1,[R2] ; Save first free memory address
; /* Set priority of SWINT to 1. */
MOV.L #0x87303, r1
MOV.L #1, r2
MOV.B r2, [r1]
; /* Enable SWINT. */
MOV.L #0x87203, r1
MOV.B [r1], r2
OR #(1 << 3), r2
MOV.B r2, [r1]
RTS
section FREEMEM:DATA
public __tx_free_memory_start
__tx_free_memory_start
DS32 4
END

69
ports_module/rxv2/iar/example_build/txm_module_preamble.s Normal file
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/* Alignment of 4 (16-byte) */
SECTION .text:CODE (4)
/* Define public symbols. */
PUBLIC __txm_module_preamble
/* Define application-specific start/stop entry points for the module. */
EXTERN _demo_module_start
/* Define common external refrences. */
EXTERN __txm_module_thread_shell_entry
EXTERN __txm_module_callback_request_thread_entry
EXTERN ROPI$$Length
EXTERN RWPI$$Length
DATA
__txm_module_preamble:
DC32 0x4D4F4455 // Module ID
DC32 0x5 // Module Major Version
DC32 0x6 // Module Minor Version
DC32 32 // Module Preamble Size in 32-bit words
DC32 0x12345678 // Module ID (application defined)
DC32 0x00000007 // Module Properties where:
// Bits 31-24: Compiler ID
// 0 -> IAR
// 1 -> RVDS
// 2 -> GNU
// Bit 0: 0 -> Privileged mode execution
// 1 -> User mode execution
// Bit 1: 0 -> No MPU protection
// 1 -> MPU protection (must have user mode selected)
// Bit 2: 0 -> Disable shared/external memory access
// 1 -> Enable shared/external memory access
DC32 __txm_module_thread_shell_entry - $ // Module Shell Entry Point
DC32 _demo_module_start - $ // Module Start Thread Entry Point
DC32 0 // Module Stop Thread Entry Point
DC32 1 // Module Start/Stop Thread Priority
DC32 1024 // Module Start/Stop Thread Stack Size
DC32 __txm_module_callback_request_thread_entry - $ // Module Callback Thread Entry
DC32 1 // Module Callback Thread Priority
DC32 1024 // Module Callback Thread Stack Size
DC32 ROPI$$Length // Module Code Size
DC32 RWPI$$Length // Module Data Size
DC32 0 // Reserved 0
DC32 0 // Reserved 1
DC32 0 // Reserved 2
DC32 0 // Reserved 3
DC32 0 // Reserved 4
DC32 0 // Reserved 5
DC32 0 // Reserved 6
DC32 0 // Reserved 7
DC32 0 // Reserved 8
DC32 0 // Reserved 9
DC32 0 // Reserved 10
DC32 0 // Reserved 11
DC32 0 // Reserved 12
DC32 0 // Reserved 13
DC32 0 // Reserved 14
DC32 0 // Reserved 15
END