Release 6.1.9

This commit is contained in:
Yuxin Zhou
2021-10-14 00:51:26 +00:00
parent 215df45d4b
commit 1af8404c54
1812 changed files with 60698 additions and 249862 deletions

View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h RXv1/GNURX */
/* 6.1.8 */
/* 6.1.9 */
/* */
/* AUTHOR */
/* */
@@ -48,6 +48,8 @@
/* DATE NAME DESCRIPTION */
/* */
/* 08-02-2021 William E. Lamie Initial Version 6.1.8 */
/* 10-15-2021 William E. Lamie Modified comment(s), */
/* resulting in version 6.1.9 */
/* */
/**************************************************************************/
@@ -255,7 +257,7 @@ static void _tx_thread_system_return_inline(void)
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX RXv1/GNURX Version 6.1.8 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX RXv1/GNURX Version 6.1.9 *";
#else
extern CHAR _tx_version_id[];
#endif

View File

@@ -53,27 +53,26 @@ state of the CPU registers at the time of a context switch is saved on the runni
thread's stack The top of the suspended thread's stack is pointed to by
tx_thread_stack_ptr in the associated thread control block TX_THREAD.
Offset Interrupted Stack Frame
Offset Stack Frame
0x00 1
0x04 ACC0
0x0C R6
0x10 R7
0x14 R8
0x18 R9
0x1C R10
0x20 R11
0x24 R12
0x28 R13
0x30 R14
0x34 R15
0x38 R3
0x3C R4
0x40 R5
0x44 R1
0x48 R2
0x4C PC - return address
0x50 PSW
0x00 ACC0
0x04 R6
0x0C R7
0x10 R8
0x14 R9
0x18 R10
0x1C R11
0x20 R12
0x24 R13
0x28 R14
0x30 R15
0x34 R3
0x38 R4
0x3C R5
0x40 R1
0x44 R2
0x48 PC - return address
0x4C PSW
Note: By default GNURX does not save the state of the accumulator register ACC0
when entering an ISR. This means that if the ISR uses any of the DSP instructions the
@@ -147,6 +146,11 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
10-15-2021 Release 6.1.9 changes:
tx_thread_context_restore.s Removed unnecessary stack type placement
tx_thread_schedule.s Removed unnecessary stack type checking
tx_thread_stack_build.s Removed unnecessary stack type placement
08-02-2021 Initial ThreadX release for the RXv1 using GNURX tools, version 6.1.8

View File

@@ -29,7 +29,7 @@
;/* FUNCTION RELEASE */
;/* */
;/* _tx_initialize_low_level RXv1/GNURX */
;/* 6.1.8 */
;/* 6.1.9 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -63,6 +63,8 @@
;/* DATE NAME DESCRIPTION */
;/* */
;/* 08-02-2021 William E. Lamie Initial Version 6.1.8 */
;/* 10-15-2021 William E. Lamie Modified comment(s), */
;/* resulting in version 6.1.9 */
;/* */
;/**************************************************************************/
.global __tx_initialize_low_level
@@ -72,9 +74,9 @@ __tx_initialize_low_level:
; /* Save the first available memory address. */
; _tx_initialize_unused_memory = (VOID_PTR) &free_mem_start;
;
MOV.L #_end, R1 ; Pickup unused memory address
MOV.L #_end, R1 ; Pickup unused memory address
MOV.L #__tx_initialize_unused_memory, R2
MOV.L R1,[R2] ; Save first free memory address
MOV.L R1,[R2] ; Save first free memory address
; /* Set priority of SWINT to 1. */
MOV.L #0x87303, r1
@@ -89,5 +91,4 @@ __tx_initialize_low_level:
RTS
.end

View File

@@ -46,7 +46,7 @@
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_context_restore RXv1/GNURX */
;/* 6.1.8 */
;/* 6.1.9 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -79,6 +79,10 @@
;/* DATE NAME DESCRIPTION */
;/* */
;/* 08-02-2021 William E. Lamie Initial Version 6.1.8 */
;/* 10-15-2021 William E. Lamie Modified comment(s), and */
;/* removed unnecessary stack */
;/* type placement, */
;/* resulting in version 6.1.9 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_context_restore(VOID)
@@ -88,7 +92,7 @@ __tx_thread_context_restore:
;
; /* Lockout interrupts. */
CLRPSW I ; disable interrupts
CLRPSW I ; Disable interrupts
; /* Determine if interrupts are nested. */
; if (--_tx_thread_system_state)
@@ -107,10 +111,10 @@ __tx_thread_context_restore:
; and return to the point of interrupt. */
;
__tx_thread_nested_restore:
POPM R14-R15 ; restore R14-R15
POPM R3-R5 ; restore R3-R5
POPM R1-R2 ; restore R1-R2
RTE ; return to point of interrupt, restore PSW including IPL
POPM R14-R15 ; Restore R14-R15
POPM R3-R5 ; Restore R3-R5
POPM R1-R2 ; Restore R1-R2
RTE ; Return to point of interrupt, restore PSW including IPL
; }
__tx_thread_not_nested_restore:
@@ -125,21 +129,21 @@ __tx_thread_not_nested_restore:
CMP #0, R2
BEQ __tx_thread_idle_system_restore
MOV.L #__tx_thread_preempt_disable, R3 ; pick up preempt disable flag
MOV.L #__tx_thread_preempt_disable, R3 ; Pick up preempt disable flag
MOV.L [R3], R3
CMP #0, R3
BNE __tx_thread_no_preempt_restore ; if pre-empt disable flag set, we simply return to the original point of interrupt regardless
BNE __tx_thread_no_preempt_restore ; If pre-empt disable flag set, we simply return to the original point of interrupt regardless
MOV.L #__tx_thread_execute_ptr, R3 ; (_tx_thread_current_ptr != _tx_thread_execute_ptr)
CMP [R3], R2
BNE __tx_thread_preempt_restore ; jump to pre-empt restoring
BNE __tx_thread_preempt_restore ; Jump to pre-empt restoring
;
__tx_thread_no_preempt_restore:
SETPSW U ; user stack
POPM R14-R15 ; restore R14-R15
POPM R3-R5 ; restore R3-R5
POPM R1-R2 ; restore R1-R2
RTE ; return to point of interrupt, restore PSW including IPL
SETPSW U ; User stack
POPM R14-R15 ; Restore R14-R15
POPM R3-R5 ; Restore R3-R5
POPM R1-R2 ; Restore R1-R2
RTE ; Return to point of interrupt, restore PSW including IPL
; }
; else
@@ -151,48 +155,45 @@ __tx_thread_preempt_restore:
; if (_tx_timer_time_slice)
; {
MOV.L #__tx_timer_time_slice, R3 ; Pickup time-slice address
MOV.L [R3],R4 ; Pickup actual time-slice
MOV.L #__tx_timer_time_slice, R3 ; Pickup time-slice address
MOV.L [R3],R4 ; Pickup actual time-slice
CMP #0, R4
BEQ __tx_thread_dont_save_ts ; no time slice to save
BEQ __tx_thread_dont_save_ts ; No time slice to save
;
; _tx_thread_current_ptr -> tx_thread_time_slice = _tx_timer_time_slice;
; _tx_timer_time_slice = 0;
;
MOV.L R4,24[R2] ; Save thread's time slice
MOV.L #0,R4 ; Clear value
MOV.L R4,[R3] ; Disable global time slice flag
MOV.L R4,24[R2] ; Save thread's time slice
MOV.L #0,R4 ; Clear value
MOV.L R4,[R3] ; Disable global time slice flag
; }
__tx_thread_dont_save_ts:
;
; /* Now store the remaining registers! */
SETPSW U ; user stack
SETPSW U ; User stack
PUSHM R6-R13
MVFACHI R5
MVFACMI R6
PUSHM R5-R6
MOV.L #1, R3 ; indicate interrupt stack frame
PUSH.L R3
;
; /* Clear the current task pointer. */
; _tx_thread_current_ptr = TX_NULL;
; R1 -> _tx_thread_current_ptr
; R2 -> *_tx_thread_current_ptr
MOV.L R0,8[R2] ; Save thread's stack pointer in thread control block
MOV.L #0,R2 ; Build NULL value
MOV.L R2,[R1] ; Set current thread to NULL
MOV.L R0,8[R2] ; Save thread's stack pointer in thread control block
MOV.L #0,R2 ; Build NULL value
MOV.L R2,[R1] ; Set current thread to NULL
; /* Return to the scheduler. */
; _tx_thread_schedule();
__tx_thread_idle_system_restore:
MVTC #0, PSW ; reset interrupt priority level to 0
BRA __tx_thread_schedule ; jump to scheduler
MVTC #0, PSW ; Reset interrupt priority level to 0
BRA __tx_thread_schedule ; Jump to scheduler
; }
;
;}

View File

@@ -30,7 +30,7 @@
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_context_save RXv1/GNURX */
;/* 6.1.8 */
;/* 6.1.9 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -62,6 +62,8 @@
;/* DATE NAME DESCRIPTION */
;/* */
;/* 08-02-2021 William E. Lamie Initial Version 6.1.8 */
;/* 10-15-2021 William E. Lamie Modified comment(s), */
;/* resulting in version 6.1.9 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_context_save(VOID)
@@ -83,23 +85,23 @@ __tx_thread_context_save:
; {
;
MOV.L #__tx_thread_system_state, R1 ; pick up address of system state
MOV.L [R1], R2 ; pick up system state
CMP #0, R2 ; 0 -> no nesting
MOV.L #__tx_thread_system_state, R1 ; Pick up address of system state
MOV.L [R1], R2 ; Pick up system state
CMP #0, R2 ; 0 -> no nesting
BEQ __tx_thread_not_nested_save
;
; /* Nested interrupt condition. */
;
ADD #1, r2 ; _tx_thread_system_state++
ADD #1, r2 ; _tx_thread_system_state++
MOV.L r2, [r1]
;
; /* Save the rest of the scratch registers on the interrupt stack and return to the
; calling ISR. */
POP R1 ; recuperate return address from stack
POP R1 ; Recuperate return address from stack
PUSHM R3-R5
PUSHM R14-R15
JMP R1 ; return address was preserved in R1
JMP R1 ; Return address was preserved in R1
;
__tx_thread_not_nested_save:
@@ -109,7 +111,7 @@ __tx_thread_not_nested_save:
; else if (_tx_thread_current_ptr)
; {
;
ADD #1, R2 ; _tx_thread_system_state++
ADD #1, R2 ; _tx_thread_system_state++
MOV.L R2, [R1]
MOV.L #__tx_thread_current_ptr, R2 ; Pickup current thread pointer
@@ -120,25 +122,25 @@ __tx_thread_not_nested_save:
; /* Move stack frame over to the current threads stack. */
; /* complete stack frame with registers not saved yet (R3-R5, R14-R15, FPSW) */
;
MVFC USP, R1 ; pick up user stack pointer
MVFC USP, R1 ; Pick up user stack pointer
MOV.L 16[R0], R2
MOV.L R2, [-R1] ; save PSW on thread stack
MOV.L R2, [-R1] ; Save PSW on thread stack
MOV.L 12[R0], R2
MOV.L R2, [-R1] ; save PC on thread stack
MOV.L R2, [-R1] ; Save PC on thread stack
MOV.L 8[R0], R2
MOV.L R2, [-R1] ; save R2 on thread stack
MOV.L R2, [-R1] ; Save R2 on thread stack
MOV.L 4[R0], R2
MOV.L R2, [-R1] ; save R1 on thread stack
MOV.L R5, [-R1] ; save R5 on thread stack
MOV.L R4, [-R1] ; save R4 on thread stack
MOV.L R3, [-R1] ; save R3 on thread stack
MOV.L R15, [-R1] ; save R15 on thread stack
MOV.L R14, [-R1] ; save R14 on thread stack
MOV.L R2, [-R1] ; Save R1 on thread stack
MOV.L R5, [-R1] ; Save R5 on thread stack
MOV.L R4, [-R1] ; Save R4 on thread stack
MOV.L R3, [-R1] ; Save R3 on thread stack
MOV.L R15, [-R1] ; Save R15 on thread stack
MOV.L R14, [-R1] ; Save R14 on thread stack
POP R2 ; pick up return address from interrupt stack
ADD #16, R0, R0 ; correct interrupt stack pointer back to the bottom
MVTC R1, USP ; set user/thread stack pointer
JMP R2 ; return to ISR
POP R2 ; Pick up return address from interrupt stack
ADD #16, R0, R0 ; Correct interrupt stack pointer back to the bottom
MVTC R1, USP ; Set user/thread stack pointer
JMP R2 ; Return to ISR
; }
; else
@@ -148,11 +150,10 @@ __tx_thread_idle_system_save:
;
; /* Interrupt occurred in the scheduling loop. */
;
POP R1 ; pick up return address
ADD #16, R0, R0 ; correct interrupt stack pointer back to the bottom (PC), don't care about saved registers
JMP R1 ; return to caller
POP R1 ; Pick up return address
ADD #16, R0, R0 ; Correct interrupt stack pointer back to the bottom (PC), don't care about saved registers
JMP R1 ; Return to caller
;
; }
;}
.end

View File

@@ -26,7 +26,7 @@
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_interrupt_control RXv1/GNURX */
;/* 6.1.8 */
;/* 6.1.9 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -57,6 +57,8 @@
;/* DATE NAME DESCRIPTION */
;/* */
;/* 08-02-2021 William E. Lamie Initial Version 6.1.8 */
;/* 10-15-2021 William E. Lamie Modified comment(s), */
;/* resulting in version 6.1.9 */
;/* */
;/**************************************************************************/
;UINT _tx_thread_interrupt_control(UINT new_posture)
@@ -75,13 +77,12 @@ __tx_thread_interrupt_control:
; /* Apply the new interrupt posture. */
;
BTST #16, R1 ; test I bit of PSW of "new posture"
BMNE #16, R2 ; conditionally set I bit of intermediate posture
BTST #16, R1 ; Test I bit of PSW of "new posture"
BMNE #16, R2 ; Conditionally set I bit of intermediate posture
MVTC R2, PSW ; save intermediate posture to PSW
MVTC R2, PSW ; Save intermediate posture to PSW
MOV.L R3,R1 ; Get original SR
RTS ; Return to caller
;}
.end

View File

@@ -31,7 +31,7 @@
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_schedule RXv1/GNURX */
;/* 6.1.8 */
;/* 6.1.9 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -65,6 +65,10 @@
;/* DATE NAME DESCRIPTION */
;/* */
;/* 08-02-2021 William E. Lamie Initial Version 6.1.8 */
;/* 10-15-2021 William E. Lamie Modified comment(s), and */
;/* removed unnecessary stack */
;/* type checking, */
;/* resulting in version 6.1.9 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_schedule(VOID)
@@ -79,11 +83,11 @@ __tx_thread_schedule:
; /* Wait for a thread to execute. */
; do
; {
MOV.L #__tx_thread_execute_ptr, R1 ; Address of thread to executer ptr
MOV.L #__tx_thread_execute_ptr, R1 ; Address of thread to executer ptr
__tx_thread_schedule_loop:
MOV.L [R1],R2 ; Pickup next thread to execute
CMP #0,R2 ; Is it NULL?
BEQ __tx_thread_schedule_loop ; Yes, idle system, keep checking
MOV.L [R1],R2 ; Pickup next thread to execute
CMP #0,R2 ; Is it NULL?
BEQ __tx_thread_schedule_loop ; Yes, idle system, keep checking
;
; }
; while(_tx_thread_execute_ptr == TX_NULL);
@@ -91,55 +95,43 @@ __tx_thread_schedule_loop:
; /* Yes! We have a thread to execute. Lockout interrupts and
; transfer control to it. */
;
CLRPSW I ; disable interrupts
CLRPSW I ; Disable interrupts
;
; /* Setup the current thread pointer. */
; _tx_thread_current_ptr = _tx_thread_execute_ptr;
;
MOV.L #__tx_thread_current_ptr, R3
MOV.L R2,[R3] ; Setup current thread pointer
MOV.L R2,[R3] ; Setup current thread pointer
;
; /* Increment the run count for this thread. */
; _tx_thread_current_ptr -> tx_thread_run_count++;
;
MOV.L 4[R2],R3 ; Pickup run count
ADD #1,R3 ; Increment run counter
MOV.L R3,4[R2] ; Store it back in control block
MOV.L 4[R2],R3 ; Pickup run count
ADD #1,R3 ; Increment run counter
MOV.L R3,4[R2] ; Store it back in control block
;
; /* Setup time-slice, if present. */
; _tx_timer_time_slice = _tx_thread_current_ptr -> tx_thread_time_slice;
;
MOV.L 24[R2],R3 ; Pickup thread time-slice
MOV.L #__tx_timer_time_slice,R4 ; Pickup pointer to time-slice
MOV.L R3, [R4] ; Setup time-slice
MOV.L 24[R2],R3 ; Pickup thread time-slice
MOV.L #__tx_timer_time_slice,R4 ; Pickup pointer to time-slice
MOV.L R3, [R4] ; Setup time-slice
;
; /* Switch to the thread's stack. */
; SP = _tx_thread_execute_ptr -> tx_thread_stack_ptr;
SETPSW U ; user stack mode
MOV.L 8[R2],R0 ; Pickup stack pointer
;
; /* Determine if an interrupt frame or a synchronous task suspension frame
; is present. */
;
POP R1 ; Pickup stack type
CMP #1, R1 ; Is it an interrupt stack?
BNE __tx_thread_synch_return ; No, a synchronous return frame is present.
SETPSW U ; User stack mode
MOV.L 8[R2],R0 ; Pickup stack pointer
POPM R1-R2 ; Restore accumulator.
POPM R1-R2 ; Restore accumulator.
MVTACLO R2
MVTACHI R1
POPM R6-R13 ; Recover interrupt stack frame
POPM R6-R13 ; Recover interrupt stack frame
POPM R14-R15
POPM R3-R5
POPM R1-R2
RTE ; return to point of interrupt, this restores PC and PSW
RTE ; Return to point of interrupt, this restores PC and PSW
__tx_thread_synch_return:
POPC PSW
POPM R6-R13 ; Recover solicited stack frame
RTS
;
;}

View File

@@ -26,7 +26,7 @@
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_stack_build RXv1/GNURX */
;/* 6.1.8 */
;/* 6.1.9 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -59,6 +59,10 @@
;/* DATE NAME DESCRIPTION */
;/* */
;/* 08-02-2021 William E. Lamie Initial Version 6.1.8 */
;/* 10-15-2021 William E. Lamie Modified comment(s), and */
;/* removed unnecessary stack */
;/* type placement, */
;/* resulting in version 6.1.9 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(VOID))
@@ -70,9 +74,7 @@ __tx_thread_stack_build:
; /* Build an interrupt frame. The form of the fake interrupt stack
; on the Renesas RX should look like the following after it is built:
;
; Stack Top: 1 Interrupt stack frame type
; ACC0
; ACC1
; Stack Top: ACC0
; R6
; R7
; R8
@@ -95,43 +97,40 @@ __tx_thread_stack_build:
;
; Stack Bottom: (higher memory address) */
;
MOV.L 16[R1],R3 ; Pickup end of stack area
BCLR #0, R3 ; mask for 4-byte alignment
MOV.L 16[R1],R3 ; Pickup end of stack area
BCLR #0, R3 ; Mask for 4-byte alignment
BCLR #1, R3
;
; /* Build the stack frame. */
;
MOV.L #30000h, R4
MOV.L R4, [-R3] ; initial PSW (SVC mode, U flag set)
MOV.L R2, [-R3] ; initial PC
MOV.L R4, [-R3] ; Initial PSW (SVC mode, U flag set)
MOV.L R2, [-R3] ; Initial PC
MOV.L #0, R4
MOV.L R4,[-R3] ; initial R2 ...
MOV.L R4,[-R3] ; initial R1 ...
MOV.L R4,[-R3] ; initial R5 ...
MOV.L R4,[-R3] ; initial R4 ...
MOV.L R4,[-R3] ; initial R3 ...
MOV.L R4,[-R3] ; initial R15 ...
MOV.L R4,[-R3] ; initial R14 ...
MOV.L R4,[-R3] ; initial R13 ...
MOV.L R4,[-R3] ; initial R12 ...
MOV.L R4,[-R3] ; initial R11 ...
MOV.L R4,[-R3] ; initial R10 ...
MOV.L R4,[-R3] ; initial R9 ...
MOV.L R4,[-R3] ; initial R8 ...
MOV.L R4,[-R3] ; initial R7 ...
MOV.L R4,[-R3] ; initial R6 ...
MOV.L R4,[-R3] ; Initial R2 ...
MOV.L R4,[-R3] ; Initial R1 ...
MOV.L R4,[-R3] ; Initial R5 ...
MOV.L R4,[-R3] ; Initial R4 ...
MOV.L R4,[-R3] ; Initial R3 ...
MOV.L R4,[-R3] ; Initial R15 ...
MOV.L R4,[-R3] ; Initial R14 ...
MOV.L R4,[-R3] ; Initial R13 ...
MOV.L R4,[-R3] ; Initial R12 ...
MOV.L R4,[-R3] ; Initial R11 ...
MOV.L R4,[-R3] ; Initial R10 ...
MOV.L R4,[-R3] ; Initial R9 ...
MOV.L R4,[-R3] ; Initial R8 ...
MOV.L R4,[-R3] ; Initial R7 ...
MOV.L R4,[-R3] ; Initial R6 ...
MOV.L R4,[-R3] ; Accumulator 0
MOV.L R4,[-R3] ; Accumulator 0
MOV.L R4,[-R3]
MOV.L #1, R4
MOV.L R4,[-R3] ; indicate interrupt stack frame
; /* Setup stack pointer. */
; thread_ptr -> tx_thread_stack_ptr = R1;
MOV.L R3, 8[R1]
; store initial SP in thread control block
; Store initial SP in thread control block
RTS
;}
.end

View File

@@ -38,7 +38,7 @@
;/* FUNCTION RELEASE */
;/* */
;/* _tx_timer_interrupt RXv1/GNURX */
;/* 6.1.8 */
;/* 6.1.9 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -75,6 +75,8 @@
;/* DATE NAME DESCRIPTION */
;/* */
;/* 08-02-2021 William E. Lamie Initial Version 6.1.8 */
;/* 10-15-2021 William E. Lamie Modified comment(s), */
;/* resulting in version 6.1.9 */
;/* */
;/**************************************************************************/
;VOID _tx_timer_interrupt(VOID)
@@ -84,7 +86,7 @@ __tx_timer_interrupt:
;
; /* Upon entry to this routine, it is assumed that all interrupts are locked
; out and the stack looks like the following:
; SP+4 -> Interrupted PC
; SP+4 -> Interrupted PC
; SP+8-> Interrupted SR
; */
;
@@ -94,38 +96,38 @@ __tx_timer_interrupt:
PUSHM R14-R15
PUSHM R1-R5
MOV.L #__tx_timer_system_clock, R1 ; Pickup address of system clock
MOV.L [R1], R2 ; Pickup system clock
ADD #1, R2 ; Increment system clock
MOV.L R2,[R1] ; Store new system clock
MOV.L #__tx_timer_system_clock, R1 ; Pickup address of system clock
MOV.L [R1], R2 ; Pickup system clock
ADD #1, R2 ; Increment system clock
MOV.L R2,[R1] ; Store new system clock
;
; /* Test for time-slice expiration. */
; if (_tx_timer_time_slice)
; {
;
MOV.L #__tx_timer_time_slice, R1 ; Pickup address of time slice
MOV.L [R1], R2 ; Pickup the current time slice
CMP #0, R2 ; Is a time slice active?
BEQ __tx_timer_no_time_slice ; No, skip timer slice processing
MOV.L #__tx_timer_time_slice, R1 ; Pickup address of time slice
MOV.L [R1], R2 ; Pickup the current time slice
CMP #0, R2 ; Is a time slice active?
BEQ __tx_timer_no_time_slice ; No, skip timer slice processing
;
; /* Decrement the time_slice. */
; _tx_timer_time_slice--;
;
SUB #1, R2 ; Decrement the time-slice
MOV.L R2, [R1] ; Store time-slice
SUB #1, R2 ; Decrement the time-slice
MOV.L R2, [R1] ; Store time-slice
;
; /* Check for expiration. */
; if (__tx_timer_time_slice == 0)
;
CMP #0, R2 ; Has it expired?
BNE __tx_timer_no_time_slice ; No, time-slice has not expired
CMP #0, R2 ; Has it expired?
BNE __tx_timer_no_time_slice ; No, time-slice has not expired
;
; /* Set the time-slice expired flag. */
; _tx_timer_expired_time_slice = TX_TRUE;
;
MOV.L #__tx_timer_expired_time_slice, R1 ; Pickup address of expired time-slice
MOV.L #1, R2 ; Build expired value
MOV.L R2, [R1] ; Set expired time slice variable
MOV.L #__tx_timer_expired_time_slice, R1 ; Pickup address of expired time-slice
MOV.L #1, R2 ; Build expired value
MOV.L R2, [R1] ; Set expired time slice variable
; }
;
__tx_timer_no_time_slice:
@@ -134,20 +136,20 @@ __tx_timer_no_time_slice:
; if (*_tx_timer_current_ptr)
; {
;
MOV.L #__tx_timer_current_ptr, R1 ; Pickup address of current timer ptr
MOV.L [R1], R2 ; Pickup current pointer
MOV.L [R2+], R1 ; pickup timer list entry, _tx_timer_current_ptr++
CMP #0, R1 ; Is timer pointer NULL?
BEQ __tx_timer_no_timer ; Yes, no timer has expired
MOV.L #__tx_timer_current_ptr, R1 ; Pickup address of current timer ptr
MOV.L [R1], R2 ; Pickup current pointer
MOV.L [R2+], R1 ; pickup timer list entry, _tx_timer_current_ptr++
CMP #0, R1 ; Is timer pointer NULL?
BEQ __tx_timer_no_timer ; Yes, no timer has expired
;
; /* Set expiration flag. */
; _tx_timer_expired = TX_TRUE;
;
MOV.L #__tx_timer_expired,R2 ; Build address of expired flag
MOV.L #1, R1 ; Build expired value
MOV.L #__tx_timer_expired,R2 ; Build address of expired flag
MOV.L #1, R1 ; Build expired value
MOV.L R1, [R2]
BRA __tx_timer_done ; Finished with timer processing
BRA __tx_timer_done ; Finished with timer processing
;
; }
; else
@@ -162,22 +164,22 @@ __tx_timer_no_timer:
; /* Check for wrap-around. */
; if (_tx_timer_current_ptr == _tx_timer_list_end)
;
MOV.L #__tx_timer_list_end, R1 ; Pickup the timer list end ptr
MOV.L [R1], R1 ; Pickup actual timer list end
CMP R1, R2 ; Are we at list end?
BNE __tx_timer_skip_wrap ; No, don't move pointer to the
; top of the list
MOV.L #__tx_timer_list_end, R1 ; Pickup the timer list end ptr
MOV.L [R1], R1 ; Pickup actual timer list end
CMP R1, R2 ; Are we at list end?
BNE __tx_timer_skip_wrap ; No, don't move pointer to the
; top of the list
;
; /* Wrap to beginning of list. */
; _tx_timer_current_ptr = _tx_timer_list_start;
;
MOV.L #__tx_timer_list_start, R2 ; Pickup the timer list start ptr
MOV.L [R2], R2 ; Pickup the start of the list
MOV.L #__tx_timer_list_start, R2 ; Pickup the timer list start ptr
MOV.L [R2], R2 ; Pickup the start of the list
; }
;
__tx_timer_skip_wrap:
MOV.L #__tx_timer_current_ptr,R1
MOV.L R2, [R1] ; store in updated pointer in _tx_timer_current_ptr
MOV.L R2, [R1] ; Store in updated pointer in _tx_timer_current_ptr
__tx_timer_done:
;
@@ -186,25 +188,25 @@ __tx_timer_done:
; {
;
MOV.L #__tx_timer_expired_time_slice, R1 ; Pickup expired time slice addr
MOV.L [R1], R1 ; Pickup expired time slice
MOV.L #__tx_timer_expired, R2 ; Pickup expired timer flag address
MOV.L [R2], R2 ; Pickup actual flag
OR R1, R2 ; Or flags together
BEQ __tx_timer_nothing_expired ; If Z set, nothing has expired
MOV.L [R1], R1 ; Pickup expired time slice
MOV.L #__tx_timer_expired, R2 ; Pickup expired timer flag address
MOV.L [R2], R2 ; Pickup actual flag
OR R1, R2 ; Or flags together
BEQ __tx_timer_nothing_expired ; If Z set, nothing has expired
__tx_something_expired:
; /* Did a timer expire? */
; if (_tx_timer_expired)
; {
MOV.L #__tx_timer_expired,R1 ; Pickup expired flag address
MOV.L [R1], R1 ; Pickup expired flag
CMP #0,R1 ; Is the expired timer flag set?
BEQ __tx_timer_dont_activate ; No, skip timer activation
MOV.L #__tx_timer_expired,R1 ; Pickup expired flag address
MOV.L [R1], R1 ; Pickup expired flag
CMP #0,R1 ; Is the expired timer flag set?
BEQ __tx_timer_dont_activate ; No, skip timer activation
;
; /* Process timer expiration. */
; _tx_timer_expiration_process();
;
BSR __tx_timer_expiration_process ; Call the timer expiration handling routine
BSR __tx_timer_expiration_process ; Call the timer expiration handling routine
;
; }
__tx_timer_dont_activate:
@@ -214,14 +216,14 @@ __tx_timer_dont_activate:
; {
;
MOV.L #__tx_timer_expired_time_slice, R1 ; Pickup time-slice expired flag addr
MOV.L [R1], R1 ; Pickup actual flag
CMP #0,R1 ; Has time-slice expired?
BEQ __tx_timer_not_ts_expiration ; No, skip time-slice expiration
MOV.L [R1], R1 ; Pickup actual flag
CMP #0,R1 ; Has time-slice expired?
BEQ __tx_timer_not_ts_expiration ; No, skip time-slice expiration
;
; /* Time slice interrupted thread. */
; _tx_thread_time_slice();
BSR __tx_thread_time_slice ; Call time-slice processing
BSR __tx_thread_time_slice ; Call time-slice processing
; }
;
__tx_timer_not_ts_expiration:
@@ -231,9 +233,8 @@ __tx_timer_nothing_expired:
POPM R1-R5
POPM R14-R15
;
RTS ; return to point of interrupt
RTS ; Return to point of interrupt
;
;}
.end