Release 6.1.5

ports_module/cortex_m33/gnu/example_build/gcc_setup.s

@@ -0,0 +1,127 @@
+
+    .text
+    .align 4
+    .syntax unified
+
+    .global _gcc_setup
+    .thumb_func
+_gcc_setup:
+
+    STMDB   sp!, {r3, r4, r5, r6, r7, lr}             // Store other preserved registers
+
+    ldr     r3, =__FLASH_segment_start__
+    ldr     r4, =__RAM_segment_start__
+    mov     r5,r0
+
+    /* Copy GOT table. */
+  
+    ldr     r0, =__got_load_start__
+    sub     r0,r0,r3
+    add     r0,r0,r5
+    ldr     r1, =__new_got_start__
+    sub     r1,r1, r4
+    add     r1,r1,r9
+    ldr     r2, =__new_got_end__
+    sub     r2,r2,r4
+    add     r2,r2,r9
+
+new_got_setup:
+    cmp     r1, r2          // See if there are more GOT entries
+    beq     got_setup_done  // No, done with GOT setup
+    ldr     r6, [r0]        // Pickup current GOT entry
+    cmp     r6, #0          // Is it 0?
+    beq     address_built   // Yes, just skip the adjustment
+    cmp     r6, r4          // Is it in the code or data area?
+    blt     flash_area      // If less than, it is a code address
+    sub     r6, r6, r4      // Compute offset of data area
+    add     r6, r6, r9      // Build address based on the loaded data address
+    b       address_built   // Finished building address
+flash_area:
+    sub     r6, r6, r3      // Compute offset of code area
+    add     r6, r6, r5      // Build address based on the loaded code address
+address_built:
+    str     r6, [r1]        // Store in new GOT table
+    add     r0, r0, #4      // Move to next entry
+    add     r1, r1, #4      // 
+    b       new_got_setup   // Continue at the top of the loop
+got_setup_done:
+
+
+    /* Copy initialised sections into RAM if required. */
+  
+    ldr     r0, =__data_load_start__
+    sub     r0,r0,r3
+    add     r0,r0,r5
+    ldr     r1, =__data_start__
+    sub     r1,r1, r4
+    add     r1,r1,r9
+    ldr     r2, =__data_end__
+    sub     r2,r2,r4
+    add     r2,r2,r9
+    bl      crt0_memory_copy
+  
+    /* Zero bss. */
+    
+    ldr     r0, =__bss_start__
+    sub     r0,r0,r4
+    add     r0,r0,r9
+    ldr     r1, =__bss_end__
+    sub     r1,r1,r4
+    add     r1,r1,r9
+    mov     r2, #0
+    bl      crt0_memory_set
+
+
+    /* Setup heap - not recommended for Threadx but here for compatibility reasons */
+
+    ldr     r0, =__heap_start__
+    sub     r0,r0,r4
+    add     r0,r0,r9
+    ldr     r1, =__heap_end__
+    sub     r1,r1,r4
+    add     r1,r1,r9
+    sub     r1,r1,r0
+    mov     r2, #0
+    str     r2, [r0]
+    add     r0, r0, #4
+    str     r1, [r0]
+    
+    LDMIA   sp!, {r3, r4, r5, r6, r7, lr}       // Store other preserved registers
+    bx      lr                                  // Return to caller
+  
+    .align 4
+
+  /* Startup helper functions. */
+
+    .thumb_func
+crt0_memory_copy:
+
+    cmp     r0, r1
+    beq     memory_copy_done
+    cmp     r2, r1
+    beq     memory_copy_done
+    sub     r2, r2, r1
+memory_copy_loop:
+    ldrb    r3, [r0]
+    add     r0, r0, #1
+    strb    r3, [r1]
+    add     r1, r1, #1
+    sub     r2, r2, #1
+    cmp     r2, #0
+    bne     memory_copy_loop
+memory_copy_done:
+    bx      lr
+
+    .thumb_func
+crt0_memory_set:
+    cmp     r0, r1
+    beq     memory_set_done
+    strb    r2, [r0]
+    add     r0, r0, #1
+    b       crt0_memory_set
+memory_set_done:
+    bx      lr
+
+    /* Setup attibutes of heap section so it doesn't take up room in the elf file */
+    .section .heap, "wa", %nobits
+  

ports_module/cortex_m33/gnu/example_build/sample_threadx_module.c

@@ -0,0 +1,428 @@
+/* This is a small demo of the high-performance ThreadX kernel running as a module. It includes 
+   examples of eight threads of different priorities, using a message queue, semaphore, mutex, 
+   event flags group, byte pool, and block pool.  */
+
+/* Specify that this is a module!  */
+
+#define TXM_MODULE
+
+
+/* Include the ThreadX module definitions.  */
+
+#include "txm_module.h"
+
+
+/* Define constants.  */
+
+#define DEMO_STACK_SIZE         512
+#define DEMO_BYTE_POOL_SIZE     6000
+#define DEMO_BLOCK_POOL_SIZE    100
+#define DEMO_QUEUE_SIZE         100
+
+
+/* Define the pool space in the bss section of the module. ULONG is used to 
+   get the word alignment.  */
+
+ULONG                   demo_module_pool_space[DEMO_BYTE_POOL_SIZE / 4];
+
+
+/* Define the ThreadX object control blocks...  */
+
+TX_THREAD               *thread_0;
+TX_THREAD               *thread_1;
+TX_THREAD               *thread_2;
+TX_THREAD               *thread_3;
+TX_THREAD               *thread_4;
+TX_THREAD               *thread_5;
+TX_THREAD               *thread_6;
+TX_THREAD               *thread_7;
+TX_QUEUE                *queue_0;
+TX_SEMAPHORE            *semaphore_0;
+TX_MUTEX                *mutex_0;
+TX_EVENT_FLAGS_GROUP    *event_flags_0;
+TX_BYTE_POOL            *byte_pool_0;
+TX_BLOCK_POOL           *block_pool_0;
+
+
+/* Define the counters used in the demo application...  */
+
+ULONG           thread_0_counter;
+ULONG           thread_1_counter;
+ULONG           thread_1_messages_sent;
+ULONG           thread_2_counter;
+ULONG           thread_2_messages_received;
+ULONG           thread_3_counter;
+ULONG           thread_4_counter;
+ULONG           thread_5_counter;
+ULONG           thread_6_counter;
+ULONG           thread_7_counter;
+ULONG           semaphore_0_puts;
+ULONG           event_0_sets;
+ULONG           queue_0_sends;
+
+/* Define thread prototypes.  */
+
+void    thread_0_entry(ULONG thread_input);
+void    thread_1_entry(ULONG thread_input);
+void    thread_2_entry(ULONG thread_input);
+void    thread_3_and_4_entry(ULONG thread_input);
+void    thread_5_entry(ULONG thread_input);
+void    thread_6_and_7_entry(ULONG thread_input);
+
+void  semaphore_0_notify(TX_SEMAPHORE *semaphore_ptr)
+{
+
+    if (semaphore_ptr == semaphore_0)
+        semaphore_0_puts++;
+}
+
+
+void  event_0_notify(TX_EVENT_FLAGS_GROUP *event_flag_group_ptr)
+{
+
+    if (event_flag_group_ptr == event_flags_0)
+        event_0_sets++;
+}
+
+
+void  queue_0_notify(TX_QUEUE *queue_ptr)
+{
+
+    if (queue_ptr == queue_0)
+        queue_0_sends++;
+}
+
+
+/* Define the module start function.  */
+
+void    demo_module_start(ULONG id)
+{
+
+CHAR    *pointer;
+
+    /* Allocate all the objects. In MPU mode, modules cannot allocate control blocks within
+       their own memory area so they cannot corrupt the resident portion of ThreadX by overwriting 
+       the control block(s).  */
+    txm_module_object_allocate((void*)&thread_0, sizeof(TX_THREAD));
+    txm_module_object_allocate((void*)&thread_1, sizeof(TX_THREAD));
+    txm_module_object_allocate((void*)&thread_2, sizeof(TX_THREAD));
+    txm_module_object_allocate((void*)&thread_3, sizeof(TX_THREAD));
+    txm_module_object_allocate((void*)&thread_4, sizeof(TX_THREAD));
+    txm_module_object_allocate((void*)&thread_5, sizeof(TX_THREAD));
+    txm_module_object_allocate((void*)&thread_6, sizeof(TX_THREAD));
+    txm_module_object_allocate((void*)&thread_7, sizeof(TX_THREAD));
+    txm_module_object_allocate((void*)&queue_0, sizeof(TX_QUEUE));
+    txm_module_object_allocate((void*)&semaphore_0, sizeof(TX_SEMAPHORE));
+    txm_module_object_allocate((void*)&mutex_0, sizeof(TX_MUTEX));
+    txm_module_object_allocate((void*)&event_flags_0, sizeof(TX_EVENT_FLAGS_GROUP));
+    txm_module_object_allocate((void*)&byte_pool_0, sizeof(TX_BYTE_POOL));
+    txm_module_object_allocate((void*)&block_pool_0, sizeof(TX_BLOCK_POOL));
+                               
+
+    /* Create a byte memory pool from which to allocate the thread stacks.  */
+    tx_byte_pool_create(byte_pool_0, "module byte pool 0", (UCHAR*)demo_module_pool_space, DEMO_BYTE_POOL_SIZE);
+
+    /* Put system definition stuff in here, e.g. thread creates and other assorted
+       create information.  */
+
+    /* Allocate the stack for thread 0.  */
+    tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
+
+    /* Create the main thread.  */
+    tx_thread_create(thread_0, "module thread 0", thread_0_entry, 0,  
+            pointer, DEMO_STACK_SIZE, 
+            1, 1, TX_NO_TIME_SLICE, TX_AUTO_START);
+
+
+    /* Allocate the stack for thread 1.  */
+    tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
+
+    /* Create threads 1 and 2. These threads pass information through a ThreadX 
+       message queue.  It is also interesting to note that these threads have a time
+       slice.  */
+    tx_thread_create(thread_1, "module thread 1", thread_1_entry, 1,  
+            pointer, DEMO_STACK_SIZE, 
+            16, 16, 4, TX_AUTO_START);
+
+    /* Allocate the stack for thread 2.  */
+    tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
+
+    tx_thread_create(thread_2, "module thread 2", thread_2_entry, 2,  
+            pointer, DEMO_STACK_SIZE, 
+            16, 16, 4, TX_AUTO_START);
+
+    /* Allocate the stack for thread 3.  */
+    tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
+
+    /* Create threads 3 and 4.  These threads compete for a ThreadX counting semaphore.  
+       An interesting thing here is that both threads share the same instruction area.  */
+    tx_thread_create(thread_3, "module thread 3", thread_3_and_4_entry, 3,  
+            pointer, DEMO_STACK_SIZE, 
+            8, 8, TX_NO_TIME_SLICE, TX_AUTO_START);
+
+    /* Allocate the stack for thread 4.  */
+    tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
+
+    tx_thread_create(thread_4, "module thread 4", thread_3_and_4_entry, 4,  
+            pointer, DEMO_STACK_SIZE, 
+            8, 8, TX_NO_TIME_SLICE, TX_AUTO_START);
+
+    /* Allocate the stack for thread 5.  */
+    tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
+
+    /* Create thread 5.  This thread simply pends on an event flag which will be set
+       by thread_0.  */
+    tx_thread_create(thread_5, "module thread 5", thread_5_entry, 5,  
+            pointer, DEMO_STACK_SIZE, 
+            4, 4, TX_NO_TIME_SLICE, TX_AUTO_START);
+
+    /* Allocate the stack for thread 6.  */
+    tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
+
+    /* Create threads 6 and 7.  These threads compete for a ThreadX mutex.  */
+    tx_thread_create(thread_6, "module thread 6", thread_6_and_7_entry, 6,  
+            pointer, DEMO_STACK_SIZE, 
+            8, 8, TX_NO_TIME_SLICE, TX_AUTO_START);
+
+    /* Allocate the stack for thread 7.  */
+    tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
+
+    tx_thread_create(thread_7, "module thread 7", thread_6_and_7_entry, 7,  
+            pointer, DEMO_STACK_SIZE, 
+            8, 8, TX_NO_TIME_SLICE, TX_AUTO_START);
+
+    /* Allocate the message queue.  */
+    tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_QUEUE_SIZE*sizeof(ULONG), TX_NO_WAIT);
+
+    /* Create the message queue shared by threads 1 and 2.  */
+    tx_queue_create(queue_0, "module queue 0", TX_1_ULONG, pointer, DEMO_QUEUE_SIZE*sizeof(ULONG));
+
+    tx_queue_send_notify(queue_0, queue_0_notify);
+
+    /* Create the semaphore used by threads 3 and 4.  */
+    tx_semaphore_create(semaphore_0, "module semaphore 0", 1);
+
+    tx_semaphore_put_notify(semaphore_0, semaphore_0_notify);
+
+    /* Create the event flags group used by threads 1 and 5.  */
+    tx_event_flags_create(event_flags_0, "module event flags 0");
+
+    tx_event_flags_set_notify(event_flags_0, event_0_notify);
+
+    /* Create the mutex used by thread 6 and 7 without priority inheritance.  */
+    tx_mutex_create(mutex_0, "module mutex 0", TX_NO_INHERIT);
+
+    /* Allocate the memory for a small block pool.  */
+    tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_BLOCK_POOL_SIZE, TX_NO_WAIT);
+
+    /* Create a block memory pool to allocate a message buffer from.  */
+    tx_block_pool_create(block_pool_0, "module block pool 0", sizeof(ULONG), pointer, DEMO_BLOCK_POOL_SIZE);
+
+    /* Allocate a block and release the block memory.  */
+    tx_block_allocate(block_pool_0, (VOID **) &pointer, TX_NO_WAIT);
+
+    /* Release the block back to the pool.  */
+    tx_block_release(pointer);
+}
+
+
+/* Define the test threads.  */
+
+void    thread_0_entry(ULONG thread_input)
+{
+
+UINT    status;
+
+    
+    /* This thread simply sits in while-forever-sleep loop.  */
+    while(1)
+    {
+
+        /* Increment the thread counter.  */
+        thread_0_counter++;
+
+        /* Sleep for 10 ticks.  */
+        tx_thread_sleep(10);
+       
+        /* Set event flag 0 to wakeup thread 5.  */
+        status =  tx_event_flags_set(event_flags_0, 0x1, TX_OR);
+
+        /* Check status.  */
+        if (status != TX_SUCCESS)
+            break;
+    }
+}
+
+
+void    thread_1_entry(ULONG thread_input)
+{
+
+UINT    status;
+
+
+    /* This thread simply sends messages to a queue shared by thread 2.  */
+    while(1)
+    {
+
+        /* Increment the thread counter.  */
+        thread_1_counter++;
+
+        /* Send message to queue 0.  */
+        status =  tx_queue_send(queue_0, &thread_1_messages_sent, TX_WAIT_FOREVER);
+
+        /* Check completion status.  */
+        if (status != TX_SUCCESS)
+            break;
+
+        /* Increment the message sent.  */
+        thread_1_messages_sent++;
+    }
+}
+
+
+void    thread_2_entry(ULONG thread_input)
+{
+
+ULONG   received_message;
+UINT    status;
+
+    /* This thread retrieves messages placed on the queue by thread 1.  */
+    while(1)
+    {
+        /* Test memory handler.  */
+        *(ULONG *)0x20010000 = 0xCDCDCDCD;
+        
+        
+        /* Increment the thread counter.  */
+        thread_2_counter++;
+
+        /* Retrieve a message from the queue.  */
+        status = tx_queue_receive(queue_0, &received_message, TX_WAIT_FOREVER);
+
+        /* Check completion status and make sure the message is what we 
+           expected.  */
+        if ((status != TX_SUCCESS) || (received_message != thread_2_messages_received))
+            break;
+        
+        /* Otherwise, all is okay.  Increment the received message count.  */
+        thread_2_messages_received++;
+    }
+}
+
+
+void    thread_3_and_4_entry(ULONG thread_input)
+{
+
+UINT    status;
+
+
+    /* This function is executed from thread 3 and thread 4.  As the loop
+       below shows, these function compete for ownership of semaphore_0.  */
+    while(1)
+    {
+
+        /* Increment the thread counter.  */
+        if (thread_input == 3)
+            thread_3_counter++;
+        else
+            thread_4_counter++;
+
+        /* Get the semaphore with suspension.  */
+        status =  tx_semaphore_get(semaphore_0, TX_WAIT_FOREVER);
+
+        /* Check status.  */
+        if (status != TX_SUCCESS)
+            break;
+
+        /* Sleep for 2 ticks to hold the semaphore.  */
+        tx_thread_sleep(2);
+
+        /* Release the semaphore.  */
+        status =  tx_semaphore_put(semaphore_0);
+
+        /* Check status.  */
+        if (status != TX_SUCCESS)
+            break;
+    }
+}
+
+
+void    thread_5_entry(ULONG thread_input)
+{
+
+UINT    status;
+ULONG   actual_flags;
+
+
+    /* This thread simply waits for an event in a forever loop.  */
+    while(1)
+    {
+
+        /* Increment the thread counter.  */
+        thread_5_counter++;
+
+        /* Wait for event flag 0.  */
+        status =  tx_event_flags_get(event_flags_0, 0x1, TX_OR_CLEAR, 
+                                                &actual_flags, TX_WAIT_FOREVER);
+
+        /* Check status.  */
+        if ((status != TX_SUCCESS) || (actual_flags != 0x1))
+            break;
+    }
+}
+
+
+void    thread_6_and_7_entry(ULONG thread_input)
+{
+
+UINT    status;
+
+
+    /* This function is executed from thread 6 and thread 7.  As the loop
+       below shows, these function compete for ownership of mutex_0.  */
+    while(1)
+    {
+
+        /* Increment the thread counter.  */
+        if (thread_input == 6)
+            thread_6_counter++;
+        else
+            thread_7_counter++;
+
+        /* Get the mutex with suspension.  */
+        status =  tx_mutex_get(mutex_0, TX_WAIT_FOREVER);
+
+        /* Check status.  */
+        if (status != TX_SUCCESS)
+            break;
+
+        /* Get the mutex again with suspension.  This shows
+           that an owning thread may retrieve the mutex it
+           owns multiple times.  */
+        status =  tx_mutex_get(mutex_0, TX_WAIT_FOREVER);
+
+        /* Check status.  */
+        if (status != TX_SUCCESS)
+            break;
+
+        /* Sleep for 2 ticks to hold the mutex.  */
+        tx_thread_sleep(2);
+
+        /* Release the mutex.  */
+        status =  tx_mutex_put(mutex_0);
+
+        /* Check status.  */
+        if (status != TX_SUCCESS)
+            break;
+
+        /* Release the mutex again.  This will actually 
+           release ownership since it was obtained twice.  */
+        status =  tx_mutex_put(mutex_0);
+
+        /* Check status.  */
+        if (status != TX_SUCCESS)
+            break;
+    }
+}
+
+

ports_module/cortex_m33/gnu/example_build/sample_threadx_module_manager.c

@@ -0,0 +1,109 @@
+/* Small demonstration of the ThreadX module manager.  */
+
+#include "tx_api.h"
+#include "txm_module.h"
+
+
+#define DEMO_STACK_SIZE         1024
+
+/* Define the ThreadX object control blocks...  */
+
+TX_THREAD               module_manager;
+TXM_MODULE_INSTANCE     my_module;
+
+
+/* Define the object pool area.  */
+
+UCHAR                   object_memory[16384];
+UCHAR                   module_ram[32768];
+
+/* Define the count of memory faults.  */
+
+ULONG                   memory_faults;
+
+
+/* Define thread prototypes.  */
+
+void    module_manager_entry(ULONG thread_input);
+
+
+/* Define fault handler.  */
+
+VOID module_fault_handler(TX_THREAD *thread, TXM_MODULE_INSTANCE *module)
+{
+
+    /* Just increment the fault counter.   */
+    memory_faults++;
+}
+
+/* Define main entry point.  */
+
+int main()
+{
+
+    /* Enter the ThreadX kernel.  */
+    tx_kernel_enter();
+}
+
+
+/* Define what the initial system looks like.  */
+
+void    tx_application_define(void *first_unused_memory)
+{
+
+CHAR    *pointer = (CHAR*)first_unused_memory;
+
+
+    tx_thread_create(&module_manager, "Module Manager Thread", module_manager_entry, 0,  
+                     pointer, DEMO_STACK_SIZE, 
+                     1, 1, TX_NO_TIME_SLICE, TX_AUTO_START);
+    pointer =  pointer + DEMO_STACK_SIZE;
+}
+
+
+
+
+/* Define the test threads.  */
+
+void    module_manager_entry(ULONG thread_input)
+{
+
+    /* Initialize the module manager.   */
+    txm_module_manager_initialize((VOID *) module_ram, 32768);
+
+    txm_module_manager_object_pool_create(object_memory, sizeof(object_memory));
+
+    /* Register a fault handler.  */
+    txm_module_manager_memory_fault_notify(module_fault_handler);
+    
+    /* Load the module that is already there, in this example it is placed there by the multiple image download.  */
+    txm_module_manager_memory_load(&my_module, "my module", (VOID *) 0x00030000);
+    
+    /* Enable 128 byte read/write shared memory region at 0x20010000.  */
+    txm_module_manager_external_memory_enable(&my_module, (void *) 0x20010000, 128, TXM_MODULE_ATTRIBUTE_READ_WRITE);
+    
+    /* Start the module.  */
+    txm_module_manager_start(&my_module);
+
+    /* Sleep for a while....  */
+    tx_thread_sleep(1000);
+    
+    /* Stop the module.  */
+    txm_module_manager_stop(&my_module);
+    
+    /* Unload the module.  */
+    txm_module_manager_unload(&my_module);
+
+    /* Load the module that is already there.  */
+    txm_module_manager_in_place_load(&my_module, "my module", (VOID *) 0x00030000);
+
+    /* Start the module again.  */
+    txm_module_manager_start(&my_module);
+    
+    /* Now just spin...  */
+    while(1)
+    {
+    
+        tx_thread_sleep(100);
+    }
+}

ports_module/cortex_m33/gnu/example_build/txm_module_preamble.S

@@ -0,0 +1,58 @@
+    .text
+    .align 4
+    .syntax unified
+
+    /* Define public symbols.  */
+    .global __txm_module_preamble
+
+    /* Define application-specific start/stop entry points for the module.  */
+    .global demo_module_start
+
+    /* Define common external refrences.  */
+    .global _txm_module_thread_shell_entry
+    .global _txm_module_callback_request_thread_entry
+
+__txm_module_preamble:
+    .dc.l      0x4D4F4455                                       // Module ID
+    .dc.l      0x6                                              // Module Major Version
+    .dc.l      0x1                                              // Module Minor Version
+    .dc.l      32                                               // Module Preamble Size in 32-bit words
+    .dc.l      0x12345678                                       // Module ID (application defined)
+    .dc.l      0x02000007                                       // Module Properties where:
+                                                                //   Bits 31-24: Compiler ID
+                                                                //           0 -> IAR
+                                                                //           1 -> ARM
+                                                                //           2 -> GNU
+                                                                //   Bits 23-3: Reserved
+                                                                //   Bit 2:  0 -> Disable shared/external memory access
+                                                                //           1 -> Enable shared/external memory access
+                                                                //   Bit 1:  0 -> No MPU protection
+                                                                //           1 -> MPU protection (must have user mode selected - bit 0 set)
+                                                                //   Bit 0:  0 -> Privileged mode execution
+                                                                //           1 -> User mode execution
+    .dc.l      _txm_module_thread_shell_entry - . - 0           // Module Shell Entry Point
+    .dc.l      demo_module_start - . - 0                        // Module Start Thread Entry Point
+    .dc.l      0                                                // Module Stop Thread Entry Point 
+    .dc.l      1                                                // Module Start/Stop Thread Priority
+    .dc.l      1024                                             // Module Start/Stop Thread Stack Size
+    .dc.l      _txm_module_callback_request_thread_entry - . - 0 // Module Callback Thread Entry
+    .dc.l      1                                                // Module Callback Thread Priority
+    .dc.l      1024                                             // Module Callback Thread Stack Size
+    .dc.l      __code_size__                                    // Module Code Size
+    .dc.l      __data_size__                                    // Module Data Size
+    .dc.l      0                                                // Reserved 0
+    .dc.l      0                                                // Reserved 1
+    .dc.l      0                                                // Reserved 2
+    .dc.l      0                                                // Reserved 3
+    .dc.l      0                                                // Reserved 4
+    .dc.l      0                                                // Reserved 5
+    .dc.l      0                                                // Reserved 6
+    .dc.l      0                                                // Reserved 7
+    .dc.l      0                                                // Reserved 8
+    .dc.l      0                                                // Reserved 9
+    .dc.l      0                                                // Reserved 10
+    .dc.l      0                                                // Reserved 11
+    .dc.l      0                                                // Reserved 12
+    .dc.l      0                                                // Reserved 13
+    .dc.l      0                                                // Reserved 14
+    .dc.l      0                                                // Reserved 15

ports_module/cortex_m33/gnu/inc/tx_port.h

@@ -0,0 +1,708 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Port Specific                                                       */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+
+/**************************************************************************/
+/*                                                                        */
+/*  PORT SPECIFIC C INFORMATION                            RELEASE        */
+/*                                                                        */
+/*    tx_port.h                                            ARMv8-M        */
+/*                                                           6.1.5        */
+/*                                                                        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This file contains data type definitions that make the ThreadX      */
+/*    real-time kernel function identically on a variety of different     */
+/*    processor architectures.  For example, the size or number of bits   */
+/*    in an "int" data type vary between microprocessor architectures and */
+/*    even C compilers for the same microprocessor.  ThreadX does not     */
+/*    directly use native C data types.  Instead, ThreadX creates its     */
+/*    own special types that can be mapped to actual data types by this   */
+/*    file to guarantee consistency in the interface and functionality.   */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  03-02-2021      Scott Larson            Initial Version 6.1.5         */
+/*                                                                        */
+/**************************************************************************/
+
+#ifndef TX_PORT_H
+#define TX_PORT_H
+
+
+/* Determine if the optional ThreadX user define file should be used.  */
+
+#ifdef TX_INCLUDE_USER_DEFINE_FILE
+
+/* Yes, include the user defines in tx_user.h. The defines in this file may
+   alternately be defined on the command line.  */
+
+#include "tx_user.h"
+#endif
+
+
+/* Define compiler library include files.  */
+
+#include <stdlib.h>
+#include <string.h>
+
+#ifdef __ICCARM__
+#include <intrinsics.h>                     /* IAR Intrinsics */
+#define __asm__ __asm                       /* Define to make all inline asm look similar */
+#ifdef  TX_ENABLE_IAR_LIBRARY_SUPPORT
+#include <yvals.h>
+#endif
+#endif /* __ICCARM__ */
+
+
+/* Define ThreadX basic types for this port.  */
+
+#define VOID                                    void
+typedef char                                    CHAR;
+typedef unsigned char                           UCHAR;
+typedef int                                     INT;
+typedef unsigned int                            UINT;
+typedef long                                    LONG;
+typedef unsigned long                           ULONG;
+typedef unsigned long long                      ULONG64;
+typedef short                                   SHORT;
+typedef unsigned short                          USHORT;
+#define ULONG64_DEFINED
+
+/* Function prototypes for this port. */
+struct  TX_THREAD_STRUCT;
+UINT    _txe_thread_secure_stack_allocate(struct TX_THREAD_STRUCT *thread_ptr, ULONG stack_size);
+UINT    _txe_thread_secure_stack_free(struct TX_THREAD_STRUCT *thread_ptr);
+UINT    _tx_thread_secure_stack_allocate(struct TX_THREAD_STRUCT *tx_thread, ULONG stack_size);
+UINT    _tx_thread_secure_stack_free(struct TX_THREAD_STRUCT *tx_thread);
+
+/* This hardware has stack checking that we take advantage of - do NOT define. */
+#ifdef TX_ENABLE_STACK_CHECKING
+    #error "Do not define TX_ENABLE_STACK_CHECKING"
+#endif
+
+/* If user does not want to terminate thread on stack overflow, 
+   #define the TX_THREAD_NO_TERMINATE_STACK_ERROR symbol.
+   The thread will be rescheduled and continue to cause the exception.
+   It is suggested user code handle this by registering a notification with the
+   tx_thread_stack_error_notify function. */
+/*#define TX_THREAD_NO_TERMINATE_STACK_ERROR */
+
+/* Define the system API mappings based on the error checking 
+   selected by the user.  Note: this section is only applicable to 
+   application source code, hence the conditional that turns off this
+   stuff when the include file is processed by the ThreadX source. */
+
+#ifndef TX_SOURCE_CODE
+
+
+/* Determine if error checking is desired.  If so, map API functions 
+   to the appropriate error checking front-ends.  Otherwise, map API
+   functions to the core functions that actually perform the work. 
+   Note: error checking is enabled by default.  */
+
+#ifdef TX_DISABLE_ERROR_CHECKING
+
+/* Services without error checking.  */
+
+#define tx_thread_secure_stack_allocate   _tx_thread_secure_stack_allocate
+#define tx_thread_secure_stack_free       _tx_thread_secure_stack_free
+
+#else
+
+/* Services with error checking.  */
+
+#define tx_thread_secure_stack_allocate   _txe_thread_secure_stack_allocate
+#define tx_thread_secure_stack_free       _txe_thread_secure_stack_free
+
+#endif
+#endif
+
+
+
+/* Define the priority levels for ThreadX.  Legal values range
+   from 32 to 1024 and MUST be evenly divisible by 32.  */
+
+#ifndef TX_MAX_PRIORITIES
+#define TX_MAX_PRIORITIES                       32
+#endif
+
+
+/* Define the minimum stack for a ThreadX thread on this processor. If the size supplied during
+   thread creation is less than this value, the thread create call will return an error.  */
+
+#ifndef TX_MINIMUM_STACK
+#define TX_MINIMUM_STACK                        200         /* Minimum stack size for this port  */
+#endif
+
+
+/* Define the system timer thread's default stack size and priority.  These are only applicable
+   if TX_TIMER_PROCESS_IN_ISR is not defined.  */
+
+#ifndef TX_TIMER_THREAD_STACK_SIZE
+#define TX_TIMER_THREAD_STACK_SIZE              1024        /* Default timer thread stack size  */
+#endif
+
+#ifndef TX_TIMER_THREAD_PRIORITY
+#define TX_TIMER_THREAD_PRIORITY                0           /* Default timer thread priority    */
+#endif
+
+
+/* Define various constants for the ThreadX Cortex-M port.  */
+
+#define TX_INT_DISABLE                          1           /* Disable interrupts               */
+#define TX_INT_ENABLE                           0           /* Enable interrupts                */
+
+
+/* Define the clock source for trace event entry time stamp. The following two item are port specific.
+   For example, if the time source is at the address 0x0a800024 and is 16-bits in size, the clock
+   source constants would be:
+
+#define TX_TRACE_TIME_SOURCE                    *((ULONG *) 0x0a800024)
+#define TX_TRACE_TIME_MASK                      0x0000FFFFUL
+
+*/
+
+#ifndef TX_MISRA_ENABLE
+#ifndef TX_TRACE_TIME_SOURCE
+#define TX_TRACE_TIME_SOURCE                    *((ULONG *) 0xE0001004)
+#endif
+#else
+ULONG   _tx_misra_time_stamp_get(VOID);
+#define TX_TRACE_TIME_SOURCE                    _tx_misra_time_stamp_get()
+#endif
+
+#ifndef TX_TRACE_TIME_MASK
+#define TX_TRACE_TIME_MASK                      0xFFFFFFFFUL
+#endif
+
+
+/* Define the port specific options for the _tx_build_options variable. This variable indicates
+   how the ThreadX library was built.  */
+
+#define TX_PORT_SPECIFIC_BUILD_OPTIONS          (0)
+
+
+/* Define the in-line initialization constant so that modules with in-line
+   initialization capabilities can prevent their initialization from being
+   a function call.  */
+
+#ifdef TX_MISRA_ENABLE
+#define TX_DISABLE_INLINE
+#else
+#define TX_INLINE_INITIALIZATION
+#endif
+
+
+/* Determine whether or not stack checking is enabled. By default, ThreadX stack checking is
+   disabled. When the following is defined, ThreadX thread stack checking is enabled.  If stack
+   checking is enabled (TX_ENABLE_STACK_CHECKING is defined), the TX_DISABLE_STACK_FILLING
+   define is negated, thereby forcing the stack fill which is necessary for the stack checking
+   logic.  */
+
+#ifndef TX_MISRA_ENABLE
+#ifdef TX_ENABLE_STACK_CHECKING
+#undef TX_DISABLE_STACK_FILLING
+#endif
+#endif
+
+
+/* Define the TX_THREAD control block extensions for this port. The main reason
+   for the multiple macros is so that backward compatibility can be maintained with
+   existing ThreadX kernel awareness modules.  */
+
+#define TX_THREAD_EXTENSION_0
+#define TX_THREAD_EXTENSION_1
+#ifdef  TX_ENABLE_IAR_LIBRARY_SUPPORT
+/* IAR library support */
+#if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
+/* ThreadX in non-secure zone with calls to secure zone. */
+#define TX_THREAD_EXTENSION_2               VOID    *tx_thread_module_instance_ptr;         \
+                                            VOID    *tx_thread_module_entry_info_ptr;       \
+                                            ULONG   tx_thread_module_current_user_mode;     \
+                                            ULONG   tx_thread_module_user_mode;             \
+                                            ULONG   tx_thread_module_saved_lr;              \
+                                            VOID    *tx_thread_module_kernel_stack_start;   \
+                                            VOID    *tx_thread_module_kernel_stack_end;     \
+                                            ULONG   tx_thread_module_kernel_stack_size;     \
+                                            VOID    *tx_thread_module_stack_ptr;            \
+                                            VOID    *tx_thread_module_stack_start;          \
+                                            VOID    *tx_thread_module_stack_end;            \
+                                            ULONG   tx_thread_module_stack_size;            \
+                                            VOID    *tx_thread_module_reserved;             \
+                                            VOID    *tx_thread_secure_stack_context;        \
+                                            VOID    *tx_thread_iar_tls_pointer;
+#else
+#define TX_THREAD_EXTENSION_2               VOID    *tx_thread_module_instance_ptr;         \
+                                            VOID    *tx_thread_module_entry_info_ptr;       \
+                                            ULONG   tx_thread_module_current_user_mode;     \
+                                            ULONG   tx_thread_module_user_mode;             \
+                                            ULONG   tx_thread_module_saved_lr;              \
+                                            VOID    *tx_thread_module_kernel_stack_start;   \
+                                            VOID    *tx_thread_module_kernel_stack_end;     \
+                                            ULONG   tx_thread_module_kernel_stack_size;     \
+                                            VOID    *tx_thread_module_stack_ptr;            \
+                                            VOID    *tx_thread_module_stack_start;          \
+                                            VOID    *tx_thread_module_stack_end;            \
+                                            ULONG   tx_thread_module_stack_size;            \
+                                            VOID    *tx_thread_module_reserved;             \
+                                            VOID    *tx_thread_iar_tls_pointer;
+#endif
+
+#else
+/* No IAR library support */
+#if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
+/* ThreadX in non-secure zone with calls to secure zone. */
+#define TX_THREAD_EXTENSION_2               VOID    *tx_thread_module_instance_ptr;         \
+                                            VOID    *tx_thread_module_entry_info_ptr;       \
+                                            ULONG   tx_thread_module_current_user_mode;     \
+                                            ULONG   tx_thread_module_user_mode;             \
+                                            ULONG   tx_thread_module_saved_lr;              \
+                                            VOID    *tx_thread_module_kernel_stack_start;   \
+                                            VOID    *tx_thread_module_kernel_stack_end;     \
+                                            ULONG   tx_thread_module_kernel_stack_size;     \
+                                            VOID    *tx_thread_module_stack_ptr;            \
+                                            VOID    *tx_thread_module_stack_start;          \
+                                            VOID    *tx_thread_module_stack_end;            \
+                                            ULONG   tx_thread_module_stack_size;            \
+                                            VOID    *tx_thread_module_reserved;             \
+                                            VOID    *tx_thread_secure_stack_context;
+#else
+/* ThreadX in only one zone. */
+#define TX_THREAD_EXTENSION_2               VOID    *tx_thread_module_instance_ptr;         \
+                                            VOID    *tx_thread_module_entry_info_ptr;       \
+                                            ULONG   tx_thread_module_current_user_mode;     \
+                                            ULONG   tx_thread_module_user_mode;             \
+                                            ULONG   tx_thread_module_saved_lr;              \
+                                            VOID    *tx_thread_module_kernel_stack_start;   \
+                                            VOID    *tx_thread_module_kernel_stack_end;     \
+                                            ULONG   tx_thread_module_kernel_stack_size;     \
+                                            VOID    *tx_thread_module_stack_ptr;            \
+                                            VOID    *tx_thread_module_stack_start;          \
+                                            VOID    *tx_thread_module_stack_end;            \
+                                            ULONG   tx_thread_module_stack_size;            \
+                                            VOID    *tx_thread_module_reserved;
+#endif
+
+#endif
+#ifndef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
+#define TX_THREAD_EXTENSION_3
+#else
+#define TX_THREAD_EXTENSION_3           unsigned long long  tx_thread_execution_time_total; \
+                                        unsigned long long  tx_thread_execution_time_last_start;
+#endif
+
+
+/* Define the port extensions of the remaining ThreadX objects.  */
+
+#define TX_BLOCK_POOL_EXTENSION
+#define TX_BYTE_POOL_EXTENSION
+#define TX_MUTEX_EXTENSION
+#define TX_EVENT_FLAGS_GROUP_EXTENSION          VOID    *tx_event_flags_group_module_instance; \
+                                                VOID   (*tx_event_flags_group_set_module_notify)(struct TX_EVENT_FLAGS_GROUP_STRUCT *group_ptr);
+
+#define TX_QUEUE_EXTENSION                      VOID    *tx_queue_module_instance; \
+                                                VOID   (*tx_queue_send_module_notify)(struct TX_QUEUE_STRUCT *queue_ptr);
+
+#define TX_SEMAPHORE_EXTENSION                  VOID    *tx_semaphore_module_instance; \
+                                                VOID   (*tx_semaphore_put_module_notify)(struct TX_SEMAPHORE_STRUCT *semaphore_ptr);
+
+#define TX_TIMER_EXTENSION                      VOID    *tx_timer_module_instance; \
+                                                VOID   (*tx_timer_module_expiration_function)(ULONG id);
+
+
+/* Define the user extension field of the thread control block.  Nothing
+   additional is needed for this port so it is defined as white space.  */
+
+#ifndef TX_THREAD_USER_EXTENSION
+#define TX_THREAD_USER_EXTENSION
+#endif
+
+
+/* Define the macros for processing extensions in tx_thread_create, tx_thread_delete,
+   tx_thread_shell_entry, and tx_thread_terminate.  */
+
+
+#ifdef  TX_ENABLE_IAR_LIBRARY_SUPPORT
+void    *_tx_iar_create_per_thread_tls_area(void);
+void    _tx_iar_destroy_per_thread_tls_area(void *tls_ptr);
+void    __iar_Initlocks(void);
+
+#define TX_THREAD_CREATE_EXTENSION(thread_ptr)                      thread_ptr -> tx_thread_iar_tls_pointer =  _tx_iar_create_per_thread_tls_area();
+
+#if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
+#define TX_THREAD_DELETE_EXTENSION(thread_ptr)                      do {_tx_iar_destroy_per_thread_tls_area(thread_ptr -> tx_thread_iar_tls_pointer);   \
+                                                                        thread_ptr -> tx_thread_iar_tls_pointer =  TX_NULL; } while(0);                 \
+                                                                    if(thread_ptr -> tx_thread_secure_stack_context){_tx_thread_secure_stack_free(thread_ptr);}
+#else
+#define TX_THREAD_DELETE_EXTENSION(thread_ptr)                      do {_tx_iar_destroy_per_thread_tls_area(thread_ptr -> tx_thread_iar_tls_pointer);   \
+                                                                        thread_ptr -> tx_thread_iar_tls_pointer =  TX_NULL; } while(0);
+#endif
+#define TX_PORT_SPECIFIC_PRE_SCHEDULER_INITIALIZATION               do {__iar_Initlocks();} while(0);
+#else   /* No IAR library support. */
+#define TX_THREAD_CREATE_EXTENSION(thread_ptr)
+#if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
+#define TX_THREAD_DELETE_EXTENSION(thread_ptr)                      if(thread_ptr -> tx_thread_secure_stack_context){_tx_thread_secure_stack_free(thread_ptr);}
+#else
+#define TX_THREAD_DELETE_EXTENSION(thread_ptr)
+#endif
+#endif  /* TX_ENABLE_IAR_LIBRARY_SUPPORT */
+
+#if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
+/* Define the size of the secure stack for the timer thread and use the extension to allocate the secure stack. */
+#define TX_TIMER_THREAD_SECURE_STACK_SIZE       256
+#define TX_TIMER_INITIALIZE_EXTENSION(status)   _tx_thread_secure_stack_allocate(&_tx_timer_thread, TX_TIMER_THREAD_SECURE_STACK_SIZE);
+#endif
+
+#if defined(__ARMVFP__) || defined(__ARM_PCS_VFP) || defined(__TARGET_FPU_VFP)
+
+#ifdef TX_MISRA_ENABLE
+
+ULONG  _tx_misra_control_get(void);
+void   _tx_misra_control_set(ULONG value);
+ULONG  _tx_misra_fpccr_get(void);
+void   _tx_misra_vfp_touch(void);
+
+#else   /* TX_MISRA_ENABLE not defined */
+
+/* Define some helper functions (these are intrinsics in some compilers). */
+#ifdef __GNUC__
+__attribute__( ( always_inline ) ) static inline ULONG __get_CONTROL(void)
+{
+ULONG  control_value;
+
+    __asm__ volatile (" MRS  %0,CONTROL ": "=r" (control_value) );
+    return(control_value);
+}
+
+__attribute__( ( always_inline ) ) static inline void __set_CONTROL(ULONG control_value)
+{
+    __asm__ volatile (" MSR  CONTROL,%0": : "r" (control_value): "memory" );
+}
+
+#define TX_VFP_TOUCH()  __asm__ volatile ("VMOV.F32 s0, s0");
+
+#endif /* __GNUC__ */
+
+#ifdef __ICCARM__
+#define TX_VFP_TOUCH()  __asm__ volatile ("VMOV.F32 s0, s0");
+#endif  /* __ICCARM__ */
+
+#endif  /* TX_MISRA_ENABLE */
+
+
+/* A completed thread falls into _thread_shell_entry and we can simply deactivate the FPU via CONTROL.FPCA
+   in order to ensure no lazy stacking will occur. */
+
+#ifndef TX_MISRA_ENABLE
+
+#define TX_THREAD_COMPLETED_EXTENSION(thread_ptr)   {                                                       \
+                                                    ULONG  _tx_vfp_state;                                   \
+                                                        _tx_vfp_state =  __get_CONTROL();                   \
+                                                        _tx_vfp_state =  _tx_vfp_state & ~((ULONG) 0x4);    \
+                                                        __set_CONTROL(_tx_vfp_state);                       \
+                                                    }
+#else
+
+#define TX_THREAD_COMPLETED_EXTENSION(thread_ptr)   {                                                       \
+                                                    ULONG  _tx_vfp_state;                                   \
+                                                        _tx_vfp_state =  _tx_misra_control_get();           \
+                                                        _tx_vfp_state =  _tx_vfp_state & ~((ULONG) 0x4);    \
+                                                        _tx_misra_control_set(_tx_vfp_state);               \
+                                                    }
+
+#endif
+
+/* A thread can be terminated by another thread, so we first check if it's self-terminating and not in an ISR.
+   If so, deactivate the FPU via CONTROL.FPCA. Otherwise we are in an interrupt or another thread is terminating
+   this one, so if the FPCCR.LSPACT bit is set, we need to save the CONTROL.FPCA state, touch the FPU to flush 
+   the lazy FPU save, then restore the CONTROL.FPCA state. */
+
+#ifndef TX_MISRA_ENABLE
+
+#define TX_THREAD_TERMINATED_EXTENSION(thread_ptr)  {                                                                                       \
+                                                    ULONG  _tx_system_state;                                                                \
+                                                        _tx_system_state =  TX_THREAD_GET_SYSTEM_STATE();                                   \
+                                                        if ((_tx_system_state == ((ULONG) 0)) && ((thread_ptr) == _tx_thread_current_ptr))  \
+                                                        {                                                                                   \
+                                                        ULONG  _tx_vfp_state;                                                               \
+                                                            _tx_vfp_state =  __get_CONTROL();                                               \
+                                                            _tx_vfp_state =  _tx_vfp_state & ~((ULONG) 0x4);                                \
+                                                            __set_CONTROL(_tx_vfp_state);                                                   \
+                                                        }                                                                                   \
+                                                        else                                                                                \
+                                                        {                                                                                   \
+                                                        ULONG  _tx_fpccr;                                                                   \
+                                                            _tx_fpccr =  *((ULONG *) 0xE000EF34);                                           \
+                                                            _tx_fpccr =  _tx_fpccr & ((ULONG) 0x01);                                        \
+                                                            if (_tx_fpccr == ((ULONG) 0x01))                                                \
+                                                            {                                                                               \
+                                                            ULONG _tx_vfp_state;                                                            \
+                                                                _tx_vfp_state = __get_CONTROL();                                            \
+                                                                _tx_vfp_state =  _tx_vfp_state & ((ULONG) 0x4);                             \
+                                                                TX_VFP_TOUCH();                                                             \
+                                                                if (_tx_vfp_state == ((ULONG) 0))                                           \
+                                                                {                                                                           \
+                                                                    _tx_vfp_state =  __get_CONTROL();                                       \
+                                                                    _tx_vfp_state =  _tx_vfp_state & ~((ULONG) 0x4);                        \
+                                                                    __set_CONTROL(_tx_vfp_state);                                           \
+                                                                }                                                                           \
+                                                            }                                                                               \
+                                                        }                                                                                   \
+                                                    }
+#else
+
+#define TX_THREAD_TERMINATED_EXTENSION(thread_ptr)  {                                                                                       \
+                                                    ULONG  _tx_system_state;                                                                \
+                                                        _tx_system_state =  TX_THREAD_GET_SYSTEM_STATE();                                   \
+                                                        if ((_tx_system_state == ((ULONG) 0)) && ((thread_ptr) == _tx_thread_current_ptr))  \
+                                                        {                                                                                   \
+                                                        ULONG  _tx_vfp_state;                                                               \
+                                                            _tx_vfp_state =  _tx_misra_control_get();                                       \
+                                                            _tx_vfp_state =  _tx_vfp_state & ~((ULONG) 0x4);                                \
+                                                            _tx_misra_control_set(_tx_vfp_state);                                           \
+                                                        }                                                                                   \
+                                                        else                                                                                \
+                                                        {                                                                                   \
+                                                        ULONG  _tx_fpccr;                                                                   \
+                                                            _tx_fpccr =  _tx_misra_fpccr_get();                                             \
+                                                            _tx_fpccr =  _tx_fpccr & ((ULONG) 0x01);                                        \
+                                                            if (_tx_fpccr == ((ULONG) 0x01))                                                \
+                                                            {                                                                               \
+                                                            ULONG _tx_vfp_state;                                                            \
+                                                                _tx_vfp_state = _tx_misra_control_get();                                    \
+                                                                _tx_vfp_state =  _tx_vfp_state & ((ULONG) 0x4);                             \
+                                                                _tx_misra_vfp_touch();                                                      \
+                                                                if (_tx_vfp_state == ((ULONG) 0))                                           \
+                                                                {                                                                           \
+                                                                    _tx_vfp_state =  _tx_misra_control_get();                               \
+                                                                    _tx_vfp_state =  _tx_vfp_state & ~((ULONG) 0x4);                        \
+                                                                    _tx_misra_control_set(_tx_vfp_state);                                   \
+                                                                }                                                                           \
+                                                            }                                                                               \
+                                                        }                                                                                   \
+                                                    }
+#endif
+
+#else   /* No VFP in use */
+
+#define TX_THREAD_COMPLETED_EXTENSION(thread_ptr)
+#define TX_THREAD_TERMINATED_EXTENSION(thread_ptr)
+
+#endif  /* defined(__ARMVFP__) || defined(__ARM_PCS_VFP) || defined(__TARGET_FPU_VFP) */
+
+
+/* Define the ThreadX object creation extensions for the remaining objects.  */
+
+#define TX_BLOCK_POOL_CREATE_EXTENSION(pool_ptr)
+#define TX_BYTE_POOL_CREATE_EXTENSION(pool_ptr)
+#define TX_EVENT_FLAGS_GROUP_CREATE_EXTENSION(group_ptr)
+#define TX_MUTEX_CREATE_EXTENSION(mutex_ptr)
+#define TX_QUEUE_CREATE_EXTENSION(queue_ptr)
+#define TX_SEMAPHORE_CREATE_EXTENSION(semaphore_ptr)
+#define TX_TIMER_CREATE_EXTENSION(timer_ptr)
+
+
+/* Define the ThreadX object deletion extensions for the remaining objects.  */
+
+#define TX_BLOCK_POOL_DELETE_EXTENSION(pool_ptr)
+#define TX_BYTE_POOL_DELETE_EXTENSION(pool_ptr)
+#define TX_EVENT_FLAGS_GROUP_DELETE_EXTENSION(group_ptr)
+#define TX_MUTEX_DELETE_EXTENSION(mutex_ptr)
+#define TX_QUEUE_DELETE_EXTENSION(queue_ptr)
+#define TX_SEMAPHORE_DELETE_EXTENSION(semaphore_ptr)
+#define TX_TIMER_DELETE_EXTENSION(timer_ptr)
+
+
+/* Define the get system state macro.   */
+
+#ifndef TX_THREAD_GET_SYSTEM_STATE
+#ifndef TX_MISRA_ENABLE
+
+#ifdef __GNUC__ /* GCC and ARM Compiler 6 */
+
+__attribute__( ( always_inline ) ) static inline unsigned int __get_IPSR(void)
+{
+unsigned int  ipsr_value;
+    __asm__ volatile (" MRS  %0,IPSR ": "=r" (ipsr_value) );
+    return(ipsr_value);
+}
+
+#define TX_THREAD_GET_SYSTEM_STATE()        (_tx_thread_system_state | __get_IPSR())
+
+#elif defined(__ICCARM__)   /* IAR */
+
+#define TX_THREAD_GET_SYSTEM_STATE()        (_tx_thread_system_state | __get_IPSR())
+
+#endif  /* TX_THREAD_GET_SYSTEM_STATE for different compilers */
+
+#else   /* TX_MISRA_ENABLE is defined, use MISRA function. */
+ULONG   _tx_misra_ipsr_get(VOID);
+#define TX_THREAD_GET_SYSTEM_STATE()        (_tx_thread_system_state | _tx_misra_ipsr_get())
+#endif  /* TX_MISRA_ENABLE */
+#endif  /* TX_THREAD_GET_SYSTEM_STATE */
+
+
+/* Define the check for whether or not to call the _tx_thread_system_return function.  A non-zero value
+   indicates that _tx_thread_system_return should not be called. This overrides the definition in tx_thread.h
+   for Cortex-M since so we don't waste time checking the _tx_thread_system_state variable that is always
+   zero after initialization for Cortex-M ports. */
+
+#ifndef TX_THREAD_SYSTEM_RETURN_CHECK
+#define TX_THREAD_SYSTEM_RETURN_CHECK(c)    (c) = ((ULONG) _tx_thread_preempt_disable);
+#endif
+
+#if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
+/* Initialize secure stacks for threads calling secure functions. */
+extern void    _tx_thread_secure_stack_initialize(void);
+#define TX_INITIALIZE_KERNEL_ENTER_EXTENSION            _tx_thread_secure_stack_initialize();
+#endif
+
+/* Define the macro to ensure _tx_thread_preempt_disable is set early in initialization in order to
+   prevent early scheduling on Cortex-M parts.  */
+
+#define TX_PORT_SPECIFIC_POST_INITIALIZATION    _tx_thread_preempt_disable++;
+
+
+
+
+#ifndef TX_DISABLE_INLINE
+
+/* Define the TX_LOWEST_SET_BIT_CALCULATE macro for each compiler. */
+#ifdef __ICCARM__       /* IAR Compiler */
+#define TX_LOWEST_SET_BIT_CALCULATE(m, b)       (b) = (UINT) __CLZ(__RBIT((m)));
+#elif defined(__GNUC__) /* GCC and AC6 Compiler */
+#define TX_LOWEST_SET_BIT_CALCULATE(m, b)       __asm__ volatile (" RBIT %0,%1 ": "=r" (m) : "r" (m) ); \
+                                                __asm__ volatile (" CLZ  %0,%1 ": "=r" (b) : "r" (m) ); 
+#endif
+
+/* Define the interrupt disable/restore macros for each compiler. */
+
+#ifdef __GNUC__ /* GCC and AC6 */
+
+__attribute__( ( always_inline ) ) static inline unsigned int __disable_interrupt(void)
+{
+unsigned int  primask_value;
+
+    __asm__ volatile (" MRS  %0,PRIMASK ": "=r" (primask_value) );
+    __asm__ volatile (" CPSID i" : : : "memory" );
+    return(primask_value);
+}
+
+__attribute__( ( always_inline ) ) static inline void __restore_interrupt(unsigned int primask_value)
+{
+    __asm__ volatile (" MSR  PRIMASK,%0": : "r" (primask_value): "memory" );
+}
+
+__attribute__( ( always_inline ) ) static inline unsigned int __get_primask_value(void)
+{
+unsigned int  primask_value;
+
+    __asm__ volatile (" MRS  %0,PRIMASK ": "=r" (primask_value) );
+    return(primask_value);
+}
+
+__attribute__( ( always_inline ) ) static inline void __enable_interrupt(void)
+{
+    __asm__ volatile (" CPSIE  i": : : "memory" );
+}
+
+
+__attribute__( ( always_inline ) ) static inline void _tx_thread_system_return_inline(void)
+{
+unsigned int interrupt_save;
+
+    /* Set PendSV to invoke ThreadX scheduler.  */
+    *((ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
+    if (__get_IPSR() == 0)
+    {
+        interrupt_save = __get_primask_value();
+        __enable_interrupt();
+        __restore_interrupt(interrupt_save);
+    }
+}
+
+
+#define TX_INTERRUPT_SAVE_AREA  unsigned int interrupt_save;
+#define TX_DISABLE                              interrupt_save =  __disable_interrupt();
+#define TX_RESTORE                              __restore_interrupt(interrupt_save);
+
+#elif defined(__ICCARM__)   /* IAR */
+
+static void _tx_thread_system_return_inline(void)
+{
+__istate_t interrupt_save;
+
+    /* Set PendSV to invoke ThreadX scheduler.  */
+    *((ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
+    if (__get_IPSR() == 0)
+    {
+        interrupt_save = __get_interrupt_state();
+        __enable_interrupt();
+        __set_interrupt_state(interrupt_save);
+    }
+}
+
+#define TX_INTERRUPT_SAVE_AREA                  __istate_t interrupt_save;
+#define TX_DISABLE                              {interrupt_save = __get_interrupt_state();__disable_interrupt();};
+#define TX_RESTORE                              {__set_interrupt_state(interrupt_save);};
+
+#endif  /* Interrupt disable/restore macros for each compiler. */
+
+/* Redefine _tx_thread_system_return for improved performance.  */
+
+#define _tx_thread_system_return                _tx_thread_system_return_inline
+
+
+#else   /* TX_DISABLE_INLINE is defined */
+
+UINT                                            _tx_thread_interrupt_disable(VOID);
+VOID                                            _tx_thread_interrupt_restore(UINT previous_posture);
+
+#define TX_INTERRUPT_SAVE_AREA                  register UINT interrupt_save;
+
+#define TX_DISABLE                              interrupt_save = _tx_thread_interrupt_disable();
+#define TX_RESTORE                              _tx_thread_interrupt_restore(interrupt_save);
+#endif  /* TX_DISABLE_INLINE */
+
+
+/* Define the version ID of ThreadX.  This may be utilized by the application.  */
+
+#ifdef TX_THREAD_INIT
+CHAR                            _tx_version_id[] =
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX ARMv8-M Version 6.1.5 *";
+#else
+#ifdef TX_MISRA_ENABLE
+extern  CHAR                    _tx_version_id[100];
+#else
+extern  CHAR                    _tx_version_id[];
+#endif
+#endif
+
+
+#endif

ports_module/cortex_m33/gnu/inc/tx_secure_interface.h

@@ -0,0 +1,60 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Thread                                                              */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+
+/**************************************************************************/
+/*                                                                        */
+/*  COMPONENT DEFINITION                                   RELEASE        */
+/*                                                                        */
+/*    tx_secure_interface.h                               PORTABLE C      */
+/*                                                            6.1         */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This file defines the ThreadX secure thread stack components,       */
+/*    including data types and external references.                       */
+/*    It is assumed that tx_api.h and tx_port.h have already been         */
+/*    included.                                                           */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*                                                                        */
+/**************************************************************************/
+
+#ifndef TX_SECURE_INTERFACE_H
+#define TX_SECURE_INTERFACE_H
+
+/* Define internal secure thread stack function prototypes.  */
+
+extern void    _tx_thread_secure_stack_initialize(void);
+extern UINT    _tx_thread_secure_mode_stack_allocate(TX_THREAD *thread_ptr, ULONG stack_size);
+extern UINT    _tx_thread_secure_mode_stack_free(TX_THREAD *thread_ptr);
+extern void    _tx_thread_secure_stack_context_save(TX_THREAD *thread_ptr);
+extern void    _tx_thread_secure_stack_context_restore(TX_THREAD *thread_ptr);
+
+#endif

ports_module/cortex_m33/gnu/inc/txm_module_port.h

@@ -0,0 +1,354 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Module                                                              */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+
+/**************************************************************************/
+/*                                                                        */
+/*  APPLICATION INTERFACE DEFINITION                       RELEASE        */
+/*                                                                        */
+/*    txm_module_port.h                               Cortex-M33/MPU/GNU  */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This file defines the basic module constants, interface structures, */
+/*    and function prototypes.                                            */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  03-02-2021      Scott Larson            Initial Version 6.1.5         */
+/*                                                                        */
+/**************************************************************************/
+
+#ifndef TXM_MODULE_PORT_H
+#define TXM_MODULE_PORT_H
+
+/* Determine if the optional Modules user define file should be used.  */
+
+#ifdef TXM_MODULE_INCLUDE_USER_DEFINE_FILE
+
+/* Yes, include the user defines in txm_module_user.h. The defines in this file may
+   alternately be defined on the command line.  */
+
+#include "txm_module_user.h"
+#endif
+
+/* It is assumed that the base ThreadX tx_port.h file has been modified to add the
+  following extensions to the ThreadX thread control block (this code should replace
+  the corresponding macro define in tx_port.h):
+
+#define TX_THREAD_EXTENSION_2                   VOID    *tx_thread_module_instance_ptr;         \
+                                                VOID    *tx_thread_module_entry_info_ptr;       \
+                                                ULONG   tx_thread_module_current_user_mode;     \
+                                                ULONG   tx_thread_module_user_mode;             \
+                                                ULONG   tx_thread_module_saved_lr;              \
+                                                VOID    *tx_thread_module_kernel_stack_start;   \
+                                                VOID    *tx_thread_module_kernel_stack_end;     \
+                                                ULONG   tx_thread_module_kernel_stack_size;     \
+                                                VOID    *tx_thread_module_stack_ptr;            \
+                                                VOID    *tx_thread_module_stack_start;          \
+                                                VOID    *tx_thread_module_stack_end;            \
+                                                ULONG   tx_thread_module_stack_size;            \
+                                                VOID    *tx_thread_module_reserved;
+
+The following extensions must also be defined in tx_port.h:
+
+#define TX_EVENT_FLAGS_GROUP_EXTENSION          VOID    *tx_event_flags_group_module_instance; \
+                                                VOID   (*tx_event_flags_group_set_module_notify)(struct TX_EVENT_FLAGS_GROUP_STRUCT *group_ptr);
+
+#define TX_QUEUE_EXTENSION                      VOID    *tx_queue_module_instance; \
+                                                VOID   (*tx_queue_send_module_notify)(struct TX_QUEUE_STRUCT *queue_ptr);
+
+#define TX_SEMAPHORE_EXTENSION                  VOID    *tx_semaphore_module_instance; \
+                                                VOID   (*tx_semaphore_put_module_notify)(struct TX_SEMAPHORE_STRUCT *semaphore_ptr);
+
+#define TX_TIMER_EXTENSION                      VOID    *tx_timer_module_instance; \
+                                                VOID   (*tx_timer_module_expiration_function)(ULONG id);
+*/
+
+/* Define the kernel stack size for a module thread.  */
+#ifndef TXM_MODULE_KERNEL_STACK_SIZE
+#define TXM_MODULE_KERNEL_STACK_SIZE            768
+#endif
+
+/* Define constants specific to the tools the module can be built with for this particular modules port.  */
+
+#define TXM_MODULE_IAR_COMPILER                 0x00000000
+#define TXM_MODULE_RVDS_COMPILER                0x01000000
+#define TXM_MODULE_GNU_COMPILER                 0x02000000
+#define TXM_MODULE_COMPILER_MASK                0xFF000000
+#define TXM_MODULE_OPTIONS_MASK                 0x000000FF
+
+
+/* Define the properties for this particular module port.  */
+
+#define TXM_MODULE_PORT_DISPATCH
+
+#define TXM_MODULE_MEMORY_PROTECTION_ENABLED
+
+#ifdef  TXM_MODULE_MEMORY_PROTECTION_ENABLED
+#define TXM_MODULE_REQUIRE_ALLOCATED_OBJECT_MEMORY
+#else
+#define TXM_MODULE_REQUIRE_LOCAL_OBJECT_MEMORY
+#endif
+
+#define TXM_MODULE_USER_MODE                        0x00000001
+#define TXM_MODULE_MEMORY_PROTECTION                0x00000002
+#define TXM_MODULE_SHARED_EXTERNAL_MEMORY_ACCESS    0x00000004
+
+
+/* Define the supported options for this module.   */
+
+#define TXM_MODULE_MANAGER_SUPPORTED_OPTIONS    (TXM_MODULE_USER_MODE | TXM_MODULE_MEMORY_PROTECTION | TXM_MODULE_SHARED_EXTERNAL_MEMORY_ACCESS)
+#define TXM_MODULE_MANAGER_REQUIRED_OPTIONS     0
+
+
+/* Define offset adjustments according to the compiler used to build the module.  */
+
+#define TXM_MODULE_IAR_SHELL_ADJUST             24
+#define TXM_MODULE_IAR_START_ADJUST             28
+#define TXM_MODULE_IAR_STOP_ADJUST              32
+#define TXM_MODULE_IAR_CALLBACK_ADJUST          44
+
+#define TXM_MODULE_RVDS_SHELL_ADJUST            0
+#define TXM_MODULE_RVDS_START_ADJUST            0
+#define TXM_MODULE_RVDS_STOP_ADJUST             0
+#define TXM_MODULE_RVDS_CALLBACK_ADJUST         0
+
+#define TXM_MODULE_GNU_SHELL_ADJUST             24
+#define TXM_MODULE_GNU_START_ADJUST             28
+#define TXM_MODULE_GNU_STOP_ADJUST              32
+#define TXM_MODULE_GNU_CALLBACK_ADJUST          44
+
+
+/* Define other module port-specific constants.  */
+
+/* Define INLINE_DECLARE to inline for ARM compiler.  */
+
+#define INLINE_DECLARE inline
+
+/* Define the number of MPU entries assigned to the code and data sections.
+   On Cortex-M33 devices, there are 8 total entries. ThreadX uses one for access
+   to the kernel entry function, one for module code protection, one for module data protection,
+   leaving five regions available for shared memory.  */
+#define TXM_MODULE_MPU_TOTAL_ENTRIES            8
+#define TXM_MODULE_MPU_KERNEL_ENTRY_INDEX       0
+#define TXM_MODULE_MPU_CODE_INDEX               1
+#define TXM_MODULE_MPU_DATA_INDEX               2
+
+#define TXM_MODULE_MPU_SHARED_INDEX             3
+#define TXM_MODULE_MPU_SHARED_ENTRIES           5
+
+#define TXM_MODULE_ATTRIBUTE_NON_SHAREABLE      0x00
+#define TXM_MODULE_ATTRIBUTE_OUTER_SHAREABLE    0x10
+#define TXM_MODULE_ATTRIBUTE_INNER_SHAREABLE    0x18
+#define TXM_MODULE_ATTRIBUTE_READ_WRITE         0x02
+#define TXM_MODULE_ATTRIBUTE_READ_ONLY          0x06
+#define TXM_MODULE_ATTRIBUTE_EXECUTE_NEVER      0x01
+#define TXM_MODULE_ATTRIBUTE_REGION_ENABLE      0x01
+#define TXM_MODULE_ATTRIBUTE_MASK               0x1E
+#define TXM_MODULE_ATTRIBUTE_INDEX              0x00
+
+/* MAIR_ATTR settings
+Device-nGnRE : 0b [Outer]0000 [Inner]0100
+Code WT   RA : 0b [Outer]1010 [Inner]1010
+DATA WBWA RA : 0b [Outer]1111 [Inner]1111
+*/
+
+/* Data aligned to 8 bytes (stacks must be 8-byte aligned).  */
+#define TXM_MODULE_DATA_ALIGNMENT               8
+
+/* MPU regions must be 32-byte aligned.  */
+#define TXM_MODULE_MPU_ALIGNMENT                32
+
+#define TXM_THREAD_SECURE_STACK_ALLOCATE_CALL   TXM_MODULE_PORT_EXTENSION_API_ID_START
+#define TXM_THREAD_SECURE_STACK_FREE_CALL       (TXM_MODULE_PORT_EXTENSION_API_ID_START+1)
+
+/* There are 2 registers to set up each MPU region: MPU_RBAR, MPU_RLAR.  */
+typedef struct TXM_MODULE_MPU_INFO_STRUCT
+{
+    ULONG   txm_module_mpu_region_base_address;
+    ULONG   txm_module_mpu_region_limit_address;
+} TXM_MODULE_MPU_INFO;
+
+/* Define the port-extensions to the module manager instance structure.  */
+#define TXM_MODULE_MANAGER_PORT_EXTENSION                                                               \
+    TXM_MODULE_MPU_INFO     txm_module_instance_mpu_registers[TXM_MODULE_MPU_TOTAL_ENTRIES];            \
+    ULONG                   txm_module_instance_shared_memory_count;                                    \
+    ULONG                   txm_module_instance_shared_memory_address[TXM_MODULE_MPU_SHARED_ENTRIES];   \
+    ULONG                   txm_module_instance_shared_memory_length[TXM_MODULE_MPU_SHARED_ENTRIES];
+
+
+/* Define the memory fault information structure that is populated when a memory fault occurs.  */
+
+typedef struct TXM_MODULE_MANAGER_MEMORY_FAULT_INFO_STRUCT
+{
+    TX_THREAD           *txm_module_manager_memory_fault_info_thread_ptr;
+    VOID                *txm_module_manager_memory_fault_info_code_location;
+    ULONG               txm_module_manager_memory_fault_info_shcsr;
+    ULONG               txm_module_manager_memory_fault_info_cfsr;
+    ULONG               txm_module_manager_memory_fault_info_mmfar;
+    ULONG               txm_module_manager_memory_fault_info_bfar;
+    ULONG               txm_module_manager_memory_fault_info_control;
+    ULONG               txm_module_manager_memory_fault_info_sp;
+    ULONG               txm_module_manager_memory_fault_info_r0;
+    ULONG               txm_module_manager_memory_fault_info_r1;
+    ULONG               txm_module_manager_memory_fault_info_r2;
+    ULONG               txm_module_manager_memory_fault_info_r3;
+    ULONG               txm_module_manager_memory_fault_info_r4;
+    ULONG               txm_module_manager_memory_fault_info_r5;
+    ULONG               txm_module_manager_memory_fault_info_r6;
+    ULONG               txm_module_manager_memory_fault_info_r7;
+    ULONG               txm_module_manager_memory_fault_info_r8;
+    ULONG               txm_module_manager_memory_fault_info_r9;
+    ULONG               txm_module_manager_memory_fault_info_r10;
+    ULONG               txm_module_manager_memory_fault_info_r11;
+    ULONG               txm_module_manager_memory_fault_info_r12;
+    ULONG               txm_module_manager_memory_fault_info_lr;
+    ULONG               txm_module_manager_memory_fault_info_xpsr;
+} TXM_MODULE_MANAGER_MEMORY_FAULT_INFO;
+
+
+#define TXM_MODULE_MANAGER_FAULT_INFO                                               \
+    TXM_MODULE_MANAGER_MEMORY_FAULT_INFO    _txm_module_manager_memory_fault_info;
+
+
+/* Define the macro to check the code alignment.  */
+
+#define TXM_MODULE_MANAGER_CHECK_CODE_ALIGNMENT(module_location, code_alignment)    \
+    {                                                                               \
+        ULONG   temp;                                                               \
+        temp =  (ULONG) module_location;                                            \
+        temp =  temp & (code_alignment - 1);                                        \
+        if (temp)                                                                   \
+        {                                                                           \
+            _tx_mutex_put(&_txm_module_manager_mutex);                              \
+            return(TXM_MODULE_ALIGNMENT_ERROR);                                     \
+        }                                                                           \
+    }
+
+
+/* Define the macro to adjust the alignment and size for code/data areas.  */
+
+#define TXM_MODULE_MANAGER_ALIGNMENT_ADJUST(module_preamble, code_size, code_alignment, data_size, data_alignment)   _txm_module_manager_alignment_adjust(module_preamble, &code_size, &code_alignment, &data_size, &data_alignment);
+
+
+/* Define the macro to adjust the symbols in the module preamble.  */
+
+#define TXM_MODULE_MANAGER_CALCULATE_ADJUSTMENTS(properties, shell_function_adjust, start_function_adjust, stop_function_adjust, callback_function_adjust) \
+    if ((properties & TXM_MODULE_COMPILER_MASK) == TXM_MODULE_IAR_COMPILER)         \
+    {                                                                               \
+        shell_function_adjust =     TXM_MODULE_IAR_SHELL_ADJUST;                    \
+        start_function_adjust =     TXM_MODULE_IAR_START_ADJUST;                    \
+        stop_function_adjust =      TXM_MODULE_IAR_STOP_ADJUST;                     \
+        callback_function_adjust =  TXM_MODULE_IAR_CALLBACK_ADJUST;                 \
+    }                                                                               \
+    else if ((properties & TXM_MODULE_COMPILER_MASK) == TXM_MODULE_RVDS_COMPILER)   \
+    {                                                                               \
+        shell_function_adjust =     TXM_MODULE_RVDS_SHELL_ADJUST;                   \
+        start_function_adjust =     TXM_MODULE_RVDS_START_ADJUST;                   \
+        stop_function_adjust =      TXM_MODULE_RVDS_STOP_ADJUST;                    \
+        callback_function_adjust =  TXM_MODULE_RVDS_CALLBACK_ADJUST;                \
+    }                                                                               \
+    else                                                                            \
+    {                                                                               \
+        shell_function_adjust =     TXM_MODULE_GNU_SHELL_ADJUST;                    \
+        start_function_adjust =     TXM_MODULE_GNU_START_ADJUST;                    \
+        stop_function_adjust =      TXM_MODULE_GNU_STOP_ADJUST;                     \
+        callback_function_adjust =  TXM_MODULE_GNU_CALLBACK_ADJUST;                 \
+    }
+
+
+/* Define the macro to populate the thread control block with module port-specific information.
+   Check if the module is in user mode and set up txm_module_thread_entry_info_kernel_call_dispatcher accordingly.
+*/
+
+#define TXM_MODULE_MANAGER_THREAD_SETUP(thread_ptr, module_instance)                                                                    \
+    thread_ptr -> tx_thread_module_current_user_mode =  module_instance -> txm_module_instance_property_flags & TXM_MODULE_USER_MODE;   \
+    thread_ptr -> tx_thread_module_user_mode =          module_instance -> txm_module_instance_property_flags & TXM_MODULE_USER_MODE;   \
+    if (thread_ptr -> tx_thread_module_user_mode)                                                                                       \
+    {                                                                                                                                   \
+        thread_entry_info -> txm_module_thread_entry_info_kernel_call_dispatcher =   _txm_module_manager_user_mode_entry;               \
+    }                                                                                                                                   \
+    else                                                                                                                                \
+    {                                                                                                                                   \
+        thread_entry_info -> txm_module_thread_entry_info_kernel_call_dispatcher =   _txm_module_manager_kernel_dispatch;               \
+    }
+
+
+/* Define the macro to populate the module control block with module port-specific information.
+   If memory protection is enabled, set up the MPU registers.
+*/
+#define TXM_MODULE_MANAGER_MODULE_SETUP(module_instance)                                            \
+    if (module_instance -> txm_module_instance_property_flags & TXM_MODULE_USER_MODE)               \
+    {                                                                                               \
+        if (module_instance -> txm_module_instance_property_flags & TXM_MODULE_MEMORY_PROTECTION)   \
+        {                                                                                           \
+            _txm_module_manager_mm_register_setup(module_instance);                                 \
+        }                                                                                           \
+    }                                                                                               \
+    else                                                                                            \
+    {                                                                                               \
+        /* Do nothing.  */                                                                          \
+    }
+
+/* Define the macro to perform port-specific functions when unloading the module.  */
+/* Nothing needs to be done for this port.  */
+#define TXM_MODULE_MANAGER_MODULE_UNLOAD(module_instance)
+
+
+/* Define the macros to perform port-specific checks when passing pointers to the kernel.  */
+
+/* Define macro to make sure object is inside the module's data.  */
+#define TXM_MODULE_MANAGER_CHECK_INSIDE_DATA(module_instance, obj_ptr, obj_size) \
+    _txm_module_manager_inside_data_check(module_instance, obj_ptr, obj_size)
+
+/* Define some internal prototypes to this module port.  */
+
+#ifndef TX_SOURCE_CODE
+#define txm_module_manager_memory_fault_notify              _txm_module_manager_memory_fault_notify
+#endif
+
+
+#ifdef TX_SOURCE_CODE
+
+#endif
+
+#define TXM_MODULE_MANAGER_ADDITIONAL_PROTOTYPES                                                                                \
+VOID  _txm_module_manager_alignment_adjust(TXM_MODULE_PREAMBLE *module_preamble, ULONG *code_size, ULONG *code_alignment, ULONG *data_size, ULONG *data_alignment);   \
+VOID  _txm_module_manager_memory_fault_handler(VOID);                                                                           \
+UINT  _txm_module_manager_memory_fault_notify(VOID (*notify_function)(TX_THREAD *, TXM_MODULE_INSTANCE *));                     \
+VOID  _txm_module_manager_mm_register_setup(TXM_MODULE_INSTANCE *module_instance);                                              \
+UINT  _txm_module_manager_inside_data_check(TXM_MODULE_INSTANCE *module_instance, ALIGN_TYPE obj_ptr, UINT obj_size);           \
+ALIGN_TYPE _txm_module_manager_port_dispatch(TXM_MODULE_INSTANCE *module_instance, ULONG kernel_request, ALIGN_TYPE param_0, ALIGN_TYPE param_1, ALIGN_TYPE param_2);
+
+
+#define TXM_MODULE_MANAGER_VERSION_ID   \
+CHAR                            _txm_module_manager_version_id[] =  \
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Module Cortex-M33/MPU/GNU Version 6.1.5 *";
+
+#endif

ports_module/cortex_m33/gnu/module_lib/src/txm_module_thread_shell_entry.c

@@ -0,0 +1,174 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Module                                                              */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+#ifndef TXM_MODULE
+#define TXM_MODULE
+#endif
+
+#ifndef TX_SOURCE_CODE
+#define TX_SOURCE_CODE
+#endif
+
+
+/* Include necessary system files.  */
+
+#include "txm_module.h"
+#include "tx_thread.h"
+
+/* Define the global module entry pointer from the start thread of the module.  */
+
+TXM_MODULE_THREAD_ENTRY_INFO    *_txm_module_entry_info;
+
+
+/* Define the dispatch function pointer used in the module implementation.  */
+
+ULONG                           (*_txm_module_kernel_call_dispatcher)(ULONG kernel_request, ULONG param_1, ULONG param_2, ULONG param3);
+
+
+/* Define the GCC startup code that clears the uninitialized global data and sets up the
+   preset global variables.  */
+
+extern VOID _gcc_setup(TXM_MODULE_INSTANCE *);
+
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _txm_module_thread_shell_entry                   Cortex-M33/MPU/GNU */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function calls the specified entry function of the thread.  It */
+/*    also provides a place for the thread's entry function to return.    */
+/*    If the thread returns, this function places the thread in a         */
+/*    "COMPLETED" state.                                                  */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    thread_ptr                        Pointer to current thread         */
+/*    thread_info                       Pointer to thread entry info      */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    _gcc_setup                        GNU global init function          */
+/*    thread_entry                      Thread's entry function           */
+/*    tx_thread_resume                  Resume the module callback thread */
+/*    _txm_module_thread_system_suspend Module thread suspension routine  */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    Initial thread stack frame                                          */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  03-02-2021      Scott Larson            Initial Version 6.1.5         */
+/*                                                                        */
+/**************************************************************************/
+VOID  _txm_module_thread_shell_entry(TX_THREAD *thread_ptr, TXM_MODULE_THREAD_ENTRY_INFO *thread_info)
+{
+
+#ifndef TX_DISABLE_NOTIFY_CALLBACKS
+    VOID            (*entry_exit_notify)(TX_THREAD *, UINT);
+#endif
+
+
+    /* Determine if this is the start thread.  If so, we must prepare the module for
+       execution.  If not, simply skip the C startup code.  */
+    if (thread_info -> txm_module_thread_entry_info_start_thread)
+    {
+        /* Initialize the GNU C environment.  */
+        _gcc_setup(thread_info -> txm_module_thread_entry_info_code_base_address);
+        
+        /* Save the entry info pointer, for later use.  */
+        _txm_module_entry_info =  thread_info;
+        
+        /* Save the kernel function dispatch address. This is used to make all resident calls from
+           the module.  */
+        _txm_module_kernel_call_dispatcher =  thread_info -> txm_module_thread_entry_info_kernel_call_dispatcher;
+        
+        /* Ensure that we have a valid pointer.  */
+        while (!_txm_module_kernel_call_dispatcher)
+        {
+            /* Loop here, if an error is present getting the dispatch function pointer!
+               An error here typically indicates the resident portion of _tx_thread_schedule
+               is not supporting the trap to obtain the function pointer.   */
+        }
+        
+        /* Resume the module's callback thread, already created in the manager.  */
+        _txe_thread_resume(thread_info -> txm_module_thread_entry_info_callback_request_thread);
+    }
+
+#ifndef TX_DISABLE_NOTIFY_CALLBACKS
+
+    /* Pickup the entry/exit application callback routine.  */
+    entry_exit_notify =  thread_info -> txm_module_thread_entry_info_exit_notify;
+
+    /* Determine if an application callback routine is specified.  */
+    if (entry_exit_notify != TX_NULL)
+    {
+
+        /* Yes, notify application that this thread has been entered!  */
+        (entry_exit_notify)(thread_ptr, TX_THREAD_ENTRY);
+    }
+#endif
+
+    /* Call current thread's entry function.  */
+    (thread_info -> txm_module_thread_entry_info_entry) (thread_info -> txm_module_thread_entry_info_parameter);
+
+    /* Suspend thread with a "completed" state.  */
+
+
+#ifndef TX_DISABLE_NOTIFY_CALLBACKS
+
+    /* Pickup the entry/exit application callback routine again.  */
+    entry_exit_notify =  thread_info -> txm_module_thread_entry_info_exit_notify;
+
+    /* Determine if an application callback routine is specified.  */
+    if (entry_exit_notify != TX_NULL)
+    {
+
+        /* Yes, notify application that this thread has exited!  */
+        (entry_exit_notify)(thread_ptr, TX_THREAD_EXIT);
+    }
+#endif
+
+    /* Call actual thread suspension routine.  */
+    _txm_module_thread_system_suspend(thread_ptr);
+
+#ifdef TX_SAFETY_CRITICAL
+
+    /* If we ever get here, raise safety critical exception.  */
+    TX_SAFETY_CRITICAL_EXCEPTION(__FILE__, __LINE__, 0);
+#endif
+}
+

ports_module/cortex_m33/gnu/module_lib/src/txm_thread_secure_stack_allocate.c

@@ -0,0 +1,77 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Module                                                              */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+#define TXM_MODULE
+#include "txm_module.h"
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _txe_thread_secure_stack_allocate                   PORTABLE C      */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function allocate a secure stack for the thread.               */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    thread_ptr                            Thread control block pointer  */
+/*    stack_size                            Size of secure stack to       */
+/*                                            allocate                    */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    TX_THREAD_ERROR                   Invalid thread pointer            */
+/*    TX_CALLER_ERROR                   Invalid caller of this function   */
+/*    status                            Actual completion status          */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    _txm_module_kernel_call_dispatcher                                  */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    Module application code                                             */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  03-02-2021      Scott Larson            Initial Version 6.1.5         */
+/*                                                                        */
+/**************************************************************************/
+UINT _txe_thread_secure_stack_allocate(TX_THREAD *thread_ptr, ULONG stack_size)
+{
+
+UINT return_value;
+
+    /* Call module manager dispatcher.  */
+    return_value = (UINT) (_txm_module_kernel_call_dispatcher)(TXM_THREAD_SECURE_STACK_ALLOCATE_CALL, (ALIGN_TYPE) thread_ptr, (ALIGN_TYPE) stack_size, 0);
+
+    /* Return value to the caller.  */
+    return(return_value);
+}

ports_module/cortex_m33/gnu/module_lib/src/txm_thread_secure_stack_free.c

@@ -0,0 +1,75 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Module                                                              */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+#define TXM_MODULE
+#include "txm_module.h"
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _txe_thread_secure_stack_free                       PORTABLE C      */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function frees the thread's secure stack.                      */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    thread_ptr                            Thread control block pointer  */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    TX_THREAD_ERROR                       Invalid thread pointer        */
+/*    TX_CALLER_ERROR                       Invalid caller of function    */
+/*    status                                Actual completion status      */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    _txm_module_kernel_call_dispatcher                                  */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    Module application code                                             */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  03-02-2021      Scott Larson            Initial Version 6.1.5         */
+/*                                                                        */
+/**************************************************************************/
+UINT _txe_thread_secure_stack_free(TX_THREAD *thread_ptr)
+{
+
+UINT return_value;
+
+    /* Call module manager dispatcher.  */
+    return_value = (UINT) (_txm_module_kernel_call_dispatcher)(TXM_THREAD_SECURE_STACK_FREE_CALL, (ALIGN_TYPE) thread_ptr, 0, 0);
+
+    /* Return value to the caller.  */
+    return(return_value);
+}

ports_module/cortex_m33/gnu/module_manager/inc/txm_module_manager_dispatch_port.h

@@ -0,0 +1,65 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Module Manager                                                      */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+/* Define port-specific dispatch functions. */
+
+/* UINT _txe_thread_secure_stack_allocate(
+    TX_THREAD *thread_ptr, -> param_0
+    ULONG stack_size -> param_1
+   ); */
+static ALIGN_TYPE _txm_module_manager_tx_thread_secure_stack_allocate_dispatch(TXM_MODULE_INSTANCE *module_instance, ALIGN_TYPE param_0, ALIGN_TYPE param_1)
+{
+
+ALIGN_TYPE return_value;
+
+    if (module_instance -> txm_module_instance_property_flags & TXM_MODULE_MEMORY_PROTECTION)
+    {
+        if (!TXM_MODULE_MANAGER_PARAM_CHECK_OBJECT_FOR_USE(module_instance, param_0, sizeof(TX_THREAD)))
+            return(TXM_MODULE_INVALID_MEMORY);
+    }
+
+    return_value = (ALIGN_TYPE) _txe_thread_secure_stack_allocate(
+        (TX_THREAD *) param_0,
+        (ULONG) param_1
+    );
+    return(return_value);
+}
+
+/* UINT _txe_thread_secure_stack_free(
+    TX_THREAD *thread_ptr -> param_0
+   ); */
+static ALIGN_TYPE _txm_module_manager_tx_thread_secure_stack_free_dispatch(TXM_MODULE_INSTANCE *module_instance, ALIGN_TYPE param_0)
+{
+
+ALIGN_TYPE return_value;
+
+    if (module_instance -> txm_module_instance_property_flags & TXM_MODULE_MEMORY_PROTECTION)
+    {
+        if (!TXM_MODULE_MANAGER_PARAM_CHECK_OBJECT_FOR_USE(module_instance, param_0, sizeof(TX_THREAD)))
+            return(TXM_MODULE_INVALID_MEMORY);
+    }
+
+    return_value = (ALIGN_TYPE) _txe_thread_secure_stack_free(
+        (TX_THREAD *) param_0
+    );
+    return(return_value);
+}

ports_module/cortex_m33/gnu/module_manager/src/tx_initialize_low_level.S

@@ -0,0 +1,268 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Initialize                                                          */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+
+SYSTEM_CLOCK        =     6000000
+SYSTICK_CYCLES      =     ((SYSTEM_CLOCK / 100) -1)
+
+/* Setup the stack and heap areas.  */
+
+STACK_SIZE          =     0x00000400
+HEAP_SIZE           =     0x00000000
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_initialize_low_level                          Cortex-M33/GNU    */
+/*                                                           6.1          */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function is responsible for any low-level processor            */
+/*    initialization, including setting up interrupt vectors, setting     */
+/*    up a periodic timer interrupt source, saving the system stack       */
+/*    pointer for use in ISR processing later, and finding the first      */
+/*    available RAM memory address for tx_application_define.             */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    _tx_initialize_kernel_enter           ThreadX entry function        */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
+/*                                                                        */
+/**************************************************************************/
+// VOID   _tx_initialize_low_level(VOID)
+// {
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  _tx_initialize_low_level
+    .thumb_func
+.type _tx_initialize_low_level, function
+_tx_initialize_low_level:
+
+    /* Disable interrupts during ThreadX initialization.  */
+    CPSID   i
+
+    /* Set base of available memory to end of non-initialised RAM area.  */
+    LDR     r0, =_tx_initialize_unused_memory       // Build address of unused memory pointer
+    LDR     r1, =__RAM_segment_used_end__           // Build first free address
+    ADD     r1, r1, #4                              //
+    STR     r1, [r0]                                // Setup first unused memory pointer
+
+    /* Setup Vector Table Offset Register.  */
+    MOV     r0, #0xE000E000                         // Build address of NVIC registers
+    LDR     r1, =_vectors                           // Pickup address of vector table
+    STR     r1, [r0, #0xD08]                        // Set vector table address
+
+    /* Enable the cycle count register.  */
+    LDR     r0, =0xE0001000                         // Build address of DWT register
+    LDR     r1, [r0]                                // Pickup the current value
+    ORR     r1, r1, #1                              // Set the CYCCNTENA bit
+    STR     r1, [r0]                                // Enable the cycle count register
+
+    /* Set system stack pointer from vector value.  */
+    LDR     r0, =_tx_thread_system_stack_ptr        // Build address of system stack pointer
+    LDR     r1, =_vectors                           // Pickup address of vector table
+    LDR     r1, [r1]                                // Pickup reset stack pointer
+    STR     r1, [r0]                                // Save system stack pointer
+
+    /* Configure SysTick.  */
+    MOV     r0, #0xE000E000                         // Build address of NVIC registers
+    LDR     r1, =SYSTICK_CYCLES
+    STR     r1, [r0, #0x14]                         // Setup SysTick Reload Value
+    MOV     r1, #0x7                                // Build SysTick Control Enable Value
+    STR     r1, [r0, #0x10]                         // Setup SysTick Control
+
+    /* Configure handler priorities.  */
+    LDR     r1, =0x00000000                         // Rsrv, UsgF, BusF, MemM
+    STR     r1, [r0, #0xD18]                        // Setup System Handlers 4-7 Priority Registers
+
+    LDR     r1, =0xFF000000                         // SVCl, Rsrv, Rsrv, Rsrv
+    STR     r1, [r0, #0xD1C]                        // Setup System Handlers 8-11 Priority Registers
+                                                    // Note: SVC must be lowest priority, which is 0xFF
+
+    LDR     r1, =0x40FF0000                         // SysT, PnSV, Rsrv, DbgM
+    STR     r1, [r0, #0xD20]                        // Setup System Handlers 12-15 Priority Registers
+                                                    // Note: PnSV must be lowest priority, which is 0xFF
+
+    /* Return to caller.  */
+    BX      lr
+// }
+
+
+/* Define shells for each of the unused vectors.  */
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  __tx_BadHandler
+    .thumb_func
+.type __tx_BadHandler, function
+__tx_BadHandler:
+    B       __tx_BadHandler
+
+
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  __tx_IntHandler
+    .thumb_func
+.type __tx_IntHandler, function
+__tx_IntHandler:
+// VOID InterruptHandler (VOID)
+// {
+    PUSH    {r0,lr}     // Save LR (and dummy r0 to maintain stack alignment)
+
+    /* Do interrupt handler work here */
+    /* .... */
+
+    POP     {r0,lr}
+    BX      LR
+// }
+
+
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  SysTick_Handler
+    .thumb_func
+.type SysTick_Handler, function
+SysTick_Handler:
+// VOID TimerInterruptHandler (VOID)
+// {
+    PUSH    {r0,lr}     // Save LR (and dummy r0 to maintain stack alignment)
+    BL      _tx_timer_interrupt
+    POP     {r0,lr}
+    BX      LR
+// }
+
+
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  HardFault_Handler
+    .thumb_func
+.type HardFault_Handler, function
+HardFault_Handler:
+    B       HardFault_Handler
+
+
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  UsageFault_Handler
+    .thumb_func
+.type UsageFault_Handler, function
+UsageFault_Handler:
+    CPSID   i                                       // Disable interrupts
+    // Check for stack limit fault
+    LDR     r0, =0xE000ED28                         // CFSR address
+    LDR     r1,[r0]                                 // Pick up CFSR
+    TST     r1, #0x00100000                         // Check for Stack Overflow
+_unhandled_usage_loop:
+    BEQ     _unhandled_usage_loop                   // If not stack overflow then loop
+
+    // Handle stack overflow
+    STR     r1, [r0]                                // Clear CFSR flag(s)
+
+#ifdef __ARM_PCS_VFP
+    LDR     r0, =0xE000EF34                         // Cleanup FPU context: Load FPCCR address
+    LDR     r1, [r0]                                // Load FPCCR
+    BIC     r1, r1, #1                              // Clear the lazy preservation active bit
+    STR     r1, [r0]                                // Store the value
+#endif
+
+    LDR     r0, =_tx_thread_current_ptr             // Build current thread pointer address
+    LDR     r0,[r0]                                 // Pick up current thread pointer
+    PUSH    {r0,lr}                                 // Save LR (and r0 to maintain stack alignment)
+    BL      _tx_thread_stack_error_handler          // Call ThreadX/user handler
+    POP     {r0,lr}                                 // Restore LR and dummy reg
+
+#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
+    // Call the thread exit function to indicate the thread is no longer executing.
+    PUSH    {r0, lr}                                // Save LR (and r0 just for alignment)
+    BL      _tx_execution_thread_exit               // Call the thread exit function
+    POP     {r0, lr}                                // Recover LR
+#endif
+
+    MOV     r1, #0                                  // Build NULL value
+    LDR     r0, =_tx_thread_current_ptr             // Pickup address of current thread pointer
+    STR     r1, [r0]                                // Clear current thread pointer
+
+    // Return from UsageFault_Handler exception
+    LDR     r0, =0xE000ED04                         // Load ICSR
+    LDR     r1, =0x10000000                         // Set PENDSVSET bit
+    STR     r1, [r0]                                // Store ICSR
+    DSB                                             // Wait for memory access to complete
+    CPSIE   i                                       // Enable interrupts
+    BX      lr                                      // Return from exception
+
+
+
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  __tx_NMIHandler
+    .thumb_func
+.type __tx_NMIHandler, function
+__tx_NMIHandler:
+    B       __tx_NMIHandler
+
+
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  __tx_DBGHandler
+    .thumb_func
+.type __tx_DBGHandler, function
+__tx_DBGHandler:
+    B       __tx_DBGHandler
+
+    .end

ports_module/cortex_m33/gnu/module_manager/src/tx_thread_context_restore.s

@@ -0,0 +1,74 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Thread                                                              */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_thread_context_restore                        Cortex-M33/GNU    */
+/*                                                           6.1          */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function is not needed for Cortex-M.                           */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    _tx_thread_schedule                   Thread scheduling routine     */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    ISRs                                  Interrupt Service Routines    */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
+/*                                                                        */
+/**************************************************************************/
+// VOID   _tx_thread_context_restore(VOID)
+// {
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  _tx_thread_context_restore
+    .thumb_func
+.type _tx_thread_context_restore, function
+_tx_thread_context_restore:
+    /* Just return!  */
+    BX      lr
+// }
+    .end

ports_module/cortex_m33/gnu/module_manager/src/tx_thread_context_save.s

@@ -0,0 +1,74 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Thread                                                              */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_thread_context_save                           Cortex-M33/GNU    */
+/*                                                           6.1          */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function is not needed for Cortex-M.                           */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    ISRs                                                                */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
+/*                                                                        */
+/**************************************************************************/
+// VOID   _tx_thread_context_save(VOID)
+// {
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  _tx_thread_context_save
+    .thumb_func
+.type _tx_thread_context_save, function
+_tx_thread_context_save:
+    /* Return to interrupt processing.  */
+    BX      lr
+// }
+    .end

ports_module/cortex_m33/gnu/module_manager/src/tx_thread_interrupt_control.s

@@ -0,0 +1,78 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Thread                                                              */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_thread_interrupt_control                      Cortex-M33/GNU    */
+/*                                                           6.1          */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function is responsible for changing the interrupt lockout     */
+/*    posture of the system.                                              */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    new_posture                           New interrupt lockout posture */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    old_posture                           Old interrupt lockout posture */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    Application Code                                                    */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
+/*                                                                        */
+/**************************************************************************/
+// UINT   _tx_thread_interrupt_control(UINT new_posture)
+// {
+    .section .text
+    .balign 4
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  _tx_thread_interrupt_control
+    .thumb_func
+.type _tx_thread_interrupt_control, function
+_tx_thread_interrupt_control:
+
+    /* Pickup current interrupt lockout posture.  */
+    MRS     r1, PRIMASK
+    MSR     PRIMASK, r0
+    MOV     r0, r1
+    BX      lr
+// }
+    .end

ports_module/cortex_m33/gnu/module_manager/src/tx_thread_interrupt_disable.s

@@ -0,0 +1,77 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Thread                                                              */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_thread_interrupt_disable                      Cortex-M33/GNU    */
+/*                                                           6.1          */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function is responsible for disabling interrupts and returning */
+/*    the previous interrupt lockout posture.                             */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    old_posture                           Old interrupt lockout posture */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    Application Code                                                    */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
+/*                                                                        */
+/**************************************************************************/
+// UINT   _tx_thread_interrupt_disable(UINT new_posture)
+// {
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  _tx_thread_interrupt_disable
+    .thumb_func
+.type _tx_thread_interrupt_disable, function
+_tx_thread_interrupt_disable:
+    /* Return current interrupt lockout posture.  */
+    MRS     r0, PRIMASK
+    CPSID   i
+    BX      lr
+// }
+    .end

ports_module/cortex_m33/gnu/module_manager/src/tx_thread_interrupt_restore.s

@@ -0,0 +1,76 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Thread                                                              */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_thread_interrupt_restore                      Cortex-M33/GNU    */
+/*                                                           6.1          */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function is responsible for restoring the previous             */
+/*    interrupt lockout posture.                                          */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    previous_posture                      Previous interrupt posture    */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    Application Code                                                    */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
+/*                                                                        */
+/**************************************************************************/
+// VOID   _tx_thread_interrupt_restore(UINT new_posture)
+// {
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  _tx_thread_interrupt_restore
+    .thumb_func
+.type _tx_thread_interrupt_restore, function
+_tx_thread_interrupt_restore:
+    /* Restore previous interrupt lockout posture.  */
+    MSR     PRIMASK, r0
+    BX      lr
+// }
+    .end

ports_module/cortex_m33/gnu/module_manager/src/tx_thread_schedule.S

@@ -0,0 +1,620 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Thread                                                              */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+    .global _tx_thread_secure_mode_stack_allocate
+    .global _tx_thread_secure_mode_stack_free
+    .global _tx_thread_secure_stack_context_restore
+    .global _tx_thread_secure_stack_context_save
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_thread_schedule                             Cortex-M33/MPU/GNU  */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function waits for a thread control block pointer to appear in */
+/*    the _tx_thread_execute_ptr variable.  Once a thread pointer appears */
+/*    in the variable, the corresponding thread is resumed.               */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    _tx_initialize_kernel_enter          ThreadX entry function         */
+/*    _tx_thread_system_return             Return to system from thread   */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  03-02-2021      Scott Larson            Initial Version 6.1.5         */
+/*                                                                        */
+/**************************************************************************/
+// VOID   _tx_thread_schedule(VOID)
+// {
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  _tx_thread_schedule
+    .thumb_func
+.type _tx_thread_schedule, function
+_tx_thread_schedule:
+
+    /* This function should only ever be called on Cortex-M
+       from the first schedule request. Subsequent scheduling occurs
+       from the PendSV handling routine below. */
+
+    /* Clear the preempt-disable flag to enable rescheduling after initialization on Cortex-M targets.  */
+
+    MOV     r0, #0                                  // Build value for TX_FALSE
+    LDR     r2, =_tx_thread_preempt_disable         // Build address of preempt disable flag
+    STR     r0, [r2, #0]                            // Clear preempt disable flag
+
+    /* Clear CONTROL.FPCA bit so VFP registers aren't unnecessarily stacked.  */
+
+#ifdef __ARM_PCS_VFP
+    MRS     r0, CONTROL                             // Pickup current CONTROL register
+    BIC     r0, r0, #4                              // Clear the FPCA bit
+    MSR     CONTROL, r0                             // Setup new CONTROL register
+#endif
+
+    /* Enable memory fault registers.  */
+
+    LDR     r0, =0xE000ED24                         // Build SHCSR address
+    LDR     r1, =0x70000                            // Enable Usage, Bus, and MemManage faults
+    STR     r1, [r0]                                //
+
+    /* Enable interrupts */
+
+    CPSIE   i
+
+    /* Enter the scheduler for the first time.  */
+
+    MOV     r0, #0x10000000                         // Load PENDSVSET bit
+    MOV     r1, #0xE000E000                         // Load NVIC base
+    STR     r0, [r1, #0xD04]                        // Set PENDSVBIT in ICSR
+    DSB                                             // Complete all memory accesses
+    ISB                                             // Flush pipeline
+
+    /* Wait here for the PendSV to take place.  */
+
+__tx_wait_here:
+    B       __tx_wait_here                          // Wait for the PendSV to happen
+// }
+
+
+    /* Memory Exception Handler.  */
+
+    .global  MemManage_Handler
+    .global  BusFault_Handler
+    .thumb_func
+MemManage_Handler:
+    .thumb_func
+BusFault_Handler:
+
+    CPSID   i                                       // Disable interrupts
+
+    /* Now pickup and store all the fault related information.  */
+
+    LDR     r12,=_txm_module_manager_memory_fault_info  // Pickup fault info struct
+    LDR     r0, =_tx_thread_current_ptr             // Build current thread pointer address
+    LDR     r1, [r0]                                // Pickup the current thread pointer
+    STR     r1, [r12, #0]                           // Save current thread pointer in fault info structure
+    LDR     r0, =0xE000ED24                         // Build SHCSR address
+    LDR     r1, [r0]                                // Pickup SHCSR
+    STR     r1, [r12, #8]                           // Save SHCSR
+    LDR     r0, =0xE000ED28                         // Build CFSR address
+    LDR     r1, [r0]                                // Pickup CFSR
+    STR     r1, [r12, #12]                          // Save CFSR
+    LDR     r0, =0xE000ED34                         // Build MMFAR address
+    LDR     r1, [r0]                                // Pickup MMFAR
+    STR     r1, [r12, #16]                          // Save MMFAR
+    LDR     r0, =0xE000ED38                         // Build BFAR address
+    LDR     r1, [r0]                                // Pickup BFAR
+    STR     r1, [r12, #20]                          // Save BFAR
+    MRS     r0, CONTROL                             // Pickup current CONTROL register
+    STR     r0, [r12, #24]                          // Save CONTROL
+    MRS     r1, PSP                                 // Pickup thread stack pointer
+    STR     r1, [r12, #28]                          // Save thread stack pointer
+    LDR     r0, [r1]                                // Pickup saved r0
+    STR     r0, [r12, #32]                          // Save r0
+    LDR     r0, [r1, #4]                            // Pickup saved r1
+    STR     r0, [r12, #36]                          // Save r1
+    STR     r2, [r12, #40]                          // Save r2
+    STR     r3, [r12, #44]                          // Save r3
+    STR     r4, [r12, #48]                          // Save r4
+    STR     r5, [r12, #52]                          // Save r5
+    STR     r6, [r12, #56]                          // Save r6
+    STR     r7, [r12, #60]                          // Save r7
+    STR     r8, [r12, #64]                          // Save r8
+    STR     r9, [r12, #68]                          // Save r9
+    STR     r10,[r12, #72]                          // Save r10
+    STR     r11,[r12, #76]                          // Save r11
+    LDR     r0, [r1, #16]                           // Pickup saved r12
+    STR     r0, [r12, #80]                          // Save r12
+    LDR     r0, [r1, #20]                           // Pickup saved lr
+    STR     r0, [r12, #84]                          // Save lr
+    LDR     r0, [r1, #24]                           // Pickup instruction address at point of fault
+    STR     r0, [r12, #4]                           // Save point of fault
+    LDR     r0, [r1, #28]                           // Pickup xPSR
+    STR     r0, [r12, #88]                          // Save xPSR
+
+    MRS     r0, CONTROL                             // Pickup current CONTROL register
+    BIC     r0, r0, #1                              // Clear the UNPRIV bit
+    MSR     CONTROL, r0                             // Setup new CONTROL register
+
+    LDR     r0, =0xE000ED28                         // Build the Memory Management Fault Status Register (MMFSR)
+    LDRB    r1, [r0]                                // Pickup the MMFSR, with the following bit definitions:
+                                                    //     Bit 0 = 1 -> Instruction address violation
+                                                    //     Bit 1 = 1 -> Load/store address violation
+                                                    //     Bit 7 = 1 -> MMFAR is valid
+    STRB    r1, [r0]                                // Clear the MMFSR
+
+#ifdef __ARM_PCS_VFP
+    LDR     r0, =0xE000EF34                         // Cleanup FPU context: Load FPCCR address
+    LDR     r1, [r0]                                // Load FPCCR
+    BIC     r1, r1, #1                              // Clear the lazy preservation active bit
+    STR     r1, [r0]                                // Store the value
+#endif
+
+    BL      _txm_module_manager_memory_fault_handler    // Call memory manager fault handler
+
+#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
+    /* Call the thread exit function to indicate the thread is no longer executing.  */
+    CPSID   i                                       // Disable interrupts
+    BL      _tx_execution_thread_exit               // Call the thread exit function
+    CPSIE   i                                       // Enable interrupts
+#endif
+
+    MOV     r1, #0                                  // Build NULL value
+    LDR     r0, =_tx_thread_current_ptr             // Pickup address of current thread pointer
+    STR     r1, [r0]                                // Clear current thread pointer
+
+    // Return from MemManage_Handler exception
+    LDR     r0, =0xE000ED04                         // Load ICSR
+    LDR     r1, =0x10000000                         // Set PENDSVSET bit
+    STR     r1, [r0]                                // Store ICSR
+    DSB                                             // Wait for memory access to complete
+    CPSIE   i                                       // Enable interrupts
+#ifdef TX_SINGLE_MODE_SECURE
+    LDR     lr, =0xFFFFFFFD                         // Exception return to secure
+#else
+    LDR     lr, =0xFFFFFFBC                         // Exception return to non-secure
+#endif
+    BX      lr                                      // Return from exception
+
+
+    /* Generic context switching PendSV handler.  */
+
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  PendSV_Handler
+    .thumb_func
+.type PendSV_Handler, function
+    /* Get current thread value and new thread pointer.  */
+PendSV_Handler:
+__tx_ts_handler:
+
+#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
+    /* Call the thread exit function to indicate the thread is no longer executing.  */
+    CPSID   i                                       // Disable interrupts
+    PUSH    {r0, lr}                                // Save LR (and r0 just for alignment)
+    BL      _tx_execution_thread_exit               // Call the thread exit function
+    POP     {r0, lr}                                // Recover LR
+    CPSIE   i                                       // Enable interrupts
+#endif
+
+    LDR     r0, =_tx_thread_current_ptr             // Build current thread pointer address
+    LDR     r2, =_tx_thread_execute_ptr             // Build execute thread pointer address
+    MOV     r3, #0                                  // Build NULL value
+    LDR     r1, [r0]                                // Pickup current thread pointer
+
+    /* Determine if there is a current thread to finish preserving.  */
+
+    CBZ     r1, __tx_ts_new                         // If NULL, skip preservation
+
+    /* Recover PSP and preserve current thread context.  */
+
+    STR     r3, [r0]                                // Set _tx_thread_current_ptr to NULL
+    MRS     r12, PSP                                // Pickup PSP pointer (thread's stack pointer)
+    STMDB   r12!, {r4-r11}                          // Save its remaining registers
+#ifdef __ARM_PCS_VFP
+    TST     LR, #0x10                               // Determine if the VFP extended frame is present
+    BNE     _skip_vfp_save
+    VSTMDB  r12!,{s16-s31}                          // Yes, save additional VFP registers
+_skip_vfp_save:
+#endif
+    LDR     r4, =_tx_timer_time_slice               // Build address of time-slice variable
+    STMDB   r12!, {LR}                              // Save LR on the stack
+    STR     r12, [r1, #8]                           // Save the thread stack pointer
+
+#if (!defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE))
+    // Save secure context
+    LDR     r5, [r1,#0xC4]                          // Load secure stack index
+    CBZ     r5, _skip_secure_save                   // Skip save if there is no secure context
+    PUSH    {r0,r1,r2,r3}                           // Save scratch registers
+    MOV     r0, r1                                  // Move thread ptr to r0
+    BL      _tx_thread_secure_stack_context_save    // Save secure stack
+    POP     {r0,r1,r2,r3}                           // Restore secure registers
+_skip_secure_save:
+#endif
+
+    /* Determine if time-slice is active. If it isn't, skip time handling processing.  */
+
+    LDR     r5, [r4]                                // Pickup current time-slice
+    CBZ     r5, __tx_ts_new                         // If not active, skip processing
+
+    /* Time-slice is active, save the current thread's time-slice and clear the global time-slice variable.  */
+
+    STR     r5, [r1, #24]                           // Save current time-slice
+
+    /* Clear the global time-slice.  */
+
+    STR     r3, [r4]                                // Clear time-slice
+
+    /* Executing thread is now completely preserved!!!  */
+
+__tx_ts_new:
+
+    /* Now we are looking for a new thread to execute!  */
+
+    CPSID   i                                       // Disable interrupts
+    LDR     r1, [r2]                                // Is there another thread ready to execute?
+    CBNZ    r1, __tx_ts_restore                     // Yes, schedule it
+
+    /* The following is the idle wait processing... in this case, no threads are ready for execution and the
+       system will simply be idle until an interrupt occurs that makes a thread ready. Note that interrupts
+       are disabled to allow use of WFI for waiting for a thread to arrive.  */
+
+__tx_ts_wait:
+    CPSID   i                                       // Disable interrupts
+    LDR     r1, [r2]                                // Pickup the next thread to execute pointer
+    CBNZ    r1, __tx_ts_ready                       // If non-NULL, a new thread is ready!
+#ifdef TX_ENABLE_WFI
+    DSB                                             // Ensure no outstanding memory transactions
+    WFI                                             // Wait for interrupt
+    ISB                                             // Ensure pipeline is flushed
+#endif
+    CPSIE   i                                       // Enable interrupts
+    B       __tx_ts_wait                            // Loop to continue waiting
+
+    /* At this point, we have a new thread ready to go. Clear any newly pended PendSV - since we are
+       already in the handler!  */
+
+__tx_ts_ready:
+    MOV     r7, #0x08000000                         // Build clear PendSV value
+    MOV     r8, #0xE000E000                         // Build base NVIC address
+    STR     r7, [r8, #0xD04]                        // Clear any PendSV
+
+__tx_ts_restore:
+
+    /* A thread is ready, make the current thread the new thread
+       and enable interrupts.  */
+
+    STR     r1, [r0]                                // Setup the current thread pointer to the new thread
+    CPSIE   i                                       // Enable interrupts
+
+    /* Increment the thread run count.  */
+
+    LDR     r7, [r1, #4]                            // Pickup the current thread run count
+    LDR     r4, =_tx_timer_time_slice               // Build address of time-slice variable
+    LDR     r5, [r1, #24]                           // Pickup thread's current time-slice
+    ADD     r7, r7, #1                              // Increment the thread run count
+    STR     r7, [r1, #4]                            // Store the new run count
+
+    /* Setup global time-slice with thread's current time-slice.  */
+
+    STR     r5, [r4]                                // Setup global time-slice
+
+#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
+    /* Call the thread entry function to indicate the thread is executing.  */
+    PUSH    {r0, r1}                                // Save r0 and r1
+    BL      _tx_execution_thread_enter              // Call the thread execution enter function
+    POP     {r0, r1}                                // Recover r0 and r1
+#endif
+
+#if (!defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE))
+    // Restore secure context
+    LDR     r0, [r1,#0xC4]                          // Load secure stack index
+    CBZ     r0, _skip_secure_restore                // Skip restore if there is no secure context
+    PUSH    {r0,r1}                                 // Save r1 (and dummy r0)
+    MOV     r0, r1                                  // Move thread ptr to r0
+    BL      _tx_thread_secure_stack_context_restore // Restore secure stack
+    POP     {r0,r1}                                 // Restore r1 (and dummy r0)
+_skip_secure_restore:
+#endif
+
+    /* Restore the thread context and PSP.  */
+    LDR     r12, [r1, #12]                          // Get stack start
+    MSR     PSPLIM, r12                             // Set stack limit
+    LDR     r12, [r1, #8]                           // Pickup thread's stack pointer
+
+    MRS     r5, CONTROL                             // Pickup current CONTROL register
+    LDR     r4, [r1, #0x98]                         // Pickup current user mode flag
+    BIC     r5, r5, #1                              // Clear the UNPRIV bit
+    ORR     r4, r4, r5                              // Build new CONTROL register
+    MSR     CONTROL, r4                             // Setup new CONTROL register
+
+    LDR     r0, =0xE000ED94                         // Build MPU control reg address
+    MOV     r3, #0                                  // Build disable value
+    STR     r3, [r0]                                // Disable MPU
+    LDR     r0, [r1, #0x90]                         // Pickup the module instance pointer
+    CBZ     r0, skip_mpu_setup                      // Is this thread owned by a module? No, skip MPU setup
+    LDR     r1, [r0, #0x64]                         // Pickup MPU register[0]
+    CBZ     r1, skip_mpu_setup                      // Is protection required for this module? No, skip MPU setup
+    LDR     r1, =0xE000ED9C                         // Build address of MPU base register
+
+    // Use alias registers to quickly load MPU
+    ADD     r0, r0, #0x64                           // Build address of MPU register start in thread control block
+    LDM     r0!, {r2-r9}                            // Load first four MPU regions
+    STM     r1, {r2-r9}                             // Store first four MPU regions
+    MOV     r2, #4                                  // Select region 4
+    LDR     r3, =0xE000ED98                         // Get region register
+    STR     r2, [r3]                                // Set region to 4
+    LDM     r0, {r2-r9}                             // Load second four MPU regions
+    STM     r1, {r2-r9}                             // Store second four MPU regions
+    LDR     r0, =0xE000ED94                         // Build MPU control reg address
+    MOV     r1, #5                                  // Build enable value with background region enabled
+    STR     r1, [r0]                                // Enable MPU
+skip_mpu_setup:
+    LDMIA   r12!, {LR}                              // Pickup LR
+#ifdef __ARM_PCS_VFP
+    TST     LR, #0x10                               // Determine if the VFP extended frame is present
+    BNE     _skip_vfp_restore                       // If not, skip VFP restore
+    VLDMIA  r12!, {s16-s31}                         // Yes, restore additional VFP registers
+_skip_vfp_restore:
+#endif
+    LDMIA   r12!, {r4-r11}                          // Recover thread's registers
+    MSR     PSP, r12                                // Setup the thread's stack pointer
+
+    /* Return to thread.  */
+
+    BX      lr                                      // Return to thread!
+
+
+    /* SVC Handler.  */
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  SVC_Handler
+    .thumb_func
+.type SVC_Handler, function
+SVC_Handler:
+    TST     lr, #0x04                               // Determine return stack from EXC_RETURN bit 2
+    ITE     EQ
+    MRSEQ   r0, MSP                                 // Get MSP
+    MRSNE   r0, PSP                                 // Get PSP
+
+    LDR     r1, [r0,#24]                            // Load saved PC from stack
+    LDRB    r2, [r1,#-2]                            // Load SVC number
+
+#if (!defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE))
+    CMP     r2, #1                                  // Is it a secure stack allocate request?
+    BEQ     _tx_svc_secure_alloc                    // Yes, go there
+
+    CMP     r2, #2                                  // Is it a secure stack free request?
+    BEQ     _tx_svc_secure_free                     // Yes, go there
+#endif   // End of ifndef TX_SINGLE_MODE_SECURE, TX_SINGLE_MODE_NON_SECURE
+
+
+    CMP     r2, #3                                  // Is it the entry into ThreadX?
+    BNE     _tx_thread_user_return                  // No, return to user mode
+
+    /* At this point we have an SVC 3, which means we are entering
+       the kernel from a module thread with user mode selected. */
+
+    LDR     r2, =_txm_module_priv                   // Load address of where we should have come from
+    CMP     r1, r2                                  // Did we come from user_mode_entry?
+    IT      NE                                      // If no (not equal), then...
+    BXNE    lr                                      // return from where we came.
+
+    LDR     r3, [r0, #20]                           // This is the saved LR
+    LDR     r1, =_tx_thread_current_ptr             // Build current thread pointer address
+    LDR     r2, [r1]                                // Pickup current thread pointer
+    MOV     r1, #0                                  // Build clear value
+    STR     r1, [r2, #0x98]                         // Clear the current user mode selection for thread
+    STR     r3, [r2, #0xA0]                         // Save the original LR in thread control block
+
+    /* If there is memory protection, use kernel stack */
+    LDR     r0, [r2, #0x90]                         // Load the module instance ptr
+    LDR     r0, [r0, #0x0C]                         // Load the module property flags
+    TST     r0, #2                                  // Check if memory protected
+    BEQ     _tx_skip_kernel_stack_enter
+
+    /* Switch to the module thread's kernel stack */
+    LDR     r0, [r2, #0xA8]                         // Load the module kernel stack end
+    LDR     r1, [r2, #0xA4]                         // Load the module kernel stack start
+    MSR     PSPLIM, r1                              // Set stack limit
+#ifndef TXM_MODULE_KERNEL_STACK_MAINTENANCE_DISABLE
+    LDR     r3, [r2, #0xAC]                         // Load the module kernel stack size
+    STR     r1, [r2, #12]                           // Set stack start
+    STR     r0, [r2, #16]                           // Set stack end
+    STR     r3, [r2, #20]                           // Set stack size
+#endif
+
+    MRS     r3, PSP                                 // Pickup thread stack pointer
+    STR     r3, [r2, #0xB0]                         // Save thread stack pointer
+
+    /* Build kernel stack by copying thread stack two registers at a time */
+    ADD     r3, r3, #32                             // Start at bottom of hardware stack
+    LDMDB   r3!,{r1-r2}
+    STMDB   r0!,{r1-r2}
+    LDMDB   r3!,{r1-r2}
+    STMDB   r0!,{r1-r2}
+    LDMDB   r3!,{r1-r2}
+    STMDB   r0!,{r1-r2}
+    LDMDB   r3!,{r1-r2}
+    STMDB   r0!,{r1-r2}
+
+    MSR     PSP, r0                                 // Set kernel stack pointer
+
+_tx_skip_kernel_stack_enter:
+    MRS     r0, CONTROL                             // Pickup current CONTROL register
+    BIC     r0, r0, #1                              // Clear the UNPRIV bit
+    MSR     CONTROL, r0                             // Setup new CONTROL register
+    BX      lr                                      // Return to thread
+
+
+_tx_thread_user_return:
+    LDR     r2, =_txm_module_user_mode_exit         // Load address of where we should have come from
+    CMP     r1, r2                                  // Did we come from user_mode_exit?
+    IT      NE                                      // If no (not equal), then...
+    BXNE    lr                                      // return from where we came
+
+    LDR     r1, =_tx_thread_current_ptr             // Build current thread pointer address
+    LDR     r2, [r1]                                // Pickup current thread pointer
+    LDR     r1, [r2, #0x9C]                         // Pick up user mode
+    STR     r1, [r2, #0x98]                         // Set the current user mode selection for thread
+
+    /* If there is memory protection, use kernel stack */
+    LDR     r0, [r2, #0x90]                         // Load the module instance ptr
+    LDR     r0, [r0, #0x0C]                         // Load the module property flags
+    TST     r0, #2                                  // Check if memory protected
+    BEQ     _tx_skip_kernel_stack_exit
+
+
+    LDR     r0, [r2, #0xB4]                         // Load the module thread stack start
+    MSR     PSPLIM, r0                              // Set stack limit
+#ifndef TXM_MODULE_KERNEL_STACK_MAINTENANCE_DISABLE
+    LDR     r1, [r2, #0xB8]                         // Load the module thread stack end
+    LDR     r3, [r2, #0xBC]                         // Load the module thread stack size
+    STR     r0, [r2, #12]                           // Set stack start
+    STR     r1, [r2, #16]                           // Set stack end
+    STR     r3, [r2, #20]                           // Set stack size
+#endif
+    LDR     r0, [r2, #0xB0]                         // Load the module thread stack pointer
+    MRS     r3, PSP                                 // Pickup kernel stack pointer
+
+    /* Copy kernel hardware stack to module thread stack. */
+    LDM     r3!,{r1-r2}
+    STM     r0!,{r1-r2}
+    LDM     r3!,{r1-r2}
+    STM     r0!,{r1-r2}
+    LDM     r3!,{r1-r2}
+    STM     r0!,{r1-r2}
+    LDM     r3!,{r1-r2}
+    STM     r0!,{r1-r2}
+    SUB     r0, r0, #32                             // Subtract 32 to get back to top of stack
+    MSR     PSP, r0                                 // Set thread stack pointer
+
+    LDR     r1, =_tx_thread_current_ptr             // Build current thread pointer address
+    LDR     r2, [r1]                                // Pickup current thread pointer
+    LDR     r1, [r2, #0x9C]                         // Pick up user mode
+
+_tx_skip_kernel_stack_exit:
+    MRS     r0, CONTROL                             // Pickup current CONTROL register
+    ORR     r0, r0, r1                              // OR in the user mode bit
+    MSR     CONTROL, r0                             // Setup new CONTROL register
+    BX      lr                                      // Return to thread
+
+
+#if (!defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE))
+_tx_svc_secure_alloc:
+    LDR     r2, =_tx_alloc_return                   // Load address of where we should have come from
+    CMP     r1, r2                                  // Did we come from _tx_thread_secure_stack_allocate?
+    IT      NE                                      // If no (not equal), then...
+    BXNE    lr                                      // return from where we came.
+    
+    PUSH    {r0, lr}                                // Save SP and EXC_RETURN
+    LDM     r0, {r0-r3}                             // Load function parameters from stack
+    BL      _tx_thread_secure_mode_stack_allocate
+    POP     {r12, lr}                               // Restore SP and EXC_RETURN
+    STR     r0, [r12]                               // Store function return value
+    BX      lr
+    
+_tx_svc_secure_free:
+    LDR     r2, =_tx_free_return                    // Load address of where we should have come from
+    CMP     r1, r2                                  // Did we come from _tx_thread_secure_stack_free?
+    IT      NE                                      // If no (not equal), then...
+    BXNE    lr                                      // return from where we came.
+    
+    PUSH    {r0, lr}                                // Save SP and EXC_RETURN
+    LDM     r0, {r0-r3}                             // Load function parameters from stack
+    BL      _tx_thread_secure_mode_stack_free
+    POP     {r12, lr}                               // Restore SP and EXC_RETURN
+    STR     r0, [r12]                               // Store function return value
+    BX      lr
+#endif   // End of ifndef TX_SINGLE_MODE_SECURE, TX_SINGLE_MODE_NON_SECURE
+
+
+
+    /* Kernel entry function from user mode.  */
+
+    .global  _txm_module_manager_kernel_dispatch
+    .align 5
+    .syntax unified
+// VOID   _txm_module_manager_user_mode_entry(VOID)
+// {
+    .global  _txm_module_manager_user_mode_entry
+    .thumb_func
+_txm_module_manager_user_mode_entry:
+    SVC     3                                       // Enter kernel
+_txm_module_priv:
+    /* At this point, we are out of user mode. The original LR has been saved in the
+       thread control block. Simply call the kernel dispatch function. */
+    BL      _txm_module_manager_kernel_dispatch
+
+    /* Pickup the original LR value while still in privileged mode */
+    LDR     r2, =_tx_thread_current_ptr             // Build current thread pointer address
+    LDR     r3, [r2]                                // Pickup current thread pointer
+    LDR     lr, [r3, #0xA0]                         // Pickup saved LR from original call
+
+    SVC     4                                       // Exit kernel and return to user mode
+_txm_module_user_mode_exit:
+    BX      lr                                      // Return to the caller
+    NOP
+    NOP
+    NOP
+    NOP
+// }
+
+
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  _tx_vfp_access
+    .thumb_func
+.type _tx_vfp_access, function
+_tx_vfp_access:
+    VMOV.F32 s0, s0                                 // Simply access the VFP
+    BX       lr                                     // Return to caller
+.end

ports_module/cortex_m33/gnu/module_manager/src/tx_thread_secure_stack.c

@@ -0,0 +1,493 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Thread                                                              */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+
+#include "tx_api.h"
+
+/* If TX_SINGLE_MODE_SECURE or TX_SINGLE_MODE_NON_SECURE is defined, 
+   no secure stack functionality is needed. */
+#if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
+
+#define TX_SOURCE_CODE
+
+#include "tx_secure_interface.h"        /* Interface for NS code. */
+
+/* Minimum size of secure stack. */
+#ifndef TX_THREAD_SECURE_STACK_MINIMUM
+#define TX_THREAD_SECURE_STACK_MINIMUM     256
+#endif
+/* Maximum size of secure stack. */
+#ifndef TX_THREAD_SECURE_STACK_MAXIMUM
+#define TX_THREAD_SECURE_STACK_MAXIMUM     1024
+#endif
+
+/* 8 bytes added to stack size to "seal" stack. */
+#define TX_THREAD_STACK_SEAL_SIZE           8
+#define TX_THREAD_STACK_SEAL_VALUE          0xFEF5EDA5
+
+/* Secure stack info struct to hold stack start, stack limit, 
+   current stack pointer, and pointer to owning thread. 
+   This will be allocated for each thread with a secure stack. */
+typedef struct TX_THREAD_SECURE_STACK_INFO_STRUCT
+{
+    VOID        *tx_thread_secure_stack_ptr;        /* Thread's secure stack current pointer */
+    VOID        *tx_thread_secure_stack_start;      /* Thread's secure stack start address */
+    VOID        *tx_thread_secure_stack_limit;      /* Thread's secure stack limit */
+    TX_THREAD   *tx_thread_ptr;                     /* Keep track of thread for error handling */
+} TX_THREAD_SECURE_STACK_INFO;
+
+
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_thread_secure_stack_initialize                Cortex-M33/GNU    */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function initializes secure mode to use PSP stack.             */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    __get_CONTROL                         Intrinsic to get CONTROL      */
+/*    __set_CONTROL                         Intrinsic to set CONTROL      */
+/*    __set_PSPLIM                          Intrinsic to set PSP limit    */
+/*    __set_PSP                             Intrinsic to set PSP          */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    _tx_initialize_kernel_enter                                         */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
+/*  03-02-2021      Scott Larson            Modified comment(s),          */
+/*                                            resulting in version 6.1.5  */
+/*                                                                        */
+/**************************************************************************/
+__attribute__((cmse_nonsecure_entry))
+void    _tx_thread_secure_stack_initialize(void)
+{
+    ULONG control;
+    
+    /* Set secure mode to use PSP. */
+    asm volatile("MRS     %0, CONTROL" : "=r" (control));   /* Get CONTROL register. */
+    control |= 2;                                           /* Use PSP. */
+    asm volatile("MSR     CONTROL, %0" :: "r" (control));   /* Set CONTROL register. */
+    
+    /* Set process stack pointer and stack limit to 0 to throw exception when a thread
+       without a secure stack calls a secure function that tries to use secure stack. */
+    asm volatile("MSR     PSPLIM, %0" :: "r" (0));
+    asm volatile("MSR     PSP, %0" :: "r" (0));
+    
+    return;
+}
+
+
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_thread_secure_mode_stack_allocate             Cortex-M33/GNU    */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function allocates a thread's secure stack.                    */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    thread_ptr                            Thread control block pointer  */
+/*    stack_size                            Size of stack to allocates    */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    TX_THREAD_ERROR                       Invalid thread pointer        */
+/*    TX_SIZE_ERROR                         Invalid stack size            */
+/*    TX_CALLER_ERROR                       Invalid caller of function    */
+/*    status                                Actual completion status      */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    __get_IPSR                            Intrinsic to get IPSR         */
+/*    calloc                                Compiler's calloc function    */
+/*    malloc                                Compiler's malloc function    */
+/*    free                                  Compiler's free() function    */
+/*    __set_PSPLIM                          Intrinsic to set PSP limit    */
+/*    __set_PSP                             Intrinsic to set PSP          */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    SVC Handler                                                         */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
+/*  03-02-2021      Scott Larson            Modified comment(s),          */
+/*                                            added stack sealing,        */
+/*                                            resulting in version 6.1.5  */
+/*                                                                        */
+/**************************************************************************/
+__attribute__((cmse_nonsecure_entry))
+UINT    _tx_thread_secure_mode_stack_allocate(TX_THREAD *thread_ptr, ULONG stack_size)
+{
+UINT    status;
+TX_THREAD_SECURE_STACK_INFO *info_ptr;
+UCHAR   *stack_mem;
+ULONG   ipsr;
+ULONG   psplim_ns;
+
+    status = TX_SUCCESS;
+    
+    /* Make sure function is called from interrupt (threads should not call). */
+    asm volatile("MRS     %0, IPSR" : "=r" (ipsr));   /* Get IPSR register. */
+    if (ipsr == 0)
+    {
+        status = TX_CALLER_ERROR;
+    }
+    else if (stack_size < TX_THREAD_SECURE_STACK_MINIMUM || stack_size > TX_THREAD_SECURE_STACK_MAXIMUM)
+    {
+        status = TX_SIZE_ERROR;
+    }
+    
+    /* Check if thread already has secure stack allocated. */
+    else if (thread_ptr -> tx_thread_secure_stack_context != 0)
+    {
+        status = TX_THREAD_ERROR;
+    }
+    
+    else
+    {
+        /* Allocate space for secure stack info. */
+        info_ptr = calloc(1, sizeof(TX_THREAD_SECURE_STACK_INFO));
+        
+        if(info_ptr != TX_NULL)
+        {
+            /* If stack info allocated, allocate a stack & seal. */
+            stack_mem = malloc(stack_size + TX_THREAD_STACK_SEAL_SIZE);
+            
+            if(stack_mem != TX_NULL)
+            {
+                /* Secure stack has been allocated, save in the stack info struct. */
+                info_ptr -> tx_thread_secure_stack_limit = stack_mem;
+                info_ptr -> tx_thread_secure_stack_start = stack_mem + stack_size;
+                info_ptr -> tx_thread_secure_stack_ptr = info_ptr -> tx_thread_secure_stack_start;
+                info_ptr -> tx_thread_ptr = thread_ptr;
+                
+                /* Seal bottom of stack. */
+                *(ULONG*)info_ptr -> tx_thread_secure_stack_start = TX_THREAD_STACK_SEAL_VALUE;
+                
+                /* Save info pointer in thread. */
+                thread_ptr -> tx_thread_secure_stack_context = info_ptr;
+                
+                /* Check if this thread is running by looking at its stack start and PSPLIM_NS */
+                asm volatile("MRS     %0, PSPLIM_NS" : "=r" (psplim_ns));   /* Get PSPLIM_NS register. */
+                if(((ULONG) thread_ptr -> tx_thread_stack_start & 0xFFFFFFF8) == psplim_ns)
+                {
+                    /* If this thread is running, set Secure PSP and PSPLIM. */
+                    asm volatile("MSR     PSPLIM, %0" :: "r" ((ULONG)(info_ptr -> tx_thread_secure_stack_limit)));
+                    asm volatile("MSR     PSP, %0" :: "r" ((ULONG)(info_ptr -> tx_thread_secure_stack_ptr)));
+                }
+            }
+            
+            else
+            {
+                /* Stack not allocated, free the info struct. */
+                free(info_ptr);
+                status = TX_NO_MEMORY;
+            }
+        }
+        
+        else
+        {
+            status = TX_NO_MEMORY;
+        }
+    }
+    
+    return(status);
+}
+
+
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_thread_secure_mode_stack_free                 Cortex-M33/GNU    */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function frees a thread's secure stack.                        */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    thread_ptr                            Thread control block pointer  */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    TX_THREAD_ERROR                       Invalid thread pointer        */
+/*    TX_CALLER_ERROR                       Invalid caller of function    */
+/*    status                                Actual completion status      */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    __get_IPSR                            Intrinsic to get IPSR         */
+/*    free                                  Compiler's free() function    */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    SVC Handler                                                         */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
+/*  03-02-2021      Scott Larson            Modified comment(s),          */
+/*                                            resulting in version 6.1.5  */
+/*                                                                        */
+/**************************************************************************/
+__attribute__((cmse_nonsecure_entry))
+UINT    _tx_thread_secure_mode_stack_free(TX_THREAD *thread_ptr)
+{
+UINT    status;
+TX_THREAD_SECURE_STACK_INFO *info_ptr;
+ULONG   ipsr;
+
+    status = TX_SUCCESS;
+    
+    /* Pickup stack info from thread. */
+    info_ptr = thread_ptr -> tx_thread_secure_stack_context;
+    
+    /* Make sure function is called from interrupt (threads should not call). */
+    asm volatile("MRS     %0, IPSR" : "=r" (ipsr));   /* Get IPSR register. */
+    if (ipsr == 0)
+    {
+        status = TX_CALLER_ERROR;
+    }
+    
+    /* Check that this secure context is for this thread. */
+    else if (info_ptr -> tx_thread_ptr != thread_ptr)
+    {
+        status = TX_THREAD_ERROR;
+    }
+    
+    else
+    {
+        
+        /* Free secure stack. */
+        free(info_ptr -> tx_thread_secure_stack_limit);
+        
+        /* Free info struct. */
+        free(info_ptr);
+        
+        /* Clear secure context from thread. */
+        thread_ptr -> tx_thread_secure_stack_context = 0;
+    }
+    
+    return(status);
+}
+
+
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_thread_secure_stack_context_save              Cortex-M33/GNU    */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function saves context of the secure stack.                    */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    thread_ptr                            Thread control block pointer  */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    __get_IPSR                            Intrinsic to get IPSR         */
+/*    __get_PSP                             Intrinsic to get PSP          */
+/*    __set_PSPLIM                          Intrinsic to set PSP limit    */
+/*    __set_PSP                             Intrinsic to set PSP          */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    PendSV Handler                                                      */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
+/*  03-02-2021      Scott Larson            Modified comment(s),          */
+/*                                            resulting in version 6.1.5  */
+/*                                                                        */
+/**************************************************************************/
+__attribute__((cmse_nonsecure_entry))
+void _tx_thread_secure_stack_context_save(TX_THREAD *thread_ptr)
+{
+TX_THREAD_SECURE_STACK_INFO *info_ptr;
+ULONG   sp;
+ULONG   ipsr;
+
+    /* This function should be called from scheduler only. */
+    asm volatile("MRS     %0, IPSR" : "=r" (ipsr));   /* Get IPSR register. */
+    if (ipsr == 0)
+    {
+        return;
+    }
+    
+    /* Pickup the secure context pointer. */
+    info_ptr = (TX_THREAD_SECURE_STACK_INFO *)(thread_ptr -> tx_thread_secure_stack_context);
+    
+    /* Check that this secure context is for this thread. */
+    if (info_ptr -> tx_thread_ptr != thread_ptr)
+    {
+        return;
+    }
+    
+    /* Check that stack pointer is in range */
+    asm volatile("MRS     %0, PSP" : "=r" (sp));   /* Get PSP register. */
+    if ((sp < (ULONG)info_ptr -> tx_thread_secure_stack_limit) || 
+        (sp > (ULONG)info_ptr -> tx_thread_secure_stack_start))
+    {
+        return;
+    }
+    
+    /* Save stack pointer. */
+    *(ULONG *) info_ptr -> tx_thread_secure_stack_ptr = sp;
+    
+    /* Set process stack pointer and stack limit to 0 to throw exception when a thread
+       without a secure stack calls a secure function that tries to use secure stack. */
+    asm volatile("MSR     PSPLIM, %0" :: "r" (0));
+    asm volatile("MSR     PSP, %0" :: "r" (0));
+    
+    return;
+}
+
+
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_thread_secure_stack_context_restore           Cortex-M33/GNU    */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function restores context of the secure stack.                 */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    thread_ptr                            Thread control block pointer  */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    __get_IPSR                            Intrinsic to get IPSR         */
+/*    __set_PSPLIM                          Intrinsic to set PSP limit    */
+/*    __set_PSP                             Intrinsic to set PSP          */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    PendSV Handler                                                      */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
+/*  03-02-2021      Scott Larson            Modified comment(s),          */
+/*                                            resulting in version 6.1.5  */
+/*                                                                        */
+/**************************************************************************/
+__attribute__((cmse_nonsecure_entry))
+void _tx_thread_secure_stack_context_restore(TX_THREAD *thread_ptr)
+{
+TX_THREAD_SECURE_STACK_INFO *info_ptr;
+ULONG   ipsr;
+
+    /* This function should be called from scheduler only. */
+    asm volatile("MRS     %0, IPSR" : "=r" (ipsr));   /* Get IPSR register. */
+    if (ipsr == 0)
+    {
+        return;
+    }
+    
+    /* Pickup the secure context pointer. */
+    info_ptr = (TX_THREAD_SECURE_STACK_INFO *)(thread_ptr -> tx_thread_secure_stack_context);
+    
+    /* Check that this secure context is for this thread. */
+    if (info_ptr -> tx_thread_ptr != thread_ptr)
+    {
+        return;
+    }
+    
+    /* Set stack pointer and limit. */
+    asm volatile("MSR     PSPLIM, %0" :: "r" ((ULONG)info_ptr -> tx_thread_secure_stack_limit));
+    asm volatile("MSR     PSP, %0" :: "r" ((ULONG)info_ptr -> tx_thread_secure_stack_ptr));
+    
+    return;
+}
+
+#endif

ports_module/cortex_m33/gnu/module_manager/src/tx_thread_secure_stack_allocate.S

@@ -0,0 +1,85 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Thread                                                              */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_thread_secure_stack_allocate                  Cortex-M33/GNU    */
+/*                                                           6.1          */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function enters the SVC handler to allocate a secure stack.    */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    thread_ptr                            Thread control block pointer  */
+/*    stack_size                            Size of secure stack to       */
+/*                                            allocate                    */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    status                                Actual completion status      */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    SVC 1                                                               */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    Application Code                                                    */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
+/*                                                                        */
+/**************************************************************************/
+// UINT   _tx_thread_secure_stack_allocate(TX_THREAD *thread_ptr, ULONG stack_size)
+// {
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  _tx_thread_secure_stack_allocate
+    .thumb_func
+.type _tx_thread_secure_stack_allocate, function
+_tx_thread_secure_stack_allocate:
+#if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
+    MRS     r3, PRIMASK     // Save interrupt mask
+    CPSIE   i               // Enable interrupts for SVC call
+    SVC     1
+    CMP     r3, #0          // If interrupts enabled, just return
+    BEQ     _alloc_return_interrupt_enabled
+    CPSID   i               // Otherwise, disable interrupts
+#else
+    MOV     r0, #0xFF       // Feature not enabled
+#endif
+_alloc_return_interrupt_enabled:
+    BX      lr
+    .end

ports_module/cortex_m33/gnu/module_manager/src/tx_thread_secure_stack_free.S

@@ -0,0 +1,83 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Thread                                                              */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_thread_secure_stack_free                      Cortex-M33/GNU    */
+/*                                                           6.1          */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function enters the SVC handler to free a secure stack.        */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    thread_ptr                            Thread control block pointer  */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    status                                Actual completion status      */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    SVC 2                                                               */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    Application Code                                                    */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
+/*                                                                        */
+/**************************************************************************/
+// UINT   _tx_thread_secure_stack_free(TX_THREAD *thread_ptr)
+// {
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  _tx_thread_secure_stack_free
+    .thumb_func
+.type _tx_thread_secure_stack_free, function
+_tx_thread_secure_stack_free:
+#if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
+    MRS     r3, PRIMASK     // Save interrupt mask
+    CPSIE   i               // Enable interrupts for SVC call
+    SVC     2
+    CMP     r3, #0          // If interrupts enabled, just return
+    BEQ     _free_return_interrupt_enabled
+    CPSID   i               // Otherwise, disable interrupts
+#else
+    MOV     r0, #0xFF       // Feature not enabled
+#endif
+_free_return_interrupt_enabled:
+    BX      lr
+    .end

ports_module/cortex_m33/gnu/module_manager/src/tx_thread_stack_build.s

@@ -0,0 +1,140 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Thread                                                              */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_thread_stack_build                            Cortex-M33/GNU    */
+/*                                                           6.1          */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function builds a stack frame on the supplied thread's stack.  */
+/*    The stack frame results in a fake interrupt return to the supplied  */
+/*    function pointer.                                                   */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    thread_ptr                            Pointer to thread control blk */
+/*    function_ptr                          Pointer to return function    */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    _tx_thread_create                     Create thread service         */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
+/*                                                                        */
+/**************************************************************************/
+// VOID   _tx_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(VOID))
+// {
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  _tx_thread_stack_build
+    .thumb_func
+.type _tx_thread_stack_build, function
+_tx_thread_stack_build:
+    /* Build a fake interrupt frame.  The form of the fake interrupt stack
+       on the Cortex-M33 should look like the following after it is built:
+
+       Stack Top:
+                       LR          Interrupted LR (LR at time of PENDSV)
+                       r4          Initial value for r4
+                       r5          Initial value for r5
+                       r6          Initial value for r6
+                       r7          Initial value for r7
+                       r8          Initial value for r8
+                       r9          Initial value for r9
+                       r10         Initial value for r10
+                       r11         Initial value for r11
+                       r0          Initial value for r0    (Hardware stack starts here!!)
+                       r1          Initial value for r1
+                       r2          Initial value for r2
+                       r3          Initial value for r3
+                       r12         Initial value for r12
+                       lr          Initial value for lr
+                       pc          Initial value for pc
+                       xPSR        Initial value for xPSR
+
+    Stack Bottom: (higher memory address)  */
+
+    LDR     r2, [r0, #16]                           // Pickup end of stack area
+    BIC     r2, r2, #0x7                            // Align frame for 8-byte alignment
+    SUB     r2, r2, #68                             // Subtract frame size
+#ifdef TX_SINGLE_MODE_SECURE
+    LDR     r3, =0xFFFFFFFD                         // Build initial LR value for secure mode
+#else
+    LDR     r3, =0xFFFFFFBC                         // Build initial LR value to return to non-secure PSP
+#endif
+    STR     r3, [r2, #0]                            // Save on the stack
+
+    /* Actually build the stack frame.  */
+
+    MOV     r3, #0                                  // Build initial register value
+    STR     r3, [r2, #4]                            // Store initial r4
+    STR     r3, [r2, #8]                            // Store initial r5
+    STR     r3, [r2, #12]                           // Store initial r6
+    STR     r3, [r2, #16]                           // Store initial r7
+    STR     r3, [r2, #20]                           // Store initial r8
+    STR     r3, [r2, #24]                           // Store initial r9
+    STR     r3, [r2, #28]                           // Store initial r10
+    STR     r3, [r2, #32]                           // Store initial r11
+
+    /* Hardware stack follows.  */
+
+    STR     r3, [r2, #36]                           // Store initial r0
+    STR     r3, [r2, #40]                           // Store initial r1
+    STR     r3, [r2, #44]                           // Store initial r2
+    STR     r3, [r2, #48]                           // Store initial r3
+    STR     r3, [r2, #52]                           // Store initial r12
+    MOV     r3, #0xFFFFFFFF                         // Poison EXC_RETURN value
+    STR     r3, [r2, #56]                           // Store initial lr
+    STR     r1, [r2, #60]                           // Store initial pc
+    MOV     r3, #0x01000000                         // Only T-bit need be set
+    STR     r3, [r2, #64]                           // Store initial xPSR
+
+    /* Setup stack pointer.  */
+    // thread_ptr -> tx_thread_stack_ptr =  r2;
+
+    STR     r2, [r0, #8]                            // Save stack pointer in thread's
+                                                    //   control block
+    BX      lr                                      // Return to caller
+// }
+    .end

ports_module/cortex_m33/gnu/module_manager/src/tx_thread_stack_error_handler.c

@@ -0,0 +1,93 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Thread                                                              */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+#define TX_SOURCE_CODE
+
+
+/* Include necessary system files.  */
+
+#include "tx_api.h"
+#include "tx_thread.h"
+
+/* Define the global function pointer for stack error handling. If a stack error is
+   detected and the application has registered a stack error handler, it will be
+   called via this function pointer.  */
+
+VOID    (*_tx_thread_application_stack_error_handler)(TX_THREAD *thread_ptr);
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_thread_stack_error_handler                    Cortex-M33/GNU    */
+/*                                                           6.1          */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function processes stack errors detected during run-time.      */
+/*                                                                        */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    thread_ptr                            Thread control block pointer  */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    _tx_thread_terminate                                                */
+/*    _tx_thread_application_stack_error_handler                          */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    ThreadX internal code                                               */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*                                                                        */
+/**************************************************************************/
+VOID  _tx_thread_stack_error_handler(TX_THREAD *thread_ptr)
+{
+    #ifndef TX_THREAD_NO_TERMINATE_STACK_ERROR
+    /* Is there a thread?  */
+    if (thread_ptr)
+    {
+        /* Terminate the current thread.  */
+        _tx_thread_terminate(_tx_thread_current_ptr);
+    }
+    #endif
+    
+    /* Determine if the application has registered an error handler.  */
+    if (_tx_thread_application_stack_error_handler != TX_NULL)
+    {
+        /* Yes, an error handler is present, simply call the application error handler.  */
+        (_tx_thread_application_stack_error_handler)(thread_ptr);
+    }
+}

ports_module/cortex_m33/gnu/module_manager/src/tx_thread_stack_error_notify.c

@@ -0,0 +1,96 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Thread                                                              */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+#define TX_SOURCE_CODE
+
+
+/* Include necessary system files.  */
+
+#include "tx_api.h"
+#include "tx_thread.h"
+#include "tx_trace.h"
+
+extern VOID (*_tx_thread_application_stack_error_handler)(TX_THREAD *thread_ptr);
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_thread_stack_error_notify                     Cortex-M33/GNU    */
+/*                                                           6.1          */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function registers an application stack error handler. If      */
+/*    ThreadX detects a stack error, this application handler is called.  */
+/*                                                                        */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    stack_error_handler                   Pointer to stack error        */
+/*                                            handler, TX_NULL to disable */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    status                                Service return status         */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    Application Code                                                    */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*                                                                        */
+/**************************************************************************/
+UINT  _tx_thread_stack_error_notify(VOID (*stack_error_handler)(TX_THREAD *thread_ptr))
+{
+
+TX_INTERRUPT_SAVE_AREA
+
+    /* Disable interrupts.  */
+    TX_DISABLE
+
+    /* Make entry in event log.  */
+    TX_TRACE_IN_LINE_INSERT(TX_TRACE_THREAD_STACK_ERROR_NOTIFY, 0, 0, 0, 0, TX_TRACE_THREAD_EVENTS)
+
+    /* Make entry in event log.  */
+    TX_EL_THREAD_STACK_ERROR_NOTIFY_INSERT
+
+    /* Setup global thread stack error handler.  */
+    _tx_thread_application_stack_error_handler =  stack_error_handler;
+
+    /* Restore interrupts.  */
+    TX_RESTORE
+
+    /* Return success to caller.  */
+    return(TX_SUCCESS);
+}

ports_module/cortex_m33/gnu/module_manager/src/tx_thread_system_return.s

@@ -0,0 +1,89 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Thread                                                              */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_thread_system_return                          Cortex-M33/GNU    */
+/*                                                           6.1          */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function is target processor specific.  It is used to transfer */
+/*    control from a thread back to the ThreadX system.  Only a           */
+/*    minimal context is saved since the compiler assumes temp registers  */
+/*    are going to get slicked by a function call anyway.                 */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    _tx_thread_schedule                   Thread scheduling loop        */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    ThreadX components                                                  */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
+/*                                                                        */
+/**************************************************************************/
+// VOID   _tx_thread_system_return(VOID)
+// {
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  _tx_thread_system_return
+    .thumb_func
+.type _tx_thread_system_return, function
+_tx_thread_system_return:
+    /* Return to real scheduler via PendSV. Note that this routine is often
+       replaced with in-line assembly in tx_port.h to improved performance.  */
+
+    MOV     r0, #0x10000000                         // Load PENDSVSET bit
+    LDR     r1, =0xE000E000                         // Load NVIC base
+    STR     r0, [r1, #0xD04]                        // Set PENDSVBIT in ICSR
+    MRS     r0, IPSR                                // Pickup IPSR
+    CMP     r0, #0                                  // Is it a thread returning?
+    BNE     _isr_context                            // If ISR, skip interrupt enable
+    MRS     r1, PRIMASK                             // Thread context returning, pickup PRIMASK
+    CPSIE   i                                       // Enable interrupts
+    MSR     PRIMASK, r1                             // Restore original interrupt posture
+_isr_context:
+    BX      lr                                      // Return to caller
+// }
+    .end

ports_module/cortex_m33/gnu/module_manager/src/tx_timer_interrupt.s

@@ -0,0 +1,246 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Timer                                                               */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_timer_interrupt                               Cortex-M33/GNU    */
+/*                                                           6.1          */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function processes the hardware timer interrupt.  This         */
+/*    processing includes incrementing the system clock and checking for  */
+/*    time slice and/or timer expiration.  If either is found, the        */
+/*    interrupt context save/restore functions are called along with the  */
+/*    expiration functions.                                               */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    _tx_timer_expiration_process          Timer expiration processing   */
+/*    _tx_thread_time_slice                 Time slice interrupted thread */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    interrupt vector                                                    */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
+/*                                                                        */
+/**************************************************************************/
+/* VOID   _tx_timer_interrupt(VOID)
+{ */
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  _tx_timer_interrupt
+    .thumb_func
+.type _tx_timer_interrupt, function
+_tx_timer_interrupt:
+
+    /* Upon entry to this routine, it is assumed that context save has already
+       been called, and therefore the compiler scratch registers are available
+       for use.  */
+
+    /* Increment the system clock.  */
+    // _tx_timer_system_clock++;
+
+    LDR     r1, =_tx_timer_system_clock             // Pickup address of system clock
+    LDR     r0, [r1, #0]                            // Pickup system clock
+    ADD     r0, r0, #1                              // Increment system clock
+    STR     r0, [r1, #0]                            // Store new system clock
+
+    /* Test for time-slice expiration.  */
+    // if (_tx_timer_time_slice)
+    // {
+
+    LDR     r3, =_tx_timer_time_slice               // Pickup address of time-slice
+    LDR     r2, [r3, #0]                            // Pickup time-slice
+    CBZ     r2,  __tx_timer_no_time_slice           // Is it non-active?
+                                                    // Yes, skip time-slice processing
+
+   /* Decrement the time_slice.  */
+   // _tx_timer_time_slice--;
+
+    SUB     r2, r2, #1                              // Decrement the time-slice
+    STR     r2, [r3, #0]                            // Store new time-slice value
+
+   /* Check for expiration.  */
+   // if (__tx_timer_time_slice == 0)
+
+    CBNZ    r2, __tx_timer_no_time_slice            // Has it expired?
+
+   /* Set the time-slice expired flag.  */
+   // _tx_timer_expired_time_slice =  TX_TRUE;
+
+    LDR     r3, =_tx_timer_expired_time_slice       // Pickup address of expired flag
+    MOV     r0, #1                                  // Build expired value
+    STR     r0, [r3, #0]                            // Set time-slice expiration flag
+
+    // }
+
+__tx_timer_no_time_slice:
+
+    /* Test for timer expiration.  */
+    // if (*_tx_timer_current_ptr)
+    // {
+
+    LDR     r1, =_tx_timer_current_ptr              // Pickup current timer pointer address
+    LDR     r0, [r1, #0]                            // Pickup current timer
+    LDR     r2, [r0, #0]                            // Pickup timer list entry
+    CBZ     r2, __tx_timer_no_timer                 // Is there anything in the list?
+                                                    // No, just increment the timer
+
+    /* Set expiration flag.  */
+    // _tx_timer_expired =  TX_TRUE;
+
+    LDR     r3, =_tx_timer_expired                  // Pickup expiration flag address
+    MOV     r2, #1                                  // Build expired value
+    STR     r2, [r3, #0]                            // Set expired flag
+    B       __tx_timer_done                         // Finished timer processing
+
+    // }
+    // else
+    // {
+__tx_timer_no_timer:
+
+    /* No timer expired, increment the timer pointer.  */
+    // _tx_timer_current_ptr++;
+
+    ADD     r0, r0, #4                              // Move to next timer
+
+    /* Check for wrap-around.  */
+    // if (_tx_timer_current_ptr == _tx_timer_list_end)
+
+    LDR     r3, =_tx_timer_list_end                 // Pickup addr of timer list end
+    LDR     r2, [r3, #0]                            // Pickup list end
+    CMP     r0, r2                                  // Are we at list end?
+    BNE     __tx_timer_skip_wrap                    // No, skip wrap-around logic
+
+        /* Wrap to beginning of list.  */
+        // _tx_timer_current_ptr =  _tx_timer_list_start;
+
+    LDR     r3, =_tx_timer_list_start               // Pickup addr of timer list start
+    LDR     r0, [r3, #0]                            // Set current pointer to list start
+
+__tx_timer_skip_wrap:
+
+    STR     r0, [r1, #0]                            // Store new current timer pointer
+    // }
+
+__tx_timer_done:
+
+
+    /* See if anything has expired.  */
+    // if ((_tx_timer_expired_time_slice) || (_tx_timer_expired))
+    // {
+
+    LDR     r3, =_tx_timer_expired_time_slice       // Pickup addr of expired flag
+    LDR     r2, [r3, #0]                            // Pickup time-slice expired flag
+    CBNZ    r2, __tx_something_expired              // Did a time-slice expire?
+                                                    // If non-zero, time-slice expired
+    LDR     r1, =_tx_timer_expired                  // Pickup addr of other expired flag
+    LDR     r0, [r1, #0]                            // Pickup timer expired flag
+    CBZ     r0, __tx_timer_nothing_expired          // Did a timer expire?
+                                                    // No, nothing expired
+
+__tx_something_expired:
+
+    STMDB   sp!, {r0, lr}                           // Save the lr register on the stack
+                                                    //   and save r0 just to keep 8-byte alignment
+
+    /* Did a timer expire?  */
+    // if (_tx_timer_expired)
+    // {
+
+    LDR     r1, =_tx_timer_expired                  // Pickup addr of expired flag
+    LDR     r0, [r1, #0]                            // Pickup timer expired flag
+    CBZ     r0, __tx_timer_dont_activate            // Check for timer expiration
+                                                    // If not set, skip timer activation
+
+    /* Process timer expiration.  */
+    // _tx_timer_expiration_process();
+
+    BL      _tx_timer_expiration_process            // Call the timer expiration handling routine
+
+    // }
+__tx_timer_dont_activate:
+
+    /* Did time slice expire?  */
+    // if (_tx_timer_expired_time_slice)
+    // {
+
+    LDR     r3, =_tx_timer_expired_time_slice       // Pickup addr of time-slice expired
+    LDR     r2, [r3, #0]                            // Pickup the actual flag
+    CBZ     r2, __tx_timer_not_ts_expiration        // See if the flag is set
+                                                    // No, skip time-slice processing
+
+    /* Time slice interrupted thread.  */
+    // _tx_thread_time_slice();
+
+    BL      _tx_thread_time_slice                   // Call time-slice processing
+    LDR     r0, =_tx_thread_preempt_disable         // Build address of preempt disable flag
+    LDR     r1, [r0]                                // Is the preempt disable flag set?
+    CBNZ    r1, __tx_timer_skip_time_slice          // Yes, skip the PendSV logic
+    LDR     r0, =_tx_thread_current_ptr             // Build current thread pointer address
+    LDR     r1, [r0]                                // Pickup the current thread pointer
+    LDR     r2, =_tx_thread_execute_ptr             // Build execute thread pointer address
+    LDR     r3, [r2]                                // Pickup the execute thread pointer
+    LDR     r0, =0xE000ED04                         // Build address of control register
+    MOV     r2, 0x10000000                          // Build value for PendSV bit
+    CMP     r1, r3                                  // Are they the same?
+    BEQ     __tx_timer_skip_time_slice              // If the same, there was no time-slice performed
+    STR     r2, [r0]                                // Not the same, issue the PendSV for preemption
+__tx_timer_skip_time_slice:
+
+    // }
+
+__tx_timer_not_ts_expiration:
+
+    LDMIA   sp!, {r0, lr}                           // Recover lr register (r0 is just there for
+
+    // }
+
+__tx_timer_nothing_expired:
+
+    DSB                                             // Complete all memory access
+    BX      lr                                      // Return to caller
+
+// }
+    .end

ports_module/cortex_m33/gnu/module_manager/src/txe_thread_secure_stack_allocate.c

@@ -0,0 +1,123 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Thread                                                              */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+#define TX_SOURCE_CODE
+
+
+/* Include necessary system files.  */
+
+#include "tx_api.h"
+#include "tx_initialize.h"
+#include "tx_thread.h"
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_thread_secure_stack_allocate                    PORTABLE C      */
+/*                                                            6.1         */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function checks for errors in the secure stack allocate        */
+/*    function call.                                                      */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    thread_ptr                            Thread control block pointer  */
+/*    stack_size                            Size of secure stack to       */
+/*                                            allocate                    */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    TX_THREAD_ERROR                       Invalid thread pointer        */
+/*    TX_CALLER_ERROR                       Invalid caller of function    */
+/*    status                                Actual completion status      */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    _tx_thread_secure_stack_allocate      Actual stack alloc function   */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    Application Code                                                    */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*                                                                        */
+/**************************************************************************/
+UINT    _txe_thread_secure_stack_allocate(TX_THREAD *thread_ptr, ULONG stack_size)
+{
+#if defined(TX_SINGLE_MODE_SECURE) || defined(TX_SINGLE_MODE_NON_SECURE)
+    return(TX_FEATURE_NOT_ENABLED);
+#else
+UINT    status;
+    
+    /* Default status to success.  */
+    status =  TX_SUCCESS;
+    
+    /* Check for an invalid thread pointer.  */
+    if (thread_ptr == TX_NULL)
+    {
+
+        /* Thread pointer is invalid, return appropriate error code.  */
+        status =  TX_THREAD_ERROR;
+    }
+
+    /* Now check for invalid thread ID.  */
+    else if (thread_ptr -> tx_thread_id != TX_THREAD_ID)
+    {
+
+        /* Thread pointer is invalid, return appropriate error code.  */
+        status =  TX_THREAD_ERROR;
+    }
+    
+    /* Check for interrupt call.  */
+    if (TX_THREAD_GET_SYSTEM_STATE() != ((ULONG) 0))
+    {
+        /* Is call from an interrupt and not initialization?  */
+        if (TX_THREAD_GET_SYSTEM_STATE() < TX_INITIALIZE_IN_PROGRESS)
+        {
+            /* Invalid caller of this function, return appropriate error code.  */
+            status =  TX_CALLER_ERROR;
+        }
+    }
+    
+    /* Determine if everything is okay.  */
+    if (status == TX_SUCCESS)
+    {
+
+        /* Call actual secure stack allocate function.  */
+        status =  _tx_thread_secure_stack_allocate(thread_ptr, stack_size);
+    }
+
+    /* Return completion status.  */
+    return(status);
+#endif
+}
+

ports_module/cortex_m33/gnu/module_manager/src/txe_thread_secure_stack_free.c

@@ -0,0 +1,121 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Thread                                                              */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+#define TX_SOURCE_CODE
+
+
+/* Include necessary system files.  */
+
+#include "tx_api.h"
+#include "tx_initialize.h"
+#include "tx_thread.h"
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _txe_thread_secure_stack_free                       PORTABLE C      */
+/*                                                            6.1         */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function checks for errors in the secure stack free            */
+/*    function call.                                                      */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    thread_ptr                            Thread control block pointer  */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    TX_THREAD_ERROR                       Invalid thread pointer        */
+/*    TX_CALLER_ERROR                       Invalid caller of function    */
+/*    status                                Actual completion status      */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    _tx_thread_secure_stack_free          Actual stack free function    */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    Application Code                                                    */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*                                                                        */
+/**************************************************************************/
+UINT    _txe_thread_secure_stack_free(TX_THREAD *thread_ptr)
+{
+#if defined(TX_SINGLE_MODE_SECURE) || defined(TX_SINGLE_MODE_NON_SECURE)
+    return(TX_FEATURE_NOT_ENABLED);
+#else
+UINT    status;
+    
+    /* Default status to success.  */
+    status =  TX_SUCCESS;
+    
+    /* Check for an invalid thread pointer.  */
+    if (thread_ptr == TX_NULL)
+    {
+
+        /* Thread pointer is invalid, return appropriate error code.  */
+        status =  TX_THREAD_ERROR;
+    }
+
+    /* Now check for invalid thread ID.  */
+    else if (thread_ptr -> tx_thread_id != TX_THREAD_ID)
+    {
+
+        /* Thread pointer is invalid, return appropriate error code.  */
+        status =  TX_THREAD_ERROR;
+    }
+    
+    /* Check for interrupt call.  */
+    if (TX_THREAD_GET_SYSTEM_STATE() != ((ULONG) 0))
+    {
+        /* Is call from an interrupt and not initialization?  */
+        if (TX_THREAD_GET_SYSTEM_STATE() < TX_INITIALIZE_IN_PROGRESS)
+        {
+            /* Invalid caller of this function, return appropriate error code.  */
+            status =  TX_CALLER_ERROR;
+        }
+    }
+    
+    /* Determine if everything is okay.  */
+    if (status == TX_SUCCESS)
+    {
+
+        /* Call actual secure stack allocate function.  */
+        status =  _tx_thread_secure_stack_free(thread_ptr);
+    }
+
+    /* Return completion status.  */
+    return(status);
+#endif
+}
+

ports_module/cortex_m33/gnu/module_manager/src/txm_module_manager_alignment_adjust.c

@@ -0,0 +1,85 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Module Manager                                                      */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+#define TX_SOURCE_CODE
+
+#include "tx_api.h"
+#include "txm_module.h"
+
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _txm_module_manager_alignment_adjust            Cortex-M33/MPU/GNU  */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function adjusts the alignment and size of the code and data   */
+/*    section for a given module implementation.                          */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    module_preamble                   Pointer to module preamble        */
+/*    code_size                         Size of the code area (updated)   */
+/*    code_alignment                    Code area alignment (updated)     */
+/*    data_size                         Size of data area (updated)       */
+/*    data_alignment                    Data area alignment (updated)     */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    Initial thread stack frame                                          */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  03-02-2021      Scott Larson            Initial Version 6.1.5         */
+/*                                                                        */
+/**************************************************************************/
+VOID  _txm_module_manager_alignment_adjust(TXM_MODULE_PREAMBLE *module_preamble,
+                                           ULONG *code_size,
+                                           ULONG *code_alignment,
+                                           ULONG *data_size,
+                                           ULONG *data_alignment)
+{
+
+    /* Round code and data size UP to TXM_MODULE_MPU_ALIGNMENT bytes. */
+    *code_size = (*code_size + TXM_MODULE_MPU_ALIGNMENT - 1) & ~(TXM_MODULE_MPU_ALIGNMENT - 1);
+    *data_size = (*data_size + TXM_MODULE_MPU_ALIGNMENT - 1) & ~(TXM_MODULE_MPU_ALIGNMENT - 1);
+    
+    /* Alignment for code and data is TXM_MODULE_MPU_ALIGNMENT bytes. */
+    *code_alignment =   TXM_MODULE_MPU_ALIGNMENT;
+    *data_alignment =   TXM_MODULE_MPU_ALIGNMENT;
+}

ports_module/cortex_m33/gnu/module_manager/src/txm_module_manager_external_memory_enable.c

@@ -0,0 +1,164 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Module Manager                                                      */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+#define TX_SOURCE_CODE
+
+#include "tx_api.h"
+#include "tx_mutex.h"
+#include "tx_queue.h"
+#include "tx_thread.h"
+#include "txm_module.h"
+
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _txm_module_manager_external_memory_enable      Cortex-M33/MPU/GNU  */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function creates an entry in the MPU table for a shared        */
+/*    memory space. The start_address must be 32-byte aligned.            */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    module_instance                   Module instance pointer           */
+/*    start_address                     Start address of memory           */
+/*    length                            Length of external memory         */
+/*    attributes                        Memory attributes (r/w)           */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    status                            Completion status                 */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    _tx_mutex_get                     Get protection mutex              */
+/*    _tx_mutex_put                     Release protection mutex          */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    Application code                                                    */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  03-02-2021      Scott Larson            Initial Version 6.1.5         */
+/*                                                                        */
+/**************************************************************************/
+UINT  _txm_module_manager_external_memory_enable(TXM_MODULE_INSTANCE *module_instance,
+                                                 VOID *start_address,
+                                                 ULONG length,
+                                                 UINT attributes)
+{
+
+ULONG   address;
+ULONG   shared_index;
+
+    /* Determine if the module manager has not been initialized yet.  */
+    if (_txm_module_manager_ready != TX_TRUE)
+    {
+        /* Module manager has not been initialized.  */
+        return(TX_NOT_AVAILABLE);
+    }
+
+    /* Determine if the module is valid.  */
+    if (module_instance == TX_NULL)
+    {
+        /* Invalid module pointer.  */
+        return(TX_PTR_ERROR);
+    }
+
+    /* Get module manager protection mutex.  */
+    _tx_mutex_get(&_txm_module_manager_mutex, TX_WAIT_FOREVER);
+
+    /* Determine if the module instance is valid.  */
+    if (module_instance -> txm_module_instance_id != TXM_MODULE_ID)
+    {
+        /* Release the protection mutex.  */
+        _tx_mutex_put(&_txm_module_manager_mutex);
+
+        /* Invalid module pointer.  */
+        return(TX_PTR_ERROR);
+    }
+    
+    /* Determine if the module instance is in the loaded state.  */
+    if (module_instance -> txm_module_instance_state != TXM_MODULE_LOADED)
+    {
+        /* Release the protection mutex.  */
+        _tx_mutex_put(&_txm_module_manager_mutex);
+
+        /* Return error if the module is not ready.  */
+        return(TX_START_ERROR);
+    }
+    
+    /* Determine if there are shared memory entries available.  */
+    if(module_instance -> txm_module_instance_shared_memory_count >= TXM_MODULE_MPU_SHARED_ENTRIES)
+    {
+        /* Release the protection mutex.  */
+        _tx_mutex_put(&_txm_module_manager_mutex);
+        
+        /* No more entries available.  */
+        return(TX_NO_MEMORY);
+    }
+    
+    /* Start address must adhere to Cortex-M33 MPU alignment.  */
+    address = (ULONG) start_address;
+    if(address != (address & ~(TXM_MODULE_MPU_ALIGNMENT - 1)))
+    {
+        /* Release the protection mutex.  */
+        _tx_mutex_put(&_txm_module_manager_mutex);
+        
+        /* Return alignment error.  */
+        return(TXM_MODULE_ALIGNMENT_ERROR);
+    }
+    
+    /* At this point, we have a valid address. Set up MPU registers.  */
+    
+    /* Pick up index into shared memory entries.  */
+    shared_index = TXM_MODULE_MPU_SHARED_INDEX + module_instance -> txm_module_instance_shared_memory_count;
+    
+    /* Set base address register with start address, sanitized attributes and execute never.  */
+    module_instance -> txm_module_instance_mpu_registers[shared_index].txm_module_mpu_region_base_address = address | (attributes & TXM_MODULE_ATTRIBUTE_MASK) | TXM_MODULE_ATTRIBUTE_EXECUTE_NEVER;
+    
+    /* Set the limit address (data start + length-1), attribute index, and enable bit.  */
+    module_instance -> txm_module_instance_mpu_registers[shared_index].txm_module_mpu_region_limit_address = (address + length-1) | TXM_MODULE_ATTRIBUTE_INDEX | TXM_MODULE_ATTRIBUTE_REGION_ENABLE;
+    
+    /* Keep track of shared memory address and length in module instance.  */
+    module_instance -> txm_module_instance_shared_memory_address[module_instance -> txm_module_instance_shared_memory_count] = address;
+    module_instance -> txm_module_instance_shared_memory_length[module_instance -> txm_module_instance_shared_memory_count] = length;
+    
+    /* Increment counter.  */
+    module_instance -> txm_module_instance_shared_memory_count++;
+    
+    /* Release the protection mutex.  */
+    _tx_mutex_put(&_txm_module_manager_mutex);
+    
+    /* Return success.  */
+    return(TX_SUCCESS);
+}

ports_module/cortex_m33/gnu/module_manager/src/txm_module_manager_memory_fault_handler.c

@@ -0,0 +1,110 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Module Manager                                                      */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+#define TX_SOURCE_CODE
+
+#include "tx_api.h"
+#include "tx_thread.h"
+#include "txm_module.h"
+
+
+/* Define the user's fault notification callback function pointer.  This is
+   setup via the txm_module_manager_memory_fault_notify API.  */
+
+VOID    (*_txm_module_manager_fault_notify)(TX_THREAD *, TXM_MODULE_INSTANCE *);
+
+
+/* Define a macro that can be used to allocate global variables useful to
+   store information about the last fault. This macro is defined in
+   txm_module_port.h and is usually populated in the assembly language
+   fault handling prior to the code calling _txm_module_manager_memory_fault_handler.  */
+
+TXM_MODULE_MANAGER_FAULT_INFO
+
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _txm_module_manager_memory_fault_handler        Cortex-M33/MPU/GNU  */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function handles a fault associated with a memory protected    */
+/*    module.                                                             */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    _tx_thread_terminate              Terminate thread                  */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    Fault handler                                                       */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  03-02-2021      Scott Larson            Initial Version 6.1.5         */
+/*                                                                        */
+/**************************************************************************/
+VOID  _txm_module_manager_memory_fault_handler(VOID)
+{
+
+TXM_MODULE_INSTANCE     *module_instance_ptr;
+TX_THREAD               *thread_ptr;
+
+    /* Pickup the current thread.  */
+    thread_ptr =  _tx_thread_current_ptr;
+
+    /* Initialize the module instance pointer to NULL.  */
+    module_instance_ptr =  TX_NULL;
+    
+    /* Is there a thread?  */
+    if (thread_ptr)
+    {
+        /* Pickup the module instance.  */
+        module_instance_ptr =  thread_ptr -> tx_thread_module_instance_ptr;
+
+        /* Terminate the current thread.  */
+        _tx_thread_terminate(_tx_thread_current_ptr);
+    }
+    
+    /* Determine if there is a user memory fault notification callback.  */
+    if (_txm_module_manager_fault_notify)
+    {
+        /* Yes, call the user's notification memory fault callback.  */
+        (_txm_module_manager_fault_notify)(thread_ptr, module_instance_ptr);
+    }
+}

ports_module/cortex_m33/gnu/module_manager/src/txm_module_manager_memory_fault_notify.c

@@ -0,0 +1,84 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Module Manager                                                      */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+#define TX_SOURCE_CODE
+
+#include "tx_api.h"
+#include "tx_thread.h"
+#include "txm_module.h"
+
+
+/* Define the external user's fault notification callback function pointer.  This is
+   setup via the txm_module_manager_memory_fault_notify API.  */
+
+extern VOID    (*_txm_module_manager_fault_notify)(TX_THREAD *, TXM_MODULE_INSTANCE *);
+
+
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _txm_module_manager_memory_fault_notify         Cortex-M33/MPU/GNU  */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function registers an application callback when/if a memory    */
+/*    fault occurs. The supplied thread is automatically terminated, but  */
+/*    any other threads in the same module may still execute.             */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    notify_function                   Memory fault notification         */
+/*                                        function, NULL disables.        */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    status                            Completion status                 */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    Application Code                                                    */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  03-02-2021      Scott Larson            Initial Version 6.1.5         */
+/*                                                                        */
+/**************************************************************************/
+UINT  _txm_module_manager_memory_fault_notify(VOID (*notify_function)(TX_THREAD *, TXM_MODULE_INSTANCE *))
+{
+    /* Setup notification function.  */
+    _txm_module_manager_fault_notify =  notify_function;
+    
+    /* Return success.  */
+    return(TX_SUCCESS);
+}

ports_module/cortex_m33/gnu/module_manager/src/txm_module_manager_mm_register_setup.c

@@ -0,0 +1,190 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Module Manager                                                      */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+#define TX_SOURCE_CODE
+
+#include "tx_api.h"
+#include "txm_module.h"
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _txm_module_manager_mm_register_setup             Cortex-M33/MPU    */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function sets up the Cortex-M33 MPU register definitions based */
+/*    on the module's memory characteristics.                             */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    module_instance                   Pointer to module instance        */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    MPU settings for the module in module_instance                      */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    none                                                                */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    _txm_module_manager_thread_create                                   */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  03-02-2021     Scott Larson             Initial Version 6.1.5         */
+/*                                                                        */
+/**************************************************************************/
+VOID  _txm_module_manager_mm_register_setup(TXM_MODULE_INSTANCE *module_instance)
+{
+
+ULONG   data_size;
+ULONG   start_stop_stack_size;
+ULONG   callback_stack_size;
+
+    /* Setup MPU region for kernel mode entry.  */
+    /* Set base address register to user mode entry function address, which is guaranteed to be at least 32-byte aligned.
+       Mask address to proper range, inner shareable, read only. */
+    module_instance -> txm_module_instance_mpu_registers[TXM_MODULE_MPU_KERNEL_ENTRY_INDEX].txm_module_mpu_region_base_address = ((ULONG) _txm_module_manager_user_mode_entry & 0xFFFFFFE0) | TXM_MODULE_ATTRIBUTE_INNER_SHAREABLE | TXM_MODULE_ATTRIBUTE_READ_ONLY;
+    /* Set the limit address, attribute index, and enable bit.  */
+    module_instance -> txm_module_instance_mpu_registers[TXM_MODULE_MPU_KERNEL_ENTRY_INDEX].txm_module_mpu_region_limit_address = ((ULONG) _txm_module_manager_user_mode_entry & 0xFFFFFFE0) | TXM_MODULE_ATTRIBUTE_INDEX | TXM_MODULE_ATTRIBUTE_REGION_ENABLE;
+    /* End of kernel mode entry setup.  */
+
+
+    /* Setup MPU region for module code protection.  */
+    /* Set base address register to module code address, which should be at least 32-byte aligned.
+       Mask address to proper range, inner shareable, read only. */
+    module_instance -> txm_module_instance_mpu_registers[TXM_MODULE_MPU_CODE_INDEX].txm_module_mpu_region_base_address = ((ULONG) module_instance -> txm_module_instance_code_start & 0xFFFFFFE0) | TXM_MODULE_ATTRIBUTE_INNER_SHAREABLE | TXM_MODULE_ATTRIBUTE_READ_ONLY;
+    /* Set the limit address (code start + code size-1), attribute index, and enable bit.  */
+    module_instance -> txm_module_instance_mpu_registers[TXM_MODULE_MPU_CODE_INDEX].txm_module_mpu_region_limit_address = (((ULONG) module_instance -> txm_module_instance_code_start + module_instance -> txm_module_instance_preamble_ptr -> txm_module_preamble_code_size - 1) & 0xFFFFFFE0) | TXM_MODULE_ATTRIBUTE_INDEX | TXM_MODULE_ATTRIBUTE_REGION_ENABLE;
+    /* End of module code protection.  */
+
+
+    /* Setup MPU region for module data protection.  */
+    /* Set base address register to module data address, which should be at least 32-byte aligned.
+       Mask address to proper range, inner shareable, read write, execute never. */
+    module_instance -> txm_module_instance_mpu_registers[TXM_MODULE_MPU_DATA_INDEX].txm_module_mpu_region_base_address = ((ULONG) module_instance -> txm_module_instance_data_start & 0xFFFFFFE0) | TXM_MODULE_ATTRIBUTE_INNER_SHAREABLE | TXM_MODULE_ATTRIBUTE_READ_WRITE | TXM_MODULE_ATTRIBUTE_EXECUTE_NEVER;
+    
+    /* Adjust the size of the module elements to be aligned to the default alignment. We do this
+       so that when we partition the allocated memory, we can simply place these regions right beside
+       each other without having to align their pointers. Note this only works when they all have
+       the same alignment.  */
+    
+    data_size =             module_instance -> txm_module_instance_preamble_ptr -> txm_module_preamble_data_size;
+    start_stop_stack_size = module_instance -> txm_module_instance_preamble_ptr -> txm_module_preamble_start_stop_stack_size;
+    callback_stack_size =   module_instance -> txm_module_instance_preamble_ptr -> txm_module_preamble_callback_stack_size;
+    
+    data_size =              ((data_size + TXM_MODULE_DATA_ALIGNMENT - 1)/TXM_MODULE_DATA_ALIGNMENT) * TXM_MODULE_DATA_ALIGNMENT;
+    start_stop_stack_size =  ((start_stop_stack_size + TXM_MODULE_DATA_ALIGNMENT - 1)/TXM_MODULE_DATA_ALIGNMENT) * TXM_MODULE_DATA_ALIGNMENT;
+    callback_stack_size =    ((callback_stack_size + TXM_MODULE_DATA_ALIGNMENT - 1)/TXM_MODULE_DATA_ALIGNMENT) * TXM_MODULE_DATA_ALIGNMENT;
+
+    /* Update the data size to include thread stacks.  */
+    data_size = data_size + start_stop_stack_size + callback_stack_size;
+    
+    /* Set the limit address (data start + data size-1), attribute index, and enable bit.  */
+    module_instance -> txm_module_instance_mpu_registers[TXM_MODULE_MPU_DATA_INDEX].txm_module_mpu_region_limit_address = (((ULONG) module_instance -> txm_module_instance_data_start + data_size - 1) & 0xFFFFFFE0) | TXM_MODULE_ATTRIBUTE_INDEX | TXM_MODULE_ATTRIBUTE_REGION_ENABLE;
+    /* End of module data protection.  */
+    
+    /* Remaining MPU entries are disabled for now and can be used for shared memory. */
+}
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _txm_module_manager_inside_data_check             Cortex-M33/MPU    */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function checks if the specified object is inside shared       */
+/*    memory.                                                             */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    module_instance                   Pointer to module instance        */
+/*    obj_ptr                           Pointer to the object             */
+/*    obj_size                          Size of the object                */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    Whether the object is inside the shared memory region.              */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    Module dispatch check functions                                     */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  03-02-2021      Scott Larson            Initial Version 6.1.5         */
+/*                                                                        */
+/**************************************************************************/
+UINT _txm_module_manager_inside_data_check(TXM_MODULE_INSTANCE *module_instance, ALIGN_TYPE obj_ptr, UINT obj_size)
+{
+
+UINT shared_memory_index;
+UINT num_shared_memory_mpu_entries;
+ALIGN_TYPE shared_memory_address_start;
+ALIGN_TYPE shared_memory_address_end;
+
+    /* Check if the object is inside the module data.  */
+    if ((obj_ptr >= (ALIGN_TYPE) module_instance -> txm_module_instance_data_start) &&
+        ((obj_ptr + obj_size) <= ((ALIGN_TYPE) module_instance -> txm_module_instance_data_end + 1)))
+    {
+        return(TX_TRUE);
+    }
+
+    /* Check if the object is inside the shared memory.  */
+    num_shared_memory_mpu_entries = module_instance -> txm_module_instance_shared_memory_count;
+    for (shared_memory_index = 0; shared_memory_index < num_shared_memory_mpu_entries; shared_memory_index++)
+    {
+
+        shared_memory_address_start = (ALIGN_TYPE) module_instance -> txm_module_instance_shared_memory_address[shared_memory_index];
+        shared_memory_address_end = shared_memory_address_start + module_instance -> txm_module_instance_shared_memory_length[shared_memory_index];
+
+        if ((obj_ptr >= (ALIGN_TYPE) shared_memory_address_start) &&
+            ((obj_ptr + obj_size) <= (ALIGN_TYPE) shared_memory_address_end))
+        {
+            return(TX_TRUE);
+        }
+    }
+
+    return(TX_FALSE);
+}

ports_module/cortex_m33/gnu/module_manager/src/txm_module_manager_port_dispatch.c

@@ -0,0 +1,115 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Module Manager                                                      */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+#define TX_SOURCE_CODE
+
+#include "tx_api.h"
+#include "txm_module.h"
+#include "txm_module_manager_util.h"
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _txm_module_manager_port_dispatch                Cortex-M33/GENERIC */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function dispatches the module's kernel request based upon the */
+/*    ID and parameters specified in the request.                         */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    module_instance                   Module pointer                    */
+/*    kernel_request                    Module's kernel request           */
+/*    param_0                           First parameter                   */
+/*    param_1                           Second parameter                  */
+/*    param_2                           Third parameter                   */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    status                            Completion status                 */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    Port-specific ThreadX API Calls                                     */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    _txm_module_manager_kernel_dispatch                                 */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  03-02-2021      Scott Larson            Initial Version 6.1.5         */
+/*                                                                        */
+/**************************************************************************/
+ALIGN_TYPE _txm_module_manager_port_dispatch(TXM_MODULE_INSTANCE *module_instance, ULONG kernel_request, ALIGN_TYPE param_0, ALIGN_TYPE param_1, ALIGN_TYPE param_2)
+{
+
+ALIGN_TYPE return_value = TX_NOT_AVAILABLE;
+
+    switch(kernel_request)
+    {
+        case TXM_THREAD_SECURE_STACK_ALLOCATE_CALL:
+        {
+            if (module_instance -> txm_module_instance_property_flags & TXM_MODULE_MEMORY_PROTECTION)
+            {
+                if (!TXM_MODULE_MANAGER_PARAM_CHECK_OBJECT_FOR_USE(module_instance, param_0, sizeof(TX_THREAD)))
+                    return(TXM_MODULE_INVALID_MEMORY);
+            }
+
+            return_value = (ALIGN_TYPE) _txe_thread_secure_stack_allocate(
+                (TX_THREAD *) param_0,
+                (ULONG) param_1
+            );
+            break;
+        }
+        
+        case TXM_THREAD_SECURE_STACK_FREE_CALL:
+        {
+            if (module_instance -> txm_module_instance_property_flags & TXM_MODULE_MEMORY_PROTECTION)
+            {
+                if (!TXM_MODULE_MANAGER_PARAM_CHECK_OBJECT_FOR_USE(module_instance, param_0, sizeof(TX_THREAD)))
+                    return(TXM_MODULE_INVALID_MEMORY);
+            }
+
+            return_value = (ALIGN_TYPE) _txe_thread_secure_stack_free(
+                (TX_THREAD *) param_0
+            );
+            break;
+        }
+        
+        default:
+        {
+            /* Unhandled kernel request, return an error!  */
+            break;
+        }
+    }
+    
+    return(return_value);
+}

ports_module/cortex_m33/gnu/module_manager/src/txm_module_manager_thread_stack_build.s

@@ -0,0 +1,143 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Module Manager                                                      */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+    .text
+    .align 4
+    .syntax unified
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _txm_module_manager_thread_stack_build          Cortex-M33/MPU/GNU  */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function builds a stack frame on the supplied thread's stack.  */
+/*    The stack frame results in a fake interrupt return to the supplied  */
+/*    function pointer.                                                   */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    thread_ptr                            Pointer to thread             */
+/*    function_ptr                          Pointer to shell function     */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    _tx_thread_create                     Create thread service         */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  03-02-2021      Scott Larson            Initial Version 6.1.5         */
+/*                                                                        */
+/**************************************************************************/
+// VOID   _txm_module_manager_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(TX_THREAD *, TXM_MODULE_INSTANCE *))
+// {
+    .global  _txm_module_manager_thread_stack_build
+    .thumb_func
+_txm_module_manager_thread_stack_build:
+
+    /* Build a fake interrupt frame.  The form of the fake interrupt stack
+       on the Cortex-M should look like the following after it is built:
+
+       Stack Top:
+                    LR          Interrupted LR (LR at time of PENDSV)
+                    r4          Initial value for r4
+                    r5          Initial value for r5
+                    r6          Initial value for r6
+                    r7          Initial value for r7
+                    r8          Initial value for r8
+                    r9          Initial value for r9
+                    r10         Initial value for r10
+                    r11         Initial value for r11
+                    r0          Initial value for r0    (Hardware stack starts here!!)
+                    r1          Initial value for r1
+                    r2          Initial value for r2
+                    r3          Initial value for r3
+                    r12         Initial value for r12
+                    lr          Initial value for lr
+                    pc          Initial value for pc
+                    xPSR        Initial value for xPSR
+
+    Stack Bottom: (higher memory address)  */
+
+    LDR     r2, [r0, #16]                       // Pickup end of stack area
+    BIC     r2, r2, #0x7                        // Align frame
+    SUB     r2, r2, #68                         // Subtract frame size
+#ifdef TX_SINGLE_MODE_SECURE
+    LDR     r3, =0xFFFFFFFD                     // Build initial LR value for secure mode
+#else
+    LDR     r3, =0xFFFFFFBC                     // Build initial LR value to return to non-secure PSP
+#endif
+    STR     r3, [r2, #0]                        // Save on the stack
+
+    /* Actually build the stack frame.  */
+
+    MOV     r3, #0                              // Build initial register value
+    STR     r3, [r2, #4]                        // Store initial r4
+    STR     r3, [r2, #8]                        // Store initial r5
+    STR     r3, [r2, #12]                       // Store initial r6
+    STR     r3, [r2, #16]                       // Store initial r7
+    STR     r3, [r2, #20]                       // Store initial r8
+    STR     r3, [r2, #28]                       // Store initial r10
+    STR     r3, [r2, #32]                       // Store initial r11
+
+    /* Hardware stack follows.  */
+
+    STR     r0, [r2, #36]                       // Store initial r0, which is the thread control block
+
+    LDR     r3, [r0, #8]                        // Pickup thread entry info pointer,which is in the stack pointer position of the thread control block.
+                                                //   It was setup in the txm_module_manager_thread_create function. It will be overwritten later in this
+                                                //   function with the actual, initial stack pointer.
+    STR     r3, [r2, #40]                       // Store initial r1, which is the module entry information.
+    LDR     r3, [r3, #8]                        // Pickup data base register from the module information
+    STR     r3, [r2, #24]                       // Store initial r9 (data base register)
+    MOV     r3, #0                              // Clear r3 again
+
+    STR     r3, [r2, #44]                       // Store initial r2
+    STR     r3, [r2, #48]                       // Store initial r3
+    STR     r3, [r2, #52]                       // Store initial r12
+    MOV     r3, #0xFFFFFFFF                     // Poison EXC_RETURN value
+    STR     r3, [r2, #56]                       // Store initial lr
+    STR     r1, [r2, #60]                       // Store initial pc
+    MOV     r3, #0x01000000                     // Only T-bit need be set
+    STR     r3, [r2, #64]                       // Store initial xPSR
+
+    /* Setup stack pointer.  */
+    // thread_ptr -> tx_thread_stack_ptr =  r2;
+
+    STR     r2, [r0, #8]                        // Save stack pointer in thread's control block
+    BX      lr                                  // Return to caller
+// }

ports_module/cortex_m33/iar/example_build/sample_threadx_module.c

@@ -0,0 +1,428 @@
+/* This is a small demo of the high-performance ThreadX kernel running as a module. It includes 
+   examples of eight threads of different priorities, using a message queue, semaphore, mutex, 
+   event flags group, byte pool, and block pool.  */
+
+/* Specify that this is a module!  */
+
+#define TXM_MODULE
+
+
+/* Include the ThreadX module definitions.  */
+
+#include "txm_module.h"
+
+
+/* Define constants.  */
+
+#define DEMO_STACK_SIZE         512
+#define DEMO_BYTE_POOL_SIZE     6000
+#define DEMO_BLOCK_POOL_SIZE    100
+#define DEMO_QUEUE_SIZE         100
+
+
+/* Define the pool space in the bss section of the module. ULONG is used to 
+   get the word alignment.  */
+
+ULONG                   demo_module_pool_space[DEMO_BYTE_POOL_SIZE / 4];
+
+
+/* Define the ThreadX object control blocks...  */
+
+TX_THREAD               *thread_0;
+TX_THREAD               *thread_1;
+TX_THREAD               *thread_2;
+TX_THREAD               *thread_3;
+TX_THREAD               *thread_4;
+TX_THREAD               *thread_5;
+TX_THREAD               *thread_6;
+TX_THREAD               *thread_7;
+TX_QUEUE                *queue_0;
+TX_SEMAPHORE            *semaphore_0;
+TX_MUTEX                *mutex_0;
+TX_EVENT_FLAGS_GROUP    *event_flags_0;
+TX_BYTE_POOL            *byte_pool_0;
+TX_BLOCK_POOL           *block_pool_0;
+
+
+/* Define the counters used in the demo application...  */
+
+ULONG           thread_0_counter;
+ULONG           thread_1_counter;
+ULONG           thread_1_messages_sent;
+ULONG           thread_2_counter;
+ULONG           thread_2_messages_received;
+ULONG           thread_3_counter;
+ULONG           thread_4_counter;
+ULONG           thread_5_counter;
+ULONG           thread_6_counter;
+ULONG           thread_7_counter;
+ULONG           semaphore_0_puts;
+ULONG           event_0_sets;
+ULONG           queue_0_sends;
+
+/* Define thread prototypes.  */
+
+void    thread_0_entry(ULONG thread_input);
+void    thread_1_entry(ULONG thread_input);
+void    thread_2_entry(ULONG thread_input);
+void    thread_3_and_4_entry(ULONG thread_input);
+void    thread_5_entry(ULONG thread_input);
+void    thread_6_and_7_entry(ULONG thread_input);
+
+void  semaphore_0_notify(TX_SEMAPHORE *semaphore_ptr)
+{
+
+    if (semaphore_ptr == semaphore_0)
+        semaphore_0_puts++;
+}
+
+
+void  event_0_notify(TX_EVENT_FLAGS_GROUP *event_flag_group_ptr)
+{
+
+    if (event_flag_group_ptr == event_flags_0)
+        event_0_sets++;
+}
+
+
+void  queue_0_notify(TX_QUEUE *queue_ptr)
+{
+
+    if (queue_ptr == queue_0)
+        queue_0_sends++;
+}
+
+
+/* Define the module start function.  */
+
+void    demo_module_start(ULONG id)
+{
+
+CHAR    *pointer;
+
+    /* Allocate all the objects. In MPU mode, modules cannot allocate control blocks within
+       their own memory area so they cannot corrupt the resident portion of ThreadX by overwriting 
+       the control block(s).  */
+    txm_module_object_allocate((void*)&thread_0, sizeof(TX_THREAD));
+    txm_module_object_allocate((void*)&thread_1, sizeof(TX_THREAD));
+    txm_module_object_allocate((void*)&thread_2, sizeof(TX_THREAD));
+    txm_module_object_allocate((void*)&thread_3, sizeof(TX_THREAD));
+    txm_module_object_allocate((void*)&thread_4, sizeof(TX_THREAD));
+    txm_module_object_allocate((void*)&thread_5, sizeof(TX_THREAD));
+    txm_module_object_allocate((void*)&thread_6, sizeof(TX_THREAD));
+    txm_module_object_allocate((void*)&thread_7, sizeof(TX_THREAD));
+    txm_module_object_allocate((void*)&queue_0, sizeof(TX_QUEUE));
+    txm_module_object_allocate((void*)&semaphore_0, sizeof(TX_SEMAPHORE));
+    txm_module_object_allocate((void*)&mutex_0, sizeof(TX_MUTEX));
+    txm_module_object_allocate((void*)&event_flags_0, sizeof(TX_EVENT_FLAGS_GROUP));
+    txm_module_object_allocate((void*)&byte_pool_0, sizeof(TX_BYTE_POOL));
+    txm_module_object_allocate((void*)&block_pool_0, sizeof(TX_BLOCK_POOL));
+                               
+
+    /* Create a byte memory pool from which to allocate the thread stacks.  */
+    tx_byte_pool_create(byte_pool_0, "module byte pool 0", (UCHAR*)demo_module_pool_space, DEMO_BYTE_POOL_SIZE);
+
+    /* Put system definition stuff in here, e.g. thread creates and other assorted
+       create information.  */
+
+    /* Allocate the stack for thread 0.  */
+    tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
+
+    /* Create the main thread.  */
+    tx_thread_create(thread_0, "module thread 0", thread_0_entry, 0,  
+            pointer, DEMO_STACK_SIZE, 
+            1, 1, TX_NO_TIME_SLICE, TX_AUTO_START);
+
+
+    /* Allocate the stack for thread 1.  */
+    tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
+
+    /* Create threads 1 and 2. These threads pass information through a ThreadX 
+       message queue.  It is also interesting to note that these threads have a time
+       slice.  */
+    tx_thread_create(thread_1, "module thread 1", thread_1_entry, 1,  
+            pointer, DEMO_STACK_SIZE, 
+            16, 16, 4, TX_AUTO_START);
+
+    /* Allocate the stack for thread 2.  */
+    tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
+
+    tx_thread_create(thread_2, "module thread 2", thread_2_entry, 2,  
+            pointer, DEMO_STACK_SIZE, 
+            16, 16, 4, TX_AUTO_START);
+
+    /* Allocate the stack for thread 3.  */
+    tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
+
+    /* Create threads 3 and 4.  These threads compete for a ThreadX counting semaphore.  
+       An interesting thing here is that both threads share the same instruction area.  */
+    tx_thread_create(thread_3, "module thread 3", thread_3_and_4_entry, 3,  
+            pointer, DEMO_STACK_SIZE, 
+            8, 8, TX_NO_TIME_SLICE, TX_AUTO_START);
+
+    /* Allocate the stack for thread 4.  */
+    tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
+
+    tx_thread_create(thread_4, "module thread 4", thread_3_and_4_entry, 4,  
+            pointer, DEMO_STACK_SIZE, 
+            8, 8, TX_NO_TIME_SLICE, TX_AUTO_START);
+
+    /* Allocate the stack for thread 5.  */
+    tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
+
+    /* Create thread 5.  This thread simply pends on an event flag which will be set
+       by thread_0.  */
+    tx_thread_create(thread_5, "module thread 5", thread_5_entry, 5,  
+            pointer, DEMO_STACK_SIZE, 
+            4, 4, TX_NO_TIME_SLICE, TX_AUTO_START);
+
+    /* Allocate the stack for thread 6.  */
+    tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
+
+    /* Create threads 6 and 7.  These threads compete for a ThreadX mutex.  */
+    tx_thread_create(thread_6, "module thread 6", thread_6_and_7_entry, 6,  
+            pointer, DEMO_STACK_SIZE, 
+            8, 8, TX_NO_TIME_SLICE, TX_AUTO_START);
+
+    /* Allocate the stack for thread 7.  */
+    tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
+
+    tx_thread_create(thread_7, "module thread 7", thread_6_and_7_entry, 7,  
+            pointer, DEMO_STACK_SIZE, 
+            8, 8, TX_NO_TIME_SLICE, TX_AUTO_START);
+
+    /* Allocate the message queue.  */
+    tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_QUEUE_SIZE*sizeof(ULONG), TX_NO_WAIT);
+
+    /* Create the message queue shared by threads 1 and 2.  */
+    tx_queue_create(queue_0, "module queue 0", TX_1_ULONG, pointer, DEMO_QUEUE_SIZE*sizeof(ULONG));
+
+    tx_queue_send_notify(queue_0, queue_0_notify);
+
+    /* Create the semaphore used by threads 3 and 4.  */
+    tx_semaphore_create(semaphore_0, "module semaphore 0", 1);
+
+    tx_semaphore_put_notify(semaphore_0, semaphore_0_notify);
+
+    /* Create the event flags group used by threads 1 and 5.  */
+    tx_event_flags_create(event_flags_0, "module event flags 0");
+
+    tx_event_flags_set_notify(event_flags_0, event_0_notify);
+
+    /* Create the mutex used by thread 6 and 7 without priority inheritance.  */
+    tx_mutex_create(mutex_0, "module mutex 0", TX_NO_INHERIT);
+
+    /* Allocate the memory for a small block pool.  */
+    tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_BLOCK_POOL_SIZE, TX_NO_WAIT);
+
+    /* Create a block memory pool to allocate a message buffer from.  */
+    tx_block_pool_create(block_pool_0, "module block pool 0", sizeof(ULONG), pointer, DEMO_BLOCK_POOL_SIZE);
+
+    /* Allocate a block and release the block memory.  */
+    tx_block_allocate(block_pool_0, (VOID **) &pointer, TX_NO_WAIT);
+
+    /* Release the block back to the pool.  */
+    tx_block_release(pointer);
+}
+
+
+/* Define the test threads.  */
+
+void    thread_0_entry(ULONG thread_input)
+{
+
+UINT    status;
+
+    
+    /* This thread simply sits in while-forever-sleep loop.  */
+    while(1)
+    {
+
+        /* Increment the thread counter.  */
+        thread_0_counter++;
+
+        /* Sleep for 10 ticks.  */
+        tx_thread_sleep(10);
+       
+        /* Set event flag 0 to wakeup thread 5.  */
+        status =  tx_event_flags_set(event_flags_0, 0x1, TX_OR);
+
+        /* Check status.  */
+        if (status != TX_SUCCESS)
+            break;
+    }
+}
+
+
+void    thread_1_entry(ULONG thread_input)
+{
+
+UINT    status;
+
+
+    /* This thread simply sends messages to a queue shared by thread 2.  */
+    while(1)
+    {
+
+        /* Increment the thread counter.  */
+        thread_1_counter++;
+
+        /* Send message to queue 0.  */
+        status =  tx_queue_send(queue_0, &thread_1_messages_sent, TX_WAIT_FOREVER);
+
+        /* Check completion status.  */
+        if (status != TX_SUCCESS)
+            break;
+
+        /* Increment the message sent.  */
+        thread_1_messages_sent++;
+    }
+}
+
+
+void    thread_2_entry(ULONG thread_input)
+{
+
+ULONG   received_message;
+UINT    status;
+
+    /* This thread retrieves messages placed on the queue by thread 1.  */
+    while(1)
+    {
+        /* Test memory handler.  */
+        *(ULONG *)0x64005000 = 0xCDCDCDCD;
+        
+        
+        /* Increment the thread counter.  */
+        thread_2_counter++;
+
+        /* Retrieve a message from the queue.  */
+        status = tx_queue_receive(queue_0, &received_message, TX_WAIT_FOREVER);
+
+        /* Check completion status and make sure the message is what we 
+           expected.  */
+        if ((status != TX_SUCCESS) || (received_message != thread_2_messages_received))
+            break;
+        
+        /* Otherwise, all is okay.  Increment the received message count.  */
+        thread_2_messages_received++;
+    }
+}
+
+
+void    thread_3_and_4_entry(ULONG thread_input)
+{
+
+UINT    status;
+
+
+    /* This function is executed from thread 3 and thread 4.  As the loop
+       below shows, these function compete for ownership of semaphore_0.  */
+    while(1)
+    {
+
+        /* Increment the thread counter.  */
+        if (thread_input == 3)
+            thread_3_counter++;
+        else
+            thread_4_counter++;
+
+        /* Get the semaphore with suspension.  */
+        status =  tx_semaphore_get(semaphore_0, TX_WAIT_FOREVER);
+
+        /* Check status.  */
+        if (status != TX_SUCCESS)
+            break;
+
+        /* Sleep for 2 ticks to hold the semaphore.  */
+        tx_thread_sleep(2);
+
+        /* Release the semaphore.  */
+        status =  tx_semaphore_put(semaphore_0);
+
+        /* Check status.  */
+        if (status != TX_SUCCESS)
+            break;
+    }
+}
+
+
+void    thread_5_entry(ULONG thread_input)
+{
+
+UINT    status;
+ULONG   actual_flags;
+
+
+    /* This thread simply waits for an event in a forever loop.  */
+    while(1)
+    {
+
+        /* Increment the thread counter.  */
+        thread_5_counter++;
+
+        /* Wait for event flag 0.  */
+        status =  tx_event_flags_get(event_flags_0, 0x1, TX_OR_CLEAR, 
+                                                &actual_flags, TX_WAIT_FOREVER);
+
+        /* Check status.  */
+        if ((status != TX_SUCCESS) || (actual_flags != 0x1))
+            break;
+    }
+}
+
+
+void    thread_6_and_7_entry(ULONG thread_input)
+{
+
+UINT    status;
+
+
+    /* This function is executed from thread 6 and thread 7.  As the loop
+       below shows, these function compete for ownership of mutex_0.  */
+    while(1)
+    {
+
+        /* Increment the thread counter.  */
+        if (thread_input == 6)
+            thread_6_counter++;
+        else
+            thread_7_counter++;
+
+        /* Get the mutex with suspension.  */
+        status =  tx_mutex_get(mutex_0, TX_WAIT_FOREVER);
+
+        /* Check status.  */
+        if (status != TX_SUCCESS)
+            break;
+
+        /* Get the mutex again with suspension.  This shows
+           that an owning thread may retrieve the mutex it
+           owns multiple times.  */
+        status =  tx_mutex_get(mutex_0, TX_WAIT_FOREVER);
+
+        /* Check status.  */
+        if (status != TX_SUCCESS)
+            break;
+
+        /* Sleep for 2 ticks to hold the mutex.  */
+        tx_thread_sleep(2);
+
+        /* Release the mutex.  */
+        status =  tx_mutex_put(mutex_0);
+
+        /* Check status.  */
+        if (status != TX_SUCCESS)
+            break;
+
+        /* Release the mutex again.  This will actually 
+           release ownership since it was obtained twice.  */
+        status =  tx_mutex_put(mutex_0);
+
+        /* Check status.  */
+        if (status != TX_SUCCESS)
+            break;
+    }
+}
+
+

ports_module/cortex_m33/iar/example_build/sample_threadx_module.icf

@@ -0,0 +1,53 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x0;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x080f0000;
+define symbol __ICFEDIT_region_ROM_end__   = 0x080fffff;
+define symbol __ICFEDIT_region_RAM_start__ = 0x64002800;
+define symbol __ICFEDIT_region_RAM_end__   = 0x64100000;
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__   = 0;
+define symbol __ICFEDIT_size_svcstack__ = 0;
+define symbol __ICFEDIT_size_irqstack__ = 0;
+define symbol __ICFEDIT_size_fiqstack__ = 0;
+define symbol __ICFEDIT_size_undstack__ = 0;
+define symbol __ICFEDIT_size_abtstack__ = 0;
+define symbol __ICFEDIT_size_heap__     = 0x1000;
+/**** End of ICF editor section. ###ICF###*/
+
+define memory mem with size = 4G;
+define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+
+//define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+//define block SVC_STACK with alignment = 8, size = __ICFEDIT_size_svcstack__ { };
+//define block IRQ_STACK with alignment = 8, size = __ICFEDIT_size_irqstack__ { };
+//define block FIQ_STACK with alignment = 8, size = __ICFEDIT_size_fiqstack__ { };
+//define block UND_STACK with alignment = 8, size = __ICFEDIT_size_undstack__ { };
+//define block ABT_STACK with alignment = 8, size = __ICFEDIT_size_abtstack__ { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+//place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+define movable block ROPI with alignment = 4, fixed order 
+{ 
+  ro object txm_module_preamble.o,
+  ro, 
+  ro data 
+};
+
+define movable block RWPI with alignment = 8, fixed order, static base
+{
+  rw,
+  block HEAP
+};
+
+place in ROM_region   { block ROPI };
+place in RAM_region   { block RWPI };
+

ports_module/cortex_m33/iar/example_build/sample_threadx_module_manager.c

@@ -0,0 +1,107 @@
+/* Small demonstration of the ThreadX module manager.  */
+
+#include "tx_api.h"
+#include "txm_module.h"
+
+
+#define DEMO_STACK_SIZE         1024
+
+/* Define the ThreadX object control blocks...  */
+
+TX_THREAD               module_manager;
+TXM_MODULE_INSTANCE     my_module;
+
+
+/* Define the object pool area.  */
+
+UCHAR                   object_memory[16384];
+
+
+/* Define the count of memory faults.  */
+
+ULONG                   memory_faults;
+
+
+/* Define thread prototypes.  */
+
+void    module_manager_entry(ULONG thread_input);
+
+
+/* Define fault handler.  */
+
+VOID module_fault_handler(TX_THREAD *thread, TXM_MODULE_INSTANCE *module)
+{
+
+    /* Just increment the fault counter.   */
+    memory_faults++;
+}
+
+/* Define main entry point.  */
+
+int main()
+{
+    /* Enter the ThreadX kernel.  */
+    tx_kernel_enter();
+}
+
+
+/* Define what the initial system looks like.  */
+
+void    tx_application_define(void *first_unused_memory)
+{
+
+CHAR    *pointer = (CHAR*)first_unused_memory;
+
+
+    tx_thread_create(&module_manager, "Module Manager Thread", module_manager_entry, 0,  
+                     pointer, DEMO_STACK_SIZE, 
+                     1, 1, TX_NO_TIME_SLICE, TX_AUTO_START);
+    pointer =  pointer + DEMO_STACK_SIZE;
+}
+
+
+
+
+/* Define the test threads.  */
+
+void    module_manager_entry(ULONG thread_input)
+{
+
+    /* Initialize the module manager.   */
+    txm_module_manager_initialize((VOID *) 0x64000000, 0x1000000);
+
+    txm_module_manager_object_pool_create(object_memory, sizeof(object_memory));
+
+    /* Register a fault handler.  */
+    txm_module_manager_memory_fault_notify(module_fault_handler);
+    
+    /* Load the module that is already there, in this example it is placed there by the multiple image download.  */
+    txm_module_manager_in_place_load(&my_module, "my module", (VOID *) 0x080F0000);
+    
+    /* Enable 128 byte read/write shared memory region at 0x64005000.  */
+    txm_module_manager_external_memory_enable(&my_module, (void *) 0x64005000, 128, TXM_MODULE_ATTRIBUTE_READ_WRITE);
+    
+    /* Start the module.  */
+    txm_module_manager_start(&my_module);
+
+    /* Sleep for a while....  */
+    tx_thread_sleep(1000);
+    
+    /* Stop the module.  */
+    txm_module_manager_stop(&my_module);
+    
+    /* Unload the module.  */
+    txm_module_manager_unload(&my_module);
+
+    /* Load the module that is already there.  */
+    txm_module_manager_in_place_load(&my_module, "my module", (VOID *) 0x080F0000);
+
+    /* Start the module again.  */
+    txm_module_manager_start(&my_module);
+    
+    /* Now just spin...  */
+    while(1)
+    {
+        tx_thread_sleep(100);
+    }
+}

ports_module/cortex_m33/iar/example_build/sample_threadx_module_manager.icf

@@ -0,0 +1,38 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__   = 0x080FFFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__   = 0x20020000;
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define symbol __EXTRAM_start__ = 0x64000000;
+define symbol __EXTRAM_end__   = 0x641FFFFF;
+
+define memory mem with size = 4G;
+define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region EXTRAM_region   = mem:[from __EXTRAM_start__   to __EXTRAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+place in EXTRAM_region { section EXT_RAM };
+
+place in RAM_region { last section FREE_MEM};

ports_module/cortex_m33/iar/example_build/tx_initialize_low_level.s

@@ -0,0 +1,243 @@
+;/**************************************************************************/
+;/*                                                                        */
+;/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+;/*                                                                        */
+;/*       This software is licensed under the Microsoft Software License   */
+;/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+;/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+;/*       and in the root directory of this software.                      */
+;/*                                                                        */
+;/**************************************************************************/
+;
+;
+;/**************************************************************************/
+;/**************************************************************************/
+;/**                                                                       */
+;/** ThreadX Component                                                     */
+;/**                                                                       */
+;/**   Initialize                                                          */
+;/**                                                                       */
+;/**************************************************************************/
+;/**************************************************************************/
+;
+;
+    EXTERN  _tx_thread_system_stack_ptr
+    EXTERN  _tx_initialize_unused_memory
+    EXTERN  _tx_timer_interrupt
+    EXTERN  __main
+    EXTERN  __vector_table
+    EXTERN  _tx_thread_current_ptr
+    EXTERN  _tx_thread_stack_error_handler
+;
+;
+SYSTEM_CLOCK        EQU     96000000
+SYSTICK_CYCLES      EQU     ((SYSTEM_CLOCK / 100) -1)
+;
+;
+    RSEG    FREE_MEM:DATA
+    PUBLIC  __tx_free_memory_start
+__tx_free_memory_start
+    DS32    4
+;
+;
+    SECTION `.text`:CODE:NOROOT(2)
+    THUMB
+
+;/**************************************************************************/
+;/*                                                                        */
+;/*  FUNCTION                                               RELEASE        */
+;/*                                                                        */
+;/*    _tx_initialize_low_level                          Cortex-M33/IAR    */
+;/*                                                           6.0.1        */
+;/*  AUTHOR                                                                */
+;/*                                                                        */
+;/*    Scott Larson, Microsoft Corporation                                 */
+;/*                                                                        */
+;/*  DESCRIPTION                                                           */
+;/*                                                                        */
+;/*    This function is responsible for any low-level processor            */
+;/*    initialization, including setting up interrupt vectors, setting     */
+;/*    up a periodic timer interrupt source, saving the system stack       */
+;/*    pointer for use in ISR processing later, and finding the first      */
+;/*    available RAM memory address for tx_application_define.             */
+;/*                                                                        */
+;/*  INPUT                                                                 */
+;/*                                                                        */
+;/*    None                                                                */
+;/*                                                                        */
+;/*  OUTPUT                                                                */
+;/*                                                                        */
+;/*    None                                                                */
+;/*                                                                        */
+;/*  CALLS                                                                 */
+;/*                                                                        */
+;/*    None                                                                */
+;/*                                                                        */
+;/*  CALLED BY                                                             */
+;/*                                                                        */
+;/*    _tx_initialize_kernel_enter           ThreadX entry function        */
+;/*                                                                        */
+;/*  RELEASE HISTORY                                                       */
+;/*                                                                        */
+;/*    DATE              NAME                      DESCRIPTION             */
+;/*                                                                        */
+;/*  06-30-2020      Scott Larson            Initial Version 6.0.1         */
+;/*                                                                        */
+;/**************************************************************************/
+;VOID   _tx_initialize_low_level(VOID)
+;{
+    PUBLIC  _tx_initialize_low_level
+_tx_initialize_low_level:
+;
+;    /* Disable interrupts during ThreadX initialization.  */
+;
+    CPSID   i
+;
+;    /* Set base of available memory to end of non-initialised RAM area.  */
+;     
+    LDR     r0, =_tx_initialize_unused_memory       ; Build address of unused memory pointer
+    LDR     r1, =__tx_free_memory_start             ; Build first free address
+    STR     r1, [r0]                                ; Setup first unused memory pointer
+;
+;    /* Setup Vector Table Offset Register.  */
+;    
+    MOV     r0, #0xE000E000                         ; Build address of NVIC registers
+    LDR     r1, =__vector_table                     ; Pickup address of vector table
+    STR     r1, [r0, #0xD08]                        ; Set vector table address
+;
+;    /* Enable the cycle count register.  */
+;
+;    LDR     r0, =0xE0001000                         ; Build address of DWT register
+;    LDR     r1, [r0]                                ; Pickup the current value
+;    ORR     r1, r1, #1                              ; Set the CYCCNTENA bit
+;    STR     r1, [r0]                                ; Enable the cycle count register 
+;
+;    /* Set system stack pointer from vector value.  */
+;
+    LDR     r0, =_tx_thread_system_stack_ptr        ; Build address of system stack pointer
+    LDR     r1, =__vector_table                     ; Pickup address of vector table
+    LDR     r1, [r1]                                ; Pickup reset stack pointer
+    STR     r1, [r0]                                ; Save system stack pointer
+;
+;    /* Configure SysTick.  */
+;
+    MOV     r0, #0xE000E000                         ; Build address of NVIC registers
+    LDR     r1, =SYSTICK_CYCLES
+    STR     r1, [r0, #0x14]                         ; Setup SysTick Reload Value
+    MOV     r1, #0x7                                ; Build SysTick Control Enable Value
+    STR     r1, [r0, #0x10]                         ; Setup SysTick Control
+;
+;    /* Configure handler priorities.  */
+;
+    LDR     r1, =0x00000000                         ; Rsrv, UsgF, BusF, MemM
+    STR     r1, [r0, #0xD18]                        ; Setup System Handlers 4-7 Priority Registers
+
+    LDR     r1, =0xFF000000                         ; SVCl, Rsrv, Rsrv, Rsrv
+    STR     r1, [r0, #0xD1C]                        ; Setup System Handlers 8-11 Priority Registers
+                                                    ; Note: SVC must be lowest priority, which is 0xFF
+
+    LDR     r1, =0x40FF0000                         ; SysT, PnSV, Rsrv, DbgM
+    STR     r1, [r0, #0xD20]                        ; Setup System Handlers 12-15 Priority Registers
+                                                    ; Note: PnSV must be lowest priority, which is 0xFF
+;
+;    /* Return to caller.  */
+;    
+    BX      lr
+;}
+;
+;
+;/* Define shells for each of the unused vectors.  */
+;
+    PUBLIC  __tx_BadHandler
+__tx_BadHandler:
+    B       __tx_BadHandler
+
+
+    PUBLIC  __tx_IntHandler
+__tx_IntHandler:
+; VOID InterruptHandler (VOID)
+; {
+    PUSH    {r0,lr}     ; Save LR (and dummy r0 to maintain stack alignment)
+        
+;    /* Do interrupt handler work here */
+;    /* .... */
+
+    POP     {r0,lr}
+    BX      LR
+; }
+
+
+    PUBLIC  __tx_SysTickHandler
+    PUBLIC SysTick_Handler
+SysTick_Handler:
+__tx_SysTickHandler:
+; VOID TimerInterruptHandler (VOID)
+; {
+;
+    PUSH    {r0,lr}     ; Save LR (and dummy r0 to maintain stack alignment)
+    BL      _tx_timer_interrupt
+    POP     {r0,lr}
+    BX      LR
+; }
+
+    PUBLIC HardFault_Handler
+HardFault_Handler:
+    B       HardFault_Handler
+
+
+    PUBLIC UsageFault_Handler
+UsageFault_Handler:
+    CPSID   i                                       ; Disable interrupts
+    ; Check for stack limit fault
+    LDR     r0, =0xE000ED28                         ; CFSR address
+    LDR     r1,[r0]                                 ; Pick up CFSR
+    TST     r1, #0x00100000                         ; Check for Stack Overflow
+_unhandled_usage_loop
+    BEQ     _unhandled_usage_loop                   ; If not stack overflow then loop
+    
+    ; Handle stack overflow
+    STR     r1, [r0]                                ; Clear CFSR flag(s)
+    
+#ifdef __ARMVFP__
+    LDR     r0, =0xE000EF34                         ; Cleanup FPU context: Load FPCCR address
+    LDR     r1, [r0]                                ; Load FPCCR
+    BIC     r1, r1, #1                              ; Clear the lazy preservation active bit
+    STR     r1, [r0]                                ; Store the value
+#endif
+    
+    MOV32   r0, _tx_thread_current_ptr              ; Build current thread pointer address
+    LDR     r0,[r0]                                 ; Pick up current thread pointer
+    PUSH    {r0,lr}                                 ; Save LR (and r0 to maintain stack alignment)
+    BL      _tx_thread_stack_error_handler          ; Call ThreadX/user handler
+    POP     {r0,lr}                                 ; Restore LR and dummy reg
+    
+#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
+    ; Call the thread exit function to indicate the thread is no longer executing.
+    PUSH    {r0, lr}                                ; Save LR (and r0 just for alignment)
+    BL      _tx_execution_thread_exit               ; Call the thread exit function
+    POP     {r0, lr}                                ; Recover LR
+#endif
+    
+    MOV     r1, #0                                  ; Build NULL value
+    LDR     r0, =_tx_thread_current_ptr             ; Pickup address of current thread pointer
+    STR     r1, [r0]                                ; Clear current thread pointer
+    
+    ; Return from UsageFault_Handler exception
+    LDR     r0, =0xE000ED04                         ; Load ICSR
+    LDR     r1, =0x10000000                         ; Set PENDSVSET bit
+    STR     r1, [r0]                                ; Store ICSR
+    DSB                                             ; Wait for memory access to complete
+    CPSIE   i                                       ; Enable interrupts
+    BX      lr                                      ; Return from exception
+
+
+    PUBLIC  __tx_NMIHandler
+__tx_NMIHandler:
+    B       __tx_NMIHandler
+    
+    
+    PUBLIC  __tx_DBGHandler
+__tx_DBGHandler:
+    B       __tx_DBGHandler
+
+    END

ports_module/cortex_m33/iar/example_build/txm_module_preamble.s

@@ -0,0 +1,69 @@
+    SECTION .text:CODE
+
+    AAPCS INTERWORK, ROPI, RWPI_COMPATIBLE,  VFP_COMPATIBLE
+    PRESERVE8
+
+    /* Define public symbols.  */
+
+    PUBLIC __txm_module_preamble
+
+
+    /* Define application-specific start/stop entry points for the module.  */
+
+    EXTERN demo_module_start
+
+
+    /* Define common external refrences.  */
+
+    EXTERN  _txm_module_thread_shell_entry
+    EXTERN  _txm_module_callback_request_thread_entry
+    EXTERN  ROPI$$Length
+    EXTERN  RWPI$$Length
+
+    DATA
+__txm_module_preamble:
+    DC32      0x4D4F4455                                        // Module ID
+    DC32      0x6                                               // Module Major Version
+    DC32      0x1                                               // Module Minor Version
+    DC32      32                                                // Module Preamble Size in 32-bit words
+    DC32      0x12345678                                        // Module ID (application defined)
+    DC32      0x00000007                                        // Module Properties where:
+                                                                //   Bits 31-24: Compiler ID
+                                                                //           0 -> IAR
+                                                                //           1 -> ARM
+                                                                //           2 -> GNU
+                                                                //   Bits 23-3: Reserved
+                                                                //   Bit 2:  0 -> Disable shared/external memory access
+                                                                //           1 -> Enable shared/external memory access
+                                                                //   Bit 1:  0 -> No MPU protection
+                                                                //           1 -> MPU protection (must have user mode selected - bit 0 set)
+                                                                //   Bit 0:  0 -> Privileged mode execution
+                                                                //           1 -> User mode execution
+    DC32      _txm_module_thread_shell_entry - . - 0            // Module Shell Entry Point
+    DC32      demo_module_start - . - 0                         // Module Start Thread Entry Point
+    DC32      0                                                 // Module Stop Thread Entry Point
+    DC32      1                                                 // Module Start/Stop Thread Priority
+    DC32      1024                                              // Module Start/Stop Thread Stack Size
+    DC32      _txm_module_callback_request_thread_entry - . - 0 // Module Callback Thread Entry
+    DC32      1                                                 // Module Callback Thread Priority
+    DC32      1024                                              // Module Callback Thread Stack Size
+    DC32      ROPI$$Length                                      // Module Code Size
+    DC32      RWPI$$Length                                      // Module Data Size
+    DC32      0                                                 // Reserved 0
+    DC32      0                                                 // Reserved 1
+    DC32      0                                                 // Reserved 2
+    DC32      0                                                 // Reserved 3
+    DC32      0                                                 // Reserved 4
+    DC32      0                                                 // Reserved 5
+    DC32      0                                                 // Reserved 6
+    DC32      0                                                 // Reserved 7
+    DC32      0                                                 // Reserved 8
+    DC32      0                                                 // Reserved 9
+    DC32      0                                                 // Reserved 10
+    DC32      0                                                 // Reserved 11
+    DC32      0                                                 // Reserved 12
+    DC32      0                                                 // Reserved 13
+    DC32      0                                                 // Reserved 14
+    DC32      0                                                 // Reserved 15
+
+    END

ports_module/cortex_m33/iar/inc/tx_port.h

@@ -0,0 +1,708 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Port Specific                                                       */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+
+/**************************************************************************/
+/*                                                                        */
+/*  PORT SPECIFIC C INFORMATION                            RELEASE        */
+/*                                                                        */
+/*    tx_port.h                                            ARMv8-M        */
+/*                                                           6.1.5        */
+/*                                                                        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This file contains data type definitions that make the ThreadX      */
+/*    real-time kernel function identically on a variety of different     */
+/*    processor architectures.  For example, the size or number of bits   */
+/*    in an "int" data type vary between microprocessor architectures and */
+/*    even C compilers for the same microprocessor.  ThreadX does not     */
+/*    directly use native C data types.  Instead, ThreadX creates its     */
+/*    own special types that can be mapped to actual data types by this   */
+/*    file to guarantee consistency in the interface and functionality.   */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  03-02-2021      Scott Larson            Initial Version 6.1.5         */
+/*                                                                        */
+/**************************************************************************/
+
+#ifndef TX_PORT_H
+#define TX_PORT_H
+
+
+/* Determine if the optional ThreadX user define file should be used.  */
+
+#ifdef TX_INCLUDE_USER_DEFINE_FILE
+
+/* Yes, include the user defines in tx_user.h. The defines in this file may
+   alternately be defined on the command line.  */
+
+#include "tx_user.h"
+#endif
+
+
+/* Define compiler library include files.  */
+
+#include <stdlib.h>
+#include <string.h>
+
+#ifdef __ICCARM__
+#include <intrinsics.h>                     /* IAR Intrinsics */
+#define __asm__ __asm                       /* Define to make all inline asm look similar */
+#ifdef  TX_ENABLE_IAR_LIBRARY_SUPPORT
+#include <yvals.h>
+#endif
+#endif /* __ICCARM__ */
+
+
+/* Define ThreadX basic types for this port.  */
+
+#define VOID                                    void
+typedef char                                    CHAR;
+typedef unsigned char                           UCHAR;
+typedef int                                     INT;
+typedef unsigned int                            UINT;
+typedef long                                    LONG;
+typedef unsigned long                           ULONG;
+typedef unsigned long long                      ULONG64;
+typedef short                                   SHORT;
+typedef unsigned short                          USHORT;
+#define ULONG64_DEFINED
+
+/* Function prototypes for this port. */
+struct  TX_THREAD_STRUCT;
+UINT    _txe_thread_secure_stack_allocate(struct TX_THREAD_STRUCT *thread_ptr, ULONG stack_size);
+UINT    _txe_thread_secure_stack_free(struct TX_THREAD_STRUCT *thread_ptr);
+UINT    _tx_thread_secure_stack_allocate(struct TX_THREAD_STRUCT *tx_thread, ULONG stack_size);
+UINT    _tx_thread_secure_stack_free(struct TX_THREAD_STRUCT *tx_thread);
+
+/* This hardware has stack checking that we take advantage of - do NOT define. */
+#ifdef TX_ENABLE_STACK_CHECKING
+    #error "Do not define TX_ENABLE_STACK_CHECKING"
+#endif
+
+/* If user does not want to terminate thread on stack overflow, 
+   #define the TX_THREAD_NO_TERMINATE_STACK_ERROR symbol.
+   The thread will be rescheduled and continue to cause the exception.
+   It is suggested user code handle this by registering a notification with the
+   tx_thread_stack_error_notify function. */
+/*#define TX_THREAD_NO_TERMINATE_STACK_ERROR */
+
+/* Define the system API mappings based on the error checking 
+   selected by the user.  Note: this section is only applicable to 
+   application source code, hence the conditional that turns off this
+   stuff when the include file is processed by the ThreadX source. */
+
+#ifndef TX_SOURCE_CODE
+
+
+/* Determine if error checking is desired.  If so, map API functions 
+   to the appropriate error checking front-ends.  Otherwise, map API
+   functions to the core functions that actually perform the work. 
+   Note: error checking is enabled by default.  */
+
+#ifdef TX_DISABLE_ERROR_CHECKING
+
+/* Services without error checking.  */
+
+#define tx_thread_secure_stack_allocate   _tx_thread_secure_stack_allocate
+#define tx_thread_secure_stack_free       _tx_thread_secure_stack_free
+
+#else
+
+/* Services with error checking.  */
+
+#define tx_thread_secure_stack_allocate   _txe_thread_secure_stack_allocate
+#define tx_thread_secure_stack_free       _txe_thread_secure_stack_free
+
+#endif
+#endif
+
+
+
+/* Define the priority levels for ThreadX.  Legal values range
+   from 32 to 1024 and MUST be evenly divisible by 32.  */
+
+#ifndef TX_MAX_PRIORITIES
+#define TX_MAX_PRIORITIES                       32
+#endif
+
+
+/* Define the minimum stack for a ThreadX thread on this processor. If the size supplied during
+   thread creation is less than this value, the thread create call will return an error.  */
+
+#ifndef TX_MINIMUM_STACK
+#define TX_MINIMUM_STACK                        200         /* Minimum stack size for this port  */
+#endif
+
+
+/* Define the system timer thread's default stack size and priority.  These are only applicable
+   if TX_TIMER_PROCESS_IN_ISR is not defined.  */
+
+#ifndef TX_TIMER_THREAD_STACK_SIZE
+#define TX_TIMER_THREAD_STACK_SIZE              1024        /* Default timer thread stack size  */
+#endif
+
+#ifndef TX_TIMER_THREAD_PRIORITY
+#define TX_TIMER_THREAD_PRIORITY                0           /* Default timer thread priority    */
+#endif
+
+
+/* Define various constants for the ThreadX Cortex-M port.  */
+
+#define TX_INT_DISABLE                          1           /* Disable interrupts               */
+#define TX_INT_ENABLE                           0           /* Enable interrupts                */
+
+
+/* Define the clock source for trace event entry time stamp. The following two item are port specific.
+   For example, if the time source is at the address 0x0a800024 and is 16-bits in size, the clock
+   source constants would be:
+
+#define TX_TRACE_TIME_SOURCE                    *((ULONG *) 0x0a800024)
+#define TX_TRACE_TIME_MASK                      0x0000FFFFUL
+
+*/
+
+#ifndef TX_MISRA_ENABLE
+#ifndef TX_TRACE_TIME_SOURCE
+#define TX_TRACE_TIME_SOURCE                    *((ULONG *) 0xE0001004)
+#endif
+#else
+ULONG   _tx_misra_time_stamp_get(VOID);
+#define TX_TRACE_TIME_SOURCE                    _tx_misra_time_stamp_get()
+#endif
+
+#ifndef TX_TRACE_TIME_MASK
+#define TX_TRACE_TIME_MASK                      0xFFFFFFFFUL
+#endif
+
+
+/* Define the port specific options for the _tx_build_options variable. This variable indicates
+   how the ThreadX library was built.  */
+
+#define TX_PORT_SPECIFIC_BUILD_OPTIONS          (0)
+
+
+/* Define the in-line initialization constant so that modules with in-line
+   initialization capabilities can prevent their initialization from being
+   a function call.  */
+
+#ifdef TX_MISRA_ENABLE
+#define TX_DISABLE_INLINE
+#else
+#define TX_INLINE_INITIALIZATION
+#endif
+
+
+/* Determine whether or not stack checking is enabled. By default, ThreadX stack checking is
+   disabled. When the following is defined, ThreadX thread stack checking is enabled.  If stack
+   checking is enabled (TX_ENABLE_STACK_CHECKING is defined), the TX_DISABLE_STACK_FILLING
+   define is negated, thereby forcing the stack fill which is necessary for the stack checking
+   logic.  */
+
+#ifndef TX_MISRA_ENABLE
+#ifdef TX_ENABLE_STACK_CHECKING
+#undef TX_DISABLE_STACK_FILLING
+#endif
+#endif
+
+
+/* Define the TX_THREAD control block extensions for this port. The main reason
+   for the multiple macros is so that backward compatibility can be maintained with
+   existing ThreadX kernel awareness modules.  */
+
+#define TX_THREAD_EXTENSION_0
+#define TX_THREAD_EXTENSION_1
+#ifdef  TX_ENABLE_IAR_LIBRARY_SUPPORT
+/* IAR library support */
+#if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
+/* ThreadX in non-secure zone with calls to secure zone. */
+#define TX_THREAD_EXTENSION_2               VOID    *tx_thread_module_instance_ptr;         \
+                                            VOID    *tx_thread_module_entry_info_ptr;       \
+                                            ULONG   tx_thread_module_current_user_mode;     \
+                                            ULONG   tx_thread_module_user_mode;             \
+                                            ULONG   tx_thread_module_saved_lr;              \
+                                            VOID    *tx_thread_module_kernel_stack_start;   \
+                                            VOID    *tx_thread_module_kernel_stack_end;     \
+                                            ULONG   tx_thread_module_kernel_stack_size;     \
+                                            VOID    *tx_thread_module_stack_ptr;            \
+                                            VOID    *tx_thread_module_stack_start;          \
+                                            VOID    *tx_thread_module_stack_end;            \
+                                            ULONG   tx_thread_module_stack_size;            \
+                                            VOID    *tx_thread_module_reserved;             \
+                                            VOID    *tx_thread_secure_stack_context;        \
+                                            VOID    *tx_thread_iar_tls_pointer;
+#else
+#define TX_THREAD_EXTENSION_2               VOID    *tx_thread_module_instance_ptr;         \
+                                            VOID    *tx_thread_module_entry_info_ptr;       \
+                                            ULONG   tx_thread_module_current_user_mode;     \
+                                            ULONG   tx_thread_module_user_mode;             \
+                                            ULONG   tx_thread_module_saved_lr;              \
+                                            VOID    *tx_thread_module_kernel_stack_start;   \
+                                            VOID    *tx_thread_module_kernel_stack_end;     \
+                                            ULONG   tx_thread_module_kernel_stack_size;     \
+                                            VOID    *tx_thread_module_stack_ptr;            \
+                                            VOID    *tx_thread_module_stack_start;          \
+                                            VOID    *tx_thread_module_stack_end;            \
+                                            ULONG   tx_thread_module_stack_size;            \
+                                            VOID    *tx_thread_module_reserved;             \
+                                            VOID    *tx_thread_iar_tls_pointer;
+#endif
+
+#else
+/* No IAR library support */
+#if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
+/* ThreadX in non-secure zone with calls to secure zone. */
+#define TX_THREAD_EXTENSION_2               VOID    *tx_thread_module_instance_ptr;         \
+                                            VOID    *tx_thread_module_entry_info_ptr;       \
+                                            ULONG   tx_thread_module_current_user_mode;     \
+                                            ULONG   tx_thread_module_user_mode;             \
+                                            ULONG   tx_thread_module_saved_lr;              \
+                                            VOID    *tx_thread_module_kernel_stack_start;   \
+                                            VOID    *tx_thread_module_kernel_stack_end;     \
+                                            ULONG   tx_thread_module_kernel_stack_size;     \
+                                            VOID    *tx_thread_module_stack_ptr;            \
+                                            VOID    *tx_thread_module_stack_start;          \
+                                            VOID    *tx_thread_module_stack_end;            \
+                                            ULONG   tx_thread_module_stack_size;            \
+                                            VOID    *tx_thread_module_reserved;             \
+                                            VOID    *tx_thread_secure_stack_context;
+#else
+/* ThreadX in only one zone. */
+#define TX_THREAD_EXTENSION_2               VOID    *tx_thread_module_instance_ptr;         \
+                                            VOID    *tx_thread_module_entry_info_ptr;       \
+                                            ULONG   tx_thread_module_current_user_mode;     \
+                                            ULONG   tx_thread_module_user_mode;             \
+                                            ULONG   tx_thread_module_saved_lr;              \
+                                            VOID    *tx_thread_module_kernel_stack_start;   \
+                                            VOID    *tx_thread_module_kernel_stack_end;     \
+                                            ULONG   tx_thread_module_kernel_stack_size;     \
+                                            VOID    *tx_thread_module_stack_ptr;            \
+                                            VOID    *tx_thread_module_stack_start;          \
+                                            VOID    *tx_thread_module_stack_end;            \
+                                            ULONG   tx_thread_module_stack_size;            \
+                                            VOID    *tx_thread_module_reserved;
+#endif
+
+#endif
+#ifndef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
+#define TX_THREAD_EXTENSION_3
+#else
+#define TX_THREAD_EXTENSION_3           unsigned long long  tx_thread_execution_time_total; \
+                                        unsigned long long  tx_thread_execution_time_last_start;
+#endif
+
+
+/* Define the port extensions of the remaining ThreadX objects.  */
+
+#define TX_BLOCK_POOL_EXTENSION
+#define TX_BYTE_POOL_EXTENSION
+#define TX_MUTEX_EXTENSION
+#define TX_EVENT_FLAGS_GROUP_EXTENSION          VOID    *tx_event_flags_group_module_instance; \
+                                                VOID   (*tx_event_flags_group_set_module_notify)(struct TX_EVENT_FLAGS_GROUP_STRUCT *group_ptr);
+
+#define TX_QUEUE_EXTENSION                      VOID    *tx_queue_module_instance; \
+                                                VOID   (*tx_queue_send_module_notify)(struct TX_QUEUE_STRUCT *queue_ptr);
+
+#define TX_SEMAPHORE_EXTENSION                  VOID    *tx_semaphore_module_instance; \
+                                                VOID   (*tx_semaphore_put_module_notify)(struct TX_SEMAPHORE_STRUCT *semaphore_ptr);
+
+#define TX_TIMER_EXTENSION                      VOID    *tx_timer_module_instance; \
+                                                VOID   (*tx_timer_module_expiration_function)(ULONG id);
+
+
+/* Define the user extension field of the thread control block.  Nothing
+   additional is needed for this port so it is defined as white space.  */
+
+#ifndef TX_THREAD_USER_EXTENSION
+#define TX_THREAD_USER_EXTENSION
+#endif
+
+
+/* Define the macros for processing extensions in tx_thread_create, tx_thread_delete,
+   tx_thread_shell_entry, and tx_thread_terminate.  */
+
+
+#ifdef  TX_ENABLE_IAR_LIBRARY_SUPPORT
+void    *_tx_iar_create_per_thread_tls_area(void);
+void    _tx_iar_destroy_per_thread_tls_area(void *tls_ptr);
+void    __iar_Initlocks(void);
+
+#define TX_THREAD_CREATE_EXTENSION(thread_ptr)                      thread_ptr -> tx_thread_iar_tls_pointer =  _tx_iar_create_per_thread_tls_area();
+
+#if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
+#define TX_THREAD_DELETE_EXTENSION(thread_ptr)                      do {_tx_iar_destroy_per_thread_tls_area(thread_ptr -> tx_thread_iar_tls_pointer);   \
+                                                                        thread_ptr -> tx_thread_iar_tls_pointer =  TX_NULL; } while(0);                 \
+                                                                    if(thread_ptr -> tx_thread_secure_stack_context){_tx_thread_secure_stack_free(thread_ptr);}
+#else
+#define TX_THREAD_DELETE_EXTENSION(thread_ptr)                      do {_tx_iar_destroy_per_thread_tls_area(thread_ptr -> tx_thread_iar_tls_pointer);   \
+                                                                        thread_ptr -> tx_thread_iar_tls_pointer =  TX_NULL; } while(0);
+#endif
+#define TX_PORT_SPECIFIC_PRE_SCHEDULER_INITIALIZATION               do {__iar_Initlocks();} while(0);
+#else   /* No IAR library support. */
+#define TX_THREAD_CREATE_EXTENSION(thread_ptr)
+#if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
+#define TX_THREAD_DELETE_EXTENSION(thread_ptr)                      if(thread_ptr -> tx_thread_secure_stack_context){_tx_thread_secure_stack_free(thread_ptr);}
+#else
+#define TX_THREAD_DELETE_EXTENSION(thread_ptr)
+#endif
+#endif  /* TX_ENABLE_IAR_LIBRARY_SUPPORT */
+
+#if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
+/* Define the size of the secure stack for the timer thread and use the extension to allocate the secure stack. */
+#define TX_TIMER_THREAD_SECURE_STACK_SIZE       256
+#define TX_TIMER_INITIALIZE_EXTENSION(status)   _tx_thread_secure_stack_allocate(&_tx_timer_thread, TX_TIMER_THREAD_SECURE_STACK_SIZE);
+#endif
+
+#if defined(__ARMVFP__) || defined(__ARM_PCS_VFP) || defined(__TARGET_FPU_VFP)
+
+#ifdef TX_MISRA_ENABLE
+
+ULONG  _tx_misra_control_get(void);
+void   _tx_misra_control_set(ULONG value);
+ULONG  _tx_misra_fpccr_get(void);
+void   _tx_misra_vfp_touch(void);
+
+#else   /* TX_MISRA_ENABLE not defined */
+
+/* Define some helper functions (these are intrinsics in some compilers). */
+#ifdef __GNUC__
+__attribute__( ( always_inline ) ) static inline ULONG __get_CONTROL(void)
+{
+ULONG  control_value;
+
+    __asm__ volatile (" MRS  %0,CONTROL ": "=r" (control_value) );
+    return(control_value);
+}
+
+__attribute__( ( always_inline ) ) static inline void __set_CONTROL(ULONG control_value)
+{
+    __asm__ volatile (" MSR  CONTROL,%0": : "r" (control_value): "memory" );
+}
+
+#define TX_VFP_TOUCH()  __asm__ volatile ("VMOV.F32 s0, s0");
+
+#endif /* __GNUC__ */
+
+#ifdef __ICCARM__
+#define TX_VFP_TOUCH()  __asm__ volatile ("VMOV.F32 s0, s0");
+#endif  /* __ICCARM__ */
+
+#endif  /* TX_MISRA_ENABLE */
+
+
+/* A completed thread falls into _thread_shell_entry and we can simply deactivate the FPU via CONTROL.FPCA
+   in order to ensure no lazy stacking will occur. */
+
+#ifndef TX_MISRA_ENABLE
+
+#define TX_THREAD_COMPLETED_EXTENSION(thread_ptr)   {                                                       \
+                                                    ULONG  _tx_vfp_state;                                   \
+                                                        _tx_vfp_state =  __get_CONTROL();                   \
+                                                        _tx_vfp_state =  _tx_vfp_state & ~((ULONG) 0x4);    \
+                                                        __set_CONTROL(_tx_vfp_state);                       \
+                                                    }
+#else
+
+#define TX_THREAD_COMPLETED_EXTENSION(thread_ptr)   {                                                       \
+                                                    ULONG  _tx_vfp_state;                                   \
+                                                        _tx_vfp_state =  _tx_misra_control_get();           \
+                                                        _tx_vfp_state =  _tx_vfp_state & ~((ULONG) 0x4);    \
+                                                        _tx_misra_control_set(_tx_vfp_state);               \
+                                                    }
+
+#endif
+
+/* A thread can be terminated by another thread, so we first check if it's self-terminating and not in an ISR.
+   If so, deactivate the FPU via CONTROL.FPCA. Otherwise we are in an interrupt or another thread is terminating
+   this one, so if the FPCCR.LSPACT bit is set, we need to save the CONTROL.FPCA state, touch the FPU to flush 
+   the lazy FPU save, then restore the CONTROL.FPCA state. */
+
+#ifndef TX_MISRA_ENABLE
+
+#define TX_THREAD_TERMINATED_EXTENSION(thread_ptr)  {                                                                                       \
+                                                    ULONG  _tx_system_state;                                                                \
+                                                        _tx_system_state =  TX_THREAD_GET_SYSTEM_STATE();                                   \
+                                                        if ((_tx_system_state == ((ULONG) 0)) && ((thread_ptr) == _tx_thread_current_ptr))  \
+                                                        {                                                                                   \
+                                                        ULONG  _tx_vfp_state;                                                               \
+                                                            _tx_vfp_state =  __get_CONTROL();                                               \
+                                                            _tx_vfp_state =  _tx_vfp_state & ~((ULONG) 0x4);                                \
+                                                            __set_CONTROL(_tx_vfp_state);                                                   \
+                                                        }                                                                                   \
+                                                        else                                                                                \
+                                                        {                                                                                   \
+                                                        ULONG  _tx_fpccr;                                                                   \
+                                                            _tx_fpccr =  *((ULONG *) 0xE000EF34);                                           \
+                                                            _tx_fpccr =  _tx_fpccr & ((ULONG) 0x01);                                        \
+                                                            if (_tx_fpccr == ((ULONG) 0x01))                                                \
+                                                            {                                                                               \
+                                                            ULONG _tx_vfp_state;                                                            \
+                                                                _tx_vfp_state = __get_CONTROL();                                            \
+                                                                _tx_vfp_state =  _tx_vfp_state & ((ULONG) 0x4);                             \
+                                                                TX_VFP_TOUCH();                                                             \
+                                                                if (_tx_vfp_state == ((ULONG) 0))                                           \
+                                                                {                                                                           \
+                                                                    _tx_vfp_state =  __get_CONTROL();                                       \
+                                                                    _tx_vfp_state =  _tx_vfp_state & ~((ULONG) 0x4);                        \
+                                                                    __set_CONTROL(_tx_vfp_state);                                           \
+                                                                }                                                                           \
+                                                            }                                                                               \
+                                                        }                                                                                   \
+                                                    }
+#else
+
+#define TX_THREAD_TERMINATED_EXTENSION(thread_ptr)  {                                                                                       \
+                                                    ULONG  _tx_system_state;                                                                \
+                                                        _tx_system_state =  TX_THREAD_GET_SYSTEM_STATE();                                   \
+                                                        if ((_tx_system_state == ((ULONG) 0)) && ((thread_ptr) == _tx_thread_current_ptr))  \
+                                                        {                                                                                   \
+                                                        ULONG  _tx_vfp_state;                                                               \
+                                                            _tx_vfp_state =  _tx_misra_control_get();                                       \
+                                                            _tx_vfp_state =  _tx_vfp_state & ~((ULONG) 0x4);                                \
+                                                            _tx_misra_control_set(_tx_vfp_state);                                           \
+                                                        }                                                                                   \
+                                                        else                                                                                \
+                                                        {                                                                                   \
+                                                        ULONG  _tx_fpccr;                                                                   \
+                                                            _tx_fpccr =  _tx_misra_fpccr_get();                                             \
+                                                            _tx_fpccr =  _tx_fpccr & ((ULONG) 0x01);                                        \
+                                                            if (_tx_fpccr == ((ULONG) 0x01))                                                \
+                                                            {                                                                               \
+                                                            ULONG _tx_vfp_state;                                                            \
+                                                                _tx_vfp_state = _tx_misra_control_get();                                    \
+                                                                _tx_vfp_state =  _tx_vfp_state & ((ULONG) 0x4);                             \
+                                                                _tx_misra_vfp_touch();                                                      \
+                                                                if (_tx_vfp_state == ((ULONG) 0))                                           \
+                                                                {                                                                           \
+                                                                    _tx_vfp_state =  _tx_misra_control_get();                               \
+                                                                    _tx_vfp_state =  _tx_vfp_state & ~((ULONG) 0x4);                        \
+                                                                    _tx_misra_control_set(_tx_vfp_state);                                   \
+                                                                }                                                                           \
+                                                            }                                                                               \
+                                                        }                                                                                   \
+                                                    }
+#endif
+
+#else   /* No VFP in use */
+
+#define TX_THREAD_COMPLETED_EXTENSION(thread_ptr)
+#define TX_THREAD_TERMINATED_EXTENSION(thread_ptr)
+
+#endif  /* defined(__ARMVFP__) || defined(__ARM_PCS_VFP) || defined(__TARGET_FPU_VFP) */
+
+
+/* Define the ThreadX object creation extensions for the remaining objects.  */
+
+#define TX_BLOCK_POOL_CREATE_EXTENSION(pool_ptr)
+#define TX_BYTE_POOL_CREATE_EXTENSION(pool_ptr)
+#define TX_EVENT_FLAGS_GROUP_CREATE_EXTENSION(group_ptr)
+#define TX_MUTEX_CREATE_EXTENSION(mutex_ptr)
+#define TX_QUEUE_CREATE_EXTENSION(queue_ptr)
+#define TX_SEMAPHORE_CREATE_EXTENSION(semaphore_ptr)
+#define TX_TIMER_CREATE_EXTENSION(timer_ptr)
+
+
+/* Define the ThreadX object deletion extensions for the remaining objects.  */
+
+#define TX_BLOCK_POOL_DELETE_EXTENSION(pool_ptr)
+#define TX_BYTE_POOL_DELETE_EXTENSION(pool_ptr)
+#define TX_EVENT_FLAGS_GROUP_DELETE_EXTENSION(group_ptr)
+#define TX_MUTEX_DELETE_EXTENSION(mutex_ptr)
+#define TX_QUEUE_DELETE_EXTENSION(queue_ptr)
+#define TX_SEMAPHORE_DELETE_EXTENSION(semaphore_ptr)
+#define TX_TIMER_DELETE_EXTENSION(timer_ptr)
+
+
+/* Define the get system state macro.   */
+
+#ifndef TX_THREAD_GET_SYSTEM_STATE
+#ifndef TX_MISRA_ENABLE
+
+#ifdef __GNUC__ /* GCC and ARM Compiler 6 */
+
+__attribute__( ( always_inline ) ) static inline unsigned int __get_IPSR(void)
+{
+unsigned int  ipsr_value;
+    __asm__ volatile (" MRS  %0,IPSR ": "=r" (ipsr_value) );
+    return(ipsr_value);
+}
+
+#define TX_THREAD_GET_SYSTEM_STATE()        (_tx_thread_system_state | __get_IPSR())
+
+#elif defined(__ICCARM__)   /* IAR */
+
+#define TX_THREAD_GET_SYSTEM_STATE()        (_tx_thread_system_state | __get_IPSR())
+
+#endif  /* TX_THREAD_GET_SYSTEM_STATE for different compilers */
+
+#else   /* TX_MISRA_ENABLE is defined, use MISRA function. */
+ULONG   _tx_misra_ipsr_get(VOID);
+#define TX_THREAD_GET_SYSTEM_STATE()        (_tx_thread_system_state | _tx_misra_ipsr_get())
+#endif  /* TX_MISRA_ENABLE */
+#endif  /* TX_THREAD_GET_SYSTEM_STATE */
+
+
+/* Define the check for whether or not to call the _tx_thread_system_return function.  A non-zero value
+   indicates that _tx_thread_system_return should not be called. This overrides the definition in tx_thread.h
+   for Cortex-M since so we don't waste time checking the _tx_thread_system_state variable that is always
+   zero after initialization for Cortex-M ports. */
+
+#ifndef TX_THREAD_SYSTEM_RETURN_CHECK
+#define TX_THREAD_SYSTEM_RETURN_CHECK(c)    (c) = ((ULONG) _tx_thread_preempt_disable);
+#endif
+
+#if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
+/* Initialize secure stacks for threads calling secure functions. */
+extern void    _tx_thread_secure_stack_initialize(void);
+#define TX_INITIALIZE_KERNEL_ENTER_EXTENSION            _tx_thread_secure_stack_initialize();
+#endif
+
+/* Define the macro to ensure _tx_thread_preempt_disable is set early in initialization in order to
+   prevent early scheduling on Cortex-M parts.  */
+
+#define TX_PORT_SPECIFIC_POST_INITIALIZATION    _tx_thread_preempt_disable++;
+
+
+
+
+#ifndef TX_DISABLE_INLINE
+
+/* Define the TX_LOWEST_SET_BIT_CALCULATE macro for each compiler. */
+#ifdef __ICCARM__       /* IAR Compiler */
+#define TX_LOWEST_SET_BIT_CALCULATE(m, b)       (b) = (UINT) __CLZ(__RBIT((m)));
+#elif defined(__GNUC__) /* GCC and AC6 Compiler */
+#define TX_LOWEST_SET_BIT_CALCULATE(m, b)       __asm__ volatile (" RBIT %0,%1 ": "=r" (m) : "r" (m) ); \
+                                                __asm__ volatile (" CLZ  %0,%1 ": "=r" (b) : "r" (m) ); 
+#endif
+
+/* Define the interrupt disable/restore macros for each compiler. */
+
+#ifdef __GNUC__ /* GCC and AC6 */
+
+__attribute__( ( always_inline ) ) static inline unsigned int __disable_interrupt(void)
+{
+unsigned int  primask_value;
+
+    __asm__ volatile (" MRS  %0,PRIMASK ": "=r" (primask_value) );
+    __asm__ volatile (" CPSID i" : : : "memory" );
+    return(primask_value);
+}
+
+__attribute__( ( always_inline ) ) static inline void __restore_interrupt(unsigned int primask_value)
+{
+    __asm__ volatile (" MSR  PRIMASK,%0": : "r" (primask_value): "memory" );
+}
+
+__attribute__( ( always_inline ) ) static inline unsigned int __get_primask_value(void)
+{
+unsigned int  primask_value;
+
+    __asm__ volatile (" MRS  %0,PRIMASK ": "=r" (primask_value) );
+    return(primask_value);
+}
+
+__attribute__( ( always_inline ) ) static inline void __enable_interrupt(void)
+{
+    __asm__ volatile (" CPSIE  i": : : "memory" );
+}
+
+
+__attribute__( ( always_inline ) ) static inline void _tx_thread_system_return_inline(void)
+{
+unsigned int interrupt_save;
+
+    /* Set PendSV to invoke ThreadX scheduler.  */
+    *((ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
+    if (__get_IPSR() == 0)
+    {
+        interrupt_save = __get_primask_value();
+        __enable_interrupt();
+        __restore_interrupt(interrupt_save);
+    }
+}
+
+
+#define TX_INTERRUPT_SAVE_AREA  unsigned int interrupt_save;
+#define TX_DISABLE                              interrupt_save =  __disable_interrupt();
+#define TX_RESTORE                              __restore_interrupt(interrupt_save);
+
+#elif defined(__ICCARM__)   /* IAR */
+
+static void _tx_thread_system_return_inline(void)
+{
+__istate_t interrupt_save;
+
+    /* Set PendSV to invoke ThreadX scheduler.  */
+    *((ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
+    if (__get_IPSR() == 0)
+    {
+        interrupt_save = __get_interrupt_state();
+        __enable_interrupt();
+        __set_interrupt_state(interrupt_save);
+    }
+}
+
+#define TX_INTERRUPT_SAVE_AREA                  __istate_t interrupt_save;
+#define TX_DISABLE                              {interrupt_save = __get_interrupt_state();__disable_interrupt();};
+#define TX_RESTORE                              {__set_interrupt_state(interrupt_save);};
+
+#endif  /* Interrupt disable/restore macros for each compiler. */
+
+/* Redefine _tx_thread_system_return for improved performance.  */
+
+#define _tx_thread_system_return                _tx_thread_system_return_inline
+
+
+#else   /* TX_DISABLE_INLINE is defined */
+
+UINT                                            _tx_thread_interrupt_disable(VOID);
+VOID                                            _tx_thread_interrupt_restore(UINT previous_posture);
+
+#define TX_INTERRUPT_SAVE_AREA                  register UINT interrupt_save;
+
+#define TX_DISABLE                              interrupt_save = _tx_thread_interrupt_disable();
+#define TX_RESTORE                              _tx_thread_interrupt_restore(interrupt_save);
+#endif  /* TX_DISABLE_INLINE */
+
+
+/* Define the version ID of ThreadX.  This may be utilized by the application.  */
+
+#ifdef TX_THREAD_INIT
+CHAR                            _tx_version_id[] =
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Modules ARMv8-M Version 6.1.5 *";
+#else
+#ifdef TX_MISRA_ENABLE
+extern  CHAR                    _tx_version_id[100];
+#else
+extern  CHAR                    _tx_version_id[];
+#endif
+#endif
+
+
+#endif

ports_module/cortex_m33/iar/inc/tx_secure_interface.h

@@ -0,0 +1,60 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Thread                                                              */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+
+/**************************************************************************/
+/*                                                                        */
+/*  COMPONENT DEFINITION                                   RELEASE        */
+/*                                                                        */
+/*    tx_secure_interface.h                               PORTABLE C      */
+/*                                                            6.1         */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This file defines the ThreadX secure thread stack components,       */
+/*    including data types and external references.                       */
+/*    It is assumed that tx_api.h and tx_port.h have already been         */
+/*    included.                                                           */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*                                                                        */
+/**************************************************************************/
+
+#ifndef TX_SECURE_INTERFACE_H
+#define TX_SECURE_INTERFACE_H
+
+/* Define internal secure thread stack function prototypes.  */
+
+extern void    _tx_thread_secure_stack_initialize(void);
+extern UINT    _tx_thread_secure_mode_stack_allocate(TX_THREAD *thread_ptr, ULONG stack_size);
+extern UINT    _tx_thread_secure_mode_stack_free(TX_THREAD *thread_ptr);
+extern void    _tx_thread_secure_stack_context_save(TX_THREAD *thread_ptr);
+extern void    _tx_thread_secure_stack_context_restore(TX_THREAD *thread_ptr);
+
+#endif

ports_module/cortex_m33/iar/inc/txm_module_port.h

@@ -0,0 +1,355 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Module                                                              */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+
+/**************************************************************************/
+/*                                                                        */
+/*  APPLICATION INTERFACE DEFINITION                       RELEASE        */
+/*                                                                        */
+/*    txm_module_port.h                               Cortex-M33/MPU/IAR  */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This file defines the basic module constants, interface structures, */
+/*    and function prototypes.                                            */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  03-02-2021      Scott Larson            Initial Version 6.1.5         */
+/*                                                                        */
+/**************************************************************************/
+
+#ifndef TXM_MODULE_PORT_H
+#define TXM_MODULE_PORT_H
+
+/* Determine if the optional Modules user define file should be used.  */
+
+#ifdef TXM_MODULE_INCLUDE_USER_DEFINE_FILE
+
+/* Yes, include the user defines in txm_module_user.h. The defines in this file may
+   alternately be defined on the command line.  */
+
+#include "txm_module_user.h"
+#endif
+
+/* It is assumed that the base ThreadX tx_port.h file has been modified to add the
+  following extensions to the ThreadX thread control block (this code should replace
+  the corresponding macro define in tx_port.h):
+
+#define TX_THREAD_EXTENSION_2                   VOID    *tx_thread_module_instance_ptr;         \
+                                                VOID    *tx_thread_module_entry_info_ptr;       \
+                                                ULONG   tx_thread_module_current_user_mode;     \
+                                                ULONG   tx_thread_module_user_mode;             \
+                                                ULONG   tx_thread_module_saved_lr;              \
+                                                VOID    *tx_thread_module_kernel_stack_start;   \
+                                                VOID    *tx_thread_module_kernel_stack_end;     \
+                                                ULONG   tx_thread_module_kernel_stack_size;     \
+                                                VOID    *tx_thread_module_stack_ptr;            \
+                                                VOID    *tx_thread_module_stack_start;          \
+                                                VOID    *tx_thread_module_stack_end;            \
+                                                ULONG   tx_thread_module_stack_size;            \
+                                                VOID    *tx_thread_module_reserved;             \
+                                                VOID    *tx_thread_iar_tls_pointer;
+
+The following extensions must also be defined in tx_port.h:
+
+#define TX_EVENT_FLAGS_GROUP_EXTENSION          VOID    *tx_event_flags_group_module_instance; \
+                                                VOID   (*tx_event_flags_group_set_module_notify)(struct TX_EVENT_FLAGS_GROUP_STRUCT *group_ptr);
+
+#define TX_QUEUE_EXTENSION                      VOID    *tx_queue_module_instance; \
+                                                VOID   (*tx_queue_send_module_notify)(struct TX_QUEUE_STRUCT *queue_ptr);
+
+#define TX_SEMAPHORE_EXTENSION                  VOID    *tx_semaphore_module_instance; \
+                                                VOID   (*tx_semaphore_put_module_notify)(struct TX_SEMAPHORE_STRUCT *semaphore_ptr);
+
+#define TX_TIMER_EXTENSION                      VOID    *tx_timer_module_instance; \
+                                                VOID   (*tx_timer_module_expiration_function)(ULONG id);
+*/
+
+/* Define the kernel stack size for a module thread.  */
+#ifndef TXM_MODULE_KERNEL_STACK_SIZE
+#define TXM_MODULE_KERNEL_STACK_SIZE            768
+#endif
+
+/* Define constants specific to the tools the module can be built with for this particular modules port.  */
+
+#define TXM_MODULE_IAR_COMPILER                 0x00000000
+#define TXM_MODULE_RVDS_COMPILER                0x01000000
+#define TXM_MODULE_GNU_COMPILER                 0x02000000
+#define TXM_MODULE_COMPILER_MASK                0xFF000000
+#define TXM_MODULE_OPTIONS_MASK                 0x000000FF
+
+
+/* Define the properties for this particular module port.  */
+
+#define TXM_MODULE_PORT_DISPATCH
+
+#define TXM_MODULE_MEMORY_PROTECTION_ENABLED
+
+#ifdef  TXM_MODULE_MEMORY_PROTECTION_ENABLED
+#define TXM_MODULE_REQUIRE_ALLOCATED_OBJECT_MEMORY
+#else
+#define TXM_MODULE_REQUIRE_LOCAL_OBJECT_MEMORY
+#endif
+
+#define TXM_MODULE_USER_MODE                        0x00000001
+#define TXM_MODULE_MEMORY_PROTECTION                0x00000002
+#define TXM_MODULE_SHARED_EXTERNAL_MEMORY_ACCESS    0x00000004
+
+
+/* Define the supported options for this module.   */
+
+#define TXM_MODULE_MANAGER_SUPPORTED_OPTIONS    (TXM_MODULE_USER_MODE | TXM_MODULE_MEMORY_PROTECTION | TXM_MODULE_SHARED_EXTERNAL_MEMORY_ACCESS)
+#define TXM_MODULE_MANAGER_REQUIRED_OPTIONS     0
+
+
+/* Define offset adjustments according to the compiler used to build the module.  */
+
+#define TXM_MODULE_IAR_SHELL_ADJUST             24
+#define TXM_MODULE_IAR_START_ADJUST             28
+#define TXM_MODULE_IAR_STOP_ADJUST              32
+#define TXM_MODULE_IAR_CALLBACK_ADJUST          44
+
+#define TXM_MODULE_RVDS_SHELL_ADJUST            0
+#define TXM_MODULE_RVDS_START_ADJUST            0
+#define TXM_MODULE_RVDS_STOP_ADJUST             0
+#define TXM_MODULE_RVDS_CALLBACK_ADJUST         0
+
+#define TXM_MODULE_GNU_SHELL_ADJUST             24
+#define TXM_MODULE_GNU_START_ADJUST             28
+#define TXM_MODULE_GNU_STOP_ADJUST              32
+#define TXM_MODULE_GNU_CALLBACK_ADJUST          44
+
+
+/* Define other module port-specific constants.  */
+
+/* Define INLINE_DECLARE to inline for ARM compiler.  */
+
+#define INLINE_DECLARE inline
+
+/* Define the number of MPU entries assigned to the code and data sections.
+   On Cortex-M33 devices, there are 8 total entries. ThreadX uses one for access
+   to the kernel entry function, one for module code protection, one for module data protection,
+   leaving five regions available for shared memory.  */
+#define TXM_MODULE_MPU_TOTAL_ENTRIES            8
+#define TXM_MODULE_MPU_KERNEL_ENTRY_INDEX       0
+#define TXM_MODULE_MPU_CODE_INDEX               1
+#define TXM_MODULE_MPU_DATA_INDEX               2
+
+#define TXM_MODULE_MPU_SHARED_INDEX             3
+#define TXM_MODULE_MPU_SHARED_ENTRIES           5
+
+#define TXM_MODULE_ATTRIBUTE_NON_SHAREABLE      0x00
+#define TXM_MODULE_ATTRIBUTE_OUTER_SHAREABLE    0x10
+#define TXM_MODULE_ATTRIBUTE_INNER_SHAREABLE    0x18
+#define TXM_MODULE_ATTRIBUTE_READ_WRITE         0x02
+#define TXM_MODULE_ATTRIBUTE_READ_ONLY          0x06
+#define TXM_MODULE_ATTRIBUTE_EXECUTE_NEVER      0x01
+#define TXM_MODULE_ATTRIBUTE_REGION_ENABLE      0x01
+#define TXM_MODULE_ATTRIBUTE_MASK               0x1E
+#define TXM_MODULE_ATTRIBUTE_INDEX              0x00
+
+/* MAIR_ATTR settings
+Device-nGnRE : 0b [Outer]0000 [Inner]0100
+Code WT   RA : 0b [Outer]1010 [Inner]1010
+DATA WBWA RA : 0b [Outer]1111 [Inner]1111
+*/
+
+/* Data aligned to 8 bytes (stacks must be 8-byte aligned).  */
+#define TXM_MODULE_DATA_ALIGNMENT               8
+
+/* MPU regions must be 32-byte aligned.  */
+#define TXM_MODULE_MPU_ALIGNMENT                32
+
+#define TXM_THREAD_SECURE_STACK_ALLOCATE_CALL   TXM_MODULE_PORT_EXTENSION_API_ID_START
+#define TXM_THREAD_SECURE_STACK_FREE_CALL       (TXM_MODULE_PORT_EXTENSION_API_ID_START+1)
+
+/* There are 2 registers to set up each MPU region: MPU_RBAR, MPU_RLAR.  */
+typedef struct TXM_MODULE_MPU_INFO_STRUCT
+{
+    ULONG   txm_module_mpu_region_base_address;
+    ULONG   txm_module_mpu_region_limit_address;
+} TXM_MODULE_MPU_INFO;
+
+/* Define the port-extensions to the module manager instance structure.  */
+#define TXM_MODULE_MANAGER_PORT_EXTENSION                                                               \
+    TXM_MODULE_MPU_INFO     txm_module_instance_mpu_registers[TXM_MODULE_MPU_TOTAL_ENTRIES];            \
+    ULONG                   txm_module_instance_shared_memory_count;                                    \
+    ULONG                   txm_module_instance_shared_memory_address[TXM_MODULE_MPU_SHARED_ENTRIES];   \
+    ULONG                   txm_module_instance_shared_memory_length[TXM_MODULE_MPU_SHARED_ENTRIES];
+
+
+/* Define the memory fault information structure that is populated when a memory fault occurs.  */
+
+typedef struct TXM_MODULE_MANAGER_MEMORY_FAULT_INFO_STRUCT
+{
+    TX_THREAD           *txm_module_manager_memory_fault_info_thread_ptr;
+    VOID                *txm_module_manager_memory_fault_info_code_location;
+    ULONG               txm_module_manager_memory_fault_info_shcsr;
+    ULONG               txm_module_manager_memory_fault_info_cfsr;
+    ULONG               txm_module_manager_memory_fault_info_mmfar;
+    ULONG               txm_module_manager_memory_fault_info_bfar;
+    ULONG               txm_module_manager_memory_fault_info_control;
+    ULONG               txm_module_manager_memory_fault_info_sp;
+    ULONG               txm_module_manager_memory_fault_info_r0;
+    ULONG               txm_module_manager_memory_fault_info_r1;
+    ULONG               txm_module_manager_memory_fault_info_r2;
+    ULONG               txm_module_manager_memory_fault_info_r3;
+    ULONG               txm_module_manager_memory_fault_info_r4;
+    ULONG               txm_module_manager_memory_fault_info_r5;
+    ULONG               txm_module_manager_memory_fault_info_r6;
+    ULONG               txm_module_manager_memory_fault_info_r7;
+    ULONG               txm_module_manager_memory_fault_info_r8;
+    ULONG               txm_module_manager_memory_fault_info_r9;
+    ULONG               txm_module_manager_memory_fault_info_r10;
+    ULONG               txm_module_manager_memory_fault_info_r11;
+    ULONG               txm_module_manager_memory_fault_info_r12;
+    ULONG               txm_module_manager_memory_fault_info_lr;
+    ULONG               txm_module_manager_memory_fault_info_xpsr;
+} TXM_MODULE_MANAGER_MEMORY_FAULT_INFO;
+
+
+#define TXM_MODULE_MANAGER_FAULT_INFO                                               \
+    TXM_MODULE_MANAGER_MEMORY_FAULT_INFO    _txm_module_manager_memory_fault_info;
+
+
+/* Define the macro to check the code alignment.  */
+
+#define TXM_MODULE_MANAGER_CHECK_CODE_ALIGNMENT(module_location, code_alignment)    \
+    {                                                                               \
+        ULONG   temp;                                                               \
+        temp =  (ULONG) module_location;                                            \
+        temp =  temp & (code_alignment - 1);                                        \
+        if (temp)                                                                   \
+        {                                                                           \
+            _tx_mutex_put(&_txm_module_manager_mutex);                              \
+            return(TXM_MODULE_ALIGNMENT_ERROR);                                     \
+        }                                                                           \
+    }
+
+
+/* Define the macro to adjust the alignment and size for code/data areas.  */
+
+#define TXM_MODULE_MANAGER_ALIGNMENT_ADJUST(module_preamble, code_size, code_alignment, data_size, data_alignment)   _txm_module_manager_alignment_adjust(module_preamble, &code_size, &code_alignment, &data_size, &data_alignment);
+
+
+/* Define the macro to adjust the symbols in the module preamble.  */
+
+#define TXM_MODULE_MANAGER_CALCULATE_ADJUSTMENTS(properties, shell_function_adjust, start_function_adjust, stop_function_adjust, callback_function_adjust) \
+    if ((properties & TXM_MODULE_COMPILER_MASK) == TXM_MODULE_IAR_COMPILER)         \
+    {                                                                               \
+        shell_function_adjust =     TXM_MODULE_IAR_SHELL_ADJUST;                    \
+        start_function_adjust =     TXM_MODULE_IAR_START_ADJUST;                    \
+        stop_function_adjust =      TXM_MODULE_IAR_STOP_ADJUST;                     \
+        callback_function_adjust =  TXM_MODULE_IAR_CALLBACK_ADJUST;                 \
+    }                                                                               \
+    else if ((properties & TXM_MODULE_COMPILER_MASK) == TXM_MODULE_RVDS_COMPILER)   \
+    {                                                                               \
+        shell_function_adjust =     TXM_MODULE_RVDS_SHELL_ADJUST;                   \
+        start_function_adjust =     TXM_MODULE_RVDS_START_ADJUST;                   \
+        stop_function_adjust =      TXM_MODULE_RVDS_STOP_ADJUST;                    \
+        callback_function_adjust =  TXM_MODULE_RVDS_CALLBACK_ADJUST;                \
+    }                                                                               \
+    else                                                                            \
+    {                                                                               \
+        shell_function_adjust =     TXM_MODULE_GNU_SHELL_ADJUST;                    \
+        start_function_adjust =     TXM_MODULE_GNU_START_ADJUST;                    \
+        stop_function_adjust =      TXM_MODULE_GNU_STOP_ADJUST;                     \
+        callback_function_adjust =  TXM_MODULE_GNU_CALLBACK_ADJUST;                 \
+    }
+
+
+/* Define the macro to populate the thread control block with module port-specific information.
+   Check if the module is in user mode and set up txm_module_thread_entry_info_kernel_call_dispatcher accordingly.
+*/
+
+#define TXM_MODULE_MANAGER_THREAD_SETUP(thread_ptr, module_instance)                                                                    \
+    thread_ptr -> tx_thread_module_current_user_mode =  module_instance -> txm_module_instance_property_flags & TXM_MODULE_USER_MODE;   \
+    thread_ptr -> tx_thread_module_user_mode =          module_instance -> txm_module_instance_property_flags & TXM_MODULE_USER_MODE;   \
+    if (thread_ptr -> tx_thread_module_user_mode)                                                                                       \
+    {                                                                                                                                   \
+        thread_entry_info -> txm_module_thread_entry_info_kernel_call_dispatcher =   _txm_module_manager_user_mode_entry;               \
+    }                                                                                                                                   \
+    else                                                                                                                                \
+    {                                                                                                                                   \
+        thread_entry_info -> txm_module_thread_entry_info_kernel_call_dispatcher =   _txm_module_manager_kernel_dispatch;               \
+    }
+
+
+/* Define the macro to populate the module control block with module port-specific information.
+   If memory protection is enabled, set up the MPU registers.
+*/
+#define TXM_MODULE_MANAGER_MODULE_SETUP(module_instance)                                            \
+    if (module_instance -> txm_module_instance_property_flags & TXM_MODULE_USER_MODE)               \
+    {                                                                                               \
+        if (module_instance -> txm_module_instance_property_flags & TXM_MODULE_MEMORY_PROTECTION)   \
+        {                                                                                           \
+            _txm_module_manager_mm_register_setup(module_instance);                                 \
+        }                                                                                           \
+    }                                                                                               \
+    else                                                                                            \
+    {                                                                                               \
+        /* Do nothing.  */                                                                          \
+    }
+
+/* Define the macro to perform port-specific functions when unloading the module.  */
+/* Nothing needs to be done for this port.  */
+#define TXM_MODULE_MANAGER_MODULE_UNLOAD(module_instance)
+
+
+/* Define the macros to perform port-specific checks when passing pointers to the kernel.  */
+
+/* Define macro to make sure object is inside the module's data.  */
+#define TXM_MODULE_MANAGER_CHECK_INSIDE_DATA(module_instance, obj_ptr, obj_size) \
+    _txm_module_manager_inside_data_check(module_instance, obj_ptr, obj_size)
+
+/* Define some internal prototypes to this module port.  */
+
+#ifndef TX_SOURCE_CODE
+#define txm_module_manager_memory_fault_notify              _txm_module_manager_memory_fault_notify
+#endif
+
+
+#ifdef TX_SOURCE_CODE
+
+#endif
+
+#define TXM_MODULE_MANAGER_ADDITIONAL_PROTOTYPES                                                                                \
+VOID  _txm_module_manager_alignment_adjust(TXM_MODULE_PREAMBLE *module_preamble, ULONG *code_size, ULONG *code_alignment, ULONG *data_size, ULONG *data_alignment);   \
+VOID  _txm_module_manager_memory_fault_handler(VOID);                                                                           \
+UINT  _txm_module_manager_memory_fault_notify(VOID (*notify_function)(TX_THREAD *, TXM_MODULE_INSTANCE *));                     \
+VOID  _txm_module_manager_mm_register_setup(TXM_MODULE_INSTANCE *module_instance);                                              \
+UINT  _txm_module_manager_inside_data_check(TXM_MODULE_INSTANCE *module_instance, ALIGN_TYPE obj_ptr, UINT obj_size);           \
+ALIGN_TYPE _txm_module_manager_port_dispatch(TXM_MODULE_INSTANCE *module_instance, ULONG kernel_request, ALIGN_TYPE param_0, ALIGN_TYPE param_1, ALIGN_TYPE param_2);
+
+
+#define TXM_MODULE_MANAGER_VERSION_ID   \
+CHAR                            _txm_module_manager_version_id[] =  \
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Module Cortex-M33/MPU/IAR Version 6.1.5 *";
+
+#endif

ports_module/cortex_m33/iar/module_lib/src/txm_module_thread_shell_entry.c

@@ -0,0 +1,174 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Module                                                              */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+#ifndef TXM_MODULE
+#define TXM_MODULE
+#endif
+
+#ifndef TX_SOURCE_CODE
+#define TX_SOURCE_CODE
+#endif
+
+
+/* Include necessary system files.  */
+
+#include "txm_module.h"
+#include "tx_thread.h"
+
+/* Define the global module entry pointer from the start thread of the module.  */
+
+TXM_MODULE_THREAD_ENTRY_INFO    *_txm_module_entry_info;
+
+
+/* Define the dispatch function pointer used in the module implementation.  */
+
+ULONG                           (*_txm_module_kernel_call_dispatcher)(ULONG kernel_request, ULONG param_1, ULONG param_2, ULONG param3);
+
+
+/* Define the IAR startup code that clears the uninitialized global data and sets up the
+   preset global variables.  */
+
+extern VOID __iar_data_init3(VOID);
+
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _txm_module_thread_shell_entry                   Cortex-M33/MPU/IAR */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function calls the specified entry function of the thread.  It */
+/*    also provides a place for the thread's entry function to return.    */
+/*    If the thread returns, this function places the thread in a         */
+/*    "COMPLETED" state.                                                  */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    thread_ptr                        Pointer to current thread         */
+/*    thread_info                       Pointer to thread entry info      */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    __iar_data_init3                  IAR global initialization         */
+/*    thread_entry                      Thread's entry function           */
+/*    tx_thread_resume                  Resume the module callback thread */
+/*    _txm_module_thread_system_suspend Module thread suspension routine  */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    Initial thread stack frame                                          */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  03-02-2021      Scott Larson            Initial Version 6.1.5         */
+/*                                                                        */
+/**************************************************************************/
+VOID  _txm_module_thread_shell_entry(TX_THREAD *thread_ptr, TXM_MODULE_THREAD_ENTRY_INFO *thread_info)
+{
+
+#ifndef TX_DISABLE_NOTIFY_CALLBACKS
+    VOID            (*entry_exit_notify)(TX_THREAD *, UINT);
+#endif
+
+
+    /* Determine if this is the start thread.  If so, we must prepare the module for
+       execution.  If not, simply skip the C startup code.  */
+    if (thread_info -> txm_module_thread_entry_info_start_thread)
+    {
+        /* Initialize the IAR C environment.  */
+        __iar_data_init3();
+        
+        /* Save the entry info pointer, for later use.  */
+        _txm_module_entry_info =  thread_info;
+        
+        /* Save the kernel function dispatch address. This is used to make all resident calls from
+           the module.  */
+        _txm_module_kernel_call_dispatcher =  thread_info -> txm_module_thread_entry_info_kernel_call_dispatcher;
+        
+        /* Ensure that we have a valid pointer.  */
+        while (!_txm_module_kernel_call_dispatcher)
+        {
+            /* Loop here, if an error is present getting the dispatch function pointer!
+               An error here typically indicates the resident portion of _tx_thread_schedule
+               is not supporting the trap to obtain the function pointer.   */
+        }
+        
+        /* Resume the module's callback thread, already created in the manager.  */
+        _txe_thread_resume(thread_info -> txm_module_thread_entry_info_callback_request_thread);
+    }
+
+#ifndef TX_DISABLE_NOTIFY_CALLBACKS
+
+    /* Pickup the entry/exit application callback routine.  */
+    entry_exit_notify =  thread_info -> txm_module_thread_entry_info_exit_notify;
+
+    /* Determine if an application callback routine is specified.  */
+    if (entry_exit_notify != TX_NULL)
+    {
+
+        /* Yes, notify application that this thread has been entered!  */
+        (entry_exit_notify)(thread_ptr, TX_THREAD_ENTRY);
+    }
+#endif
+
+    /* Call current thread's entry function.  */
+    (thread_info -> txm_module_thread_entry_info_entry) (thread_info -> txm_module_thread_entry_info_parameter);
+
+    /* Suspend thread with a "completed" state.  */
+
+
+#ifndef TX_DISABLE_NOTIFY_CALLBACKS
+
+    /* Pickup the entry/exit application callback routine again.  */
+    entry_exit_notify =  thread_info -> txm_module_thread_entry_info_exit_notify;
+
+    /* Determine if an application callback routine is specified.  */
+    if (entry_exit_notify != TX_NULL)
+    {
+
+        /* Yes, notify application that this thread has exited!  */
+        (entry_exit_notify)(thread_ptr, TX_THREAD_EXIT);
+    }
+#endif
+
+    /* Call actual thread suspension routine.  */
+    _txm_module_thread_system_suspend(thread_ptr);
+
+#ifdef TX_SAFETY_CRITICAL
+
+    /* If we ever get here, raise safety critical exception.  */
+    TX_SAFETY_CRITICAL_EXCEPTION(__FILE__, __LINE__, 0);
+#endif
+}
+

ports_module/cortex_m33/iar/module_lib/src/txm_thread_secure_stack_allocate.c

@@ -0,0 +1,77 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Module                                                              */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+#define TXM_MODULE
+#include "txm_module.h"
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _txe_thread_secure_stack_allocate                   PORTABLE C      */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function allocate a secure stack for the thread.               */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    thread_ptr                            Thread control block pointer  */
+/*    stack_size                            Size of secure stack to       */
+/*                                            allocate                    */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    TX_THREAD_ERROR                   Invalid thread pointer            */
+/*    TX_CALLER_ERROR                   Invalid caller of this function   */
+/*    status                            Actual completion status          */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    _txm_module_kernel_call_dispatcher                                  */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    Module application code                                             */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  03-02-2021      Scott Larson            Initial Version 6.1.5         */
+/*                                                                        */
+/**************************************************************************/
+UINT _txe_thread_secure_stack_allocate(TX_THREAD *thread_ptr, ULONG stack_size)
+{
+
+UINT return_value;
+
+    /* Call module manager dispatcher.  */
+    return_value = (UINT) (_txm_module_kernel_call_dispatcher)(TXM_THREAD_SECURE_STACK_ALLOCATE_CALL, (ALIGN_TYPE) thread_ptr, (ALIGN_TYPE) stack_size, 0);
+
+    /* Return value to the caller.  */
+    return(return_value);
+}

ports_module/cortex_m33/iar/module_lib/src/txm_thread_secure_stack_free.c

@@ -0,0 +1,75 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Module                                                              */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+#define TXM_MODULE
+#include "txm_module.h"
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _txe_thread_secure_stack_free                       PORTABLE C      */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function frees the thread's secure stack.                      */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    thread_ptr                            Thread control block pointer  */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    TX_THREAD_ERROR                       Invalid thread pointer        */
+/*    TX_CALLER_ERROR                       Invalid caller of function    */
+/*    status                                Actual completion status      */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    _txm_module_kernel_call_dispatcher                                  */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    Module application code                                             */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  03-02-2021      Scott Larson            Initial Version 6.1.5         */
+/*                                                                        */
+/**************************************************************************/
+UINT _txe_thread_secure_stack_free(TX_THREAD *thread_ptr)
+{
+
+UINT return_value;
+
+    /* Call module manager dispatcher.  */
+    return_value = (UINT) (_txm_module_kernel_call_dispatcher)(TXM_THREAD_SECURE_STACK_FREE_CALL, (ALIGN_TYPE) thread_ptr, 0, 0);
+
+    /* Return value to the caller.  */
+    return(return_value);
+}

ports_module/cortex_m33/iar/module_manager/inc/txm_module_manager_dispatch_port.h

@@ -0,0 +1,65 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Module Manager                                                      */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+/* Define port-specific dispatch functions. */
+
+/* UINT _txe_thread_secure_stack_allocate(
+    TX_THREAD *thread_ptr, -> param_0
+    ULONG stack_size -> param_1
+   ); */
+static ALIGN_TYPE _txm_module_manager_tx_thread_secure_stack_allocate_dispatch(TXM_MODULE_INSTANCE *module_instance, ALIGN_TYPE param_0, ALIGN_TYPE param_1)
+{
+
+ALIGN_TYPE return_value;
+
+    if (module_instance -> txm_module_instance_property_flags & TXM_MODULE_MEMORY_PROTECTION)
+    {
+        if (!TXM_MODULE_MANAGER_PARAM_CHECK_OBJECT_FOR_USE(module_instance, param_0, sizeof(TX_THREAD)))
+            return(TXM_MODULE_INVALID_MEMORY);
+    }
+
+    return_value = (ALIGN_TYPE) _txe_thread_secure_stack_allocate(
+        (TX_THREAD *) param_0,
+        (ULONG) param_1
+    );
+    return(return_value);
+}
+
+/* UINT _txe_thread_secure_stack_free(
+    TX_THREAD *thread_ptr -> param_0
+   ); */
+static ALIGN_TYPE _txm_module_manager_tx_thread_secure_stack_free_dispatch(TXM_MODULE_INSTANCE *module_instance, ALIGN_TYPE param_0)
+{
+
+ALIGN_TYPE return_value;
+
+    if (module_instance -> txm_module_instance_property_flags & TXM_MODULE_MEMORY_PROTECTION)
+    {
+        if (!TXM_MODULE_MANAGER_PARAM_CHECK_OBJECT_FOR_USE(module_instance, param_0, sizeof(TX_THREAD)))
+            return(TXM_MODULE_INVALID_MEMORY);
+    }
+
+    return_value = (ALIGN_TYPE) _txe_thread_secure_stack_free(
+        (TX_THREAD *) param_0
+    );
+    return(return_value);
+}

ports_module/cortex_m33/iar/module_manager/src/tx_thread_context_restore.s

@@ -0,0 +1,79 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Thread                                                              */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+    EXTERN  _tx_execution_isr_exit
+    SECTION `.text`:CODE:NOROOT(2)
+    THUMB
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_thread_context_restore                        Cortex-M/IAR      */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function is only needed for legacy applications and it should  */
+/*    not be called in any new development on a Cortex-M.                 */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    [_tx_execution_isr_exit]              Execution profiling ISR exit  */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    ISRs                                  Interrupt Service Routines    */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  03-02-2021      Scott Larson            Initial Version 6.1.5         */
+/*                                                                        */
+/**************************************************************************/
+// VOID   _tx_thread_context_restore(VOID)
+// {
+    PUBLIC  _tx_thread_context_restore
+_tx_thread_context_restore:
+
+#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
+    /* Call the ISR exit function to indicate an ISR is complete.  */
+    PUSH    {r0, lr}                                // Save return address
+    BL      _tx_execution_isr_exit                  // Call the ISR exit function
+    POP     {r0, lr}                                // Recover return address
+#endif
+
+    BX      lr
+
+// }
+    END

ports_module/cortex_m33/iar/module_manager/src/tx_thread_context_save.s

@@ -0,0 +1,80 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Thread                                                              */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+    EXTERN  _tx_execution_isr_enter
+    SECTION `.text`:CODE:NOROOT(2)
+    THUMB
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_thread_context_save                           Cortex-M/IAR      */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function is only needed for legacy applications and it should  */
+/*    not be called in any new development on a Cortex-M.                 */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    ISRs                                                                */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  03-02-2021      Scott Larson            Initial Version 6.1.5         */
+/*                                                                        */
+/**************************************************************************/
+// VOID   _tx_thread_context_save(VOID)
+// {
+    PUBLIC  _tx_thread_context_save
+_tx_thread_context_save:
+
+#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
+    /* Call the ISR enter function to indicate an ISR is starting.  */
+    PUSH    {r0, lr}                                // Save return address
+    BL      _tx_execution_isr_enter                 // Call the ISR enter function
+    POP     {r0, lr}                                // Recover return address
+#endif
+
+    /* Context is already saved - just return.  */
+
+    BX      lr
+// }
+    END

ports_module/cortex_m33/iar/module_manager/src/tx_thread_interrupt_control.s

@@ -0,0 +1,73 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Thread                                                              */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+    SECTION `.text`:CODE:NOROOT(2)
+    THUMB
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_thread_interrupt_control                      Cortex-M/IAR      */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function is responsible for changing the interrupt lockout     */
+/*    posture of the system.                                              */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    new_posture                           New interrupt lockout posture */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    old_posture                           Old interrupt lockout posture */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    Application Code                                                    */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  03-02-2021      Scott Larson            Initial Version 6.1.5         */
+/*                                                                        */
+/**************************************************************************/
+// UINT   _tx_thread_interrupt_control(UINT new_posture)
+// {
+    PUBLIC  _tx_thread_interrupt_control
+_tx_thread_interrupt_control:
+    MRS     r1, PRIMASK                         // Pickup current interrupt lockout
+    MSR     PRIMASK, r0                         // Apply the new interrupt lockout
+    MOV     r0, r1                              // Transfer old to return register
+    BX      lr                                  // Return to caller
+
+// }
+    END

ports_module/cortex_m33/iar/module_manager/src/tx_thread_interrupt_disable.s

@@ -0,0 +1,75 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Thread                                                              */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+    SECTION `.text`:CODE:NOROOT(2)
+    THUMB
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_thread_interrupt_disable                      Cortex-M/IAR      */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function is responsible for disabling interrupts and returning */
+/*    the previous interrupt lockout posture.                             */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    old_posture                           Old interrupt lockout posture */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    Application Code                                                    */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  03-02-2021      Scott Larson            Initial Version 6.1.5         */
+/*                                                                        */
+/**************************************************************************/
+// UINT   _tx_thread_interrupt_disable(VOID)
+// {
+    PUBLIC  _tx_thread_interrupt_disable
+_tx_thread_interrupt_disable:
+
+    /* Return current interrupt lockout posture.  */
+
+    MRS     r0, PRIMASK
+    CPSID   i
+    BX      lr
+
+// }
+    END

ports_module/cortex_m33/iar/module_manager/src/tx_thread_interrupt_restore.s

@@ -0,0 +1,74 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Thread                                                              */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+    SECTION `.text`:CODE:NOROOT(2)
+    THUMB
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_thread_interrupt_restore                      Cortex-M/IAR      */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function is responsible for restoring the previous             */
+/*    interrupt lockout posture.                                          */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    previous_posture                      Previous interrupt posture    */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    Application Code                                                    */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  03-02-2021      Scott Larson            Initial Version 6.1.5         */
+/*                                                                        */
+/**************************************************************************/
+// VOID   _tx_thread_interrupt_restore(UINT previous_posture)
+// {
+    PUBLIC  _tx_thread_interrupt_restore
+_tx_thread_interrupt_restore:
+
+    /* Restore previous interrupt lockout posture.  */
+
+    MSR     PRIMASK, r0
+    BX      lr
+
+// }
+    END

ports_module/cortex_m33/iar/module_manager/src/tx_thread_schedule.s

@@ -0,0 +1,610 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Thread                                                              */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+    EXTERN  _tx_thread_current_ptr
+    EXTERN  _tx_thread_execute_ptr
+    EXTERN  _tx_timer_time_slice
+    EXTERN  _tx_thread_system_stack_ptr
+    EXTERN  _tx_thread_preempt_disable
+    EXTERN  _tx_execution_thread_enter
+    EXTERN  _tx_execution_thread_exit
+    EXTERN  _txm_module_manager_memory_fault_handler
+    EXTERN  _txm_module_manager_memory_fault_info
+    EXTERN  _tx_thread_secure_stack_context_restore
+    EXTERN  _tx_thread_secure_stack_context_save
+    EXTERN  _tx_thread_secure_mode_stack_allocate
+    EXTERN  _tx_thread_secure_mode_stack_free
+    EXTERN  _tx_alloc_return
+    EXTERN  _tx_free_return
+    SECTION `.text`:CODE:NOROOT(2)
+    THUMB
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_thread_schedule                             Cortex-M33/MPU/IAR  */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function waits for a thread control block pointer to appear in */
+/*    the _tx_thread_execute_ptr variable.  Once a thread pointer appears */
+/*    in the variable, the corresponding thread is resumed.               */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    _tx_initialize_kernel_enter          ThreadX entry function         */
+/*    _tx_thread_system_return             Return to system from thread   */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  03-02-2021      Scott Larson            Initial Version 6.1.5         */
+/*                                                                        */
+/**************************************************************************/
+// VOID   _tx_thread_schedule(VOID)
+// {
+    PUBLIC  _tx_thread_schedule
+_tx_thread_schedule:
+
+    /* This function should only ever be called on Cortex-M
+       from the first schedule request. Subsequent scheduling occurs
+       from the PendSV handling routine below. */
+
+    /* Clear the preempt-disable flag to enable rescheduling after initialization on Cortex-M targets.  */
+
+    MOV     r0, #0                                  // Build value for TX_FALSE
+    LDR     r2, =_tx_thread_preempt_disable         // Build address of preempt disable flag
+    STR     r0, [r2, #0]                            // Clear preempt disable flag
+
+    /* Clear CONTROL.FPCA bit so VFP registers aren't unnecessarily stacked.  */
+
+#ifdef __ARMVFP__
+    MRS     r0, CONTROL                             // Pickup current CONTROL register
+    BIC     r0, r0, #4                              // Clear the FPCA bit
+    MSR     CONTROL, r0                             // Setup new CONTROL register
+#endif
+
+    /* Enable memory fault registers.  */
+
+    LDR     r0, =0xE000ED24                         // Build SHCSR address
+    LDR     r1, =0x70000                            // Enable Usage, Bus, and MemManage faults
+    STR     r1, [r0]                                //
+
+    /* Enable interrupts */
+
+    CPSIE   i
+
+    /* Enter the scheduler for the first time.  */
+
+    MOV     r0, #0x10000000                         // Load PENDSVSET bit
+    MOV     r1, #0xE000E000                         // Load NVIC base
+    STR     r0, [r1, #0xD04]                        // Set PENDSVBIT in ICSR
+    DSB                                             // Complete all memory accesses
+    ISB                                             // Flush pipeline
+
+    /* Wait here for the PendSV to take place.  */
+
+__tx_wait_here:
+    B       __tx_wait_here                          // Wait for the PendSV to happen
+// }
+
+
+    /* Memory Exception Handler.  */
+
+    PUBLIC  MemManage_Handler
+    PUBLIC  BusFault_Handler
+MemManage_Handler:
+BusFault_Handler:
+
+    CPSID   i                                       // Disable interrupts
+
+    /* Now pickup and store all the fault related information.  */
+
+    LDR     r12,=_txm_module_manager_memory_fault_info  // Pickup fault info struct
+    LDR     r0, =_tx_thread_current_ptr             // Build current thread pointer address
+    LDR     r1, [r0]                                // Pickup the current thread pointer
+    STR     r1, [r12, #0]                           // Save current thread pointer in fault info structure
+    LDR     r0, =0xE000ED24                         // Build SHCSR address
+    LDR     r1, [r0]                                // Pickup SHCSR
+    STR     r1, [r12, #8]                           // Save SHCSR
+    LDR     r0, =0xE000ED28                         // Build CFSR address
+    LDR     r1, [r0]                                // Pickup CFSR
+    STR     r1, [r12, #12]                          // Save CFSR
+    LDR     r0, =0xE000ED34                         // Build MMFAR address
+    LDR     r1, [r0]                                // Pickup MMFAR
+    STR     r1, [r12, #16]                          // Save MMFAR
+    LDR     r0, =0xE000ED38                         // Build BFAR address
+    LDR     r1, [r0]                                // Pickup BFAR
+    STR     r1, [r12, #20]                          // Save BFAR
+    MRS     r0, CONTROL                             // Pickup current CONTROL register
+    STR     r0, [r12, #24]                          // Save CONTROL
+    MRS     r1, PSP                                 // Pickup thread stack pointer
+    STR     r1, [r12, #28]                          // Save thread stack pointer
+    LDR     r0, [r1]                                // Pickup saved r0
+    STR     r0, [r12, #32]                          // Save r0
+    LDR     r0, [r1, #4]                            // Pickup saved r1
+    STR     r0, [r12, #36]                          // Save r1
+    STR     r2, [r12, #40]                          // Save r2
+    STR     r3, [r12, #44]                          // Save r3
+    STR     r4, [r12, #48]                          // Save r4
+    STR     r5, [r12, #52]                          // Save r5
+    STR     r6, [r12, #56]                          // Save r6
+    STR     r7, [r12, #60]                          // Save r7
+    STR     r8, [r12, #64]                          // Save r8
+    STR     r9, [r12, #68]                          // Save r9
+    STR     r10,[r12, #72]                          // Save r10
+    STR     r11,[r12, #76]                          // Save r11
+    LDR     r0, [r1, #16]                           // Pickup saved r12
+    STR     r0, [r12, #80]                          // Save r12
+    LDR     r0, [r1, #20]                           // Pickup saved lr
+    STR     r0, [r12, #84]                          // Save lr
+    LDR     r0, [r1, #24]                           // Pickup instruction address at point of fault
+    STR     r0, [r12, #4]                           // Save point of fault
+    LDR     r0, [r1, #28]                           // Pickup xPSR
+    STR     r0, [r12, #88]                          // Save xPSR
+
+    MRS     r0, CONTROL                             // Pickup current CONTROL register
+    BIC     r0, r0, #1                              // Clear the UNPRIV bit
+    MSR     CONTROL, r0                             // Setup new CONTROL register
+
+    LDR     r0, =0xE000ED28                         // Build the Memory Management Fault Status Register (MMFSR)
+    LDRB    r1, [r0]                                // Pickup the MMFSR, with the following bit definitions:
+                                                    //     Bit 0 = 1 -> Instruction address violation
+                                                    //     Bit 1 = 1 -> Load/store address violation
+                                                    //     Bit 7 = 1 -> MMFAR is valid
+    STRB    r1, [r0]                                // Clear the MMFSR
+
+#ifdef __ARMVFP__
+    LDR     r0, =0xE000EF34                         // Cleanup FPU context: Load FPCCR address
+    LDR     r1, [r0]                                // Load FPCCR
+    BIC     r1, r1, #1                              // Clear the lazy preservation active bit
+    STR     r1, [r0]                                // Store the value
+#endif
+
+    BL      _txm_module_manager_memory_fault_handler    // Call memory manager fault handler
+
+#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
+    /* Call the thread exit function to indicate the thread is no longer executing.  */
+    CPSID   i                                       // Disable interrupts
+    BL      _tx_execution_thread_exit               // Call the thread exit function
+    CPSIE   i                                       // Enable interrupts
+#endif
+
+    MOV     r1, #0                                  // Build NULL value
+    LDR     r0, =_tx_thread_current_ptr             // Pickup address of current thread pointer
+    STR     r1, [r0]                                // Clear current thread pointer
+
+    // Return from MemManage_Handler exception
+    LDR     r0, =0xE000ED04                         // Load ICSR
+    LDR     r1, =0x10000000                         // Set PENDSVSET bit
+    STR     r1, [r0]                                // Store ICSR
+    DSB                                             // Wait for memory access to complete
+    CPSIE   i                                       // Enable interrupts
+#ifdef TX_SINGLE_MODE_SECURE
+    LDR     lr, =0xFFFFFFFD                         // Exception return to secure
+#else
+    LDR     lr, =0xFFFFFFBC                         // Exception return to non-secure
+#endif
+    BX      lr                                      // Return from exception
+
+
+    /* Generic context switching PendSV handler.  */
+
+    PUBLIC  PendSV_Handler
+PendSV_Handler:
+
+    /* Get current thread value and new thread pointer.  */
+
+__tx_ts_handler:
+
+#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
+    /* Call the thread exit function to indicate the thread is no longer executing.  */
+    CPSID   i                                       // Disable interrupts
+    PUSH    {r0, lr}                                // Save LR (and r0 just for alignment)
+    BL      _tx_execution_thread_exit               // Call the thread exit function
+    POP     {r0, lr}                                // Recover LR
+    CPSIE   i                                       // Enable interrupts
+#endif
+
+    LDR     r0, =_tx_thread_current_ptr             // Build current thread pointer address
+    LDR     r2, =_tx_thread_execute_ptr             // Build execute thread pointer address
+    MOV     r3, #0                                  // Build NULL value
+    LDR     r1, [r0]                                // Pickup current thread pointer
+
+    /* Determine if there is a current thread to finish preserving.  */
+
+    CBZ     r1, __tx_ts_new                         // If NULL, skip preservation
+
+    /* Recover PSP and preserve current thread context.  */
+
+    STR     r3, [r0]                                // Set _tx_thread_current_ptr to NULL
+    MRS     r12, PSP                                // Pickup PSP pointer (thread's stack pointer)
+    STMDB   r12!, {r4-r11}                          // Save its remaining registers
+#ifdef __ARMVFP__
+    TST     LR, #0x10                               // Determine if the VFP extended frame is present
+    BNE     _skip_vfp_save
+    VSTMDB  r12!,{s16-s31}                          // Yes, save additional VFP registers
+_skip_vfp_save:
+#endif
+    LDR     r4, =_tx_timer_time_slice               // Build address of time-slice variable
+    STMDB   r12!, {LR}                              // Save LR on the stack
+    STR     r12, [r1, #8]                           // Save the thread stack pointer
+
+#if (!defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE))
+    // Save secure context
+    LDR     r5, [r1,#0xC4]                          // Load secure stack index
+    CBZ     r5, _skip_secure_save                   // Skip save if there is no secure context
+    PUSH    {r0,r1,r2,r3}                           // Save scratch registers
+    MOV     r0, r1                                  // Move thread ptr to r0
+    BL      _tx_thread_secure_stack_context_save    // Save secure stack
+    POP     {r0,r1,r2,r3}                           // Restore secure registers
+_skip_secure_save:
+#endif
+
+    /* Determine if time-slice is active. If it isn't, skip time handling processing.  */
+
+    LDR     r5, [r4]                                // Pickup current time-slice
+    CBZ     r5, __tx_ts_new                         // If not active, skip processing
+
+    /* Time-slice is active, save the current thread's time-slice and clear the global time-slice variable.  */
+
+    STR     r5, [r1, #24]                           // Save current time-slice
+
+    /* Clear the global time-slice.  */
+
+    STR     r3, [r4]                                // Clear time-slice
+
+    /* Executing thread is now completely preserved!!!  */
+
+__tx_ts_new:
+
+    /* Now we are looking for a new thread to execute!  */
+
+    CPSID   i                                       // Disable interrupts
+    LDR     r1, [r2]                                // Is there another thread ready to execute?
+    CBNZ    r1, __tx_ts_restore                     // Yes, schedule it
+
+    /* The following is the idle wait processing... in this case, no threads are ready for execution and the
+       system will simply be idle until an interrupt occurs that makes a thread ready. Note that interrupts
+       are disabled to allow use of WFI for waiting for a thread to arrive.  */
+
+__tx_ts_wait:
+    CPSID   i                                       // Disable interrupts
+    LDR     r1, [r2]                                // Pickup the next thread to execute pointer
+    CBNZ    r1, __tx_ts_ready                       // If non-NULL, a new thread is ready!
+#ifdef TX_ENABLE_WFI
+    DSB                                             // Ensure no outstanding memory transactions
+    WFI                                             // Wait for interrupt
+    ISB                                             // Ensure pipeline is flushed
+#endif
+    CPSIE   i                                       // Enable interrupts
+    B       __tx_ts_wait                            // Loop to continue waiting
+
+    /* At this point, we have a new thread ready to go. Clear any newly pended PendSV - since we are
+       already in the handler!  */
+
+__tx_ts_ready:
+    MOV     r7, #0x08000000                         // Build clear PendSV value
+    MOV     r8, #0xE000E000                         // Build base NVIC address
+    STR     r7, [r8, #0xD04]                        // Clear any PendSV
+
+__tx_ts_restore:
+
+    /* A thread is ready, make the current thread the new thread
+       and enable interrupts.  */
+
+    STR     r1, [r0]                                // Setup the current thread pointer to the new thread
+    CPSIE   i                                       // Enable interrupts
+
+    /* Increment the thread run count.  */
+
+    LDR     r7, [r1, #4]                            // Pickup the current thread run count
+    LDR     r4, =_tx_timer_time_slice               // Build address of time-slice variable
+    LDR     r5, [r1, #24]                           // Pickup thread's current time-slice
+    ADD     r7, r7, #1                              // Increment the thread run count
+    STR     r7, [r1, #4]                            // Store the new run count
+
+    /* Setup global time-slice with thread's current time-slice.  */
+
+    STR     r5, [r4]                                // Setup global time-slice
+
+#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
+    /* Call the thread entry function to indicate the thread is executing.  */
+    PUSH    {r0, r1}                                // Save r0 and r1
+    BL      _tx_execution_thread_enter              // Call the thread execution enter function
+    POP     {r0, r1}                                // Recover r0 and r1
+#endif
+
+#if (!defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE))
+    // Restore secure context
+    LDR     r0, [r1,#0xC4]                          // Load secure stack index
+    CBZ     r0, _skip_secure_restore                // Skip restore if there is no secure context
+    PUSH    {r0,r1}                                 // Save r1 (and dummy r0)
+    MOV     r0, r1                                  // Move thread ptr to r0
+    BL      _tx_thread_secure_stack_context_restore // Restore secure stack
+    POP     {r0,r1}                                 // Restore r1 (and dummy r0)
+_skip_secure_restore:
+#endif
+
+    /* Restore the thread context and PSP.  */
+    LDR     r12, [r1, #12]                          // Get stack start
+    MSR     PSPLIM, r12                             // Set stack limit
+    LDR     r12, [r1, #8]                           // Pickup thread's stack pointer
+
+    MRS     r5, CONTROL                             // Pickup current CONTROL register
+    LDR     r4, [r1, #0x98]                         // Pickup current user mode flag
+    BIC     r5, r5, #1                              // Clear the UNPRIV bit
+    ORR     r4, r4, r5                              // Build new CONTROL register
+    MSR     CONTROL, r4                             // Setup new CONTROL register
+
+    LDR     r0, =0xE000ED94                         // Build MPU control reg address
+    MOV     r3, #0                                  // Build disable value
+    STR     r3, [r0]                                // Disable MPU
+    LDR     r0, [r1, #0x90]                         // Pickup the module instance pointer
+    CBZ     r0, skip_mpu_setup                      // Is this thread owned by a module? No, skip MPU setup
+    LDR     r1, [r0, #0x64]                         // Pickup MPU register[0]
+    CBZ     r1, skip_mpu_setup                      // Is protection required for this module? No, skip MPU setup
+    LDR     r1, =0xE000ED9C                         // Build address of MPU base register
+
+    // Use alias registers to quickly load MPU
+    ADD     r0, r0, #0x64                           // Build address of MPU register start in thread control block
+    LDM     r0!, {r2-r9}                            // Load first four MPU regions
+    STM     r1, {r2-r9}                             // Store first four MPU regions
+    MOV     r2, #4                                  // Select region 4
+    LDR     r3, =0xE000ED98                         // Get region register
+    STR     r2, [r3]                                // Set region to 4
+    LDM     r0, {r2-r9}                             // Load second four MPU regions
+    STM     r1, {r2-r9}                             // Store second four MPU regions
+    LDR     r0, =0xE000ED94                         // Build MPU control reg address
+    MOV     r1, #5                                  // Build enable value with background region enabled
+    STR     r1, [r0]                                // Enable MPU
+skip_mpu_setup:
+    LDMIA   r12!, {LR}                              // Pickup LR
+#ifdef __ARMVFP__
+    TST     LR, #0x10                               // Determine if the VFP extended frame is present
+    BNE     _skip_vfp_restore                       // If not, skip VFP restore
+    VLDMIA  r12!, {s16-s31}                         // Yes, restore additional VFP registers
+_skip_vfp_restore:
+#endif
+    LDMIA   r12!, {r4-r11}                          // Recover thread's registers
+    MSR     PSP, r12                                // Setup the thread's stack pointer
+
+    /* Return to thread.  */
+
+    BX      lr                                      // Return to thread!
+
+
+    /* SVC Handler.  */
+    PUBLIC  SVC_Handler
+SVC_Handler:
+    TST     lr, #0x04                               // Determine return stack from EXC_RETURN bit 2
+    ITE     EQ
+    MRSEQ   r0, MSP                                 // Get MSP
+    MRSNE   r0, PSP                                 // Get PSP
+
+    LDR     r1, [r0,#24]                            // Load saved PC from stack
+    LDRB    r2, [r1,#-2]                            // Load SVC number
+
+#if (!defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE))
+    CMP     r2, #1                                  // Is it a secure stack allocate request?
+    BEQ     _tx_svc_secure_alloc                    // Yes, go there
+
+    CMP     r2, #2                                  // Is it a secure stack free request?
+    BEQ     _tx_svc_secure_free                     // Yes, go there
+#endif   // End of ifndef TX_SINGLE_MODE_SECURE, TX_SINGLE_MODE_NON_SECURE
+
+
+    CMP     r2, #3                                  // Is it the entry into ThreadX?
+    BNE     _tx_thread_user_return                  // No, return to user mode
+
+    /* At this point we have an SVC 3, which means we are entering
+       the kernel from a module thread with user mode selected. */
+
+    LDR     r2, =_txm_module_priv                   // Load address of where we should have come from
+    CMP     r1, r2                                  // Did we come from user_mode_entry?
+    IT      NE                                      // If no (not equal), then...
+    BXNE    lr                                      // return from where we came.
+
+    LDR     r3, [r0, #20]                           // This is the saved LR
+    LDR     r1, =_tx_thread_current_ptr             // Build current thread pointer address
+    LDR     r2, [r1]                                // Pickup current thread pointer
+    MOV     r1, #0                                  // Build clear value
+    STR     r1, [r2, #0x98]                         // Clear the current user mode selection for thread
+    STR     r3, [r2, #0xA0]                         // Save the original LR in thread control block
+
+    /* If there is memory protection, use kernel stack */
+    LDR     r0, [r2, #0x90]                         // Load the module instance ptr
+    LDR     r0, [r0, #0x0C]                         // Load the module property flags
+    TST     r0, #2                                  // Check if memory protected
+    BEQ     _tx_skip_kernel_stack_enter
+
+    /* Switch to the module thread's kernel stack */
+    LDR     r0, [r2, #0xA8]                         // Load the module kernel stack end
+    LDR     r1, [r2, #0xA4]                         // Load the module kernel stack start
+    MSR     PSPLIM, r1                              // Set stack limit
+#ifndef TXM_MODULE_KERNEL_STACK_MAINTENANCE_DISABLE
+    LDR     r3, [r2, #0xAC]                         // Load the module kernel stack size
+    STR     r1, [r2, #12]                           // Set stack start
+    STR     r0, [r2, #16]                           // Set stack end
+    STR     r3, [r2, #20]                           // Set stack size
+#endif
+
+    MRS     r3, PSP                                 // Pickup thread stack pointer
+    STR     r3, [r2, #0xB0]                         // Save thread stack pointer
+
+    /* Build kernel stack by copying thread stack two registers at a time */
+    ADD     r3, r3, #32                             // Start at bottom of hardware stack
+    LDMDB   r3!,{r1-r2}
+    STMDB   r0!,{r1-r2}
+    LDMDB   r3!,{r1-r2}
+    STMDB   r0!,{r1-r2}
+    LDMDB   r3!,{r1-r2}
+    STMDB   r0!,{r1-r2}
+    LDMDB   r3!,{r1-r2}
+    STMDB   r0!,{r1-r2}
+
+    MSR     PSP, r0                                 // Set kernel stack pointer
+
+_tx_skip_kernel_stack_enter:
+    MRS     r0, CONTROL                             // Pickup current CONTROL register
+    BIC     r0, r0, #1                              // Clear the UNPRIV bit
+    MSR     CONTROL, r0                             // Setup new CONTROL register
+    BX      lr                                      // Return to thread
+
+
+_tx_thread_user_return:
+    LDR     r2, =_txm_module_user_mode_exit         // Load address of where we should have come from
+    CMP     r1, r2                                  // Did we come from user_mode_exit?
+    IT      NE                                      // If no (not equal), then...
+    BXNE    lr                                      // return from where we came
+
+    LDR     r1, =_tx_thread_current_ptr             // Build current thread pointer address
+    LDR     r2, [r1]                                // Pickup current thread pointer
+    LDR     r1, [r2, #0x9C]                         // Pick up user mode
+    STR     r1, [r2, #0x98]                         // Set the current user mode selection for thread
+
+    /* If there is memory protection, use kernel stack */
+    LDR     r0, [r2, #0x90]                         // Load the module instance ptr
+    LDR     r0, [r0, #0x0C]                         // Load the module property flags
+    TST     r0, #2                                  // Check if memory protected
+    BEQ     _tx_skip_kernel_stack_exit
+
+
+    LDR     r0, [r2, #0xB4]                         // Load the module thread stack start
+    MSR     PSPLIM, r0                              // Set stack limit
+#ifndef TXM_MODULE_KERNEL_STACK_MAINTENANCE_DISABLE
+    LDR     r1, [r2, #0xB8]                         // Load the module thread stack end
+    LDR     r3, [r2, #0xBC]                         // Load the module thread stack size
+    STR     r0, [r2, #12]                           // Set stack start
+    STR     r1, [r2, #16]                           // Set stack end
+    STR     r3, [r2, #20]                           // Set stack size
+#endif
+    LDR     r0, [r2, #0xB0]                         // Load the module thread stack pointer
+    MRS     r3, PSP                                 // Pickup kernel stack pointer
+
+    /* Copy kernel hardware stack to module thread stack. */
+    LDM     r3!,{r1-r2}
+    STM     r0!,{r1-r2}
+    LDM     r3!,{r1-r2}
+    STM     r0!,{r1-r2}
+    LDM     r3!,{r1-r2}
+    STM     r0!,{r1-r2}
+    LDM     r3!,{r1-r2}
+    STM     r0!,{r1-r2}
+    SUB     r0, r0, #32                             // Subtract 32 to get back to top of stack
+    MSR     PSP, r0                                 // Set thread stack pointer
+
+    LDR     r1, =_tx_thread_current_ptr             // Build current thread pointer address
+    LDR     r2, [r1]                                // Pickup current thread pointer
+    LDR     r1, [r2, #0x9C]                         // Pick up user mode
+
+_tx_skip_kernel_stack_exit:
+    MRS     r0, CONTROL                             // Pickup current CONTROL register
+    ORR     r0, r0, r1                              // OR in the user mode bit
+    MSR     CONTROL, r0                             // Setup new CONTROL register
+    BX      lr                                      // Return to thread
+
+
+#if (!defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE))
+_tx_svc_secure_alloc:
+    LDR     r2, =_tx_alloc_return                   // Load address of where we should have come from
+    CMP     r1, r2                                  // Did we come from _tx_thread_secure_stack_allocate?
+    IT      NE                                      // If no (not equal), then...
+    BXNE    lr                                      // return from where we came.
+    
+    PUSH    {r0, lr}                                // Save SP and EXC_RETURN
+    LDM     r0, {r0-r3}                             // Load function parameters from stack
+    BL      _tx_thread_secure_mode_stack_allocate
+    POP     {r12, lr}                               // Restore SP and EXC_RETURN
+    STR     r0, [r12]                               // Store function return value
+    BX      lr
+    
+_tx_svc_secure_free:
+    LDR     r2, =_tx_free_return                    // Load address of where we should have come from
+    CMP     r1, r2                                  // Did we come from _tx_thread_secure_stack_free?
+    IT      NE                                      // If no (not equal), then...
+    BXNE    lr                                      // return from where we came.
+    
+    PUSH    {r0, lr}                                // Save SP and EXC_RETURN
+    LDM     r0, {r0-r3}                             // Load function parameters from stack
+    BL      _tx_thread_secure_mode_stack_free
+    POP     {r12, lr}                               // Restore SP and EXC_RETURN
+    STR     r0, [r12]                               // Store function return value
+    BX      lr
+#endif   // End of ifndef TX_SINGLE_MODE_SECURE, TX_SINGLE_MODE_NON_SECURE
+
+
+
+   /* Kernel entry function from user mode.  */
+
+    EXTERN  _txm_module_manager_kernel_dispatch
+    SECTION `.text`:CODE:NOROOT(5)
+    THUMB
+    ALIGNROM   5
+// VOID   _txm_module_manager_user_mode_entry(VOID)
+// {
+    PUBLIC  _txm_module_manager_user_mode_entry
+_txm_module_manager_user_mode_entry:
+    SVC     3                                       // Enter kernel
+_txm_module_priv:
+    /* At this point, we are out of user mode. The original LR has been saved in the
+       thread control block. Simply call the kernel dispatch function. */
+    BL      _txm_module_manager_kernel_dispatch
+
+    /* Pickup the original LR value while still in privileged mode */
+    LDR     r2, =_tx_thread_current_ptr             // Build current thread pointer address
+    LDR     r3, [r2]                                // Pickup current thread pointer
+    LDR     lr, [r3, #0xA0]                         // Pickup saved LR from original call
+
+    SVC     4                                       // Exit kernel and return to user mode
+_txm_module_user_mode_exit:
+    BX      lr                                      // Return to the caller
+    NOP
+    NOP
+    NOP
+    NOP
+// }
+
+
+    PUBLIC  _tx_vfp_access
+_tx_vfp_access:
+    VMOV.F32 s0, s0                                 // Simply access the VFP
+    BX       lr                                     // Return to caller
+
+    END

ports_module/cortex_m33/iar/module_manager/src/tx_thread_secure_stack.c

@@ -0,0 +1,482 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Thread                                                              */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+
+#include "tx_api.h"
+
+/* If TX_SINGLE_MODE_SECURE or TX_SINGLE_MODE_NON_SECURE is defined, 
+   no secure stack functionality is needed. */
+#if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
+
+#define TX_SOURCE_CODE
+
+#include <cmsis_compiler.h>             /* For intrinsic functions. */
+#include "tx_secure_interface.h"        /* Interface for NS code. */
+
+/* Minimum size of secure stack. */
+#ifndef TX_THREAD_SECURE_STACK_MINIMUM
+#define TX_THREAD_SECURE_STACK_MINIMUM     256
+#endif
+/* Maximum size of secure stack. */
+#ifndef TX_THREAD_SECURE_STACK_MAXIMUM
+#define TX_THREAD_SECURE_STACK_MAXIMUM     1024
+#endif
+
+/* 8 bytes added to stack size to "seal" stack. */
+#define TX_THREAD_STACK_SEAL_SIZE           8
+#define TX_THREAD_STACK_SEAL_VALUE          0xFEF5EDA5
+
+/* Secure stack info struct to hold stack start, stack limit, 
+   current stack pointer, and pointer to owning thread. 
+   This will be allocated for each thread with a secure stack. */
+typedef struct TX_THREAD_SECURE_STACK_INFO_STRUCT
+{
+    VOID        *tx_thread_secure_stack_ptr;        /* Thread's secure stack current pointer */
+    VOID        *tx_thread_secure_stack_start;      /* Thread's secure stack start address */
+    VOID        *tx_thread_secure_stack_limit;      /* Thread's secure stack limit */
+    TX_THREAD   *tx_thread_ptr;                     /* Keep track of thread for error handling */
+} TX_THREAD_SECURE_STACK_INFO;
+
+
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_thread_secure_stack_initialize                Cortex-M33/IAR    */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function initializes secure mode to use PSP stack.             */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    __get_CONTROL                         Intrinsic to get CONTROL      */
+/*    __set_CONTROL                         Intrinsic to set CONTROL      */
+/*    __set_PSPLIM                          Intrinsic to set PSP limit    */
+/*    __set_PSP                             Intrinsic to set PSP          */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    _tx_initialize_kernel_enter                                         */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
+/*  03-02-2021      Scott Larson            Modified comment(s),          */
+/*                                            resulting in version 6.1.5  */
+/*                                                                        */
+/**************************************************************************/
+__attribute__((cmse_nonsecure_entry))
+void    _tx_thread_secure_stack_initialize(void)
+{
+    
+    /* Set secure mode to use PSP. */
+    __set_CONTROL(__get_CONTROL() | 2);
+    
+    /* Set process stack pointer and stack limit to 0 to throw exception when a thread
+       without a secure stack calls a secure function that tries to use secure stack. */
+    __set_PSPLIM(0);
+    __set_PSP(0);
+    
+    return;
+}
+
+
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_thread_secure_mode_stack_allocate             Cortex-M33/IAR    */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function allocates a thread's secure stack.                    */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    thread_ptr                            Thread control block pointer  */
+/*    stack_size                            Size of stack to allocates    */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    TX_THREAD_ERROR                       Invalid thread pointer        */
+/*    TX_SIZE_ERROR                         Invalid stack size            */
+/*    TX_CALLER_ERROR                       Invalid caller of function    */
+/*    status                                Actual completion status      */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    __get_IPSR                            Intrinsic to get IPSR         */
+/*    calloc                                Compiler's calloc function    */
+/*    malloc                                Compiler's malloc function    */
+/*    free                                  Compiler's free() function    */
+/*    __set_PSPLIM                          Intrinsic to set PSP limit    */
+/*    __set_PSP                             Intrinsic to set PSP          */
+/*    __TZ_get_PSPLIM_NS                    Intrinsic to get NS PSP       */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    SVC Handler                                                         */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
+/*  03-02-2021      Scott Larson            Modified comment(s),          */
+/*                                            added stack sealing,        */
+/*                                            resulting in version 6.1.5  */
+/*                                                                        */
+/**************************************************************************/
+__attribute__((cmse_nonsecure_entry))
+UINT    _tx_thread_secure_mode_stack_allocate(TX_THREAD *thread_ptr, ULONG stack_size)
+{
+UINT    status;
+TX_THREAD_SECURE_STACK_INFO *info_ptr;
+UCHAR   *stack_mem;
+
+    status = TX_SUCCESS;
+    
+    /* Make sure function is called from interrupt (threads should not call). */
+    if (__get_IPSR() == 0)
+    {
+        status = TX_CALLER_ERROR;
+    }
+    else if (stack_size < TX_THREAD_SECURE_STACK_MINIMUM || stack_size > TX_THREAD_SECURE_STACK_MAXIMUM)
+    {
+        status = TX_SIZE_ERROR;
+    }
+    
+    /* Check if thread already has secure stack allocated. */
+    else if (thread_ptr -> tx_thread_secure_stack_context != 0)
+    {
+        status = TX_THREAD_ERROR;
+    }
+    
+    else
+    {
+        /* Allocate space for secure stack info. */
+        info_ptr = calloc(1, sizeof(TX_THREAD_SECURE_STACK_INFO));
+        
+        if(info_ptr != TX_NULL)
+        {
+            /* If stack info allocated, allocate a stack & seal. */
+            stack_mem = malloc(stack_size + TX_THREAD_STACK_SEAL_SIZE);
+            
+            if(stack_mem != TX_NULL)
+            {
+                /* Secure stack has been allocated, save in the stack info struct. */
+                info_ptr -> tx_thread_secure_stack_limit = stack_mem;
+                info_ptr -> tx_thread_secure_stack_start = stack_mem + stack_size;
+                info_ptr -> tx_thread_secure_stack_ptr = info_ptr -> tx_thread_secure_stack_start;
+                info_ptr -> tx_thread_ptr = thread_ptr;
+                
+                /* Seal bottom of stack. */
+                *(ULONG*)info_ptr -> tx_thread_secure_stack_start = TX_THREAD_STACK_SEAL_VALUE;
+                
+                /* Save info pointer in thread. */
+                thread_ptr -> tx_thread_secure_stack_context = info_ptr;
+                
+                /* Check if this thread is running by looking at its stack start and PSPLIM_NS */
+                if(((ULONG) thread_ptr -> tx_thread_stack_start & 0xFFFFFFF8) == __TZ_get_PSPLIM_NS())
+                {
+                    /* If this thread is running, set Secure PSP and PSPLIM. */
+                    __set_PSPLIM((ULONG)(info_ptr -> tx_thread_secure_stack_limit));
+                    __set_PSP((ULONG)(info_ptr -> tx_thread_secure_stack_ptr));
+                }
+            }
+            
+            else
+            {
+                /* Stack not allocated, free the info struct. */
+                free(info_ptr);
+                status = TX_NO_MEMORY;
+            }
+        }
+        
+        else
+        {
+            status = TX_NO_MEMORY;
+        }
+    }
+    
+    return(status);
+}
+
+
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_thread_secure_mode_stack_free                 Cortex-M33/IAR    */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function frees a thread's secure stack.                        */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    thread_ptr                            Thread control block pointer  */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    TX_THREAD_ERROR                       Invalid thread pointer        */
+/*    TX_CALLER_ERROR                       Invalid caller of function    */
+/*    status                                Actual completion status      */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    __get_IPSR                            Intrinsic to get IPSR         */
+/*    free                                  Compiler's free() function    */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    SVC Handler                                                         */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
+/*  03-02-2021      Scott Larson            Modified comment(s),          */
+/*                                            resulting in version 6.1.5  */
+/*                                                                        */
+/**************************************************************************/
+__attribute__((cmse_nonsecure_entry))
+UINT    _tx_thread_secure_mode_stack_free(TX_THREAD *thread_ptr)
+{
+UINT    status;
+TX_THREAD_SECURE_STACK_INFO *info_ptr;
+    
+    status = TX_SUCCESS;
+    
+    /* Pickup stack info from thread. */
+    info_ptr = thread_ptr -> tx_thread_secure_stack_context;
+    
+    /* Make sure function is called from interrupt (threads should not call). */
+    if (__get_IPSR() == 0)
+    {
+        status = TX_CALLER_ERROR;
+    }
+    
+    /* Check that this secure context is for this thread. */
+    else if (info_ptr -> tx_thread_ptr != thread_ptr)
+    {
+        status = TX_THREAD_ERROR;
+    }
+    
+    else
+    {
+        
+        /* Free secure stack. */
+        free(info_ptr -> tx_thread_secure_stack_limit);
+        
+        /* Free info struct. */
+        free(info_ptr);
+        
+        /* Clear secure context from thread. */
+        thread_ptr -> tx_thread_secure_stack_context = 0;
+    }
+    
+    return(status);
+}
+
+
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_thread_secure_stack_context_save              Cortex-M33/IAR    */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function saves context of the secure stack.                    */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    thread_ptr                            Thread control block pointer  */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    __get_IPSR                            Intrinsic to get IPSR         */
+/*    __get_PSP                             Intrinsic to get PSP          */
+/*    __set_PSPLIM                          Intrinsic to set PSP limit    */
+/*    __set_PSP                             Intrinsic to set PSP          */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    PendSV Handler                                                      */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
+/*  03-02-2021      Scott Larson            Modified comment(s),          */
+/*                                            resulting in version 6.1.5  */
+/*                                                                        */
+/**************************************************************************/
+__attribute__((cmse_nonsecure_entry))
+void _tx_thread_secure_stack_context_save(TX_THREAD *thread_ptr)
+{
+TX_THREAD_SECURE_STACK_INFO *info_ptr;
+ULONG   sp;
+    
+    /* This function should be called from scheduler only. */
+    if (__get_IPSR() == 0)
+    {
+        return;
+    }
+    
+    /* Pickup the secure context pointer. */
+    info_ptr = (TX_THREAD_SECURE_STACK_INFO *)(thread_ptr -> tx_thread_secure_stack_context);
+    
+    /* Check that this secure context is for this thread. */
+    if (info_ptr -> tx_thread_ptr != thread_ptr)
+    {
+        return;
+    }
+    
+    /* Check that stack pointer is in range */
+    sp = __get_PSP();
+    if ((sp < (ULONG)info_ptr -> tx_thread_secure_stack_limit) || 
+        (sp > (ULONG)info_ptr -> tx_thread_secure_stack_start))
+    {
+        return;
+    }
+    
+    /* Save stack pointer. */
+    *(ULONG *) info_ptr -> tx_thread_secure_stack_ptr = sp;
+    
+    /* Set process stack pointer and stack limit to 0 to throw exception when a thread
+       without a secure stack calls a secure function that tries to use secure stack. */
+    __set_PSPLIM(0);
+    __set_PSP(0);
+    
+    return;
+}
+
+
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_thread_secure_stack_context_restore           Cortex-M33/IAR    */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function restores context of the secure stack.                 */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    thread_ptr                            Thread control block pointer  */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    __get_IPSR                            Intrinsic to get IPSR         */
+/*    __set_PSPLIM                          Intrinsic to set PSP limit    */
+/*    __set_PSP                             Intrinsic to set PSP          */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    PendSV Handler                                                      */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
+/*  03-02-2021      Scott Larson            Modified comment(s),          */
+/*                                            resulting in version 6.1.5  */
+/*                                                                        */
+/**************************************************************************/
+__attribute__((cmse_nonsecure_entry))
+void _tx_thread_secure_stack_context_restore(TX_THREAD *thread_ptr)
+{
+TX_THREAD_SECURE_STACK_INFO *info_ptr;
+
+    /* This function should be called from scheduler only. */
+    if (__get_IPSR() == 0)
+    {
+        return;
+    }
+    
+    /* Pickup the secure context pointer. */
+    info_ptr = (TX_THREAD_SECURE_STACK_INFO *)(thread_ptr -> tx_thread_secure_stack_context);
+    
+    /* Check that this secure context is for this thread. */
+    if (info_ptr -> tx_thread_ptr != thread_ptr)
+    {
+        return;
+    }
+    
+    /* Set stack pointer and limit. */
+    __set_PSPLIM((ULONG)info_ptr -> tx_thread_secure_stack_limit);
+    __set_PSP   ((ULONG)info_ptr -> tx_thread_secure_stack_ptr);
+    
+    return;
+}
+
+#endif

ports_module/cortex_m33/iar/module_manager/src/tx_thread_secure_stack_allocate.s

@@ -0,0 +1,86 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Thread                                                              */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+
+    SECTION `.text`:CODE:NOROOT(2)
+    THUMB
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_thread_secure_stack_allocate                  Cortex-M33/IAR    */
+/*                                                           6.1          */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function enters the SVC handler to allocate a secure stack.    */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    thread_ptr                            Thread control block pointer  */
+/*    stack_size                            Size of secure stack to       */
+/*                                            allocate                    */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    status                                Actual completion status      */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    SVC 1                                                               */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    Application Code                                                    */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
+/*  03-02-2021      Scott Larson            Modified comment(s),          */
+/*                                            resulting in version 6.1.5  */
+/*                                                                        */
+/**************************************************************************/
+// UINT   _tx_thread_secure_stack_allocate(TX_THREAD *thread_ptr, ULONG stack_size)
+// {
+    EXPORT  _tx_thread_secure_stack_allocate
+_tx_thread_secure_stack_allocate:
+#if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
+    MRS     r3, PRIMASK     // Save interrupt mask
+    CPSIE   i               // Enable interrupts for SVC call
+    SVC     1
+    EXPORT _tx_alloc_return
+_tx_alloc_return:
+    CMP     r3, #0          // If interrupts enabled, just return
+    BEQ     _alloc_return_interrupt_enabled
+    CPSID   i               // Otherwise, disable interrupts
+#else
+    MOV     r0, #0xFF       // Feature not enabled
+#endif
+_alloc_return_interrupt_enabled
+    BX      lr
+
+    END

ports_module/cortex_m33/iar/module_manager/src/tx_thread_secure_stack_free.s

@@ -0,0 +1,83 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Thread                                                              */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+
+    SECTION `.text`:CODE:NOROOT(2)
+    THUMB
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_thread_secure_stack_free                      Cortex-M33/IAR    */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function enters the SVC handler to free a secure stack.        */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    thread_ptr                            Thread control block pointer  */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    status                                Actual completion status      */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    SVC 2                                                               */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    Application Code                                                    */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
+/*  03-02-2021      Scott Larson            Modified comment(s),          */
+/*                                            resulting in version 6.1.5  */
+/*                                                                        */
+/**************************************************************************/
+// UINT   _tx_thread_secure_stack_free(TX_THREAD *thread_ptr)
+// {
+    EXPORT  _tx_thread_secure_stack_free
+_tx_thread_secure_stack_free:
+#if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
+    MRS     r3, PRIMASK     // Save interrupt mask
+    CPSIE   i               // Enable interrupts for SVC call
+    SVC     2
+    EXPORT _tx_free_return
+_tx_free_return:
+    CMP     r3, #0          // If interrupts enabled, just return
+    BEQ     _free_return_interrupt_enabled
+    CPSID   i               // Otherwise, disable interrupts
+#else
+    MOV     r0, #0xFF       // Feature not enabled
+#endif
+_free_return_interrupt_enabled
+    BX      lr
+    END

ports_module/cortex_m33/iar/module_manager/src/tx_thread_stack_build.s

@@ -0,0 +1,132 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Thread                                                              */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+    SECTION `.text`:CODE:NOROOT(2)
+    THUMB
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_thread_stack_build                            Cortex-M/IAR      */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function builds a stack frame on the supplied thread's stack.  */
+/*    The stack frame results in a fake interrupt return to the supplied  */
+/*    function pointer.                                                   */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    thread_ptr                            Pointer to thread control blk */
+/*    function_ptr                          Pointer to return function    */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    _tx_thread_create                     Create thread service         */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  03-02-2021      Scott Larson            Initial Version 6.1.5         */
+/*                                                                        */
+/**************************************************************************/
+// VOID   _tx_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(VOID))
+// {
+    PUBLIC  _tx_thread_stack_build
+_tx_thread_stack_build:
+
+    /* Build a fake interrupt frame.  The form of the fake interrupt stack
+       on the Cortex-M should look like the following after it is built:
+
+       Stack Top:
+                       LR          Interrupted LR (LR at time of PENDSV)
+                       r4          Initial value for r4
+                       r5          Initial value for r5
+                       r6          Initial value for r6
+                       r7          Initial value for r7
+                       r8          Initial value for r8
+                       r9          Initial value for r9
+                       r10         Initial value for r10
+                       r11         Initial value for r11
+                       r0          Initial value for r0    (Hardware stack starts here!!)
+                       r1          Initial value for r1
+                       r2          Initial value for r2
+                       r3          Initial value for r3
+                       r12         Initial value for r12
+                       lr          Initial value for lr
+                       pc          Initial value for pc
+                       xPSR        Initial value for xPSR
+
+    Stack Bottom: (higher memory address)  */
+
+    LDR     r2, [r0, #16]                           // Pickup end of stack area
+    BIC     r2, r2, #0x7                            // Align frame for 8-byte alignment
+    SUB     r2, r2, #68                             // Subtract frame size
+    LDR     r3, =0xFFFFFFFD                         // Build initial LR value
+    STR     r3, [r2, #0]                            // Save on the stack
+
+    /* Actually build the stack frame.  */
+
+    MOV     r3, #0                                  // Build initial register value
+    STR     r3, [r2, #4]                            // Store initial r4
+    STR     r3, [r2, #8]                            // Store initial r5
+    STR     r3, [r2, #12]                           // Store initial r6
+    STR     r3, [r2, #16]                           // Store initial r7
+    STR     r3, [r2, #20]                           // Store initial r8
+    STR     r3, [r2, #24]                           // Store initial r9
+    STR     r3, [r2, #28]                           // Store initial r10
+    STR     r3, [r2, #32]                           // Store initial r11
+
+    /* Hardware stack follows.  */
+
+    STR     r3, [r2, #36]                           // Store initial r0
+    STR     r3, [r2, #40]                           // Store initial r1
+    STR     r3, [r2, #44]                           // Store initial r2
+    STR     r3, [r2, #48]                           // Store initial r3
+    STR     r3, [r2, #52]                           // Store initial r12
+    MOV     r3, #0xFFFFFFFF                         // Poison EXC_RETURN value
+    STR     r3, [r2, #56]                           // Store initial lr
+    STR     r1, [r2, #60]                           // Store initial pc
+    MOV     r3, #0x01000000                         // Only T-bit need be set
+    STR     r3, [r2, #64]                           // Store initial xPSR
+
+    /* Setup stack pointer.  */
+    // thread_ptr -> tx_thread_stack_ptr =  r2;
+
+    STR     r2, [r0, #8]                            // Save stack pointer in thread's
+                                                    //   control block
+    BX      lr                                      // Return to caller
+// }
+    END

ports_module/cortex_m33/iar/module_manager/src/tx_thread_stack_error_handler.c

@@ -0,0 +1,97 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Thread                                                              */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+#define TX_SOURCE_CODE
+
+
+/* Include necessary system files.  */
+
+#include "tx_api.h"
+#include "tx_thread.h"
+
+/* Define the global function pointer for stack error handling. If a stack error is 
+   detected and the application has registered a stack error handler, it will be 
+   called via this function pointer.  */
+
+VOID    (*_tx_thread_application_stack_error_handler)(TX_THREAD *thread_ptr);
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_thread_stack_error_handler                    Cortex-M33/IAR    */
+/*                                                            6.1         */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function processes stack errors detected during run-time.      */
+/*                                                                        */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    thread_ptr                            Thread control block pointer  */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    _tx_thread_terminate                                                */
+/*    _tx_thread_application_stack_error_handler                          */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    ThreadX internal code                                               */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*                                                                        */
+/**************************************************************************/
+VOID  _tx_thread_stack_error_handler(TX_THREAD *thread_ptr)
+{
+
+    #ifndef TX_THREAD_NO_TERMINATE_STACK_ERROR
+    /* Is there a thread?  */
+    if (thread_ptr)
+    {
+        /* Terminate the current thread.  */
+        _tx_thread_terminate(_tx_thread_current_ptr);
+    }
+    #endif
+    
+    /* Determine if the application has registered an error handler.  */
+    if (_tx_thread_application_stack_error_handler != TX_NULL)
+    {
+
+        /* Yes, an error handler is present, simply call the application error handler.  */
+        (_tx_thread_application_stack_error_handler)(thread_ptr);
+    }
+
+}
+

ports_module/cortex_m33/iar/module_manager/src/tx_thread_stack_error_notify.c

@@ -0,0 +1,98 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Thread                                                              */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+#define TX_SOURCE_CODE
+
+
+/* Include necessary system files.  */
+
+#include "tx_api.h"
+#include "tx_thread.h"
+#include "tx_trace.h"
+
+extern VOID (*_tx_thread_application_stack_error_handler)(TX_THREAD *thread_ptr);
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_thread_stack_error_notify                     Cortex-M33/IAR    */
+/*                                                            6.1         */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function registers an application stack error handler. If      */
+/*    ThreadX detects a stack error, this application handler is called.  */
+/*                                                                        */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    stack_error_handler                   Pointer to stack error        */
+/*                                            handler, TX_NULL to disable */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    status                                Service return status         */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    Application Code                                                    */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*                                                                        */
+/**************************************************************************/
+UINT  _tx_thread_stack_error_notify(VOID (*stack_error_handler)(TX_THREAD *thread_ptr))
+{
+
+TX_INTERRUPT_SAVE_AREA
+
+
+    /* Disable interrupts.  */
+    TX_DISABLE
+
+    /* Make entry in event log.  */
+    TX_TRACE_IN_LINE_INSERT(TX_TRACE_THREAD_STACK_ERROR_NOTIFY, 0, 0, 0, 0, TX_TRACE_THREAD_EVENTS)
+
+    /* Make entry in event log.  */
+    TX_EL_THREAD_STACK_ERROR_NOTIFY_INSERT
+
+    /* Setup global thread stack error handler.  */
+    _tx_thread_application_stack_error_handler =  stack_error_handler;
+
+    /* Restore interrupts.  */
+    TX_RESTORE
+
+    /* Return success to caller.  */
+    return(TX_SUCCESS);
+}
+

ports_module/cortex_m33/iar/module_manager/src/tx_thread_system_return.s

@@ -0,0 +1,86 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Thread                                                              */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+    SECTION `.text`:CODE:NOROOT(2)
+    THUMB
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_thread_system_return                          Cortex-M/IAR      */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function is target processor specific.  It is used to transfer */
+/*    control from a thread back to the ThreadX system.  Only a           */
+/*    minimal context is saved since the compiler assumes temp registers  */
+/*    are going to get slicked by a function call anyway.                 */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    _tx_thread_schedule                   Thread scheduling loop        */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    ThreadX components                                                  */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  03-02-2021      Scott Larson            Initial Version 6.1.5         */
+/*                                                                        */
+/**************************************************************************/
+// VOID   _tx_thread_system_return(VOID)
+// {
+    PUBLIC  _tx_thread_system_return
+_tx_thread_system_return:
+
+    /* Return to real scheduler via PendSV. Note that this routine is often
+       replaced with in-line assembly in tx_port.h to improved performance.  */
+
+    MOV     r0, #0x10000000                         // Load PENDSVSET bit
+    MOV     r1, #0xE000E000                         // Load NVIC base
+    STR     r0, [r1, #0xD04]                        // Set PENDSVBIT in ICSR
+    MRS     r0, IPSR                                // Pickup IPSR
+    CMP     r0, #0                                  // Is it a thread returning?
+    BNE     _isr_context                            // If ISR, skip interrupt enable
+    MRS     r1, PRIMASK                             // Thread context returning, pickup PRIMASK
+    CPSIE   i                                       // Enable interrupts
+    MSR     PRIMASK, r1                             // Restore original interrupt posture
+_isr_context:
+    BX      lr                                      // Return to caller
+
+// }
+    END

ports_module/cortex_m33/iar/module_manager/src/tx_timer_interrupt.s

@@ -0,0 +1,253 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Timer                                                               */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+    EXTERN      _tx_timer_time_slice
+    EXTERN      _tx_timer_system_clock
+    EXTERN      _tx_timer_current_ptr
+    EXTERN      _tx_timer_list_start
+    EXTERN      _tx_timer_list_end
+    EXTERN      _tx_timer_expired_time_slice
+    EXTERN      _tx_timer_expired
+    EXTERN      _tx_thread_time_slice
+    EXTERN      _tx_timer_expiration_process
+    EXTERN      _tx_thread_current_ptr
+    EXTERN      _tx_thread_execute_ptr
+    EXTERN      _tx_thread_preempt_disable
+
+    SECTION `.text`:CODE:NOROOT(2)
+    THUMB
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_timer_interrupt                               Cortex-M/IAR      */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function processes the hardware timer interrupt.  This         */
+/*    processing includes incrementing the system clock and checking for  */
+/*    time slice and/or timer expiration.  If either is found, the        */
+/*    expiration functions are called.                                    */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    _tx_timer_expiration_process          Timer expiration processing   */
+/*    _tx_thread_time_slice                 Time slice interrupted thread */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    interrupt vector                                                    */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  03-02-2021     Scott Larson             Initial Version 6.1.5         */
+/*                                                                        */
+/**************************************************************************/
+// VOID   _tx_timer_interrupt(VOID)
+// {
+    PUBLIC  _tx_timer_interrupt
+_tx_timer_interrupt:
+
+    /* Upon entry to this routine, it is assumed that the compiler scratch registers are available
+       for use.  */
+
+    /* Increment the system clock.  */
+    // _tx_timer_system_clock++;
+
+    LDR     r1, =_tx_timer_system_clock             // Pickup address of system clock
+    LDR     r0, [r1, #0]                            // Pickup system clock
+    ADD     r0, r0, #1                              // Increment system clock
+    STR     r0, [r1, #0]                            // Store new system clock
+
+    /* Test for time-slice expiration.  */
+    // if (_tx_timer_time_slice)
+    // {
+
+    LDR     r3, =_tx_timer_time_slice               // Pickup address of time-slice
+    LDR     r2, [r3, #0]                            // Pickup time-slice
+    CBZ     r2, __tx_timer_no_time_slice            // Is it non-active?
+                                                    // Yes, skip time-slice processing
+
+       /* Decrement the time_slice.  */
+       // _tx_timer_time_slice--;
+
+    SUB     r2, r2, #1                              // Decrement the time-slice
+    STR     r2, [r3, #0]                            // Store new time-slice value
+
+       /* Check for expiration.  */
+       // if (__tx_timer_time_slice == 0)
+
+    CBNZ    r2, __tx_timer_no_time_slice            // Has it expired?
+                                                    // No, skip expiration processing
+
+       /* Set the time-slice expired flag.  */
+       // _tx_timer_expired_time_slice =  TX_TRUE;
+
+    LDR     r3, =_tx_timer_expired_time_slice       // Pickup address of expired flag
+    MOV     r0, #1                                  // Build expired value
+    STR     r0, [r3, #0]                            // Set time-slice expiration flag
+
+    // }
+
+__tx_timer_no_time_slice:
+
+    /* Test for timer expiration.  */
+    // if (*_tx_timer_current_ptr)
+    // {
+
+    LDR     r1, =_tx_timer_current_ptr              // Pickup current timer pointer address
+    LDR     r0, [r1, #0]                            // Pickup current timer
+    LDR     r2, [r0, #0]                            // Pickup timer list entry
+    CBZ     r2, __tx_timer_no_timer                 // Is there anything in the list?
+                                                    // No, just increment the timer
+
+        /* Set expiration flag.  */
+        // _tx_timer_expired =  TX_TRUE;
+
+    LDR     r3, =_tx_timer_expired                  // Pickup expiration flag address
+    MOV     r2, #1                                  // Build expired value
+    STR     r2, [r3, #0]                            // Set expired flag
+    B       __tx_timer_done                         // Finished timer processing
+
+    // }
+    // else
+    // {
+__tx_timer_no_timer:
+
+        /* No timer expired, increment the timer pointer.  */
+        // _tx_timer_current_ptr++;
+
+    ADD     r0, r0, #4                              // Move to next timer
+
+        /* Check for wrap-around.  */
+        // if (_tx_timer_current_ptr == _tx_timer_list_end)
+
+    LDR     r3, =_tx_timer_list_end                 // Pickup addr of timer list end
+    LDR     r2, [r3, #0]                            // Pickup list end
+    CMP     r0, r2                                  // Are we at list end?
+    BNE     __tx_timer_skip_wrap                    // No, skip wrap-around logic
+
+            /* Wrap to beginning of list.  */
+            // _tx_timer_current_ptr =  _tx_timer_list_start;
+
+    LDR     r3, =_tx_timer_list_start               // Pickup addr of timer list start
+    LDR     r0, [r3, #0]                            // Set current pointer to list start
+
+__tx_timer_skip_wrap:
+
+    STR     r0, [r1, #0]                            // Store new current timer pointer
+    // }
+
+__tx_timer_done:
+
+    /* See if anything has expired.  */
+    // if ((_tx_timer_expired_time_slice) || (_tx_timer_expired))
+    // {
+
+    LDR     r3, =_tx_timer_expired_time_slice       // Pickup addr of expired flag
+    LDR     r2, [r3, #0]                            // Pickup time-slice expired flag
+    CBNZ    r2, __tx_something_expired              // Did a time-slice expire?
+                                                    // If non-zero, time-slice expired
+    LDR     r1, =_tx_timer_expired                  // Pickup addr of other expired flag
+    LDR     r0, [r1, #0]                            // Pickup timer expired flag
+    CBZ     r0, __tx_timer_nothing_expired          // Did a timer expire?
+                                                    // No, nothing expired
+
+__tx_something_expired:
+
+    STMDB   sp!, {r0, lr}                           // Save the lr register on the stack
+                                                    //   and save r0 just to keep 8-byte alignment
+
+    /* Did a timer expire?  */
+    // if (_tx_timer_expired)
+    // {
+
+    LDR     r1, =_tx_timer_expired                  // Pickup addr of expired flag
+    LDR     r0, [r1, #0]                            // Pickup timer expired flag
+    CBZ     r0, __tx_timer_dont_activate            // Check for timer expiration
+                                                    // If not set, skip timer activation
+
+        /* Process timer expiration.  */
+        // _tx_timer_expiration_process();
+
+    BL      _tx_timer_expiration_process            // Call the timer expiration handling routine
+
+    // }
+__tx_timer_dont_activate:
+
+    /* Did time slice expire?  */
+    // if (_tx_timer_expired_time_slice)
+    // {
+
+    LDR     r3, =_tx_timer_expired_time_slice       // Pickup addr of time-slice expired
+    LDR     r2, [r3, #0]                            // Pickup the actual flag
+    CBZ     r2, __tx_timer_not_ts_expiration        // See if the flag is set
+                                                    // No, skip time-slice processing
+
+        /* Time slice interrupted thread.  */
+        // _tx_thread_time_slice();
+
+    BL      _tx_thread_time_slice                   // Call time-slice processing
+    LDR     r0, =_tx_thread_preempt_disable         // Build address of preempt disable flag
+    LDR     r1, [r0]                                // Is the preempt disable flag set?
+    CBNZ    r1, __tx_timer_skip_time_slice          // Yes, skip the PendSV logic
+    LDR     r0, =_tx_thread_current_ptr             // Build current thread pointer address
+    LDR     r1, [r0]                                // Pickup the current thread pointer
+    LDR     r2, =_tx_thread_execute_ptr             // Build execute thread pointer address
+    LDR     r3, [r2]                                // Pickup the execute thread pointer
+    LDR     r0, =0xE000ED04                         // Build address of control register
+    LDR     r2, =0x10000000                         // Build value for PendSV bit
+    CMP     r1, r3                                  // Are they the same?
+    BEQ     __tx_timer_skip_time_slice              // If the same, there was no time-slice performed
+    STR     r2, [r0]                                // Not the same, issue the PendSV for preemption
+__tx_timer_skip_time_slice:
+
+    // }
+
+__tx_timer_not_ts_expiration:
+
+    LDMIA   sp!, {r0, lr}                           // Recover lr register (r0 is just there for
+                                                    //   the 8-byte stack alignment
+
+    // }
+
+__tx_timer_nothing_expired:
+
+    DSB                                             // Complete all memory access
+    BX      lr                                      // Return to caller
+
+// }
+    END

ports_module/cortex_m33/iar/module_manager/src/txe_thread_secure_stack_allocate.c

@@ -0,0 +1,123 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Thread                                                              */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+#define TX_SOURCE_CODE
+
+
+/* Include necessary system files.  */
+
+#include "tx_api.h"
+#include "tx_initialize.h"
+#include "tx_thread.h"
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_thread_secure_stack_allocate                    PORTABLE C      */
+/*                                                            6.1         */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function checks for errors in the secure stack allocate        */
+/*    function call.                                                      */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    thread_ptr                            Thread control block pointer  */
+/*    stack_size                            Size of secure stack to       */
+/*                                            allocate                    */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    TX_THREAD_ERROR                       Invalid thread pointer        */
+/*    TX_CALLER_ERROR                       Invalid caller of function    */
+/*    status                                Actual completion status      */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    _tx_thread_secure_stack_allocate      Actual stack alloc function   */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    Application Code                                                    */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*                                                                        */
+/**************************************************************************/
+UINT    _txe_thread_secure_stack_allocate(TX_THREAD *thread_ptr, ULONG stack_size)
+{
+#if defined(TX_SINGLE_MODE_SECURE) || defined(TX_SINGLE_MODE_NON_SECURE)
+    return(TX_FEATURE_NOT_ENABLED);
+#else
+UINT    status;
+    
+    /* Default status to success.  */
+    status =  TX_SUCCESS;
+    
+    /* Check for an invalid thread pointer.  */
+    if (thread_ptr == TX_NULL)
+    {
+
+        /* Thread pointer is invalid, return appropriate error code.  */
+        status =  TX_THREAD_ERROR;
+    }
+
+    /* Now check for invalid thread ID.  */
+    else if (thread_ptr -> tx_thread_id != TX_THREAD_ID)
+    {
+
+        /* Thread pointer is invalid, return appropriate error code.  */
+        status =  TX_THREAD_ERROR;
+    }
+    
+    /* Check for interrupt call.  */
+    if (TX_THREAD_GET_SYSTEM_STATE() != ((ULONG) 0))
+    {
+        /* Is call from an interrupt and not initialization?  */
+        if (TX_THREAD_GET_SYSTEM_STATE() < TX_INITIALIZE_IN_PROGRESS)
+        {
+            /* Invalid caller of this function, return appropriate error code.  */
+            status =  TX_CALLER_ERROR;
+        }
+    }
+    
+    /* Determine if everything is okay.  */
+    if (status == TX_SUCCESS)
+    {
+
+        /* Call actual secure stack allocate function.  */
+        status =  _tx_thread_secure_stack_allocate(thread_ptr, stack_size);
+    }
+
+    /* Return completion status.  */
+    return(status);
+#endif
+}
+

ports_module/cortex_m33/iar/module_manager/src/txe_thread_secure_stack_free.c

@@ -0,0 +1,121 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Thread                                                              */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+#define TX_SOURCE_CODE
+
+
+/* Include necessary system files.  */
+
+#include "tx_api.h"
+#include "tx_initialize.h"
+#include "tx_thread.h"
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _txe_thread_secure_stack_free                       PORTABLE C      */
+/*                                                            6.1         */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function checks for errors in the secure stack free            */
+/*    function call.                                                      */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    thread_ptr                            Thread control block pointer  */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    TX_THREAD_ERROR                       Invalid thread pointer        */
+/*    TX_CALLER_ERROR                       Invalid caller of function    */
+/*    status                                Actual completion status      */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    _tx_thread_secure_stack_free          Actual stack free function    */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    Application Code                                                    */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*                                                                        */
+/**************************************************************************/
+UINT    _txe_thread_secure_stack_free(TX_THREAD *thread_ptr)
+{
+#if defined(TX_SINGLE_MODE_SECURE) || defined(TX_SINGLE_MODE_NON_SECURE)
+    return(TX_FEATURE_NOT_ENABLED);
+#else
+UINT    status;
+    
+    /* Default status to success.  */
+    status =  TX_SUCCESS;
+    
+    /* Check for an invalid thread pointer.  */
+    if (thread_ptr == TX_NULL)
+    {
+
+        /* Thread pointer is invalid, return appropriate error code.  */
+        status =  TX_THREAD_ERROR;
+    }
+
+    /* Now check for invalid thread ID.  */
+    else if (thread_ptr -> tx_thread_id != TX_THREAD_ID)
+    {
+
+        /* Thread pointer is invalid, return appropriate error code.  */
+        status =  TX_THREAD_ERROR;
+    }
+    
+    /* Check for interrupt call.  */
+    if (TX_THREAD_GET_SYSTEM_STATE() != ((ULONG) 0))
+    {
+        /* Is call from an interrupt and not initialization?  */
+        if (TX_THREAD_GET_SYSTEM_STATE() < TX_INITIALIZE_IN_PROGRESS)
+        {
+            /* Invalid caller of this function, return appropriate error code.  */
+            status =  TX_CALLER_ERROR;
+        }
+    }
+    
+    /* Determine if everything is okay.  */
+    if (status == TX_SUCCESS)
+    {
+
+        /* Call actual secure stack allocate function.  */
+        status =  _tx_thread_secure_stack_free(thread_ptr);
+    }
+
+    /* Return completion status.  */
+    return(status);
+#endif
+}
+

ports_module/cortex_m33/iar/module_manager/src/txm_module_manager_alignment_adjust.c

@@ -0,0 +1,85 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Module Manager                                                      */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+#define TX_SOURCE_CODE
+
+#include "tx_api.h"
+#include "txm_module.h"
+
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _txm_module_manager_alignment_adjust            Cortex-M33/MPU/IAR  */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function adjusts the alignment and size of the code and data   */
+/*    section for a given module implementation.                          */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    module_preamble                   Pointer to module preamble        */
+/*    code_size                         Size of the code area (updated)   */
+/*    code_alignment                    Code area alignment (updated)     */
+/*    data_size                         Size of data area (updated)       */
+/*    data_alignment                    Data area alignment (updated)     */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    Initial thread stack frame                                          */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  03-02-2021     Scott Larson             Initial Version 6.1.5         */
+/*                                                                        */
+/**************************************************************************/
+VOID  _txm_module_manager_alignment_adjust(TXM_MODULE_PREAMBLE *module_preamble,
+                                           ULONG *code_size,
+                                           ULONG *code_alignment,
+                                           ULONG *data_size,
+                                           ULONG *data_alignment)
+{
+
+    /* Round code and data size UP to TXM_MODULE_MPU_ALIGNMENT bytes. */
+    *code_size = (*code_size + TXM_MODULE_MPU_ALIGNMENT - 1) & ~(TXM_MODULE_MPU_ALIGNMENT - 1);
+    *data_size = (*data_size + TXM_MODULE_MPU_ALIGNMENT - 1) & ~(TXM_MODULE_MPU_ALIGNMENT - 1);
+    
+    /* Alignment for code and data is TXM_MODULE_MPU_ALIGNMENT bytes. */
+    *code_alignment =   TXM_MODULE_MPU_ALIGNMENT;
+    *data_alignment =   TXM_MODULE_MPU_ALIGNMENT;
+}

ports_module/cortex_m33/iar/module_manager/src/txm_module_manager_external_memory_enable.c

@@ -0,0 +1,164 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Module Manager                                                      */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+#define TX_SOURCE_CODE
+
+#include "tx_api.h"
+#include "tx_mutex.h"
+#include "tx_queue.h"
+#include "tx_thread.h"
+#include "txm_module.h"
+
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _txm_module_manager_external_memory_enable      Cortex-M33/MPU/IAR  */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function creates an entry in the MPU table for a shared        */
+/*    memory space. The start_address must be 32-byte aligned.            */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    module_instance                   Module instance pointer           */
+/*    start_address                     Start address of memory           */
+/*    length                            Length of external memory         */
+/*    attributes                        Memory attributes (r/w)           */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    status                            Completion status                 */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    _tx_mutex_get                     Get protection mutex              */
+/*    _tx_mutex_put                     Release protection mutex          */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    Application code                                                    */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  03-02-2021     Scott Larson             Initial Version 6.1.5         */
+/*                                                                        */
+/**************************************************************************/
+UINT  _txm_module_manager_external_memory_enable(TXM_MODULE_INSTANCE *module_instance,
+                                                 VOID *start_address,
+                                                 ULONG length,
+                                                 UINT attributes)
+{
+
+ULONG   address;
+ULONG   shared_index;
+
+    /* Determine if the module manager has not been initialized yet.  */
+    if (_txm_module_manager_ready != TX_TRUE)
+    {
+        /* Module manager has not been initialized.  */
+        return(TX_NOT_AVAILABLE);
+    }
+
+    /* Determine if the module is valid.  */
+    if (module_instance == TX_NULL)
+    {
+        /* Invalid module pointer.  */
+        return(TX_PTR_ERROR);
+    }
+
+    /* Get module manager protection mutex.  */
+    _tx_mutex_get(&_txm_module_manager_mutex, TX_WAIT_FOREVER);
+
+    /* Determine if the module instance is valid.  */
+    if (module_instance -> txm_module_instance_id != TXM_MODULE_ID)
+    {
+        /* Release the protection mutex.  */
+        _tx_mutex_put(&_txm_module_manager_mutex);
+
+        /* Invalid module pointer.  */
+        return(TX_PTR_ERROR);
+    }
+    
+    /* Determine if the module instance is in the loaded state.  */
+    if (module_instance -> txm_module_instance_state != TXM_MODULE_LOADED)
+    {
+        /* Release the protection mutex.  */
+        _tx_mutex_put(&_txm_module_manager_mutex);
+
+        /* Return error if the module is not ready.  */
+        return(TX_START_ERROR);
+    }
+    
+    /* Determine if there are shared memory entries available.  */
+    if(module_instance -> txm_module_instance_shared_memory_count >= TXM_MODULE_MPU_SHARED_ENTRIES)
+    {
+        /* Release the protection mutex.  */
+        _tx_mutex_put(&_txm_module_manager_mutex);
+        
+        /* No more entries available.  */
+        return(TX_NO_MEMORY);
+    }
+    
+    /* Start address must adhere to Cortex-M33 MPU alignment.  */
+    address = (ULONG) start_address;
+    if(address != (address & ~(TXM_MODULE_MPU_ALIGNMENT - 1)))
+    {
+        /* Release the protection mutex.  */
+        _tx_mutex_put(&_txm_module_manager_mutex);
+        
+        /* Return alignment error.  */
+        return(TXM_MODULE_ALIGNMENT_ERROR);
+    }
+    
+    /* At this point, we have a valid address. Set up MPU registers.  */
+    
+    /* Pick up index into shared memory entries.  */
+    shared_index = TXM_MODULE_MPU_SHARED_INDEX + module_instance -> txm_module_instance_shared_memory_count;
+    
+    /* Set base address register with start address, sanitized attributes and execute never.  */
+    module_instance -> txm_module_instance_mpu_registers[shared_index].txm_module_mpu_region_base_address = address | (attributes & TXM_MODULE_ATTRIBUTE_MASK) | TXM_MODULE_ATTRIBUTE_EXECUTE_NEVER;
+    
+    /* Set the limit address (data start + length-1), attribute index, and enable bit.  */
+    module_instance -> txm_module_instance_mpu_registers[shared_index].txm_module_mpu_region_limit_address = (address + length-1) | TXM_MODULE_ATTRIBUTE_INDEX | TXM_MODULE_ATTRIBUTE_REGION_ENABLE;
+    
+    /* Keep track of shared memory address and length in module instance.  */
+    module_instance -> txm_module_instance_shared_memory_address[module_instance -> txm_module_instance_shared_memory_count] = address;
+    module_instance -> txm_module_instance_shared_memory_length[module_instance -> txm_module_instance_shared_memory_count] = length;
+    
+    /* Increment counter.  */
+    module_instance -> txm_module_instance_shared_memory_count++;
+    
+    /* Release the protection mutex.  */
+    _tx_mutex_put(&_txm_module_manager_mutex);
+    
+    /* Return success.  */
+    return(TX_SUCCESS);
+}

ports_module/cortex_m33/iar/module_manager/src/txm_module_manager_memory_fault_handler.c

@@ -0,0 +1,110 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Module Manager                                                      */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+#define TX_SOURCE_CODE
+
+#include "tx_api.h"
+#include "tx_thread.h"
+#include "txm_module.h"
+
+
+/* Define the user's fault notification callback function pointer.  This is
+   setup via the txm_module_manager_memory_fault_notify API.  */
+
+VOID    (*_txm_module_manager_fault_notify)(TX_THREAD *, TXM_MODULE_INSTANCE *);
+
+
+/* Define a macro that can be used to allocate global variables useful to
+   store information about the last fault. This macro is defined in
+   txm_module_port.h and is usually populated in the assembly language
+   fault handling prior to the code calling _txm_module_manager_memory_fault_handler.  */
+
+TXM_MODULE_MANAGER_FAULT_INFO
+
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _txm_module_manager_memory_fault_handler        Cortex-M33/MPU/IAR  */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function handles a fault associated with a memory protected    */
+/*    module.                                                             */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    _tx_thread_terminate              Terminate thread                  */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    Fault handler                                                       */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  03-02-2021     Scott Larson             Initial Version 6.1.5         */
+/*                                                                        */
+/**************************************************************************/
+VOID  _txm_module_manager_memory_fault_handler(VOID)
+{
+
+TXM_MODULE_INSTANCE     *module_instance_ptr;
+TX_THREAD               *thread_ptr;
+
+    /* Pickup the current thread.  */
+    thread_ptr =  _tx_thread_current_ptr;
+
+    /* Initialize the module instance pointer to NULL.  */
+    module_instance_ptr =  TX_NULL;
+    
+    /* Is there a thread?  */
+    if (thread_ptr)
+    {
+        /* Pickup the module instance.  */
+        module_instance_ptr =  thread_ptr -> tx_thread_module_instance_ptr;
+
+        /* Terminate the current thread.  */
+        _tx_thread_terminate(_tx_thread_current_ptr);
+    }
+    
+    /* Determine if there is a user memory fault notification callback.  */
+    if (_txm_module_manager_fault_notify)
+    {
+        /* Yes, call the user's notification memory fault callback.  */
+        (_txm_module_manager_fault_notify)(thread_ptr, module_instance_ptr);
+    }
+}

ports_module/cortex_m33/iar/module_manager/src/txm_module_manager_memory_fault_notify.c

@@ -0,0 +1,84 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Module Manager                                                      */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+#define TX_SOURCE_CODE
+
+#include "tx_api.h"
+#include "tx_thread.h"
+#include "txm_module.h"
+
+
+/* Define the external user's fault notification callback function pointer.  This is
+   setup via the txm_module_manager_memory_fault_notify API.  */
+
+extern VOID    (*_txm_module_manager_fault_notify)(TX_THREAD *, TXM_MODULE_INSTANCE *);
+
+
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _txm_module_manager_memory_fault_notify         Cortex-M33/MPU/IAR  */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function registers an application callback when/if a memory    */
+/*    fault occurs. The supplied thread is automatically terminated, but  */
+/*    any other threads in the same module may still execute.             */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    notify_function                   Memory fault notification         */
+/*                                        function, NULL disables.        */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    status                            Completion status                 */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    Application Code                                                    */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  03-02-2021     Scott Larson             Initial Version 6.1.5         */
+/*                                                                        */
+/**************************************************************************/
+UINT  _txm_module_manager_memory_fault_notify(VOID (*notify_function)(TX_THREAD *, TXM_MODULE_INSTANCE *))
+{
+    /* Setup notification function.  */
+    _txm_module_manager_fault_notify =  notify_function;
+    
+    /* Return success.  */
+    return(TX_SUCCESS);
+}

ports_module/cortex_m33/iar/module_manager/src/txm_module_manager_mm_register_setup.c

@@ -0,0 +1,190 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Module Manager                                                      */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+#define TX_SOURCE_CODE
+
+#include "tx_api.h"
+#include "txm_module.h"
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _txm_module_manager_mm_register_setup             Cortex-M33/MPU    */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function sets up the Cortex-M33 MPU register definitions based */
+/*    on the module's memory characteristics.                             */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    module_instance                   Pointer to module instance        */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    MPU settings for the module in module_instance                      */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    none                                                                */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    _txm_module_manager_thread_create                                   */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  03-02-2021     Scott Larson             Initial Version 6.1.5         */
+/*                                                                        */
+/**************************************************************************/
+VOID  _txm_module_manager_mm_register_setup(TXM_MODULE_INSTANCE *module_instance)
+{
+
+ULONG   data_size;
+ULONG   start_stop_stack_size;
+ULONG   callback_stack_size;
+
+    /* Setup MPU region for kernel mode entry.  */
+    /* Set base address register to user mode entry function address, which is guaranteed to be at least 32-byte aligned.
+       Mask address to proper range, inner shareable, read only. */
+    module_instance -> txm_module_instance_mpu_registers[TXM_MODULE_MPU_KERNEL_ENTRY_INDEX].txm_module_mpu_region_base_address = ((ULONG) _txm_module_manager_user_mode_entry & 0xFFFFFFE0) | TXM_MODULE_ATTRIBUTE_INNER_SHAREABLE | TXM_MODULE_ATTRIBUTE_READ_ONLY;
+    /* Set the limit address, attribute index, and enable bit.  */
+    module_instance -> txm_module_instance_mpu_registers[TXM_MODULE_MPU_KERNEL_ENTRY_INDEX].txm_module_mpu_region_limit_address = ((ULONG) _txm_module_manager_user_mode_entry & 0xFFFFFFE0) | TXM_MODULE_ATTRIBUTE_INDEX | TXM_MODULE_ATTRIBUTE_REGION_ENABLE;
+    /* End of kernel mode entry setup.  */
+
+
+    /* Setup MPU region for module code protection.  */
+    /* Set base address register to module code address, which should be at least 32-byte aligned.
+       Mask address to proper range, inner shareable, read only. */
+    module_instance -> txm_module_instance_mpu_registers[TXM_MODULE_MPU_CODE_INDEX].txm_module_mpu_region_base_address = ((ULONG) module_instance -> txm_module_instance_code_start & 0xFFFFFFE0) | TXM_MODULE_ATTRIBUTE_INNER_SHAREABLE | TXM_MODULE_ATTRIBUTE_READ_ONLY;
+    /* Set the limit address (code start + code size-1), attribute index, and enable bit.  */
+    module_instance -> txm_module_instance_mpu_registers[TXM_MODULE_MPU_CODE_INDEX].txm_module_mpu_region_limit_address = (((ULONG) module_instance -> txm_module_instance_code_start + module_instance -> txm_module_instance_preamble_ptr -> txm_module_preamble_code_size - 1) & 0xFFFFFFE0) | TXM_MODULE_ATTRIBUTE_INDEX | TXM_MODULE_ATTRIBUTE_REGION_ENABLE;
+    /* End of module code protection.  */
+
+
+    /* Setup MPU region for module data protection.  */
+    /* Set base address register to module data address, which should be at least 32-byte aligned.
+       Mask address to proper range, inner shareable, read write, execute never. */
+    module_instance -> txm_module_instance_mpu_registers[TXM_MODULE_MPU_DATA_INDEX].txm_module_mpu_region_base_address = ((ULONG) module_instance -> txm_module_instance_data_start & 0xFFFFFFE0) | TXM_MODULE_ATTRIBUTE_INNER_SHAREABLE | TXM_MODULE_ATTRIBUTE_READ_WRITE | TXM_MODULE_ATTRIBUTE_EXECUTE_NEVER;
+    
+    /* Adjust the size of the module elements to be aligned to the default alignment. We do this
+       so that when we partition the allocated memory, we can simply place these regions right beside
+       each other without having to align their pointers. Note this only works when they all have
+       the same alignment.  */
+    
+    data_size =             module_instance -> txm_module_instance_preamble_ptr -> txm_module_preamble_data_size;
+    start_stop_stack_size = module_instance -> txm_module_instance_preamble_ptr -> txm_module_preamble_start_stop_stack_size;
+    callback_stack_size =   module_instance -> txm_module_instance_preamble_ptr -> txm_module_preamble_callback_stack_size;
+    
+    data_size =              ((data_size + TXM_MODULE_DATA_ALIGNMENT - 1)/TXM_MODULE_DATA_ALIGNMENT) * TXM_MODULE_DATA_ALIGNMENT;
+    start_stop_stack_size =  ((start_stop_stack_size + TXM_MODULE_DATA_ALIGNMENT - 1)/TXM_MODULE_DATA_ALIGNMENT) * TXM_MODULE_DATA_ALIGNMENT;
+    callback_stack_size =    ((callback_stack_size + TXM_MODULE_DATA_ALIGNMENT - 1)/TXM_MODULE_DATA_ALIGNMENT) * TXM_MODULE_DATA_ALIGNMENT;
+
+    /* Update the data size to include thread stacks.  */
+    data_size = data_size + start_stop_stack_size + callback_stack_size;
+    
+    /* Set the limit address (data start + data size-1), attribute index, and enable bit.  */
+    module_instance -> txm_module_instance_mpu_registers[TXM_MODULE_MPU_DATA_INDEX].txm_module_mpu_region_limit_address = (((ULONG) module_instance -> txm_module_instance_data_start + data_size - 1) & 0xFFFFFFE0) | TXM_MODULE_ATTRIBUTE_INDEX | TXM_MODULE_ATTRIBUTE_REGION_ENABLE;
+    /* End of module data protection.  */
+    
+    /* Remaining MPU entries are disabled for now and can be used for shared memory. */
+}
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _txm_module_manager_inside_data_check          Cortex-M33/MPU/IAR   */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function checks if the specified object is inside shared       */
+/*    memory.                                                             */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    module_instance                   Pointer to module instance        */
+/*    obj_ptr                           Pointer to the object             */
+/*    obj_size                          Size of the object                */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    Whether the object is inside the shared memory region.              */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    Module dispatch check functions                                     */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  03-02-2021     Scott Larson             Initial Version 6.1.5         */
+/*                                                                        */
+/**************************************************************************/
+UINT _txm_module_manager_inside_data_check(TXM_MODULE_INSTANCE *module_instance, ALIGN_TYPE obj_ptr, UINT obj_size)
+{
+
+UINT shared_memory_index;
+UINT num_shared_memory_mpu_entries;
+ALIGN_TYPE shared_memory_address_start;
+ALIGN_TYPE shared_memory_address_end;
+
+    /* Check if the object is inside the module data.  */
+    if ((obj_ptr >= (ALIGN_TYPE) module_instance -> txm_module_instance_data_start) &&
+        ((obj_ptr + obj_size) <= ((ALIGN_TYPE) module_instance -> txm_module_instance_data_end + 1)))
+    {
+        return(TX_TRUE);
+    }
+
+    /* Check if the object is inside the shared memory.  */
+    num_shared_memory_mpu_entries = module_instance -> txm_module_instance_shared_memory_count;
+    for (shared_memory_index = 0; shared_memory_index < num_shared_memory_mpu_entries; shared_memory_index++)
+    {
+
+        shared_memory_address_start = (ALIGN_TYPE) module_instance -> txm_module_instance_shared_memory_address[shared_memory_index];
+        shared_memory_address_end = shared_memory_address_start + module_instance -> txm_module_instance_shared_memory_length[shared_memory_index];
+
+        if ((obj_ptr >= (ALIGN_TYPE) shared_memory_address_start) &&
+            ((obj_ptr + obj_size) <= (ALIGN_TYPE) shared_memory_address_end))
+        {
+            return(TX_TRUE);
+        }
+    }
+
+    return(TX_FALSE);
+}

ports_module/cortex_m33/iar/module_manager/src/txm_module_manager_port_dispatch.c

@@ -0,0 +1,115 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Module Manager                                                      */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+#define TX_SOURCE_CODE
+
+#include "tx_api.h"
+#include "txm_module.h"
+#include "txm_module_manager_util.h"
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _txm_module_manager_port_dispatch                 Cortex-M33/IAR    */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function dispatches the module's kernel request based upon the */
+/*    ID and parameters specified in the request.                         */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    module_instance                   Module pointer                    */
+/*    kernel_request                    Module's kernel request           */
+/*    param_0                           First parameter                   */
+/*    param_1                           Second parameter                  */
+/*    param_2                           Third parameter                   */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    status                            Completion status                 */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    Port-specific ThreadX API Calls                                     */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    _txm_module_manager_kernel_dispatch                                 */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  03-02-2021     Scott Larson             Initial Version 6.1.5         */
+/*                                                                        */
+/**************************************************************************/
+ALIGN_TYPE _txm_module_manager_port_dispatch(TXM_MODULE_INSTANCE *module_instance, ULONG kernel_request, ALIGN_TYPE param_0, ALIGN_TYPE param_1, ALIGN_TYPE param_2)
+{
+
+ALIGN_TYPE return_value = TX_NOT_AVAILABLE;
+
+    switch(kernel_request)
+    {
+        case TXM_THREAD_SECURE_STACK_ALLOCATE_CALL:
+        {
+            if (module_instance -> txm_module_instance_property_flags & TXM_MODULE_MEMORY_PROTECTION)
+            {
+                if (!TXM_MODULE_MANAGER_PARAM_CHECK_OBJECT_FOR_USE(module_instance, param_0, sizeof(TX_THREAD)))
+                    return(TXM_MODULE_INVALID_MEMORY);
+            }
+
+            return_value = (ALIGN_TYPE) _txe_thread_secure_stack_allocate(
+                (TX_THREAD *) param_0,
+                (ULONG) param_1
+            );
+            break;
+        }
+        
+        case TXM_THREAD_SECURE_STACK_FREE_CALL:
+        {
+            if (module_instance -> txm_module_instance_property_flags & TXM_MODULE_MEMORY_PROTECTION)
+            {
+                if (!TXM_MODULE_MANAGER_PARAM_CHECK_OBJECT_FOR_USE(module_instance, param_0, sizeof(TX_THREAD)))
+                    return(TXM_MODULE_INVALID_MEMORY);
+            }
+
+            return_value = (ALIGN_TYPE) _txe_thread_secure_stack_free(
+                (TX_THREAD *) param_0
+            );
+            break;
+        }
+        
+        default:
+        {
+            /* Unhandled kernel request, return an error!  */
+            break;
+        }
+    }
+    
+    return(return_value);
+}

ports_module/cortex_m33/iar/module_manager/src/txm_module_manager_thread_stack_build.s

@@ -0,0 +1,142 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Module Manager                                                      */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+    SECTION `.text`:CODE:NOROOT(2)
+    THUMB
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _txm_module_manager_thread_stack_build          Cortex-M33/MPU/IAR  */
+/*                                                           6.1.5        */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function builds a stack frame on the supplied thread's stack.  */
+/*    The stack frame results in a fake interrupt return to the supplied  */
+/*    function pointer.                                                   */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    thread_ptr                            Pointer to thread             */
+/*    function_ptr                          Pointer to shell function     */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    _tx_thread_create                     Create thread service         */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  03-02-2021     Scott Larson             Initial Version 6.1.5         */
+/*                                                                        */
+/**************************************************************************/
+// VOID   _txm_module_manager_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(TX_THREAD *, TXM_MODULE_INSTANCE *))
+// {
+    PUBLIC  _txm_module_manager_thread_stack_build
+_txm_module_manager_thread_stack_build:
+
+    /* Build a fake interrupt frame.  The form of the fake interrupt stack
+       on the Cortex-M should look like the following after it is built:
+
+       Stack Top:
+                    LR          Interrupted LR (LR at time of PENDSV)
+                    r4          Initial value for r4
+                    r5          Initial value for r5
+                    r6          Initial value for r6
+                    r7          Initial value for r7
+                    r8          Initial value for r8
+                    r9          Initial value for r9
+                    r10         Initial value for r10
+                    r11         Initial value for r11
+                    r0          Initial value for r0    (Hardware stack starts here!!)
+                    r1          Initial value for r1
+                    r2          Initial value for r2
+                    r3          Initial value for r3
+                    r12         Initial value for r12
+                    lr          Initial value for lr
+                    pc          Initial value for pc
+                    xPSR        Initial value for xPSR
+
+    Stack Bottom: (higher memory address)  */
+
+    LDR     r2, [r0, #16]                       // Pickup end of stack area
+    BIC     r2, r2, #0x7                        // Align frame
+    SUB     r2, r2, #68                         // Subtract frame size
+#ifdef TX_SINGLE_MODE_SECURE
+    LDR     r3, =0xFFFFFFFD                     // Build initial LR value for secure mode
+#else
+    LDR     r3, =0xFFFFFFBC                     // Build initial LR value to return to non-secure PSP
+#endif
+    STR     r3, [r2, #0]                        // Save on the stack
+
+    /* Actually build the stack frame.  */
+
+    MOV     r3, #0                              // Build initial register value
+    STR     r3, [r2, #4]                        // Store initial r4
+    STR     r3, [r2, #8]                        // Store initial r5
+    STR     r3, [r2, #12]                       // Store initial r6
+    STR     r3, [r2, #16]                       // Store initial r7
+    STR     r3, [r2, #20]                       // Store initial r8
+    STR     r3, [r2, #28]                       // Store initial r10
+    STR     r3, [r2, #32]                       // Store initial r11
+
+    /* Hardware stack follows.  */
+
+    STR     r0, [r2, #36]                       // Store initial r0, which is the thread control block
+
+    LDR     r3, [r0, #8]                        // Pickup thread entry info pointer,which is in the stack pointer position of the thread control block.
+                                                //   It was setup in the txm_module_manager_thread_create function. It will be overwritten later in this
+                                                //   function with the actual, initial stack pointer.
+    STR     r3, [r2, #40]                       // Store initial r1, which is the module entry information.
+    LDR     r3, [r3, #8]                        // Pickup data base register from the module information
+    STR     r3, [r2, #24]                       // Store initial r9 (data base register)
+    MOV     r3, #0                              // Clear r3 again
+
+    STR     r3, [r2, #44]                       // Store initial r2
+    STR     r3, [r2, #48]                       // Store initial r3
+    STR     r3, [r2, #52]                       // Store initial r12
+    MOV     r3, #0xFFFFFFFF                     // Poison EXC_RETURN value
+    STR     r3, [r2, #56]                       // Store initial lr
+    STR     r1, [r2, #60]                       // Store initial pc
+    MOV     r3, #0x01000000                     // Only T-bit need be set
+    STR     r3, [r2, #64]                       // Store initial xPSR
+
+    /* Setup stack pointer.  */
+    // thread_ptr -> tx_thread_stack_ptr =  r2;
+
+    STR     r2, [r0, #8]                        // Save stack pointer in thread's control block
+    BX      lr                                  // Return to caller
+// }
+    END