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Before, some object API XML files conflicted when the include, arch_include, and sel4_arch_include directories were combined: - include/interfaces/sel4.xml - arch_include/*/interfaces/sel4arch.xml - sel4_arch_include/*/interfaces/sel4arch.xml This commit renames them to: - include/interfaces/object-api.xml - arch_include/*/interfaces/object-api-arch.xml - sel4_arch_include/*/interfaces/object-api-sel4-arch.xml Now, when the include, arch_include, and sel4_arch_include directories are combined, we are left with: - interfaces/object-api.xml - interfaces/object-api-arch.xml - interfaces/object-api-sel4-arch.xml Signed-off-by: Nick Spinale <nick@nickspinale.com>
152 lines
6.8 KiB
XML
152 lines
6.8 KiB
XML
<?xml version="1.0" ?>
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<!--
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Copyright 2020, Data61, CSIRO (ABN 41 687 119 230)
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SPDX-License-Identifier: BSD-2-Clause
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-->
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<api name="ObjectApiX64" label_prefix="x86_64_">
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<struct name="seL4_UserContext">
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<member name="rip"/>
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<member name="rsp"/>
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<member name="rflags"/>
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<member name="rax"/>
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<member name="rbx"/>
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<member name="rcx"/>
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<member name="rdx"/>
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<member name="rsi"/>
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<member name="rdi"/>
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<member name="rbp"/>
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<member name="r8"/>
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<member name="r9"/>
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<member name="r10"/>
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<member name="r11"/>
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<member name="r12"/>
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<member name="r13"/>
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<member name="r14"/>
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<member name="r15"/>
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<member name="fs_base"/>
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<member name="gs_base"/>
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</struct>
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<interface name="seL4_X86_PDPT" manual_name="PDPT" cap_description="Capability to the PDPT being operated on.">
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<method id="X86PDPTMap" name="Map">
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<brief>
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Map a page directory page table.
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</brief>
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<description>
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<docref>See <autoref label="ch:vspace"/></docref>
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</description>
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<param dir="in" name="pml4" type="seL4_X64_PML4" description="Capability to the VSpace which will contain the mapping."/>
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<param dir="in" name="vaddr" type="seL4_Word" description="Virtual address at which to map page."/>
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<param dir="in" name="attr" type="seL4_X86_VMAttributes">
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<description>
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VM attributes for the mapping. <docref>Possible values for this type are given in <autoref label='ch:vspace'/>.</docref>
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</description>
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</param>
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<error name="seL4_DeleteFirst">
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<description>
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A mapping already exists for this level in <texttt text="vspace"/> at <texttt text="vaddr"/>.
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</description>
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</error>
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<error name="seL4_FailedLookup">
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<description>
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The <texttt text="pml4"/> is not assigned to an ASID pool.
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</description>
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</error>
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<error name="seL4_IllegalOperation">
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<description>
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The <texttt text="_service"/> is a CPtr to a capability of the wrong type.
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</description>
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</error>
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<error name="seL4_InvalidArgument">
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<description>
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The <texttt text="vaddr"/> is in the kernel virtual address range.
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</description>
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</error>
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<error name="seL4_InvalidCapability">
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<description>
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The <texttt text="_service"/> or <texttt text="pml4"/> is a CPtr to a capability of the wrong type.
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Or, <texttt text="pml4"/> is not assigned to an ASID pool.
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Or, <texttt text="_service"/> is already mapped in a VSpace.
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</description>
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</error>
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</method>
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<method id="X86PDPTUnmap" name="Unmap">
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<brief>
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Unmap a page directory page table.
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</brief>
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<description>
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<docref>See <autoref label="ch:vspace"/></docref>
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</description>
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<error name="seL4_IllegalOperation">
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<description>
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The <texttt text="_service"/> is a CPtr to a capability of the wrong type.
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</description>
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</error>
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<error name="seL4_InvalidCapability">
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<description>
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The <texttt text="_service"/> is a CPtr to a capability of the wrong type.
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</description>
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</error>
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<error name="seL4_RevokeFirst">
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<description>
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A copy of the <texttt text="_service"/> capability exists.
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</description>
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</error>
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</method>
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</interface>
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<interface name="seL4_X86_VCPU" manual_name="VCPU" cap_description='VCPU object to operate on'>
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<method id="X86VCPUReadMSR" name="ReadMSR" manual_name="Read MSR">
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<condition><config var="CONFIG_X86_64_VTX_64BIT_GUESTS"/></condition>
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<brief>
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Read 64-bit specific MSR field from the hardware
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</brief>
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<description>
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Thin wrapper around the <texttt text='rdmsr'/> instruction that is performed on
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specific, needed registers. Certain registers might simply be cached and restored
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later.
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</description>
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<return>
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A <texttt text='seL4_X86_VCPU_ReadMSR_t'/> struct that contains a
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<texttt text='seL4_Word value'/>, which holds the return result of the
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<texttt text='rdmsr'/> instruction, and <texttt text='int error'/>.
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<docref>See <autoref label='sec:errors'/> for a description
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of the message register and tag contents upon error.</docref>
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</return>
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<param dir="in" name="field" type="seL4_Word"
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description='Field to give to `rdmsr` instruction'/>
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<param dir="out" name="value" type="seL4_Word"
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description='Value returned by `rdmsr` instruction'/>
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</method>
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<method id="X86VCPUWriteMSR" name="WriteMSR" manual_name="Write MSR">
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<condition><config var="CONFIG_X86_64_VTX_64BIT_GUESTS"/></condition>
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<brief>
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Write 64-bit specific MSR field to the hardware
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</brief>
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<description>
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Thin wrapper around the <texttt text='wrmsr'/> instruction that is performed on
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specific, needed registers. As well as validating that
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a legal field is requested, the value may be modified to ensure any
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bits that are fixed in the hardware are correct, and that any features
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required for kernel correctness are not disabled <docref>(see <autoref label='sec:virt'/>)</docref>.
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The final value written to the hardware is returned and can be compared
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to the input parameter to determine what bits the kernel changed.
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</description>
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<return>
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A <texttt text='seL4_X86_VCPU_WriteMSR_t'/> struct that contains a
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<texttt text='seL4_Word writen'/>, which holds the final value written with the <texttt text='wrmsr'/> instruction,
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and <texttt text='int error'/>. <docref>See <autoref label='sec:errors'/> for a description
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of the message register and tag contents upon error.</docref>
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</return>
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<param dir="in" name="field" type="seL4_Word"
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description='Field to give to `wrsmr` instruction'/>
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<param dir="in" name="value" type="seL4_Word"
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description='Value to write using `wrsmr` instruction'/>
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<param dir="out" name="written" type="seL4_Word"
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description='Final value written using `wrsmr` after kernel validation'/>
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</method>
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</interface>
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</api>
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