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seL4/.gitignore
Hesham Almatary 83ba084713 [SELFOUR-1156] RISC-V Port
Experimental release that supports both RV32 and RV64
2018-04-18 10:10:14 +10:00

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#
# Copyright 2014, General Dynamics C4 Systems
#
# This software may be distributed and modified according to the terms of
# the GNU General Public License version 2. Note that NO WARRANTY is provided.
# See "LICENSE_GPLv2.txt" for details.
#
# @TAG(GD_GPL)
#
# generated python bytecode
**.pyc
# latex generated files
**.aux
**.log
**.out
**.lof
**.lot
**.bbl
**.blg
**.toc
**.mpx
tools/parsetab.py
manual/env.tex
manual/manual.pdf
manual/stage
manual/doxygen-output
manual/generated
# Generated headers
libsel4/arch_include/arm/sel4/arch/invocation.h
libsel4/arch_include/ia32/sel4/arch/invocation.h
libsel4/arch_include/riscv/sel4/arch/invocation.h
libsel4/arch_include/x86/sel4/arch/invocation.h
libsel4/sel4_arch_include/aarch32/sel4/sel4_arch/invocation.h
libsel4/sel4_arch_include/aarch64/sel4/sel4_arch/invocation.h
libsel4/sel4_arch_include/ia32/sel4/sel4_arch/invocation.h
libsel4/sel4_arch_include/x86_64/sel4/sel4_arch/invocation.h
libsel4/sel4_arch_include/riscv32/sel4/sel4_arch/invocation.h
libsel4/sel4_arch_include/riscv64/sel4/sel4_arch/invocation.h
# Emacs backups
*~