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4b491dcf0c
Provides a configuration option for enabling HDCR.TD* traps, or saving and loading debug state on VCPU switches. Currently verification only plans to support the trap setting. As this option complicates all of the #ifdef's related to debug registers even further, abstractions for enabling/disabling each individual piece of the debug code for different configuration options are also implemented. Part of these refactored #ifdef guards was to remove the guards completely from libsel4 around the definitions of the number of breakpoints and watchpoints.
715 lines
22 KiB
Plaintext
715 lines
22 KiB
Plaintext
#
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# Copyright 2014, General Dynamics C4 Systems
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#
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# This software may be distributed and modified according to the terms of
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# the GNU General Public License version 2. Note that NO WARRANTY is provided.
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# See "LICENSE_GPLv2.txt" for details.
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#
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# @TAG(GD_GPL)
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#
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config KERNEL_PATH
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string
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option env="KERNEL_ROOT_PATH"
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config ARCH_ARM_V6
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bool
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default n
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config ARCH_ARM_V7A
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bool
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default n
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config ARCH_ARM_V8A
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bool
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default n
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config HAVE_FPU
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bool
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default n
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config KERNEL_MASTER
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bool
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default y
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# Native word size of the current platform. This is primarily intended for use
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# in code generators that need to know, at generation-time, the word size of
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# the target platform.
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config WORD_SIZE
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int
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default 32 if ARCH_IA32 || ARCH_AARCH32
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default 64 if ARCH_X86_64 || ARCH_AARCH64
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menu "seL4 System"
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choice
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prompt "Architecture Type"
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default ARCH_X86
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help
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Select the architecture seL4 will be running on.
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config ARCH_X86
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select HAVE_FPU
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bool "x86"
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config ARCH_ARM
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bool "ARM"
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endchoice
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config ARCH_X86_64
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bool "64-bit kernel"
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default n
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depends on ARCH_X86
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config ARCH_AARCH64
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bool "64-bit kernel"
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default n
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depends on ARCH_ARM
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config ARCH_IA32
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bool
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default y if !ARCH_X86_64 && ARCH_X86
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config ARCH_AARCH32
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bool
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default y if !ARCH_AARCH64 && ARCH_ARM
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# CPU values.
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config ARM1136JF_S
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bool
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default n
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config ARM_CORTEX_A7
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bool
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default n
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config ARM_CORTEX_A8
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bool
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default n
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config ARM_CORTEX_A9
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bool
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default n
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config ARM_CORTEX_A15
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bool
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default n
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config ARM_CORTEX_A53
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bool
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default n
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config ARM_CORTEX_A57
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bool
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default n
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config PLAT_EXYNOS54XX
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bool
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default n
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help
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Common flag for Exynos 5410 and 5422
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config PLAT_IMX6
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bool
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default n
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help
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Common flag for Sabre Lite and Wandboard Quad
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config PLAT_IMX7
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bool
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default n
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help
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Common flag for iMX7 SoC
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choice
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prompt "Platform Type"
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help
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Select the platform for the architecture
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config PLAT_KZM
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bool "KZM iMX.31 (ARMv6, ARM1136JF-S)"
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depends on ARCH_AARCH32
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select ARM1136JF_S
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select ARCH_ARM_V6
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help
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Support for the KZM platform
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config PLAT_OMAP3
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bool "OMAP3 (BeagleBoard, ARMv7a, Cortex A8)"
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depends on ARCH_AARCH32
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select ARM_CORTEX_A8
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select ARCH_ARM_V7A
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help
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Support for platforms based on OMAP3 SoCs.
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config PLAT_AM335X
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bool "AM335X (BeagleBone, ARMv7a, Cortex A8)"
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depends on ARCH_AARCH32
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select ARM_CORTEX_A8
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select ARCH_ARM_V7A
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help
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Support for AM335x platform (BeagleBone).
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config PLAT_EXYNOS4
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bool "EXYNOS4 (ODROID-X, ARMv7a, Cortex A9)"
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depends on ARCH_AARCH32
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select ARM_CORTEX_A9
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select ARCH_ARM_V7A
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help
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Support for EXYNOS4 platform (ODROID-X).
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config PLAT_EXYNOS5410
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bool "EXYNOS5410 (ODROID-XU, ARMv7a, Cortex A15)"
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depends on ARCH_AARCH32
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select PLAT_EXYNOS54XX
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select ARM_CORTEX_A15
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select ARCH_ARM_V7A
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help
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Support for EXYNOS5410 platform (ODROID-XU).
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config PLAT_EXYNOS5422
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bool "EXYNOS5422 (ODROID-XU3, ARMv7a, Cortex A15)"
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depends on ARCH_AARCH32
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select PLAT_EXYNOS54XX
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select ARM_CORTEX_A15
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select ARCH_ARM_V7A
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help
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Support for EXYNOS5422 platform (ODROID-XU3).
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config PLAT_EXYNOS5250
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bool "EXYNOS5250 (ARNDALE, ARMv7a, Cortex A15)"
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depends on ARCH_AARCH32
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select ARM_CORTEX_A15
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select ARCH_ARM_V7A
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help
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Support for EXYNOS5250 platform (ARNDALE).
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config PLAT_APQ8064
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bool "Qualcomm Snapdrogon S4 APQ8064 (Inforce IFC6410, ARMv7a, Cortex A15)"
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depends on ARCH_AARCH32
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select ARM_CORTEX_A15
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select ARCH_ARM_V7A
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help
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Support for Qualcomm Snapdragon S4 APQ8064 platforms (Inforce IFC6410).
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config PLAT_SABRE
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bool "iMX6 (Sabre Lite, ARMv7a, Cortex A9)"
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depends on ARCH_AARCH32
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select ARM_CORTEX_A9
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select ARCH_ARM_V7A
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select PLAT_IMX6
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help
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Support for iMX6 platform (Sabre Lite).
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config PLAT_WANDQ
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bool "iMX6 (Wandboard Quad, ARMv7a, Cortex A9)"
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depends on ARCH_AARCH32
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select ARM_CORTEX_A9
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select ARCH_ARM_V7A
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select PLAT_IMX6
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help
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Support for iMX6 platform (Wandboard Quad).
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config PLAT_IMX7_SABRE
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bool "iMX7 (Sabre, ARMv7a, Cortex A7)"
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depends on ARCH_AARCH32
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select ARM_CORTEX_A7
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select ARCH_ARM_V7A
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select PLAT_IMX7
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help
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Support for iMX7 Sabre Dual.
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config PLAT_ZYNQ7000
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bool "Zynq-7000 (Xilinx ZC706, ARMv7a, Cortex A9)"
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depends on ARCH_AARCH32
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select ARM_CORTEX_A9
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select ARCH_ARM_V7A
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help
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Support for Xilinx Zynq-7000 platforms.
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config PLAT_PC99
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bool "PC99"
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depends on ARCH_X86
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help
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Support for PC99 based platform
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config PLAT_ALLWINNERA20
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bool "ALLWINNERA20 (CUBIETRUCK, ARMv7a, Cortex A15)"
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depends on ARCH_AARCH32
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select ARM_CORTEX_A15
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select ARCH_ARM_V7A
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help
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Support for ALLWINNERA20 platform (CUBIETRUCK).
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config PLAT_TK1
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bool "Jetson (Tegra K1, ARMv7a, Cortex A15)"
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depends on ARCH_AARCH32
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select ARM_CORTEX_A15
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select ARCH_ARM_V7A
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help
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Support for Tegra K1 platform
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config PLAT_HIKEY
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bool "HiKey (Hi6220, ARMv8a, Cortex A53)"
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depends on ARCH_ARM
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select ARM_CORTEX_A53
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select ARCH_ARM_V8A
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select HAVE_FPU if ARCH_AARCH64
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help
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Support for HiKey platform.
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config PLAT_BCM2837
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bool "Raspberry Pi 3 (BCM2837, ARMv8a, Cortex A53)"
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depends on ARCH_AARCH32
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select ARM_CORTEX_A53
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select ARCH_ARM_V8A
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help
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Support for Raspberry PI 3 platform.
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config PLAT_TX1
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bool "Jetson (Tegra X1, ARMv8a, Cortex A57)"
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depends on ARCH_AARCH64
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select ARM_CORTEX_A57
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select ARCH_ARM_V8A
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select HAVE_FPU
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help
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Support for Tegra X1 platform
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endchoice
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config ARM_HYPERVISOR_SUPPORT
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bool "Build as Hypervisor"
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depends on ARM_CORTEX_A15
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default n
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help
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Utilise ARM virtualisation extensions to build the kernel as a hypervisor
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config ARM_SMMU
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bool "Enable SystemMMU for Tegra K1 SoC"
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depends on PLAT_TK1
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default n
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help
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Support for TK1 SoC-specific SystemMMU
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source "$KERNEL_PATH/src/arch/arm/Kconfig"
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source "$KERNEL_PATH/src/plat/pc99/Kconfig"
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endmenu
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menu "seL4 System Parameters"
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config ROOT_CNODE_SIZE_BITS
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range 4 27
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int "Root CNode Size (2^n slots)"
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default 12
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help
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The acceptable range is 4-27, based on the kernel-supplied caps.
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The root CNode needs at least enough space to contain up to
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BI_CAP_DYN_START. Note that in practice your root CNode will need
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to be several bits larger than 4 to fit untyped caps and
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cannot be 27 bits as it won't fit in memory.
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config TIMER_TICK_MS
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int "Timer tick period in milliseconds"
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default 2
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help
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The number of milliseconds between timer ticks.
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config TIME_SLICE
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int "Time slice"
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default 5
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help
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Number of timer ticks until a thread is preempted.
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config RETYPE_FAN_OUT_LIMIT
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int "Retype fan out limit"
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default 256
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help
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Maximum number of objects that can be created in a single Retype()
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invocation.
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config MAX_NUM_WORK_UNITS_PER_PREEMPTION
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int "Max work units per preemption"
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default 100
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help
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Maximum number of work units (delete/revoke iterations) until
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the kernel checks for pending interrupts (and preempts the
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currently running syscall if interrupts are pending).
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config MAX_NUM_BOOTINFO_UNTYPED_CAPS
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int "Max number of bootinfo untyped caps"
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default 167
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config MAX_RMRR_ENTRIES
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int "Max number of RMRR entries to support finding in ACPI"
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depends on IOMMU
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default 32
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help
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Sets the maximum number of Reserved Memory Region Reporting
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structures we support recording from the ACPI tables
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config FASTPATH
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bool "Enable fastpath"
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default y
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help
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Enable IPC fastpath
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config NUM_DOMAINS
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int "Number of domains"
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default 1
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help
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The number of scheduler domains in the system
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config DOMAIN_SCHEDULE
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string "Domain schedule"
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help
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A C file providing the symbols ksDomSchedule and
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ksDomScheduleLength to be linked with the kernel as a scheduling
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configuration.
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config NUM_PRIORITIES
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int "Number of priority levels"
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default 256
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range 1 256
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help
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The number of priority levels per domain
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config MAX_NUM_NODES
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int "Max number of CPU nodes"
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depends on NUM_DOMAINS = 1
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range 1 256
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default 1
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help
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The number of CPU cores to boot
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config CACHE_LN_SZ
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int "Cache line size"
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depends on ARCH_X86
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default 64
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help
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Define cache line size for the current architecture
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config KERNEL_STACK_BITS
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int "Kernel stack size bits"
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default 12
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help
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This describes the log2 size of the kernel stack. Great care should
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be taken as there is no guard below the stack so setting this too
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small will cause random memory corruption
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config FPU_MAX_RESTORES_SINCE_SWITCH
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int "Max thread restores without switching FPU"
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depends on HAVE_FPU
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default 64
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help
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This option is a heuristic to attempt to detect when the FPU is no
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longer in use, allowing the kernel to save the FPU state out so that
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the FPU does not have to be enabled/disabled every thread swith. Every
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time we restore a thread and there is active FPU state, we increment
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this setting and if it exceeds this threshold we switch to the NULL
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state.
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endmenu
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menu "Build Options"
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config VERIFICATION_BUILD
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bool "Disable verification unfriendly features"
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default n
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help
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When enabled this configuration option prevents the usage of any other options that
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would compromise the verification story of the kernel. Enabling this option does NOT
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imply you are using a verified kernel.
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config DEBUG_BUILD
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bool "Enable debug facilities"
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depends on !VERIFICATION_BUILD
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default y
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help
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Enable debug facilities (symbols and assertions) in the kernel
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config PRINTING
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bool "Enable kernel printing"
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depends on !VERIFICATION_BUILD
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default y if DEBUG_BUILD
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help
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Allow the kernel to print out messages to the serial console during bootup and execution.
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config HARDWARE_DEBUG_API
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bool "Enable hardware breakpoint and single-stepping API"
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depends on !VERIFICATION_BUILD
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default n
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help
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Builds the kernel with support for a userspace debug API, which can
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allows userspace processes to set breakpoints, watchpoints and to
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single-step through thread execution.
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config ARM_HYP_ENABLE_VCPU_CP14_SAVE_AND_RESTORE
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bool "Trap, but don't save/restore VCPUs' CP14 accesses"
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depends on ARM_HYPERVISOR_SUPPORT && !VERIFICATION_BUILD
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default y
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help
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This allows us to turn off the save and restore of VCPU threads' CP14
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context for performance (or other) reasons, we can just turn them off
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and trap them instead, and have the VCPUs' accesses to CP14
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intercepted and delivered to the VM Monitor as fault messages.
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config IRQ_REPORTING
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bool "Report spurious or undelivered IRQs"
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depends on PRINTING
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default y
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help
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seL4 does not properly check for and handle spurious interrupts
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This can result in unnecessary output from the kernel during
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debug builds. If you are CERTAIN these messages are benign
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then use this config to turn them off
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config COLOUR_PRINTING
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bool "Print error messages in colour"
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depends on PRINTING
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default y
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help
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In debug mode, seL4 prints diagnostic messages to its serial output
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describing, e.g., the cause of system call errors. This setting
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determines whether ANSI escape codes are applied to colour code
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these error messages. You may wish to disable this setting if your
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serial output is redirected to a file or pipe.
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config USER_STACK_TRACE_LENGTH
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int "Stack trace length"
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depends on PRINTING
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default 16
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help
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On a double fault the kernel can try and print out the users stack
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to aid debugging. This option determines how many words of stack
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should be printed
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choice
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prompt "Compiler optimisation flag"
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default OPTIMISATION_O2
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help
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Select the compiler optimisation level
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config OPTIMISATION_Os
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bool "-Os"
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help
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Compiler optimisations tuned for size
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config OPTIMISATION_O0
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bool "-O0"
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help
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No optimisation
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config OPTIMISATION_O1
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bool "-O1"
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help
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Basic compiler optimisations
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config OPTIMISATION_O2
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bool "-O2"
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help
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Aggressive compiler optimisations
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config OPTIMISATION_O3
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bool "-O3"
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help
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Enable all optimisations (may increase code size)
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endchoice
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config DANGEROUS_CODE_INJECTION
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bool "Build kernel with support for executing arbitrary code in protected mode"
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depends on !ARM_HYPERVISOR_SUPPORT && !VERIFICATION_BUILD
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default n
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help
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Adds a system call that allows users to specify code to be run in kernel
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mode. Useful for profiling.
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config DANGEROUS_CODE_INJECTION_ON_UNDEF_INSTR
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bool "Make undefined instructions execute code in protected mode"
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depends on ARCH_ARM_V6 && !VERIFICATION_BUILD
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default n
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help
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Replaces the undefined instruction handler with a call to a function
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pointer in r8. This is an alternative mechanism to the code
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injection syscall. On ARMv6 the syscall interferes with the caches
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and branch predictor in such a way that it is unsuitable for
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benchmarking. This option has no effect on non-ARMv6 platforms.
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config DEBUG_DISABLE_L2_CACHE
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bool "Disable L2 cache"
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depends on ARCH_ARM
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default n
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help
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Do not enable the L2 cache on startup for debugging purposes.
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config DEBUG_DISABLE_L1_ICACHE
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bool "Disable L1 instruction cache"
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depends on ARCH_ARM && DEBUG_DISABLE_L2_CACHE
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default n
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help
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Do not enable the L1 instruction cache on startup for debugging purposes.
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config DEBUG_DISABLE_L1_DCACHE
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bool "Disable L1 data cache"
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depends on ARCH_ARM && DEBUG_DISABLE_L2_CACHE
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default n
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help
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Do not enable the L1 data cache on startup for debugging purposes.
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config DEBUG_DISABLE_BRANCH_PREDICTION
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bool "Disable branch prediction"
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depends on ARCH_ARM
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default n
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help
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Do not enable branch prediction (also called program flow control)
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on startup. This makes execution time more deterministic at the
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expense of dramatically decreasing performance. Primary use is for
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debugging.
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config DEBUG_DISABLE_PREFETCHERS
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bool "Disable prefetchers"
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depends on ARCH_X86 || PLAT_HIKEY
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default n
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help
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On ia32 platforms, this option disables the L2 hardware prefetcher, the L2
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adjacent cache line prefetcher, the DCU prefetcher and the DCU IP prefetcher.
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On the cortex a53 this disables the L1 Data prefetcher.
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config ARM_HIKEY_OUTSTANDING_PREFETCHERS
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int "Number of outstanding prefetch allowed"
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default 5
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range 1 7
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depends on PLAT_HIKEY && !DEBUG_DISABLE_PREFETCHERS
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help
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|
Cortex A53 has an L1 Data prefetcher. This config options allows
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the number of outstanding prefetcher to be set from a number from
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1 to 7. Note that a setting of 7 maps to 8 and 5 is the reset value.
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config ARM_HIKEY_PREFETCHER_STRIDE
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int "Number of strides before prefetcher is triggered"
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default 2
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range 2 3
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depends on PLAT_HIKEY && !DEBUG_DISABLE_PREFETCHERS
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help
|
|
Number of strides before prefetcher is triggered.
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Allowed values are 2 and 3. 2 is the reset value
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config ARM_HIKEY_PREFETCHER_NPFSTRM
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int "Number of indepedent prefetch streams"
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default 2
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range 1 4
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depends on PLAT_HIKEY && !DEBUG_DISABLE_PREFETCHERS
|
|
help
|
|
Number of indepedent prefetch streams. Allowed values are 1 to 4.
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|
2 is the reset value
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|
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config ARM_HIKEY_PREFETCHER_STBPFDIS
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bool "Enable prefetch streams initated by STB access"
|
|
default y
|
|
depends on PLAT_HIKEY && !DEBUG_DISABLE_PREFETCHERS
|
|
help
|
|
Enable prefetch streams initated by STB access. Enabled is the reset value
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|
|
|
config ARM_HIKEY_PREFETCHER_STBPFRS
|
|
bool "Prefetcher to initated on a ReadUnique or ReadShared"
|
|
default n
|
|
depends on PLAT_HIKEY && !DEBUG_DISABLE_PREFETCHERS
|
|
help
|
|
Sets prefetcher to initated on a ReadUnique (n) or ReadShared (y)
|
|
ReadUnique is the reset value
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|
|
|
config ENABLE_BENCHMARKS
|
|
bool
|
|
default n
|
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|
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config ARM_ENABLE_PMU_OVERFLOW_INTERRUPT
|
|
bool
|
|
depends on BENCHMARK_TRACK_UTILISATION && ARCH_ARM
|
|
default y
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|
|
|
config BENCHMARK_USE_KERNEL_LOG_BUFFER
|
|
bool
|
|
depends on BENCHMARK_TRACK_KERNEL_ENTRIES || BENCHMARK_TRACEPOINTS
|
|
default y
|
|
|
|
choice
|
|
prompt "Enable benchmarks"
|
|
depends on !VERIFICATION_BUILD
|
|
default NO_BENCHMARKS
|
|
help
|
|
Enable benchamrks including logging and tracing info.
|
|
Setting this value > 1 enables a 1MB log buffer and functions for extracting data from it
|
|
at user level.
|
|
NOTE this is only tested on the sabre and will not work on platforms with < 512mb memory.
|
|
This is not fully implemented for x86.
|
|
|
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|
|
config NO_BENCHMARKS
|
|
bool "No benchmarking features enabled"
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|
|
|
config BENCHMARK_GENERIC
|
|
bool "Enable generic benchmarks"
|
|
select ENABLE_BENCHMARKS
|
|
help
|
|
Enable global benchmarks config variable with no specific features
|
|
|
|
config BENCHMARK_TRACK_KERNEL_ENTRIES
|
|
bool "Keep track of kernel entries"
|
|
select ENABLE_BENCHMARKS
|
|
help
|
|
Log kernel entries information including timing, number of invocations and arguments for
|
|
system calls, interrupts, user faults and VM faults.
|
|
|
|
config BENCHMARK_TRACEPOINTS
|
|
bool "Use trace points"
|
|
select ENABLE_BENCHMARKS
|
|
help
|
|
Enable manually inserted tracepoints that the kernel will track time consumed between.
|
|
|
|
config BENCHMARK_TRACK_UTILISATION
|
|
bool "Track threads and kernel utilisation time"
|
|
select ENABLE_BENCHMARKS
|
|
help
|
|
Enable the kernel to track each thread's utilisation time.
|
|
|
|
endchoice
|
|
|
|
config MAX_NUM_TRACE_POINTS
|
|
int "Maximum number of tracepoints"
|
|
depends on BENCHMARK_TRACEPOINTS
|
|
default 1
|
|
help
|
|
Use TRACE_POINT_START(k) and TRACE_POINT_STOP(k) macros for recording data,
|
|
where k is an integer between 0 and this value - 1.
|
|
The maximum number of different trace point identifiers which can be used.
|
|
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|
|
|
endmenu
|
|
|
|
menu "Errata"
|
|
|
|
config ARM_ERRATA_430973
|
|
bool "Enable workaround for 430973 Cortex-A8 (r1p0..r1p2) erratum"
|
|
depends on ARCH_ARM
|
|
depends on ARM_CORTEX_A8
|
|
default n
|
|
help
|
|
Enables a workaround for the 430973 Cortex-A8 (r1p0..r1p2) erratum. Error occurs
|
|
if code containing ARM/Thumb interworking branch is replaced by different code
|
|
at the same virtual address.
|
|
|
|
config ARM_ERRATA_773022
|
|
bool "Enable workaround for 773022 Cortex-A15 (r0p0..r0p4) erratum"
|
|
depends on ARCH_ARM
|
|
depends on ARM_CORTEX_A15
|
|
default y
|
|
help
|
|
Enables a workaround for the 773022 Cortex-A15 (r0p0..r0p4) erratum. Error occurs
|
|
on rare sequences of instructions and results in the loop buffer delivering
|
|
incorrect instructions. The work around is to disable the loop buffer
|
|
|
|
endmenu
|