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https://github.com/seL4/seL4.git
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f16411a518
These files are derived from the output of the device tree compiler in the Linux kernel. The licenses of the input files do all have to be compatible with at least GPL-2.0-only to be part of Linux.
3138 lines
73 KiB
Plaintext
3138 lines
73 KiB
Plaintext
/*
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* Copyright Linux Kernel Team
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*
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* SPDX-License-Identifier: GPL-2.0-only
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*
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* This file is derived from an intermediate build stage of the
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* Linux kernel. The licenses of all input files to this process
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* are compatible with GPL-2.0-only.
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*/
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/dts-v1/;
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/ {
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interrupt-parent = < 0x01 >;
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#address-cells = < 0x01 >;
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#size-cells = < 0x01 >;
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compatible = "hardkernel,odroid-x\0samsung,exynos4412\0samsung,exynos4";
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model = "Hardkernel ODROID-X board based on Exynos4412";
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aliases {
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spi0 = "/soc/spi@13920000";
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spi1 = "/soc/spi@13930000";
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spi2 = "/soc/spi@13940000";
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i2c0 = "/soc/i2c@13860000";
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i2c1 = "/soc/i2c@13870000";
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i2c2 = "/soc/i2c@13880000";
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i2c3 = "/soc/i2c@13890000";
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i2c4 = "/soc/i2c@138a0000";
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i2c5 = "/soc/i2c@138b0000";
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i2c6 = "/soc/i2c@138c0000";
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i2c7 = "/soc/i2c@138d0000";
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i2c8 = "/soc/i2c@138e0000";
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csis0 = "/soc/camera/csis@11880000";
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csis1 = "/soc/camera/csis@11890000";
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fimc0 = "/soc/camera/fimc@11800000";
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fimc1 = "/soc/camera/fimc@11810000";
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fimc2 = "/soc/camera/fimc@11820000";
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fimc3 = "/soc/camera/fimc@11830000";
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serial0 = "/soc/serial@13800000";
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serial1 = "/soc/serial@13810000";
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serial2 = "/soc/serial@13820000";
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serial3 = "/soc/serial@13830000";
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pinctrl0 = "/soc/pinctrl@11400000";
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pinctrl1 = "/soc/pinctrl@11000000";
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pinctrl2 = "/soc/pinctrl@3860000";
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pinctrl3 = "/soc/pinctrl@106e0000";
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fimc-lite0 = "/soc/camera/fimc-lite@12390000";
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fimc-lite1 = "/soc/camera/fimc-lite@123a0000";
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mshc0 = "/soc/mmc@12550000";
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};
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soc {
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compatible = "simple-bus";
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#address-cells = < 0x01 >;
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#size-cells = < 0x01 >;
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ranges;
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clock-controller@3810000 {
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compatible = "samsung,exynos4210-audss-clock";
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reg = < 0x3810000 0x0c >;
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#clock-cells = < 0x01 >;
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clocks = < 0x02 0x03 0x02 0x06 0x02 0x90 0x02 0x90 >;
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clock-names = "pll_ref\0pll_in\0sclk_audio\0sclk_pcm_in";
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assigned-clocks = < 0x03 0x00 0x03 0x01 0x03 0x02 0x03 0x03 0x03 0x04 >;
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assigned-clock-parents = < 0x02 0x06 0x03 0x00 >;
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assigned-clock-rates = < 0x00 0x00 0xbb80001 0x5dc0000 0x1770000 >;
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phandle = < 0x03 >;
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};
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i2s@3830000 {
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compatible = "samsung,s5pv210-i2s";
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reg = < 0x3830000 0x100 >;
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clocks = < 0x03 0x06 0x03 0x03 0x03 0x07 >;
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clock-names = "iis\0i2s_opclk0\0i2s_opclk1";
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#clock-cells = < 0x01 >;
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clock-output-names = "i2s_cdclk0";
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dmas = < 0x04 0x0c 0x04 0x0b 0x04 0x0a >;
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dma-names = "tx\0rx\0tx-sec";
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samsung,idma-addr = < 0x3000000 >;
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#sound-dai-cells = < 0x01 >;
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status = "okay";
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pinctrl-0 = < 0x05 >;
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pinctrl-names = "default";
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assigned-clocks = < 0x06 0x01 >;
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assigned-clock-parents = < 0x03 0x07 >;
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phandle = < 0x06 >;
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};
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chipid@10000000 {
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compatible = "samsung,exynos4210-chipid";
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reg = < 0x10000000 0x100 >;
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};
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snoop-control-unit@10500000 {
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compatible = "arm,cortex-a9-scu";
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reg = < 0x10500000 0x2000 >;
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};
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memory-controller@12570000 {
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compatible = "samsung,exynos4210-srom";
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reg = < 0x12570000 0x14 >;
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};
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video-phy {
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compatible = "samsung,s5pv210-mipi-video-phy";
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#phy-cells = < 0x01 >;
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syscon = < 0x07 >;
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phandle = < 0x0a >;
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};
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mfc-power-domain@10023c40 {
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compatible = "samsung,exynos4210-pd";
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reg = < 0x10023c40 0x20 >;
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#power-domain-cells = < 0x00 >;
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label = "MFC";
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phandle = < 0x25 >;
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};
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g3d-power-domain@10023c60 {
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compatible = "samsung,exynos4210-pd";
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reg = < 0x10023c60 0x20 >;
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#power-domain-cells = < 0x00 >;
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label = "G3D";
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};
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lcd0-power-domain@10023c80 {
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compatible = "samsung,exynos4210-pd";
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reg = < 0x10023c80 0x20 >;
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#power-domain-cells = < 0x00 >;
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label = "LCD0";
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phandle = < 0x08 >;
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};
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tv-power-domain@10023c20 {
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compatible = "samsung,exynos4210-pd";
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reg = < 0x10023c20 0x20 >;
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#power-domain-cells = < 0x00 >;
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power-domains = < 0x08 >;
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label = "TV";
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phandle = < 0x3d >;
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};
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cam-power-domain@10023c00 {
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compatible = "samsung,exynos4210-pd";
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reg = < 0x10023c00 0x20 >;
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#power-domain-cells = < 0x00 >;
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label = "CAM";
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phandle = < 0x0b >;
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};
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gps-power-domain@10023ce0 {
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compatible = "samsung,exynos4210-pd";
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reg = < 0x10023ce0 0x20 >;
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#power-domain-cells = < 0x00 >;
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label = "GPS";
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};
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gps-alive-power-domain@10023d00 {
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compatible = "samsung,exynos4210-pd";
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reg = < 0x10023d00 0x20 >;
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#power-domain-cells = < 0x00 >;
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label = "GPS alive";
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};
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interrupt-controller@10490000 {
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compatible = "arm,cortex-a9-gic";
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#interrupt-cells = < 0x03 >;
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interrupt-controller;
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reg = < 0x10490000 0x10000 0x10480000 0x10000 >;
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cpu-offset = < 0x4000 >;
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phandle = < 0x01 >;
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};
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interrupt-controller@10440000 {
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compatible = "samsung,exynos4210-combiner";
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#interrupt-cells = < 0x02 >;
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interrupt-controller;
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reg = < 0x10440000 0x1000 >;
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samsung,combiner-nr = < 0x14 >;
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interrupts = < 0x00 0x00 0x04 0x00 0x01 0x04 0x00 0x02 0x04 0x00 0x03 0x04 0x00 0x04 0x04 0x00 0x05 0x04 0x00 0x06 0x04 0x00 0x07 0x04 0x00 0x08 0x04 0x00 0x09 0x04 0x00 0x0a 0x04 0x00 0x0b 0x04 0x00 0x0c 0x04 0x00 0x0d 0x04 0x00 0x0e 0x04 0x00 0x0f 0x04 0x00 0x6b 0x04 0x00 0x6c 0x04 0x00 0x30 0x04 0x00 0x2a 0x04 >;
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phandle = < 0x09 >;
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};
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pmu {
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compatible = "arm,cortex-a9-pmu";
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interrupt-parent = < 0x09 >;
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interrupts = < 0x02 0x02 0x03 0x02 0x12 0x02 0x13 0x02 >;
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};
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syscon@10010000 {
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compatible = "samsung,exynos4-sysreg\0syscon";
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reg = < 0x10010000 0x400 >;
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phandle = < 0x0c >;
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};
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system-controller@10020000 {
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compatible = "samsung,exynos4412-pmu\0syscon";
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reg = < 0x10020000 0x4000 >;
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interrupt-controller;
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#interrupt-cells = < 0x03 >;
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interrupt-parent = < 0x01 >;
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clock-names = "clkout0\0clkout1\0clkout2\0clkout3\0clkout4\0clkout8\0clkout9";
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clocks = < 0x02 0x17 0x02 0x18 0x02 0x19 0x02 0x1a 0x02 0x1b 0x02 0x01 0x02 0x02 >;
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#clock-cells = < 0x01 >;
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phandle = < 0x07 >;
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syscon-poweroff {
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compatible = "syscon-poweroff";
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regmap = < 0x07 >;
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offset = < 0x330c >;
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mask = < 0x5200 >;
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};
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syscon-reboot {
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compatible = "syscon-reboot";
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regmap = < 0x07 >;
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offset = < 0x400 >;
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mask = < 0x01 >;
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};
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};
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dsi@11c80000 {
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compatible = "samsung,exynos4210-mipi-dsi";
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reg = < 0x11c80000 0x10000 >;
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interrupts = < 0x00 0x4f 0x04 >;
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power-domains = < 0x08 >;
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phys = < 0x0a 0x01 >;
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phy-names = "dsim";
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clocks = < 0x02 0x11e 0x02 0x8f >;
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clock-names = "bus_clk\0sclk_mipi";
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status = "disabled";
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#address-cells = < 0x01 >;
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#size-cells = < 0x00 >;
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};
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camera {
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compatible = "samsung,fimc\0simple-bus";
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status = "okay";
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#address-cells = < 0x01 >;
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#size-cells = < 0x01 >;
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#clock-cells = < 0x01 >;
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clock-output-names = "cam_a_clkout\0cam_b_clkout";
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ranges;
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clocks = < 0x02 0x84 0x02 0x85 0x02 0x15f 0x02 0x160 >;
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clock-names = "sclk_cam0\0sclk_cam1\0pxl_async0\0pxl_async1";
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pinctrl-names = "default";
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pinctrl-0;
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fimc@11800000 {
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compatible = "samsung,exynos4212-fimc";
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reg = < 0x11800000 0x1000 >;
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interrupts = < 0x00 0x54 0x04 >;
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clocks = < 0x02 0x100 0x02 0x80 >;
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clock-names = "fimc\0sclk_fimc";
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power-domains = < 0x0b >;
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samsung,sysreg = < 0x0c >;
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iommus = < 0x0d >;
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status = "okay";
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samsung,pix-limits = < 0x1080 0x2000 0x780 0x1080 >;
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samsung,mainscaler-ext;
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samsung,isp-wb;
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samsung,cam-if;
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assigned-clocks = < 0x02 0x180 0x02 0x80 >;
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assigned-clock-parents = < 0x02 0x11 >;
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assigned-clock-rates = < 0x00 0xa7d8c00 >;
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};
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fimc@11810000 {
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compatible = "samsung,exynos4212-fimc";
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reg = < 0x11810000 0x1000 >;
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interrupts = < 0x00 0x55 0x04 >;
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clocks = < 0x02 0x101 0x02 0x81 >;
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clock-names = "fimc\0sclk_fimc";
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power-domains = < 0x0b >;
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samsung,sysreg = < 0x0c >;
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iommus = < 0x0e >;
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status = "okay";
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samsung,pix-limits = < 0x1080 0x2000 0x780 0x1080 >;
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samsung,mainscaler-ext;
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samsung,isp-wb;
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samsung,cam-if;
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assigned-clocks = < 0x02 0x181 0x02 0x81 >;
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assigned-clock-parents = < 0x02 0x11 >;
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assigned-clock-rates = < 0x00 0xa7d8c00 >;
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};
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fimc@11820000 {
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compatible = "samsung,exynos4212-fimc";
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reg = < 0x11820000 0x1000 >;
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interrupts = < 0x00 0x56 0x04 >;
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clocks = < 0x02 0x102 0x02 0x82 >;
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clock-names = "fimc\0sclk_fimc";
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power-domains = < 0x0b >;
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samsung,sysreg = < 0x0c >;
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iommus = < 0x0f >;
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status = "okay";
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samsung,pix-limits = < 0x1080 0x2000 0x780 0x1080 >;
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samsung,mainscaler-ext;
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samsung,isp-wb;
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samsung,lcd-wb;
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samsung,cam-if;
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assigned-clocks = < 0x02 0x182 0x02 0x82 >;
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assigned-clock-parents = < 0x02 0x11 >;
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assigned-clock-rates = < 0x00 0xa7d8c00 >;
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};
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fimc@11830000 {
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compatible = "samsung,exynos4212-fimc";
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reg = < 0x11830000 0x1000 >;
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interrupts = < 0x00 0x57 0x04 >;
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clocks = < 0x02 0x103 0x02 0x83 >;
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clock-names = "fimc\0sclk_fimc";
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power-domains = < 0x0b >;
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samsung,sysreg = < 0x0c >;
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iommus = < 0x10 >;
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status = "okay";
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samsung,pix-limits = < 0x780 0x2000 0x556 0x780 >;
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samsung,rotators = < 0x00 >;
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samsung,mainscaler-ext;
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samsung,isp-wb;
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samsung,lcd-wb;
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assigned-clocks = < 0x02 0x183 0x02 0x83 >;
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assigned-clock-parents = < 0x02 0x11 >;
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assigned-clock-rates = < 0x00 0xa7d8c00 >;
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};
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csis@11880000 {
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compatible = "samsung,exynos4210-csis";
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reg = < 0x11880000 0x4000 >;
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interrupts = < 0x00 0x4e 0x04 >;
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clocks = < 0x02 0x104 0x02 0x86 >;
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clock-names = "csis\0sclk_csis";
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bus-width = < 0x04 >;
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power-domains = < 0x0b >;
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phys = < 0x0a 0x00 >;
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phy-names = "csis";
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status = "disabled";
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#address-cells = < 0x01 >;
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#size-cells = < 0x00 >;
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};
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csis@11890000 {
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compatible = "samsung,exynos4210-csis";
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reg = < 0x11890000 0x4000 >;
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interrupts = < 0x00 0x50 0x04 >;
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clocks = < 0x02 0x105 0x02 0x87 >;
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clock-names = "csis\0sclk_csis";
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bus-width = < 0x02 >;
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power-domains = < 0x0b >;
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phys = < 0x0a 0x02 >;
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phy-names = "csis";
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status = "disabled";
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#address-cells = < 0x01 >;
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#size-cells = < 0x00 >;
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};
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fimc-lite@12390000 {
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compatible = "samsung,exynos4212-fimc-lite";
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reg = < 0x12390000 0x1000 >;
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interrupts = < 0x00 0x69 0x04 >;
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power-domains = < 0x11 >;
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clocks = < 0x12 0x04 >;
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clock-names = "flite";
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iommus = < 0x13 >;
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status = "disabled";
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};
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fimc-lite@123a0000 {
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compatible = "samsung,exynos4212-fimc-lite";
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reg = < 0x123a0000 0x1000 >;
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interrupts = < 0x00 0x6a 0x04 >;
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power-domains = < 0x11 >;
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clocks = < 0x12 0x05 >;
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clock-names = "flite";
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iommus = < 0x14 >;
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status = "disabled";
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};
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fimc-is@12000000 {
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compatible = "samsung,exynos4212-fimc-is";
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reg = < 0x12000000 0x260000 >;
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interrupts = < 0x00 0x5a 0x04 0x00 0x5f 0x04 >;
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power-domains = < 0x11 >;
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clocks = < 0x12 0x04 0x12 0x05 0x12 0x0e 0x12 0x0d 0x12 0x01 0x12 0x02 0x12 0x03 0x12 0x06 0x12 0x07 0x12 0x0f 0x12 0x14 0x12 0x1b 0x12 0x1c 0x12 0x1d 0x12 0x1e 0x02 0x11 0x02 0x0d 0x02 0x18b 0x02 0x1c6 0x02 0x1c7 0x02 0x17e >;
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clock-names = "lite0\0lite1\0ppmuispx\0ppmuispmx\0isp\0drc\0fd\0mcuisp\0gicisp\0mcuctl_isp\0pwm_isp\0ispdiv0\0ispdiv1\0mcuispdiv0\0mcuispdiv1\0mpll\0aclk200\0aclk400mcuisp\0div_aclk200\0div_aclk400mcuisp\0uart";
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iommus = < 0x15 0x16 0x17 0x18 >;
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iommu-names = "isp\0drc\0fd\0mcuctl";
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#address-cells = < 0x01 >;
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#size-cells = < 0x01 >;
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ranges;
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status = "disabled";
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pmu@10020000 {
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reg = < 0x10020000 0x3000 >;
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};
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i2c-isp@12140000 {
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compatible = "samsung,exynos4212-i2c-isp";
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reg = < 0x12140000 0x100 >;
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clocks = < 0x12 0x12 >;
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clock-names = "i2c_isp";
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#address-cells = < 0x01 >;
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#size-cells = < 0x00 >;
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};
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};
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};
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rtc@10070000 {
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compatible = "samsung,s3c6410-rtc";
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reg = < 0x10070000 0x100 >;
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interrupt-parent = < 0x07 >;
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interrupts = < 0x00 0x2c 0x04 0x00 0x2d 0x04 >;
|
|
clocks = < 0x02 0x15a 0x19 0x00 >;
|
|
clock-names = "rtc\0rtc_src";
|
|
status = "okay";
|
|
};
|
|
|
|
keypad@100a0000 {
|
|
compatible = "samsung,s5pv210-keypad";
|
|
reg = < 0x100a0000 0x100 >;
|
|
interrupts = < 0x00 0x6d 0x04 >;
|
|
clocks = < 0x02 0x15b >;
|
|
clock-names = "keypad";
|
|
status = "disabled";
|
|
};
|
|
|
|
sdhci@12510000 {
|
|
compatible = "samsung,exynos4210-sdhci";
|
|
reg = < 0x12510000 0x100 >;
|
|
interrupts = < 0x00 0x49 0x04 >;
|
|
clocks = < 0x02 0x129 0x02 0x91 >;
|
|
clock-names = "hsmmc\0mmc_busclk.2";
|
|
status = "disabled";
|
|
};
|
|
|
|
sdhci@12520000 {
|
|
compatible = "samsung,exynos4210-sdhci";
|
|
reg = < 0x12520000 0x100 >;
|
|
interrupts = < 0x00 0x4a 0x04 >;
|
|
clocks = < 0x02 0x12a 0x02 0x92 >;
|
|
clock-names = "hsmmc\0mmc_busclk.2";
|
|
status = "disabled";
|
|
};
|
|
|
|
sdhci@12530000 {
|
|
compatible = "samsung,exynos4210-sdhci";
|
|
reg = < 0x12530000 0x100 >;
|
|
interrupts = < 0x00 0x4b 0x04 >;
|
|
clocks = < 0x02 0x12b 0x02 0x93 >;
|
|
clock-names = "hsmmc\0mmc_busclk.2";
|
|
status = "okay";
|
|
bus-width = < 0x04 >;
|
|
pinctrl-0 = < 0x1a 0x1b 0x1c 0x1d >;
|
|
pinctrl-names = "default";
|
|
vmmc-supply = < 0x1e >;
|
|
vqmmc-supply = < 0x1f >;
|
|
cd-gpios = < 0x20 0x02 0x01 >;
|
|
};
|
|
|
|
sdhci@12540000 {
|
|
compatible = "samsung,exynos4210-sdhci";
|
|
reg = < 0x12540000 0x100 >;
|
|
interrupts = < 0x00 0x4c 0x04 >;
|
|
clocks = < 0x02 0x12c 0x02 0x94 >;
|
|
clock-names = "hsmmc\0mmc_busclk.2";
|
|
status = "disabled";
|
|
};
|
|
|
|
exynos-usbphy@125b0000 {
|
|
compatible = "samsung,exynos4x12-usb2-phy";
|
|
reg = < 0x125b0000 0x100 >;
|
|
samsung,pmureg-phandle = < 0x07 >;
|
|
clocks = < 0x02 0x131 0x02 0x02 >;
|
|
clock-names = "phy\0ref";
|
|
#phy-cells = < 0x01 >;
|
|
status = "okay";
|
|
samsung,sysreg-phandle = < 0x0c >;
|
|
phandle = < 0x21 >;
|
|
};
|
|
|
|
hsotg@12480000 {
|
|
compatible = "samsung,s3c6400-hsotg";
|
|
reg = < 0x12480000 0x20000 >;
|
|
interrupts = < 0x00 0x47 0x04 >;
|
|
clocks = < 0x02 0x131 >;
|
|
clock-names = "otg";
|
|
phys = < 0x21 0x00 >;
|
|
phy-names = "usb2-phy";
|
|
status = "okay";
|
|
dr_mode = "peripheral";
|
|
vusb_d-supply = < 0x22 >;
|
|
vusb_a-supply = < 0x23 >;
|
|
};
|
|
|
|
ehci@12580000 {
|
|
compatible = "samsung,exynos4210-ehci";
|
|
reg = < 0x12580000 0x100 >;
|
|
interrupts = < 0x00 0x46 0x04 >;
|
|
clocks = < 0x02 0x130 >;
|
|
clock-names = "usbhost";
|
|
status = "okay";
|
|
#address-cells = < 0x01 >;
|
|
#size-cells = < 0x00 >;
|
|
|
|
port@0 {
|
|
reg = < 0x00 >;
|
|
phys = < 0x21 0x01 >;
|
|
status = "disabled";
|
|
};
|
|
|
|
port@1 {
|
|
reg = < 0x01 >;
|
|
phys = < 0x21 0x02 >;
|
|
status = "okay";
|
|
};
|
|
|
|
port@2 {
|
|
reg = < 0x02 >;
|
|
phys = < 0x21 0x03 >;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
ohci@12590000 {
|
|
compatible = "samsung,exynos4210-ohci";
|
|
reg = < 0x12590000 0x100 >;
|
|
interrupts = < 0x00 0x46 0x04 >;
|
|
clocks = < 0x02 0x130 >;
|
|
clock-names = "usbhost";
|
|
status = "disabled";
|
|
#address-cells = < 0x01 >;
|
|
#size-cells = < 0x00 >;
|
|
|
|
port@0 {
|
|
reg = < 0x00 >;
|
|
phys = < 0x21 0x01 >;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
i2s@13960000 {
|
|
compatible = "samsung,s3c6410-i2s";
|
|
reg = < 0x13960000 0x100 >;
|
|
clocks = < 0x02 0x14a >;
|
|
clock-names = "iis";
|
|
#clock-cells = < 0x01 >;
|
|
clock-output-names = "i2s_cdclk1";
|
|
dmas = < 0x24 0x0c 0x24 0x0b >;
|
|
dma-names = "tx\0rx";
|
|
#sound-dai-cells = < 0x01 >;
|
|
status = "disabled";
|
|
};
|
|
|
|
i2s@13970000 {
|
|
compatible = "samsung,s3c6410-i2s";
|
|
reg = < 0x13970000 0x100 >;
|
|
clocks = < 0x02 0x14b >;
|
|
clock-names = "iis";
|
|
#clock-cells = < 0x01 >;
|
|
clock-output-names = "i2s_cdclk2";
|
|
dmas = < 0x04 0x0e 0x04 0x0d >;
|
|
dma-names = "tx\0rx";
|
|
#sound-dai-cells = < 0x01 >;
|
|
status = "disabled";
|
|
};
|
|
|
|
codec@13400000 {
|
|
compatible = "samsung,mfc-v5";
|
|
reg = < 0x13400000 0x10000 >;
|
|
interrupts = < 0x00 0x5e 0x04 >;
|
|
power-domains = < 0x25 >;
|
|
clocks = < 0x02 0x111 0x02 0xaa >;
|
|
clock-names = "mfc\0sclk_mfc";
|
|
iommus = < 0x26 0x27 >;
|
|
iommu-names = "left\0right";
|
|
memory-region = < 0x28 0x29 >;
|
|
};
|
|
|
|
serial@13800000 {
|
|
compatible = "samsung,exynos4210-uart";
|
|
reg = < 0x13800000 0x100 >;
|
|
interrupts = < 0x00 0x34 0x04 >;
|
|
clocks = < 0x02 0x138 0x02 0x97 >;
|
|
clock-names = "uart\0clk_uart_baud0";
|
|
dmas = < 0x04 0x0f 0x04 0x10 >;
|
|
dma-names = "rx\0tx";
|
|
status = "okay";
|
|
};
|
|
|
|
serial@13810000 {
|
|
compatible = "samsung,exynos4210-uart";
|
|
reg = < 0x13810000 0x100 >;
|
|
interrupts = < 0x00 0x35 0x04 >;
|
|
clocks = < 0x02 0x139 0x02 0x98 >;
|
|
clock-names = "uart\0clk_uart_baud0";
|
|
dmas = < 0x24 0x0f 0x24 0x10 >;
|
|
dma-names = "rx\0tx";
|
|
status = "okay";
|
|
};
|
|
|
|
serial@13820000 {
|
|
compatible = "samsung,exynos4210-uart";
|
|
reg = < 0x13820000 0x100 >;
|
|
interrupts = < 0x00 0x36 0x04 >;
|
|
clocks = < 0x02 0x13a 0x02 0x99 >;
|
|
clock-names = "uart\0clk_uart_baud0";
|
|
dmas = < 0x04 0x11 0x04 0x12 >;
|
|
dma-names = "rx\0tx";
|
|
status = "okay";
|
|
};
|
|
|
|
serial@13830000 {
|
|
compatible = "samsung,exynos4210-uart";
|
|
reg = < 0x13830000 0x100 >;
|
|
interrupts = < 0x00 0x37 0x04 >;
|
|
clocks = < 0x02 0x13b 0x02 0x9a >;
|
|
clock-names = "uart\0clk_uart_baud0";
|
|
dmas = < 0x24 0x11 0x24 0x12 >;
|
|
dma-names = "rx\0tx";
|
|
status = "okay";
|
|
};
|
|
|
|
i2c@13860000 {
|
|
#address-cells = < 0x01 >;
|
|
#size-cells = < 0x00 >;
|
|
compatible = "samsung,s3c2440-i2c";
|
|
reg = < 0x13860000 0x100 >;
|
|
interrupts = < 0x00 0x3a 0x04 >;
|
|
clocks = < 0x02 0x13d >;
|
|
clock-names = "i2c";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = < 0x2a >;
|
|
status = "okay";
|
|
samsung,i2c-sda-delay = < 0x64 >;
|
|
samsung,i2c-max-bus-freq = < 0x61a80 >;
|
|
|
|
usb3503@8 {
|
|
compatible = "smsc,usb3503";
|
|
reg = < 0x08 >;
|
|
intn-gpios = < 0x2b 0x00 0x00 >;
|
|
connect-gpios = < 0x2b 0x04 0x00 >;
|
|
reset-gpios = < 0x2b 0x05 0x00 >;
|
|
initial-mode = < 0x01 >;
|
|
};
|
|
|
|
pmic@9 {
|
|
compatible = "maxim,max77686";
|
|
interrupt-parent = < 0x2b >;
|
|
interrupts = < 0x02 0x00 >;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = < 0x2c >;
|
|
reg = < 0x09 >;
|
|
#clock-cells = < 0x01 >;
|
|
phandle = < 0x19 >;
|
|
|
|
voltage-regulators {
|
|
|
|
LDO1 {
|
|
regulator-name = "VDD_ALIVE_1.0V";
|
|
regulator-min-microvolt = < 0xf4240 >;
|
|
regulator-max-microvolt = < 0xf4240 >;
|
|
regulator-always-on;
|
|
};
|
|
|
|
LDO2 {
|
|
regulator-name = "VDDQ_M1_2_1.8V";
|
|
regulator-min-microvolt = < 0x1b7740 >;
|
|
regulator-max-microvolt = < 0x1b7740 >;
|
|
regulator-always-on;
|
|
};
|
|
|
|
LDO3 {
|
|
regulator-name = "VDDQ_EXT_1.8V";
|
|
regulator-min-microvolt = < 0x1b7740 >;
|
|
regulator-max-microvolt = < 0x1b7740 >;
|
|
regulator-always-on;
|
|
};
|
|
|
|
LDO4 {
|
|
regulator-name = "VDDQ_MMC2_2.8V";
|
|
regulator-min-microvolt = < 0x2ab980 >;
|
|
regulator-max-microvolt = < 0x2ab980 >;
|
|
regulator-boot-on;
|
|
phandle = < 0x1f >;
|
|
};
|
|
|
|
LDO5 {
|
|
regulator-name = "VDDQ_MMC1_3_1.8V";
|
|
regulator-min-microvolt = < 0x1b7740 >;
|
|
regulator-max-microvolt = < 0x1b7740 >;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
LDO6 {
|
|
regulator-name = "VDD10_MPLL_1.0V";
|
|
regulator-min-microvolt = < 0xf4240 >;
|
|
regulator-max-microvolt = < 0xf4240 >;
|
|
regulator-always-on;
|
|
};
|
|
|
|
LDO7 {
|
|
regulator-name = "VDD10_XPLL_1.0V";
|
|
regulator-min-microvolt = < 0xf4240 >;
|
|
regulator-max-microvolt = < 0xf4240 >;
|
|
regulator-always-on;
|
|
};
|
|
|
|
LDO8 {
|
|
regulator-name = "VDD10_HDMI_1.0V";
|
|
regulator-min-microvolt = < 0xf4240 >;
|
|
regulator-max-microvolt = < 0xf4240 >;
|
|
phandle = < 0x3f >;
|
|
};
|
|
|
|
LDO10 {
|
|
regulator-name = "VDDQ_MIPIHSI_1.8V";
|
|
regulator-min-microvolt = < 0x1b7740 >;
|
|
regulator-max-microvolt = < 0x1b7740 >;
|
|
phandle = < 0x39 >;
|
|
};
|
|
|
|
LDO11 {
|
|
regulator-name = "VDD18_ABB1_1.8V";
|
|
regulator-min-microvolt = < 0x1b7740 >;
|
|
regulator-max-microvolt = < 0x1b7740 >;
|
|
regulator-always-on;
|
|
};
|
|
|
|
LDO12 {
|
|
regulator-name = "VDD33_USB_3.3V";
|
|
regulator-min-microvolt = < 0x325aa0 >;
|
|
regulator-max-microvolt = < 0x325aa0 >;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
phandle = < 0x23 >;
|
|
};
|
|
|
|
LDO13 {
|
|
regulator-name = "VDDQ_C2C_W_1.8V";
|
|
regulator-min-microvolt = < 0x1b7740 >;
|
|
regulator-max-microvolt = < 0x1b7740 >;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
LDO14 {
|
|
regulator-name = "VDD18_ABB0_2_1.8V";
|
|
regulator-min-microvolt = < 0x1b7740 >;
|
|
regulator-max-microvolt = < 0x1b7740 >;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
LDO15 {
|
|
regulator-name = "VDD10_HSIC_1.0V";
|
|
regulator-min-microvolt = < 0xf4240 >;
|
|
regulator-max-microvolt = < 0xf4240 >;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
phandle = < 0x22 >;
|
|
};
|
|
|
|
LDO16 {
|
|
regulator-name = "VDD18_HSIC_1.8V";
|
|
regulator-min-microvolt = < 0x1b7740 >;
|
|
regulator-max-microvolt = < 0x1b7740 >;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
LDO20 {
|
|
regulator-name = "LDO20_1.8V";
|
|
regulator-min-microvolt = < 0x1b7740 >;
|
|
regulator-max-microvolt = < 0x1b7740 >;
|
|
regulator-boot-on;
|
|
phandle = < 0x4a >;
|
|
};
|
|
|
|
LDO21 {
|
|
regulator-name = "TFLASH_2.8V";
|
|
regulator-min-microvolt = < 0x2ab980 >;
|
|
regulator-max-microvolt = < 0x2ab980 >;
|
|
regulator-boot-on;
|
|
phandle = < 0x1e >;
|
|
};
|
|
|
|
LDO22 {
|
|
regulator-name = "LDO22";
|
|
regulator-boot-on;
|
|
};
|
|
|
|
LDO25 {
|
|
regulator-name = "VDDQ_LCD_1.8V";
|
|
regulator-min-microvolt = < 0x1b7740 >;
|
|
regulator-max-microvolt = < 0x1b7740 >;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
BUCK1 {
|
|
regulator-name = "vdd_mif";
|
|
regulator-min-microvolt = < 0xdbba0 >;
|
|
regulator-max-microvolt = < 0x10c8e0 >;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
phandle = < 0x50 >;
|
|
};
|
|
|
|
BUCK2 {
|
|
regulator-name = "vdd_arm";
|
|
regulator-min-microvolt = < 0xdbba0 >;
|
|
regulator-max-microvolt = < 0x149970 >;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
phandle = < 0x60 >;
|
|
};
|
|
|
|
BUCK3 {
|
|
regulator-name = "vdd_int";
|
|
regulator-min-microvolt = < 0xdbba0 >;
|
|
regulator-max-microvolt = < 0x100590 >;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
phandle = < 0x56 >;
|
|
};
|
|
|
|
BUCK4 {
|
|
regulator-name = "vdd_g3d";
|
|
regulator-min-microvolt = < 0xdbba0 >;
|
|
regulator-max-microvolt = < 0x10c8e0 >;
|
|
regulator-microvolt-offset = < 0xc350 >;
|
|
};
|
|
|
|
BUCK5 {
|
|
regulator-name = "VDDQ_CKEM1_2_1.2V";
|
|
regulator-min-microvolt = < 0x124f80 >;
|
|
regulator-max-microvolt = < 0x124f80 >;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
BUCK6 {
|
|
regulator-name = "BUCK6_1.35V";
|
|
regulator-min-microvolt = < 0x149970 >;
|
|
regulator-max-microvolt = < 0x149970 >;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
BUCK7 {
|
|
regulator-name = "BUCK7_2.0V";
|
|
regulator-min-microvolt = < 0x1e8480 >;
|
|
regulator-max-microvolt = < 0x1e8480 >;
|
|
regulator-always-on;
|
|
};
|
|
|
|
BUCK8 {
|
|
regulator-name = "BUCK8_VDDQ_MMC4_2.8V";
|
|
regulator-min-microvolt = < 0x2ab980 >;
|
|
regulator-max-microvolt = < 0x2ab980 >;
|
|
phandle = < 0x4c >;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
i2c@13870000 {
|
|
#address-cells = < 0x01 >;
|
|
#size-cells = < 0x00 >;
|
|
compatible = "samsung,s3c2440-i2c";
|
|
reg = < 0x13870000 0x100 >;
|
|
interrupts = < 0x00 0x3b 0x04 >;
|
|
clocks = < 0x02 0x13e >;
|
|
clock-names = "i2c";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = < 0x2d >;
|
|
status = "okay";
|
|
|
|
max98090@10 {
|
|
compatible = "maxim,max98090";
|
|
reg = < 0x10 >;
|
|
interrupt-parent = < 0x2e >;
|
|
interrupts = < 0x00 0x00 >;
|
|
clocks = < 0x06 0x00 >;
|
|
clock-names = "mclk";
|
|
#sound-dai-cells = < 0x00 >;
|
|
phandle = < 0x65 >;
|
|
};
|
|
};
|
|
|
|
i2c@13880000 {
|
|
#address-cells = < 0x01 >;
|
|
#size-cells = < 0x00 >;
|
|
compatible = "samsung,s3c2440-i2c";
|
|
reg = < 0x13880000 0x100 >;
|
|
interrupts = < 0x00 0x3c 0x04 >;
|
|
clocks = < 0x02 0x13f >;
|
|
clock-names = "i2c";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = < 0x2f >;
|
|
status = "okay";
|
|
phandle = < 0x40 >;
|
|
};
|
|
|
|
i2c@13890000 {
|
|
#address-cells = < 0x01 >;
|
|
#size-cells = < 0x00 >;
|
|
compatible = "samsung,s3c2440-i2c";
|
|
reg = < 0x13890000 0x100 >;
|
|
interrupts = < 0x00 0x3d 0x04 >;
|
|
clocks = < 0x02 0x140 >;
|
|
clock-names = "i2c";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = < 0x30 >;
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c@138a0000 {
|
|
#address-cells = < 0x01 >;
|
|
#size-cells = < 0x00 >;
|
|
compatible = "samsung,s3c2440-i2c";
|
|
reg = < 0x138a0000 0x100 >;
|
|
interrupts = < 0x00 0x3e 0x04 >;
|
|
clocks = < 0x02 0x141 >;
|
|
clock-names = "i2c";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = < 0x31 >;
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c@138b0000 {
|
|
#address-cells = < 0x01 >;
|
|
#size-cells = < 0x00 >;
|
|
compatible = "samsung,s3c2440-i2c";
|
|
reg = < 0x138b0000 0x100 >;
|
|
interrupts = < 0x00 0x3f 0x04 >;
|
|
clocks = < 0x02 0x142 >;
|
|
clock-names = "i2c";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = < 0x32 >;
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c@138c0000 {
|
|
#address-cells = < 0x01 >;
|
|
#size-cells = < 0x00 >;
|
|
compatible = "samsung,s3c2440-i2c";
|
|
reg = < 0x138c0000 0x100 >;
|
|
interrupts = < 0x00 0x40 0x04 >;
|
|
clocks = < 0x02 0x143 >;
|
|
clock-names = "i2c";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = < 0x33 >;
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c@138d0000 {
|
|
#address-cells = < 0x01 >;
|
|
#size-cells = < 0x00 >;
|
|
compatible = "samsung,s3c2440-i2c";
|
|
reg = < 0x138d0000 0x100 >;
|
|
interrupts = < 0x00 0x41 0x04 >;
|
|
clocks = < 0x02 0x144 >;
|
|
clock-names = "i2c";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = < 0x34 >;
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c@138e0000 {
|
|
#address-cells = < 0x01 >;
|
|
#size-cells = < 0x00 >;
|
|
compatible = "samsung,s3c2440-hdmiphy-i2c";
|
|
reg = < 0x138e0000 0x100 >;
|
|
interrupts = < 0x00 0x5d 0x04 >;
|
|
clocks = < 0x02 0x145 >;
|
|
clock-names = "i2c";
|
|
status = "okay";
|
|
|
|
hdmiphy@38 {
|
|
compatible = "exynos4210-hdmiphy";
|
|
reg = < 0x38 >;
|
|
phandle = < 0x3c >;
|
|
};
|
|
};
|
|
|
|
spi@13920000 {
|
|
compatible = "samsung,exynos4210-spi";
|
|
reg = < 0x13920000 0x100 >;
|
|
interrupts = < 0x00 0x42 0x04 >;
|
|
dmas = < 0x04 0x07 0x04 0x06 >;
|
|
dma-names = "tx\0rx";
|
|
#address-cells = < 0x01 >;
|
|
#size-cells = < 0x00 >;
|
|
clocks = < 0x02 0x147 0x02 0x9f >;
|
|
clock-names = "spi\0spi_busclk0";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = < 0x35 >;
|
|
status = "disabled";
|
|
};
|
|
|
|
spi@13930000 {
|
|
compatible = "samsung,exynos4210-spi";
|
|
reg = < 0x13930000 0x100 >;
|
|
interrupts = < 0x00 0x43 0x04 >;
|
|
dmas = < 0x24 0x07 0x24 0x06 >;
|
|
dma-names = "tx\0rx";
|
|
#address-cells = < 0x01 >;
|
|
#size-cells = < 0x00 >;
|
|
clocks = < 0x02 0x148 0x02 0xa0 >;
|
|
clock-names = "spi\0spi_busclk0";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = < 0x36 >;
|
|
status = "disabled";
|
|
};
|
|
|
|
spi@13940000 {
|
|
compatible = "samsung,exynos4210-spi";
|
|
reg = < 0x13940000 0x100 >;
|
|
interrupts = < 0x00 0x44 0x04 >;
|
|
dmas = < 0x04 0x09 0x04 0x08 >;
|
|
dma-names = "tx\0rx";
|
|
#address-cells = < 0x01 >;
|
|
#size-cells = < 0x00 >;
|
|
clocks = < 0x02 0x149 0x02 0xa1 >;
|
|
clock-names = "spi\0spi_busclk0";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = < 0x37 >;
|
|
status = "disabled";
|
|
};
|
|
|
|
pwm@139d0000 {
|
|
compatible = "samsung,exynos4210-pwm";
|
|
reg = < 0x139d0000 0x1000 >;
|
|
interrupts = < 0x00 0x25 0x04 0x00 0x26 0x04 0x00 0x27 0x04 0x00 0x28 0x04 0x00 0x29 0x04 >;
|
|
clocks = < 0x02 0x150 >;
|
|
clock-names = "timers";
|
|
#pwm-cells = < 0x03 >;
|
|
status = "disabled";
|
|
};
|
|
|
|
amba {
|
|
#address-cells = < 0x01 >;
|
|
#size-cells = < 0x01 >;
|
|
compatible = "simple-bus";
|
|
interrupt-parent = < 0x01 >;
|
|
ranges;
|
|
|
|
pdma@12680000 {
|
|
compatible = "arm,pl330\0arm,primecell";
|
|
reg = < 0x12680000 0x1000 >;
|
|
interrupts = < 0x00 0x23 0x04 >;
|
|
clocks = < 0x02 0x124 >;
|
|
clock-names = "apb_pclk";
|
|
#dma-cells = < 0x01 >;
|
|
#dma-channels = < 0x08 >;
|
|
#dma-requests = < 0x20 >;
|
|
phandle = < 0x04 >;
|
|
};
|
|
|
|
pdma@12690000 {
|
|
compatible = "arm,pl330\0arm,primecell";
|
|
reg = < 0x12690000 0x1000 >;
|
|
interrupts = < 0x00 0x24 0x04 >;
|
|
clocks = < 0x02 0x125 >;
|
|
clock-names = "apb_pclk";
|
|
#dma-cells = < 0x01 >;
|
|
#dma-channels = < 0x08 >;
|
|
#dma-requests = < 0x20 >;
|
|
phandle = < 0x24 >;
|
|
};
|
|
|
|
mdma@12850000 {
|
|
compatible = "arm,pl330\0arm,primecell";
|
|
reg = < 0x12850000 0x1000 >;
|
|
interrupts = < 0x00 0x22 0x04 >;
|
|
clocks = < 0x02 0x117 >;
|
|
clock-names = "apb_pclk";
|
|
#dma-cells = < 0x01 >;
|
|
#dma-channels = < 0x08 >;
|
|
#dma-requests = < 0x01 >;
|
|
};
|
|
};
|
|
|
|
fimd@11c00000 {
|
|
compatible = "samsung,exynos4210-fimd";
|
|
interrupt-parent = < 0x09 >;
|
|
reg = < 0x11c00000 0x20000 >;
|
|
interrupt-names = "fifo\0vsync\0lcd_sys";
|
|
interrupts = < 0x0b 0x00 0x0b 0x01 0x0b 0x02 >;
|
|
clocks = < 0x02 0x8c 0x02 0x11b >;
|
|
clock-names = "sclk_fimd\0fimd";
|
|
power-domains = < 0x08 >;
|
|
iommus = < 0x38 >;
|
|
samsung,sysreg = < 0x0c >;
|
|
status = "disabled";
|
|
};
|
|
|
|
tmu@100c0000 {
|
|
interrupt-parent = < 0x09 >;
|
|
reg = < 0x100c0000 0x100 >;
|
|
interrupts = < 0x02 0x04 >;
|
|
status = "okay";
|
|
#thermal-sensor-cells = < 0x00 >;
|
|
compatible = "samsung,exynos4412-tmu";
|
|
clocks = < 0x02 0x17f >;
|
|
clock-names = "tmu_apbif";
|
|
vtmu-supply = < 0x39 >;
|
|
phandle = < 0x5b >;
|
|
};
|
|
|
|
jpeg-codec@11840000 {
|
|
compatible = "samsung,exynos4212-jpeg";
|
|
reg = < 0x11840000 0x1000 >;
|
|
interrupts = < 0x00 0x58 0x04 >;
|
|
clocks = < 0x02 0x106 >;
|
|
clock-names = "jpeg";
|
|
power-domains = < 0x0b >;
|
|
iommus = < 0x3a >;
|
|
};
|
|
|
|
rotator@12810000 {
|
|
compatible = "samsung,exynos4212-rotator";
|
|
reg = < 0x12810000 0x64 >;
|
|
interrupts = < 0x00 0x53 0x04 >;
|
|
clocks = < 0x02 0x116 >;
|
|
clock-names = "rotator";
|
|
iommus = < 0x3b >;
|
|
};
|
|
|
|
hdmi@12d00000 {
|
|
compatible = "samsung,exynos4212-hdmi";
|
|
reg = < 0x12d00000 0x70000 >;
|
|
interrupts = < 0x00 0x5c 0x04 >;
|
|
clock-names = "hdmi\0sclk_hdmi\0sclk_pixel\0sclk_hdmiphy\0mout_hdmi";
|
|
clocks = < 0x02 0x10f 0x02 0x88 0x02 0x8b 0x02 0x16 0x02 0x18c >;
|
|
phy = < 0x3c >;
|
|
power-domains = < 0x3d >;
|
|
samsung,syscon-phandle = < 0x07 >;
|
|
#sound-dai-cells = < 0x00 >;
|
|
status = "okay";
|
|
hpd-gpios = < 0x2b 0x07 0x00 >;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = < 0x3e >;
|
|
vdd-supply = < 0x3f >;
|
|
vdd_osc-supply = < 0x39 >;
|
|
vdd_pll-supply = < 0x3f >;
|
|
ddc = < 0x40 >;
|
|
phandle = < 0x41 >;
|
|
};
|
|
|
|
cec@100b0000 {
|
|
compatible = "samsung,s5p-cec";
|
|
reg = < 0x100b0000 0x200 >;
|
|
interrupts = < 0x00 0x72 0x04 >;
|
|
clocks = < 0x02 0x157 >;
|
|
clock-names = "hdmicec";
|
|
samsung,syscon-phandle = < 0x07 >;
|
|
hdmi-phandle = < 0x41 >;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = < 0x42 >;
|
|
status = "okay";
|
|
};
|
|
|
|
mixer@12c10000 {
|
|
compatible = "samsung,exynos4212-mixer";
|
|
interrupts = < 0x00 0x5b 0x04 >;
|
|
reg = < 0x12c10000 0x2100 0x12c00000 0x300 >;
|
|
power-domains = < 0x3d >;
|
|
iommus = < 0x43 >;
|
|
status = "okay";
|
|
clock-names = "mixer\0hdmi\0sclk_hdmi\0vp";
|
|
clocks = < 0x02 0x10d 0x02 0x10f 0x02 0x88 0x02 0x10c >;
|
|
};
|
|
|
|
ppmu_dmc0@106a0000 {
|
|
compatible = "samsung,exynos-ppmu";
|
|
reg = < 0x106a0000 0x2000 >;
|
|
clocks = < 0x02 0x19c >;
|
|
clock-names = "ppmu";
|
|
status = "okay";
|
|
|
|
events {
|
|
|
|
ppmu-event3-dmc0 {
|
|
event-name = "ppmu-event3-dmc0";
|
|
phandle = < 0x4e >;
|
|
};
|
|
};
|
|
};
|
|
|
|
ppmu_dmc1@106b0000 {
|
|
compatible = "samsung,exynos-ppmu";
|
|
reg = < 0x106b0000 0x2000 >;
|
|
clocks = < 0x02 0x19d >;
|
|
clock-names = "ppmu";
|
|
status = "okay";
|
|
|
|
events {
|
|
|
|
ppmu-event3-dmc1 {
|
|
event-name = "ppmu-event3-dmc1";
|
|
phandle = < 0x4f >;
|
|
};
|
|
};
|
|
};
|
|
|
|
ppmu_cpu@106c0000 {
|
|
compatible = "samsung,exynos-ppmu";
|
|
reg = < 0x106c0000 0x2000 >;
|
|
clocks = < 0x02 0x19e >;
|
|
clock-names = "ppmu";
|
|
status = "disabled";
|
|
};
|
|
|
|
ppmu_rightbus@112a0000 {
|
|
compatible = "samsung,exynos-ppmu";
|
|
reg = < 0x112a0000 0x2000 >;
|
|
clocks = < 0x02 0x191 >;
|
|
clock-names = "ppmu";
|
|
status = "okay";
|
|
|
|
events {
|
|
|
|
ppmu-event3-rightbus {
|
|
event-name = "ppmu-event3-rightbus";
|
|
phandle = < 0x55 >;
|
|
};
|
|
};
|
|
};
|
|
|
|
ppmu_leftbus0@116a0000 {
|
|
compatible = "samsung,exynos-ppmu";
|
|
reg = < 0x116a0000 0x2000 >;
|
|
clocks = < 0x02 0x190 >;
|
|
clock-names = "ppmu";
|
|
status = "okay";
|
|
|
|
events {
|
|
|
|
ppmu-event3-leftbus {
|
|
event-name = "ppmu-event3-leftbus";
|
|
phandle = < 0x54 >;
|
|
};
|
|
};
|
|
};
|
|
|
|
ppmu_camif@11ac0000 {
|
|
compatible = "samsung,exynos-ppmu";
|
|
reg = < 0x11ac0000 0x2000 >;
|
|
clocks = < 0x02 0x192 >;
|
|
clock-names = "ppmu";
|
|
status = "disabled";
|
|
};
|
|
|
|
ppmu_lcd0@11e40000 {
|
|
compatible = "samsung,exynos-ppmu";
|
|
reg = < 0x11e40000 0x2000 >;
|
|
clocks = < 0x02 0x198 >;
|
|
clock-names = "ppmu";
|
|
status = "disabled";
|
|
};
|
|
|
|
ppmu_g3d@12630000 {
|
|
compatible = "samsung,exynos-ppmu";
|
|
reg = < 0x12630000 0x2000 >;
|
|
status = "disabled";
|
|
};
|
|
|
|
ppmu_image@12aa0000 {
|
|
compatible = "samsung,exynos-ppmu";
|
|
reg = < 0x12aa0000 0x2000 >;
|
|
clocks = < 0x02 0x197 >;
|
|
clock-names = "ppmu";
|
|
status = "disabled";
|
|
};
|
|
|
|
ppmu_tv@12e40000 {
|
|
compatible = "samsung,exynos-ppmu";
|
|
reg = < 0x12e40000 0x2000 >;
|
|
clocks = < 0x02 0x193 >;
|
|
clock-names = "ppmu";
|
|
status = "disabled";
|
|
};
|
|
|
|
ppmu_g3d@13220000 {
|
|
compatible = "samsung,exynos-ppmu";
|
|
reg = < 0x13220000 0x2000 >;
|
|
clocks = < 0x02 0x196 >;
|
|
clock-names = "ppmu";
|
|
status = "disabled";
|
|
};
|
|
|
|
ppmu_mfc_left@13660000 {
|
|
compatible = "samsung,exynos-ppmu";
|
|
reg = < 0x13660000 0x2000 >;
|
|
clocks = < 0x02 0x194 >;
|
|
clock-names = "ppmu";
|
|
status = "disabled";
|
|
};
|
|
|
|
ppmu_mfc_right@13670000 {
|
|
compatible = "samsung,exynos-ppmu";
|
|
reg = < 0x13670000 0x2000 >;
|
|
clocks = < 0x02 0x195 >;
|
|
clock-names = "ppmu";
|
|
status = "disabled";
|
|
};
|
|
|
|
sysmmu@13620000 {
|
|
compatible = "samsung,exynos-sysmmu";
|
|
reg = < 0x13620000 0x1000 >;
|
|
interrupt-parent = < 0x09 >;
|
|
interrupts = < 0x05 0x05 >;
|
|
clock-names = "sysmmu\0master";
|
|
clocks = < 0x02 0x112 0x02 0x111 >;
|
|
power-domains = < 0x25 >;
|
|
#iommu-cells = < 0x00 >;
|
|
phandle = < 0x26 >;
|
|
};
|
|
|
|
sysmmu@13630000 {
|
|
compatible = "samsung,exynos-sysmmu";
|
|
reg = < 0x13630000 0x1000 >;
|
|
interrupt-parent = < 0x09 >;
|
|
interrupts = < 0x05 0x06 >;
|
|
clock-names = "sysmmu\0master";
|
|
clocks = < 0x02 0x113 0x02 0x111 >;
|
|
power-domains = < 0x25 >;
|
|
#iommu-cells = < 0x00 >;
|
|
phandle = < 0x27 >;
|
|
};
|
|
|
|
sysmmu@12e20000 {
|
|
compatible = "samsung,exynos-sysmmu";
|
|
reg = < 0x12e20000 0x1000 >;
|
|
interrupt-parent = < 0x09 >;
|
|
interrupts = < 0x05 0x04 >;
|
|
clock-names = "sysmmu\0master";
|
|
clocks = < 0x02 0x110 0x02 0x10d >;
|
|
power-domains = < 0x3d >;
|
|
#iommu-cells = < 0x00 >;
|
|
phandle = < 0x43 >;
|
|
};
|
|
|
|
sysmmu@11a20000 {
|
|
compatible = "samsung,exynos-sysmmu";
|
|
reg = < 0x11a20000 0x1000 >;
|
|
interrupt-parent = < 0x09 >;
|
|
interrupts = < 0x04 0x02 >;
|
|
clock-names = "sysmmu\0master";
|
|
clocks = < 0x02 0x107 0x02 0x100 >;
|
|
power-domains = < 0x0b >;
|
|
#iommu-cells = < 0x00 >;
|
|
phandle = < 0x0d >;
|
|
};
|
|
|
|
sysmmu@11a30000 {
|
|
compatible = "samsung,exynos-sysmmu";
|
|
reg = < 0x11a30000 0x1000 >;
|
|
interrupt-parent = < 0x09 >;
|
|
interrupts = < 0x04 0x03 >;
|
|
clock-names = "sysmmu\0master";
|
|
clocks = < 0x02 0x108 0x02 0x101 >;
|
|
power-domains = < 0x0b >;
|
|
#iommu-cells = < 0x00 >;
|
|
phandle = < 0x0e >;
|
|
};
|
|
|
|
sysmmu@11a40000 {
|
|
compatible = "samsung,exynos-sysmmu";
|
|
reg = < 0x11a40000 0x1000 >;
|
|
interrupt-parent = < 0x09 >;
|
|
interrupts = < 0x04 0x04 >;
|
|
clock-names = "sysmmu\0master";
|
|
clocks = < 0x02 0x109 0x02 0x102 >;
|
|
power-domains = < 0x0b >;
|
|
#iommu-cells = < 0x00 >;
|
|
phandle = < 0x0f >;
|
|
};
|
|
|
|
sysmmu@11a50000 {
|
|
compatible = "samsung,exynos-sysmmu";
|
|
reg = < 0x11a50000 0x1000 >;
|
|
interrupt-parent = < 0x09 >;
|
|
interrupts = < 0x04 0x05 >;
|
|
clock-names = "sysmmu\0master";
|
|
clocks = < 0x02 0x10a 0x02 0x103 >;
|
|
power-domains = < 0x0b >;
|
|
#iommu-cells = < 0x00 >;
|
|
phandle = < 0x10 >;
|
|
};
|
|
|
|
sysmmu@11a60000 {
|
|
compatible = "samsung,exynos-sysmmu";
|
|
reg = < 0x11a60000 0x1000 >;
|
|
interrupt-parent = < 0x09 >;
|
|
interrupts = < 0x04 0x06 >;
|
|
clock-names = "sysmmu\0master";
|
|
clocks = < 0x02 0x10b 0x02 0x106 >;
|
|
power-domains = < 0x0b >;
|
|
#iommu-cells = < 0x00 >;
|
|
phandle = < 0x3a >;
|
|
};
|
|
|
|
sysmmu@12a30000 {
|
|
compatible = "samsung,exynos-sysmmu";
|
|
reg = < 0x12a30000 0x1000 >;
|
|
interrupt-parent = < 0x09 >;
|
|
interrupts = < 0x05 0x00 >;
|
|
clock-names = "sysmmu\0master";
|
|
clocks = < 0x02 0x119 0x02 0x116 >;
|
|
#iommu-cells = < 0x00 >;
|
|
phandle = < 0x3b >;
|
|
};
|
|
|
|
sysmmu@11e20000 {
|
|
compatible = "samsung,exynos-sysmmu";
|
|
reg = < 0x11e20000 0x1000 >;
|
|
interrupt-parent = < 0x09 >;
|
|
interrupts = < 0x05 0x02 >;
|
|
clock-names = "sysmmu\0master";
|
|
clocks = < 0x02 0x11f 0x02 0x11b >;
|
|
power-domains = < 0x08 >;
|
|
#iommu-cells = < 0x00 >;
|
|
phandle = < 0x38 >;
|
|
};
|
|
|
|
sss@10830000 {
|
|
compatible = "samsung,exynos4210-secss";
|
|
reg = < 0x10830000 0x300 >;
|
|
interrupts = < 0x00 0x70 0x04 >;
|
|
clocks = < 0x02 0xff >;
|
|
clock-names = "secss";
|
|
};
|
|
|
|
rng@10830400 {
|
|
compatible = "samsung,exynos4-rng";
|
|
reg = < 0x10830400 0x200 >;
|
|
clocks = < 0x02 0xff >;
|
|
clock-names = "secss";
|
|
};
|
|
|
|
pinctrl@11400000 {
|
|
compatible = "samsung,exynos4x12-pinctrl";
|
|
reg = < 0x11400000 0x1000 >;
|
|
interrupts = < 0x00 0x2f 0x04 >;
|
|
|
|
gpa0 {
|
|
gpio-controller;
|
|
#gpio-cells = < 0x02 >;
|
|
interrupt-controller;
|
|
#interrupt-cells = < 0x02 >;
|
|
};
|
|
|
|
gpa1 {
|
|
gpio-controller;
|
|
#gpio-cells = < 0x02 >;
|
|
interrupt-controller;
|
|
#interrupt-cells = < 0x02 >;
|
|
phandle = < 0x69 >;
|
|
};
|
|
|
|
gpb {
|
|
gpio-controller;
|
|
#gpio-cells = < 0x02 >;
|
|
interrupt-controller;
|
|
#interrupt-cells = < 0x02 >;
|
|
};
|
|
|
|
gpc0 {
|
|
gpio-controller;
|
|
#gpio-cells = < 0x02 >;
|
|
interrupt-controller;
|
|
#interrupt-cells = < 0x02 >;
|
|
};
|
|
|
|
gpc1 {
|
|
gpio-controller;
|
|
#gpio-cells = < 0x02 >;
|
|
interrupt-controller;
|
|
#interrupt-cells = < 0x02 >;
|
|
phandle = < 0x68 >;
|
|
};
|
|
|
|
gpd0 {
|
|
gpio-controller;
|
|
#gpio-cells = < 0x02 >;
|
|
interrupt-controller;
|
|
#interrupt-cells = < 0x02 >;
|
|
};
|
|
|
|
gpd1 {
|
|
gpio-controller;
|
|
#gpio-cells = < 0x02 >;
|
|
interrupt-controller;
|
|
#interrupt-cells = < 0x02 >;
|
|
};
|
|
|
|
gpf0 {
|
|
gpio-controller;
|
|
#gpio-cells = < 0x02 >;
|
|
interrupt-controller;
|
|
#interrupt-cells = < 0x02 >;
|
|
};
|
|
|
|
gpf1 {
|
|
gpio-controller;
|
|
#gpio-cells = < 0x02 >;
|
|
interrupt-controller;
|
|
#interrupt-cells = < 0x02 >;
|
|
};
|
|
|
|
gpf2 {
|
|
gpio-controller;
|
|
#gpio-cells = < 0x02 >;
|
|
interrupt-controller;
|
|
#interrupt-cells = < 0x02 >;
|
|
};
|
|
|
|
gpf3 {
|
|
gpio-controller;
|
|
#gpio-cells = < 0x02 >;
|
|
interrupt-controller;
|
|
#interrupt-cells = < 0x02 >;
|
|
};
|
|
|
|
gpj0 {
|
|
gpio-controller;
|
|
#gpio-cells = < 0x02 >;
|
|
interrupt-controller;
|
|
#interrupt-cells = < 0x02 >;
|
|
};
|
|
|
|
gpj1 {
|
|
gpio-controller;
|
|
#gpio-cells = < 0x02 >;
|
|
interrupt-controller;
|
|
#interrupt-cells = < 0x02 >;
|
|
};
|
|
|
|
uart0-data {
|
|
samsung,pins = "gpa0-0\0gpa0-1";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
};
|
|
|
|
uart0-fctl {
|
|
samsung,pins = "gpa0-2\0gpa0-3";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
};
|
|
|
|
uart1-data {
|
|
samsung,pins = "gpa0-4\0gpa0-5";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
};
|
|
|
|
uart1-fctl {
|
|
samsung,pins = "gpa0-6\0gpa0-7";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
};
|
|
|
|
i2c2-bus {
|
|
samsung,pins = "gpa0-6\0gpa0-7";
|
|
samsung,pin-function = < 0x03 >;
|
|
samsung,pin-pud = < 0x03 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
phandle = < 0x2f >;
|
|
};
|
|
|
|
uart2-data {
|
|
samsung,pins = "gpa1-0\0gpa1-1";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
};
|
|
|
|
uart2-fctl {
|
|
samsung,pins = "gpa1-2\0gpa1-3";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
};
|
|
|
|
uart-audio-a {
|
|
samsung,pins = "gpa1-0\0gpa1-1";
|
|
samsung,pin-function = < 0x04 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
};
|
|
|
|
i2c3-bus {
|
|
samsung,pins = "gpa1-2\0gpa1-3";
|
|
samsung,pin-function = < 0x03 >;
|
|
samsung,pin-pud = < 0x03 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
phandle = < 0x30 >;
|
|
};
|
|
|
|
uart3-data {
|
|
samsung,pins = "gpa1-4\0gpa1-5";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
};
|
|
|
|
uart-audio-b {
|
|
samsung,pins = "gpa1-4\0gpa1-5";
|
|
samsung,pin-function = < 0x04 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
};
|
|
|
|
spi0-bus {
|
|
samsung,pins = "gpb-0\0gpb-2\0gpb-3";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x03 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
phandle = < 0x35 >;
|
|
};
|
|
|
|
i2c4-bus {
|
|
samsung,pins = "gpb-0\0gpb-1";
|
|
samsung,pin-function = < 0x03 >;
|
|
samsung,pin-pud = < 0x03 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
phandle = < 0x31 >;
|
|
};
|
|
|
|
spi1-bus {
|
|
samsung,pins = "gpb-4\0gpb-6\0gpb-7";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x03 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
phandle = < 0x36 >;
|
|
};
|
|
|
|
i2c5-bus {
|
|
samsung,pins = "gpb-2\0gpb-3";
|
|
samsung,pin-function = < 0x03 >;
|
|
samsung,pin-pud = < 0x03 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
phandle = < 0x32 >;
|
|
};
|
|
|
|
i2s1-bus {
|
|
samsung,pins = "gpc0-0\0gpc0-1\0gpc0-2\0gpc0-3\0gpc0-4";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
};
|
|
|
|
pcm1-bus {
|
|
samsung,pins = "gpc0-0\0gpc0-1\0gpc0-2\0gpc0-3\0gpc0-4";
|
|
samsung,pin-function = < 0x03 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
};
|
|
|
|
ac97-bus {
|
|
samsung,pins = "gpc0-0\0gpc0-1\0gpc0-2\0gpc0-3\0gpc0-4";
|
|
samsung,pin-function = < 0x04 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
};
|
|
|
|
i2s2-bus {
|
|
samsung,pins = "gpc1-0\0gpc1-1\0gpc1-2\0gpc1-3\0gpc1-4";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
};
|
|
|
|
pcm2-bus {
|
|
samsung,pins = "gpc1-0\0gpc1-1\0gpc1-2\0gpc1-3\0gpc1-4";
|
|
samsung,pin-function = < 0x03 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
};
|
|
|
|
spdif-bus {
|
|
samsung,pins = "gpc1-0\0gpc1-1";
|
|
samsung,pin-function = < 0x04 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
};
|
|
|
|
i2c6-bus {
|
|
samsung,pins = "gpc1-3\0gpc1-4";
|
|
samsung,pin-function = < 0x04 >;
|
|
samsung,pin-pud = < 0x03 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
phandle = < 0x33 >;
|
|
};
|
|
|
|
spi2-bus {
|
|
samsung,pins = "gpc1-1\0gpc1-3\0gpc1-4";
|
|
samsung,pin-function = < 0x05 >;
|
|
samsung,pin-pud = < 0x03 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
phandle = < 0x37 >;
|
|
};
|
|
|
|
pwm0-out {
|
|
samsung,pins = "gpd0-0";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
};
|
|
|
|
pwm1-out {
|
|
samsung,pins = "gpd0-1";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
};
|
|
|
|
lcd-ctrl {
|
|
samsung,pins = "gpd0-0\0gpd0-1";
|
|
samsung,pin-function = < 0x03 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
};
|
|
|
|
i2c7-bus {
|
|
samsung,pins = "gpd0-2\0gpd0-3";
|
|
samsung,pin-function = < 0x03 >;
|
|
samsung,pin-pud = < 0x03 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
phandle = < 0x34 >;
|
|
};
|
|
|
|
pwm2-out {
|
|
samsung,pins = "gpd0-2";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
};
|
|
|
|
pwm3-out {
|
|
samsung,pins = "gpd0-3";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
};
|
|
|
|
i2c0-bus {
|
|
samsung,pins = "gpd1-0\0gpd1-1";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x03 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
phandle = < 0x2a >;
|
|
};
|
|
|
|
mipi0-clk {
|
|
samsung,pins = "gpd1-0\0gpd1-1";
|
|
samsung,pin-function = < 0x03 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
};
|
|
|
|
i2c1-bus {
|
|
samsung,pins = "gpd1-2\0gpd1-3";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x03 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
phandle = < 0x2d >;
|
|
};
|
|
|
|
mipi1-clk {
|
|
samsung,pins = "gpd1-2\0gpd1-3";
|
|
samsung,pin-function = < 0x03 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
};
|
|
|
|
lcd-clk {
|
|
samsung,pins = "gpf0-0\0gpf0-1\0gpf0-2\0gpf0-3";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
};
|
|
|
|
lcd-data-width16 {
|
|
samsung,pins = "gpf0-7\0gpf1-0\0gpf1-1\0gpf1-2\0gpf1-3\0gpf1-6\0gpf1-7\0gpf2-0\0gpf2-1\0gpf2-2\0gpf2-3\0gpf2-7\0gpf3-0\0gpf3-1\0gpf3-2\0gpf3-3";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
};
|
|
|
|
lcd-data-width18 {
|
|
samsung,pins = "gpf0-6\0gpf0-7\0gpf1-0\0gpf1-1\0gpf1-2\0gpf1-3\0gpf1-6\0gpf1-7\0gpf2-0\0gpf2-1\0gpf2-2\0gpf2-3\0gpf2-6\0gpf2-7\0gpf3-0\0gpf3-1\0gpf3-2\0gpf3-3";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
};
|
|
|
|
lcd-data-width24 {
|
|
samsung,pins = "gpf0-4\0gpf0-5\0gpf0-6\0gpf0-7\0gpf1-0\0gpf1-1\0gpf1-2\0gpf1-3\0gpf1-4\0gpf1-5\0gpf1-6\0gpf1-7\0gpf2-0\0gpf2-1\0gpf2-2\0gpf2-3\0gpf2-4\0gpf2-5\0gpf2-6\0gpf2-7\0gpf3-0\0gpf3-1\0gpf3-2\0gpf3-3";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
};
|
|
|
|
lcd-ldi {
|
|
samsung,pins = "gpf3-4";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
};
|
|
|
|
cam-port-a-io {
|
|
samsung,pins = "gpj0-0\0gpj0-1\0gpj0-2\0gpj0-3\0gpj0-4\0gpj0-5\0gpj0-6\0gpj0-7\0gpj1-0\0gpj1-1\0gpj1-2\0gpj1-4";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
};
|
|
|
|
cam-port-a-clk-active {
|
|
samsung,pins = "gpj1-3";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x03 >;
|
|
};
|
|
|
|
cam-port-a-clk-idle {
|
|
samsung,pins = "gpj1-3";
|
|
samsung,pin-function = < 0x00 >;
|
|
samsung,pin-pud = < 0x01 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
};
|
|
};
|
|
|
|
pinctrl@11000000 {
|
|
compatible = "samsung,exynos4x12-pinctrl";
|
|
reg = < 0x11000000 0x1000 >;
|
|
interrupts = < 0x00 0x2e 0x04 >;
|
|
|
|
wakeup-interrupt-controller {
|
|
compatible = "samsung,exynos4210-wakeup-eint";
|
|
interrupt-parent = < 0x01 >;
|
|
interrupts = < 0x00 0x20 0x04 >;
|
|
};
|
|
|
|
gpk0 {
|
|
gpio-controller;
|
|
#gpio-cells = < 0x02 >;
|
|
interrupt-controller;
|
|
#interrupt-cells = < 0x02 >;
|
|
};
|
|
|
|
gpk1 {
|
|
gpio-controller;
|
|
#gpio-cells = < 0x02 >;
|
|
interrupt-controller;
|
|
#interrupt-cells = < 0x02 >;
|
|
phandle = < 0x67 >;
|
|
};
|
|
|
|
gpk2 {
|
|
gpio-controller;
|
|
#gpio-cells = < 0x02 >;
|
|
interrupt-controller;
|
|
#interrupt-cells = < 0x02 >;
|
|
phandle = < 0x20 >;
|
|
};
|
|
|
|
gpk3 {
|
|
gpio-controller;
|
|
#gpio-cells = < 0x02 >;
|
|
interrupt-controller;
|
|
#interrupt-cells = < 0x02 >;
|
|
};
|
|
|
|
gpl0 {
|
|
gpio-controller;
|
|
#gpio-cells = < 0x02 >;
|
|
interrupt-controller;
|
|
#interrupt-cells = < 0x02 >;
|
|
};
|
|
|
|
gpl1 {
|
|
gpio-controller;
|
|
#gpio-cells = < 0x02 >;
|
|
interrupt-controller;
|
|
#interrupt-cells = < 0x02 >;
|
|
};
|
|
|
|
gpl2 {
|
|
gpio-controller;
|
|
#gpio-cells = < 0x02 >;
|
|
interrupt-controller;
|
|
#interrupt-cells = < 0x02 >;
|
|
};
|
|
|
|
gpm0 {
|
|
gpio-controller;
|
|
#gpio-cells = < 0x02 >;
|
|
interrupt-controller;
|
|
#interrupt-cells = < 0x02 >;
|
|
};
|
|
|
|
gpm1 {
|
|
gpio-controller;
|
|
#gpio-cells = < 0x02 >;
|
|
interrupt-controller;
|
|
#interrupt-cells = < 0x02 >;
|
|
};
|
|
|
|
gpm2 {
|
|
gpio-controller;
|
|
#gpio-cells = < 0x02 >;
|
|
interrupt-controller;
|
|
#interrupt-cells = < 0x02 >;
|
|
};
|
|
|
|
gpm3 {
|
|
gpio-controller;
|
|
#gpio-cells = < 0x02 >;
|
|
interrupt-controller;
|
|
#interrupt-cells = < 0x02 >;
|
|
};
|
|
|
|
gpm4 {
|
|
gpio-controller;
|
|
#gpio-cells = < 0x02 >;
|
|
interrupt-controller;
|
|
#interrupt-cells = < 0x02 >;
|
|
};
|
|
|
|
gpy0 {
|
|
gpio-controller;
|
|
#gpio-cells = < 0x02 >;
|
|
};
|
|
|
|
gpy1 {
|
|
gpio-controller;
|
|
#gpio-cells = < 0x02 >;
|
|
};
|
|
|
|
gpy2 {
|
|
gpio-controller;
|
|
#gpio-cells = < 0x02 >;
|
|
};
|
|
|
|
gpy3 {
|
|
gpio-controller;
|
|
#gpio-cells = < 0x02 >;
|
|
};
|
|
|
|
gpy4 {
|
|
gpio-controller;
|
|
#gpio-cells = < 0x02 >;
|
|
};
|
|
|
|
gpy5 {
|
|
gpio-controller;
|
|
#gpio-cells = < 0x02 >;
|
|
};
|
|
|
|
gpy6 {
|
|
gpio-controller;
|
|
#gpio-cells = < 0x02 >;
|
|
};
|
|
|
|
gpx0 {
|
|
gpio-controller;
|
|
#gpio-cells = < 0x02 >;
|
|
interrupt-controller;
|
|
interrupt-parent = < 0x01 >;
|
|
interrupts = < 0x00 0x10 0x04 0x00 0x11 0x04 0x00 0x12 0x04 0x00 0x13 0x04 0x00 0x14 0x04 0x00 0x15 0x04 0x00 0x16 0x04 0x00 0x17 0x04 >;
|
|
#interrupt-cells = < 0x02 >;
|
|
phandle = < 0x2e >;
|
|
};
|
|
|
|
gpx1 {
|
|
gpio-controller;
|
|
#gpio-cells = < 0x02 >;
|
|
interrupt-controller;
|
|
interrupt-parent = < 0x01 >;
|
|
interrupts = < 0x00 0x18 0x04 0x00 0x19 0x04 0x00 0x1a 0x04 0x00 0x1b 0x04 0x00 0x1c 0x04 0x00 0x1d 0x04 0x00 0x1e 0x04 0x00 0x1f 0x04 >;
|
|
#interrupt-cells = < 0x02 >;
|
|
phandle = < 0x63 >;
|
|
};
|
|
|
|
gpx2 {
|
|
gpio-controller;
|
|
#gpio-cells = < 0x02 >;
|
|
interrupt-controller;
|
|
#interrupt-cells = < 0x02 >;
|
|
phandle = < 0x64 >;
|
|
};
|
|
|
|
gpx3 {
|
|
gpio-controller;
|
|
#gpio-cells = < 0x02 >;
|
|
interrupt-controller;
|
|
#interrupt-cells = < 0x02 >;
|
|
phandle = < 0x2b >;
|
|
};
|
|
|
|
sd0-clk {
|
|
samsung,pins = "gpk0-0";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x03 >;
|
|
};
|
|
|
|
sd0-cmd {
|
|
samsung,pins = "gpk0-1";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x03 >;
|
|
};
|
|
|
|
sd0-cd {
|
|
samsung,pins = "gpk0-2";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x03 >;
|
|
samsung,pin-drv = < 0x03 >;
|
|
};
|
|
|
|
sd0-bus-width1 {
|
|
samsung,pins = "gpk0-3";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x03 >;
|
|
samsung,pin-drv = < 0x03 >;
|
|
};
|
|
|
|
sd0-bus-width4 {
|
|
samsung,pins = "gpk0-3\0gpk0-4\0gpk0-5\0gpk0-6";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x03 >;
|
|
samsung,pin-drv = < 0x03 >;
|
|
};
|
|
|
|
sd0-bus-width8 {
|
|
samsung,pins = "gpk1-3\0gpk1-4\0gpk1-5\0gpk1-6";
|
|
samsung,pin-function = < 0x03 >;
|
|
samsung,pin-pud = < 0x03 >;
|
|
samsung,pin-drv = < 0x03 >;
|
|
};
|
|
|
|
sd4-clk {
|
|
samsung,pins = "gpk0-0";
|
|
samsung,pin-function = < 0x03 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x03 >;
|
|
phandle = < 0x46 >;
|
|
};
|
|
|
|
sd4-cmd {
|
|
samsung,pins = "gpk0-1";
|
|
samsung,pin-function = < 0x03 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x03 >;
|
|
phandle = < 0x47 >;
|
|
};
|
|
|
|
sd4-cd {
|
|
samsung,pins = "gpk0-2";
|
|
samsung,pin-function = < 0x03 >;
|
|
samsung,pin-pud = < 0x03 >;
|
|
samsung,pin-drv = < 0x03 >;
|
|
};
|
|
|
|
sd4-bus-width1 {
|
|
samsung,pins = "gpk0-3";
|
|
samsung,pin-function = < 0x03 >;
|
|
samsung,pin-pud = < 0x03 >;
|
|
samsung,pin-drv = < 0x03 >;
|
|
};
|
|
|
|
sd4-bus-width4 {
|
|
samsung,pins = "gpk0-3\0gpk0-4\0gpk0-5\0gpk0-6";
|
|
samsung,pin-function = < 0x03 >;
|
|
samsung,pin-pud = < 0x03 >;
|
|
samsung,pin-drv = < 0x03 >;
|
|
phandle = < 0x48 >;
|
|
};
|
|
|
|
sd4-bus-width8 {
|
|
samsung,pins = "gpk1-3\0gpk1-4\0gpk1-5\0gpk1-6";
|
|
samsung,pin-function = < 0x04 >;
|
|
samsung,pin-pud = < 0x03 >;
|
|
samsung,pin-drv = < 0x03 >;
|
|
phandle = < 0x49 >;
|
|
};
|
|
|
|
sd1-clk {
|
|
samsung,pins = "gpk1-0";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x03 >;
|
|
};
|
|
|
|
sd1-cmd {
|
|
samsung,pins = "gpk1-1";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x03 >;
|
|
};
|
|
|
|
sd1-cd {
|
|
samsung,pins = "gpk1-2";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
phandle = < 0x66 >;
|
|
};
|
|
|
|
sd1-bus-width1 {
|
|
samsung,pins = "gpk1-3";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x03 >;
|
|
samsung,pin-drv = < 0x03 >;
|
|
};
|
|
|
|
sd1-bus-width4 {
|
|
samsung,pins = "gpk1-3\0gpk1-4\0gpk1-5\0gpk1-6";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x03 >;
|
|
samsung,pin-drv = < 0x03 >;
|
|
};
|
|
|
|
sd2-clk {
|
|
samsung,pins = "gpk2-0";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x03 >;
|
|
phandle = < 0x1a >;
|
|
};
|
|
|
|
sd2-cmd {
|
|
samsung,pins = "gpk2-1";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x03 >;
|
|
phandle = < 0x1b >;
|
|
};
|
|
|
|
sd2-cd {
|
|
samsung,pins = "gpk2-2";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x03 >;
|
|
samsung,pin-drv = < 0x03 >;
|
|
phandle = < 0x1c >;
|
|
};
|
|
|
|
sd2-bus-width1 {
|
|
samsung,pins = "gpk2-3";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x03 >;
|
|
samsung,pin-drv = < 0x03 >;
|
|
};
|
|
|
|
sd2-bus-width4 {
|
|
samsung,pins = "gpk2-3\0gpk2-4\0gpk2-5\0gpk2-6";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x03 >;
|
|
samsung,pin-drv = < 0x03 >;
|
|
phandle = < 0x1d >;
|
|
};
|
|
|
|
sd2-bus-width8 {
|
|
samsung,pins = "gpk3-3\0gpk3-4\0gpk3-5\0gpk3-6";
|
|
samsung,pin-function = < 0x03 >;
|
|
samsung,pin-pud = < 0x03 >;
|
|
samsung,pin-drv = < 0x03 >;
|
|
};
|
|
|
|
sd3-clk {
|
|
samsung,pins = "gpk3-0";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x03 >;
|
|
};
|
|
|
|
sd3-cmd {
|
|
samsung,pins = "gpk3-1";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x03 >;
|
|
};
|
|
|
|
sd3-cd {
|
|
samsung,pins = "gpk3-2";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x03 >;
|
|
samsung,pin-drv = < 0x03 >;
|
|
};
|
|
|
|
sd3-bus-width1 {
|
|
samsung,pins = "gpk3-3";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x03 >;
|
|
samsung,pin-drv = < 0x03 >;
|
|
};
|
|
|
|
sd3-bus-width4 {
|
|
samsung,pins = "gpk3-3\0gpk3-4\0gpk3-5\0gpk3-6";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x03 >;
|
|
samsung,pin-drv = < 0x03 >;
|
|
};
|
|
|
|
cam-port-b-io {
|
|
samsung,pins = "gpm0-0\0gpm0-1\0gpm0-2\0gpm0-3\0gpm0-4\0gpm0-5\0gpm0-6\0gpm0-7\0gpm1-0\0gpm1-1\0gpm2-0\0gpm2-1";
|
|
samsung,pin-function = < 0x03 >;
|
|
samsung,pin-pud = < 0x03 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
};
|
|
|
|
cam-port-b-clk-active {
|
|
samsung,pins = "gpm2-2";
|
|
samsung,pin-function = < 0x03 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x03 >;
|
|
};
|
|
|
|
cam-port-b-clk-idle {
|
|
samsung,pins = "gpm2-2";
|
|
samsung,pin-function = < 0x00 >;
|
|
samsung,pin-pud = < 0x01 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
};
|
|
|
|
ext-int0 {
|
|
samsung,pins = "gpx0-0";
|
|
samsung,pin-function = < 0x0f >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
};
|
|
|
|
ext-int8 {
|
|
samsung,pins = "gpx1-0";
|
|
samsung,pin-function = < 0x0f >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
};
|
|
|
|
ext-int15 {
|
|
samsung,pins = "gpx1-7";
|
|
samsung,pin-function = < 0x0f >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
};
|
|
|
|
ext-int16 {
|
|
samsung,pins = "gpx2-0";
|
|
samsung,pin-function = < 0x0f >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
};
|
|
|
|
ext-int31 {
|
|
samsung,pins = "gpx3-7";
|
|
samsung,pin-function = < 0x0f >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
};
|
|
|
|
fimc-is-i2c0 {
|
|
samsung,pins = "gpm4-0\0gpm4-1";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
};
|
|
|
|
fimc-is-i2c1 {
|
|
samsung,pins = "gpm4-2\0gpm4-3";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
};
|
|
|
|
fimc-is-uart {
|
|
samsung,pins = "gpm3-5\0gpm3-7";
|
|
samsung,pin-function = < 0x03 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
};
|
|
|
|
hdmi-cec {
|
|
samsung,pins = "gpx3-6";
|
|
samsung,pin-function = < 0x03 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
phandle = < 0x42 >;
|
|
};
|
|
|
|
power_key {
|
|
samsung,pins = "gpx1-3";
|
|
samsung,pin-pud = < 0x00 >;
|
|
phandle = < 0x61 >;
|
|
};
|
|
|
|
max77686-irq {
|
|
samsung,pins = "gpx3-2";
|
|
samsung,pin-function = < 0x00 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
phandle = < 0x2c >;
|
|
};
|
|
|
|
hdmi-hpd {
|
|
samsung,pins = "gpx3-7";
|
|
samsung,pin-pud = < 0x01 >;
|
|
phandle = < 0x3e >;
|
|
};
|
|
|
|
home_key {
|
|
samsung,pins = "gpx2-2";
|
|
samsung,pin-pud = < 0x00 >;
|
|
phandle = < 0x62 >;
|
|
};
|
|
};
|
|
|
|
pinctrl@3860000 {
|
|
compatible = "samsung,exynos4x12-pinctrl";
|
|
reg = < 0x3860000 0x1000 >;
|
|
interrupt-parent = < 0x09 >;
|
|
interrupts = < 0x0a 0x00 >;
|
|
|
|
gpz {
|
|
gpio-controller;
|
|
#gpio-cells = < 0x02 >;
|
|
interrupt-controller;
|
|
#interrupt-cells = < 0x02 >;
|
|
};
|
|
|
|
i2s0-bus {
|
|
samsung,pins = "gpz-0\0gpz-1\0gpz-2\0gpz-3\0gpz-4\0gpz-5\0gpz-6";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
phandle = < 0x05 >;
|
|
};
|
|
|
|
pcm0-bus {
|
|
samsung,pins = "gpz-0\0gpz-1\0gpz-2\0gpz-3\0gpz-4";
|
|
samsung,pin-function = < 0x03 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
};
|
|
};
|
|
|
|
pinctrl@106e0000 {
|
|
compatible = "samsung,exynos4x12-pinctrl";
|
|
reg = < 0x106e0000 0x1000 >;
|
|
interrupts = < 0x00 0x48 0x04 >;
|
|
|
|
gpv0 {
|
|
gpio-controller;
|
|
#gpio-cells = < 0x02 >;
|
|
interrupt-controller;
|
|
#interrupt-cells = < 0x02 >;
|
|
};
|
|
|
|
gpv1 {
|
|
gpio-controller;
|
|
#gpio-cells = < 0x02 >;
|
|
interrupt-controller;
|
|
#interrupt-cells = < 0x02 >;
|
|
};
|
|
|
|
gpv2 {
|
|
gpio-controller;
|
|
#gpio-cells = < 0x02 >;
|
|
interrupt-controller;
|
|
#interrupt-cells = < 0x02 >;
|
|
};
|
|
|
|
gpv3 {
|
|
gpio-controller;
|
|
#gpio-cells = < 0x02 >;
|
|
interrupt-controller;
|
|
#interrupt-cells = < 0x02 >;
|
|
};
|
|
|
|
gpv4 {
|
|
gpio-controller;
|
|
#gpio-cells = < 0x02 >;
|
|
interrupt-controller;
|
|
#interrupt-cells = < 0x02 >;
|
|
};
|
|
|
|
c2c-bus {
|
|
samsung,pins = "gpv0-0\0gpv0-1\0gpv0-2\0gpv0-3\0gpv0-4\0gpv0-5\0gpv0-6\0gpv0-7\0gpv1-0\0gpv1-1\0gpv1-2\0gpv1-3\0gpv1-4\0gpv1-5\0gpv1-6\0gpv1-7\0gpv2-0\0gpv2-1\0gpv2-2\0gpv2-3\0gpv2-4\0gpv2-5\0gpv2-6\0gpv2-7\0gpv3-0\0gpv3-1\0gpv3-2\0gpv3-3\0gpv3-4\0gpv3-5\0gpv3-6\0gpv3-7\0gpv4-0\0gpv4-1";
|
|
samsung,pin-function = < 0x02 >;
|
|
samsung,pin-pud = < 0x00 >;
|
|
samsung,pin-drv = < 0x00 >;
|
|
};
|
|
};
|
|
|
|
sysram@2020000 {
|
|
compatible = "mmio-sram";
|
|
reg = < 0x2020000 0x40000 >;
|
|
#address-cells = < 0x01 >;
|
|
#size-cells = < 0x01 >;
|
|
ranges = < 0x00 0x2020000 0x40000 >;
|
|
|
|
smp-sysram@0 {
|
|
compatible = "samsung,exynos4210-sysram";
|
|
reg = < 0x00 0x1000 >;
|
|
};
|
|
|
|
smp-sysram@2f000 {
|
|
compatible = "samsung,exynos4210-sysram-ns";
|
|
reg = < 0x2f000 0x1000 >;
|
|
};
|
|
};
|
|
|
|
isp-power-domain@10023ca0 {
|
|
compatible = "samsung,exynos4210-pd";
|
|
reg = < 0x10023ca0 0x20 >;
|
|
#power-domain-cells = < 0x00 >;
|
|
label = "ISP";
|
|
phandle = < 0x11 >;
|
|
};
|
|
|
|
l2-cache-controller@10502000 {
|
|
compatible = "arm,pl310-cache";
|
|
reg = < 0x10502000 0x1000 >;
|
|
cache-unified;
|
|
cache-level = < 0x02 >;
|
|
arm,tag-latency = < 0x02 0x02 0x01 >;
|
|
arm,data-latency = < 0x03 0x02 0x01 >;
|
|
arm,double-linefill = < 0x01 >;
|
|
arm,double-linefill-incr = < 0x00 >;
|
|
arm,double-linefill-wrap = < 0x01 >;
|
|
arm,prefetch-drop = < 0x01 >;
|
|
arm,prefetch-offset = < 0x07 >;
|
|
};
|
|
|
|
clock-controller@10030000 {
|
|
compatible = "samsung,exynos4412-clock";
|
|
reg = < 0x10030000 0x18000 >;
|
|
#clock-cells = < 0x01 >;
|
|
assigned-clocks = < 0x02 0x06 >;
|
|
assigned-clock-rates = < 0x2b11001 >;
|
|
phandle = < 0x02 >;
|
|
};
|
|
|
|
clock-controller@10048000 {
|
|
compatible = "samsung,exynos4412-isp-clock";
|
|
reg = < 0x10048000 0x1000 >;
|
|
#clock-cells = < 0x01 >;
|
|
power-domains = < 0x11 >;
|
|
clocks = < 0x02 0x0d 0x02 0x18b >;
|
|
clock-names = "aclk200\0aclk400_mcuisp";
|
|
phandle = < 0x12 >;
|
|
};
|
|
|
|
mct@10050000 {
|
|
compatible = "samsung,exynos4412-mct";
|
|
reg = < 0x10050000 0x800 >;
|
|
interrupt-parent = < 0x44 >;
|
|
interrupts = < 0x00 0x01 0x02 0x03 0x04 >;
|
|
clocks = < 0x02 0x03 0x02 0x158 >;
|
|
clock-names = "fin_pll\0mct";
|
|
|
|
mct-map {
|
|
#interrupt-cells = < 0x01 >;
|
|
#address-cells = < 0x00 >;
|
|
#size-cells = < 0x00 >;
|
|
interrupt-map = < 0x00 0x01 0x00 0x39 0x04 0x01 0x09 0x0c 0x05 0x02 0x09 0x0c 0x06 0x03 0x09 0x0c 0x07 0x04 0x01 0x01 0x0c 0x04 >;
|
|
phandle = < 0x44 >;
|
|
};
|
|
};
|
|
|
|
watchdog@10060000 {
|
|
compatible = "samsung,exynos5250-wdt";
|
|
reg = < 0x10060000 0x100 >;
|
|
interrupts = < 0x00 0x2b 0x04 >;
|
|
clocks = < 0x02 0x159 >;
|
|
clock-names = "watchdog";
|
|
samsung,syscon-phandle = < 0x07 >;
|
|
};
|
|
|
|
adc@126c0000 {
|
|
compatible = "samsung,exynos-adc-v1";
|
|
reg = < 0x126c0000 0x100 >;
|
|
interrupt-parent = < 0x09 >;
|
|
interrupts = < 0x0a 0x03 >;
|
|
clocks = < 0x02 0x146 >;
|
|
clock-names = "adc";
|
|
#io-channel-cells = < 0x01 >;
|
|
io-channel-ranges;
|
|
samsung,syscon-phandle = < 0x07 >;
|
|
status = "okay";
|
|
vdd-supply = < 0x39 >;
|
|
};
|
|
|
|
g2d@10800000 {
|
|
compatible = "samsung,exynos4212-g2d";
|
|
reg = < 0x10800000 0x1000 >;
|
|
interrupts = < 0x00 0x59 0x04 >;
|
|
clocks = < 0x02 0xb1 0x02 0x115 >;
|
|
clock-names = "sclk_fimg2d\0fimg2d";
|
|
iommus = < 0x45 >;
|
|
};
|
|
|
|
mmc@12550000 {
|
|
compatible = "samsung,exynos4412-dw-mshc";
|
|
reg = < 0x12550000 0x1000 >;
|
|
interrupts = < 0x00 0x4d 0x04 >;
|
|
#address-cells = < 0x01 >;
|
|
#size-cells = < 0x00 >;
|
|
fifo-depth = < 0x80 >;
|
|
clocks = < 0x02 0x12d 0x02 0x95 >;
|
|
clock-names = "biu\0ciu";
|
|
status = "okay";
|
|
pinctrl-0 = < 0x46 0x47 0x48 0x49 >;
|
|
pinctrl-names = "default";
|
|
vmmc-supply = < 0x4a >;
|
|
mmc-pwrseq = < 0x4b >;
|
|
broken-cd;
|
|
card-detect-delay = < 0xc8 >;
|
|
samsung,dw-mshc-ciu-div = < 0x03 >;
|
|
samsung,dw-mshc-sdr-timing = < 0x02 0x03 >;
|
|
samsung,dw-mshc-ddr-timing = < 0x01 0x02 >;
|
|
bus-width = < 0x08 >;
|
|
cap-mmc-highspeed;
|
|
vqmmc-supply = < 0x4c >;
|
|
};
|
|
|
|
sysmmu@10a40000 {
|
|
compatible = "samsung,exynos-sysmmu";
|
|
reg = < 0x10a40000 0x1000 >;
|
|
interrupt-parent = < 0x09 >;
|
|
interrupts = < 0x04 0x07 >;
|
|
clock-names = "sysmmu\0master";
|
|
clocks = < 0x02 0x118 0x02 0x115 >;
|
|
#iommu-cells = < 0x00 >;
|
|
phandle = < 0x45 >;
|
|
};
|
|
|
|
sysmmu@12260000 {
|
|
compatible = "samsung,exynos-sysmmu";
|
|
reg = < 0x12260000 0x1000 >;
|
|
interrupt-parent = < 0x09 >;
|
|
interrupts = < 0x10 0x02 >;
|
|
power-domains = < 0x11 >;
|
|
clock-names = "sysmmu";
|
|
clocks = < 0x12 0x08 >;
|
|
#iommu-cells = < 0x00 >;
|
|
phandle = < 0x15 >;
|
|
};
|
|
|
|
sysmmu@12270000 {
|
|
compatible = "samsung,exynos-sysmmu";
|
|
reg = < 0x12270000 0x1000 >;
|
|
interrupt-parent = < 0x09 >;
|
|
interrupts = < 0x10 0x03 >;
|
|
power-domains = < 0x11 >;
|
|
clock-names = "sysmmu";
|
|
clocks = < 0x12 0x09 >;
|
|
#iommu-cells = < 0x00 >;
|
|
phandle = < 0x16 >;
|
|
};
|
|
|
|
sysmmu@122a0000 {
|
|
compatible = "samsung,exynos-sysmmu";
|
|
reg = < 0x122a0000 0x1000 >;
|
|
interrupt-parent = < 0x09 >;
|
|
interrupts = < 0x10 0x04 >;
|
|
power-domains = < 0x11 >;
|
|
clock-names = "sysmmu";
|
|
clocks = < 0x12 0x0a >;
|
|
#iommu-cells = < 0x00 >;
|
|
phandle = < 0x17 >;
|
|
};
|
|
|
|
sysmmu@122b0000 {
|
|
compatible = "samsung,exynos-sysmmu";
|
|
reg = < 0x122b0000 0x1000 >;
|
|
interrupt-parent = < 0x09 >;
|
|
interrupts = < 0x10 0x05 >;
|
|
power-domains = < 0x11 >;
|
|
clock-names = "sysmmu";
|
|
clocks = < 0x12 0x18 >;
|
|
#iommu-cells = < 0x00 >;
|
|
phandle = < 0x18 >;
|
|
};
|
|
|
|
sysmmu@123b0000 {
|
|
compatible = "samsung,exynos-sysmmu";
|
|
reg = < 0x123b0000 0x1000 >;
|
|
interrupt-parent = < 0x09 >;
|
|
interrupts = < 0x10 0x00 >;
|
|
power-domains = < 0x11 >;
|
|
clock-names = "sysmmu\0master";
|
|
clocks = < 0x12 0x0b 0x12 0x04 >;
|
|
#iommu-cells = < 0x00 >;
|
|
phandle = < 0x13 >;
|
|
};
|
|
|
|
sysmmu@123c0000 {
|
|
compatible = "samsung,exynos-sysmmu";
|
|
reg = < 0x123c0000 0x1000 >;
|
|
interrupt-parent = < 0x09 >;
|
|
interrupts = < 0x10 0x01 >;
|
|
power-domains = < 0x11 >;
|
|
clock-names = "sysmmu\0master";
|
|
clocks = < 0x12 0x0c 0x12 0x05 >;
|
|
#iommu-cells = < 0x00 >;
|
|
phandle = < 0x14 >;
|
|
};
|
|
|
|
bus_dmc {
|
|
compatible = "samsung,exynos-bus";
|
|
clocks = < 0x02 0x1c9 >;
|
|
clock-names = "bus";
|
|
operating-points-v2 = < 0x4d >;
|
|
status = "okay";
|
|
devfreq-events = < 0x4e 0x4f >;
|
|
vdd-supply = < 0x50 >;
|
|
phandle = < 0x52 >;
|
|
};
|
|
|
|
bus_acp {
|
|
compatible = "samsung,exynos-bus";
|
|
clocks = < 0x02 0x1c8 >;
|
|
clock-names = "bus";
|
|
operating-points-v2 = < 0x51 >;
|
|
status = "okay";
|
|
devfreq = < 0x52 >;
|
|
};
|
|
|
|
bus_c2c {
|
|
compatible = "samsung,exynos-bus";
|
|
clocks = < 0x02 0x1ca >;
|
|
clock-names = "bus";
|
|
operating-points-v2 = < 0x4d >;
|
|
status = "okay";
|
|
devfreq = < 0x52 >;
|
|
};
|
|
|
|
opp_table1 {
|
|
compatible = "operating-points-v2";
|
|
opp-shared;
|
|
phandle = < 0x4d >;
|
|
|
|
opp-100000000 {
|
|
opp-hz = < 0x00 0x5f5e100 >;
|
|
opp-microvolt = < 0xdbba0 >;
|
|
};
|
|
|
|
opp-134000000 {
|
|
opp-hz = < 0x00 0x7fcad80 >;
|
|
opp-microvolt = < 0xdbba0 >;
|
|
};
|
|
|
|
opp-160000000 {
|
|
opp-hz = < 0x00 0x9896800 >;
|
|
opp-microvolt = < 0xdbba0 >;
|
|
};
|
|
|
|
opp-267000000 {
|
|
opp-hz = < 0x00 0xfea18c0 >;
|
|
opp-microvolt = < 0xe7ef0 >;
|
|
};
|
|
|
|
opp-400000000 {
|
|
opp-hz = < 0x00 0x17d78400 >;
|
|
opp-microvolt = < 0x100590 >;
|
|
};
|
|
};
|
|
|
|
opp_table2 {
|
|
compatible = "operating-points-v2";
|
|
opp-shared;
|
|
phandle = < 0x51 >;
|
|
|
|
opp-100000000 {
|
|
opp-hz = < 0x00 0x5f5e100 >;
|
|
};
|
|
|
|
opp-134000000 {
|
|
opp-hz = < 0x00 0x7fcad80 >;
|
|
};
|
|
|
|
opp-160000000 {
|
|
opp-hz = < 0x00 0x9896800 >;
|
|
};
|
|
|
|
opp-267000000 {
|
|
opp-hz = < 0x00 0xfea18c0 >;
|
|
};
|
|
};
|
|
|
|
bus_leftbus {
|
|
compatible = "samsung,exynos-bus";
|
|
clocks = < 0x02 0x1cb >;
|
|
clock-names = "bus";
|
|
operating-points-v2 = < 0x53 >;
|
|
status = "okay";
|
|
devfreq-events = < 0x54 0x55 >;
|
|
vdd-supply = < 0x56 >;
|
|
phandle = < 0x57 >;
|
|
};
|
|
|
|
bus_rightbus {
|
|
compatible = "samsung,exynos-bus";
|
|
clocks = < 0x02 0x1cc >;
|
|
clock-names = "bus";
|
|
operating-points-v2 = < 0x53 >;
|
|
status = "okay";
|
|
devfreq = < 0x57 >;
|
|
};
|
|
|
|
bus_display {
|
|
compatible = "samsung,exynos-bus";
|
|
clocks = < 0x02 0x0f >;
|
|
clock-names = "bus";
|
|
operating-points-v2 = < 0x58 >;
|
|
status = "okay";
|
|
devfreq = < 0x57 >;
|
|
};
|
|
|
|
bus_fsys {
|
|
compatible = "samsung,exynos-bus";
|
|
clocks = < 0x02 0x10 >;
|
|
clock-names = "bus";
|
|
operating-points-v2 = < 0x59 >;
|
|
status = "okay";
|
|
devfreq = < 0x57 >;
|
|
};
|
|
|
|
bus_peri {
|
|
compatible = "samsung,exynos-bus";
|
|
clocks = < 0x02 0x0e >;
|
|
clock-names = "bus";
|
|
operating-points-v2 = < 0x5a >;
|
|
status = "okay";
|
|
devfreq = < 0x57 >;
|
|
};
|
|
|
|
bus_mfc {
|
|
compatible = "samsung,exynos-bus";
|
|
clocks = < 0x02 0xaa >;
|
|
clock-names = "bus";
|
|
operating-points-v2 = < 0x53 >;
|
|
status = "okay";
|
|
devfreq = < 0x57 >;
|
|
};
|
|
|
|
opp_table3 {
|
|
compatible = "operating-points-v2";
|
|
opp-shared;
|
|
phandle = < 0x53 >;
|
|
|
|
opp-100000000 {
|
|
opp-hz = < 0x00 0x5f5e100 >;
|
|
opp-microvolt = < 0xdbba0 >;
|
|
};
|
|
|
|
opp-134000000 {
|
|
opp-hz = < 0x00 0x7fcad80 >;
|
|
opp-microvolt = < 0xe1d48 >;
|
|
};
|
|
|
|
opp-160000000 {
|
|
opp-hz = < 0x00 0x9896800 >;
|
|
opp-microvolt = < 0xe7ef0 >;
|
|
};
|
|
|
|
opp-200000000 {
|
|
opp-hz = < 0x00 0xbebc200 >;
|
|
opp-microvolt = < 0xf4240 >;
|
|
};
|
|
};
|
|
|
|
opp_table4 {
|
|
compatible = "operating-points-v2";
|
|
opp-shared;
|
|
phandle = < 0x58 >;
|
|
|
|
opp-160000000 {
|
|
opp-hz = < 0x00 0x9896800 >;
|
|
};
|
|
|
|
opp-200000000 {
|
|
opp-hz = < 0x00 0xbebc200 >;
|
|
};
|
|
};
|
|
|
|
opp_table5 {
|
|
compatible = "operating-points-v2";
|
|
opp-shared;
|
|
phandle = < 0x59 >;
|
|
|
|
opp-100000000 {
|
|
opp-hz = < 0x00 0x5f5e100 >;
|
|
};
|
|
|
|
opp-134000000 {
|
|
opp-hz = < 0x00 0x7fcad80 >;
|
|
};
|
|
};
|
|
|
|
opp_table6 {
|
|
compatible = "operating-points-v2";
|
|
opp-shared;
|
|
phandle = < 0x5a >;
|
|
|
|
opp-50000000 {
|
|
opp-hz = < 0x00 0x2faf080 >;
|
|
};
|
|
|
|
opp-100000000 {
|
|
opp-hz = < 0x00 0x5f5e100 >;
|
|
};
|
|
};
|
|
};
|
|
|
|
thermal-zones {
|
|
|
|
cpu-thermal {
|
|
thermal-sensors = < 0x5b 0x00 >;
|
|
polling-delay-passive = < 0x00 >;
|
|
polling-delay = < 0x00 >;
|
|
|
|
trips {
|
|
|
|
cpu-alert-0 {
|
|
temperature = < 0x11170 >;
|
|
hysteresis = < 0x2710 >;
|
|
type = "active";
|
|
phandle = < 0x5c >;
|
|
};
|
|
|
|
cpu-alert-1 {
|
|
temperature = < 0x17318 >;
|
|
hysteresis = < 0x2710 >;
|
|
type = "active";
|
|
phandle = < 0x5e >;
|
|
};
|
|
|
|
cpu-alert-2 {
|
|
temperature = < 0x1adb0 >;
|
|
hysteresis = < 0x2710 >;
|
|
type = "active";
|
|
};
|
|
|
|
cpu-crit-0 {
|
|
temperature = < 0x1d4c0 >;
|
|
hysteresis = < 0x00 >;
|
|
type = "critical";
|
|
};
|
|
};
|
|
|
|
cooling-maps {
|
|
|
|
map0 {
|
|
trip = < 0x5c >;
|
|
cooling-device = < 0x5d 0x07 0x07 >;
|
|
};
|
|
|
|
map1 {
|
|
trip = < 0x5e >;
|
|
cooling-device = < 0x5d 0x0d 0x0d >;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
cpus {
|
|
#address-cells = < 0x01 >;
|
|
#size-cells = < 0x00 >;
|
|
|
|
cpu@a00 {
|
|
device_type = "cpu";
|
|
compatible = "arm,cortex-a9";
|
|
reg = < 0xa00 >;
|
|
clocks = < 0x02 0x0c >;
|
|
clock-names = "cpu";
|
|
operating-points-v2 = < 0x5f >;
|
|
#cooling-cells = < 0x02 >;
|
|
cpu0-supply = < 0x60 >;
|
|
phandle = < 0x5d >;
|
|
};
|
|
|
|
cpu@a01 {
|
|
device_type = "cpu";
|
|
compatible = "arm,cortex-a9";
|
|
reg = < 0xa01 >;
|
|
clocks = < 0x02 0x0c >;
|
|
clock-names = "cpu";
|
|
operating-points-v2 = < 0x5f >;
|
|
#cooling-cells = < 0x02 >;
|
|
};
|
|
|
|
cpu@a02 {
|
|
device_type = "cpu";
|
|
compatible = "arm,cortex-a9";
|
|
reg = < 0xa02 >;
|
|
clocks = < 0x02 0x0c >;
|
|
clock-names = "cpu";
|
|
operating-points-v2 = < 0x5f >;
|
|
#cooling-cells = < 0x02 >;
|
|
};
|
|
|
|
cpu@a03 {
|
|
device_type = "cpu";
|
|
compatible = "arm,cortex-a9";
|
|
reg = < 0xa03 >;
|
|
clocks = < 0x02 0x0c >;
|
|
clock-names = "cpu";
|
|
operating-points-v2 = < 0x5f >;
|
|
#cooling-cells = < 0x02 >;
|
|
};
|
|
};
|
|
|
|
opp_table0 {
|
|
compatible = "operating-points-v2";
|
|
opp-shared;
|
|
phandle = < 0x5f >;
|
|
|
|
opp-200000000 {
|
|
opp-hz = < 0x00 0xbebc200 >;
|
|
opp-microvolt = < 0xdbba0 >;
|
|
clock-latency-ns = < 0x30d40 >;
|
|
};
|
|
|
|
opp-300000000 {
|
|
opp-hz = < 0x00 0x11e1a300 >;
|
|
opp-microvolt = < 0xdbba0 >;
|
|
clock-latency-ns = < 0x30d40 >;
|
|
};
|
|
|
|
opp-400000000 {
|
|
opp-hz = < 0x00 0x17d78400 >;
|
|
opp-microvolt = < 0xe1d48 >;
|
|
clock-latency-ns = < 0x30d40 >;
|
|
};
|
|
|
|
opp-500000000 {
|
|
opp-hz = < 0x00 0x1dcd6500 >;
|
|
opp-microvolt = < 0xe7ef0 >;
|
|
clock-latency-ns = < 0x30d40 >;
|
|
};
|
|
|
|
opp-600000000 {
|
|
opp-hz = < 0x00 0x23c34600 >;
|
|
opp-microvolt = < 0xee098 >;
|
|
clock-latency-ns = < 0x30d40 >;
|
|
};
|
|
|
|
opp-700000000 {
|
|
opp-hz = < 0x00 0x29b92700 >;
|
|
opp-microvolt = < 0xf116c >;
|
|
clock-latency-ns = < 0x30d40 >;
|
|
};
|
|
|
|
opp-800000000 {
|
|
opp-hz = < 0x00 0x2faf0800 >;
|
|
opp-microvolt = < 0xf4240 >;
|
|
clock-latency-ns = < 0x30d40 >;
|
|
opp-suspend;
|
|
};
|
|
|
|
opp-900000000 {
|
|
opp-hz = < 0x00 0x35a4e900 >;
|
|
opp-microvolt = < 0xfd4bc >;
|
|
clock-latency-ns = < 0x30d40 >;
|
|
};
|
|
|
|
opp-1000000000 {
|
|
opp-hz = < 0x00 0x3b9aca00 >;
|
|
opp-microvolt = < 0x10980c >;
|
|
clock-latency-ns = < 0x30d40 >;
|
|
};
|
|
|
|
opp-1100000000 {
|
|
opp-hz = < 0x00 0x4190ab00 >;
|
|
opp-microvolt = < 0x115b5c >;
|
|
clock-latency-ns = < 0x30d40 >;
|
|
};
|
|
|
|
opp-1200000000 {
|
|
opp-hz = < 0x00 0x47868c00 >;
|
|
opp-microvolt = < 0x121eac >;
|
|
clock-latency-ns = < 0x30d40 >;
|
|
};
|
|
|
|
opp-1300000000 {
|
|
opp-hz = < 0x00 0x4d7c6d00 >;
|
|
opp-microvolt = < 0x1312d0 >;
|
|
clock-latency-ns = < 0x30d40 >;
|
|
};
|
|
|
|
opp-1400000000 {
|
|
opp-hz = < 0x00 0x53724e00 >;
|
|
opp-microvolt = < 0x13a54c >;
|
|
clock-latency-ns = < 0x30d40 >;
|
|
};
|
|
|
|
opp-1500000000 {
|
|
opp-hz = < 0x00 0x59682f00 >;
|
|
opp-microvolt = < 0x149970 >;
|
|
clock-latency-ns = < 0x30d40 >;
|
|
turbo-mode;
|
|
};
|
|
};
|
|
|
|
reserved-memory {
|
|
#address-cells = < 0x01 >;
|
|
#size-cells = < 0x01 >;
|
|
ranges;
|
|
|
|
region_mfc_left {
|
|
compatible = "shared-dma-pool";
|
|
no-map;
|
|
size = < 0x2400000 >;
|
|
alignment = < 0x100000 >;
|
|
phandle = < 0x28 >;
|
|
};
|
|
|
|
region_mfc_right {
|
|
compatible = "shared-dma-pool";
|
|
no-map;
|
|
size = < 0x800000 >;
|
|
alignment = < 0x100000 >;
|
|
phandle = < 0x29 >;
|
|
};
|
|
};
|
|
|
|
chosen {
|
|
stdout-path = "/soc/serial@13810000";
|
|
};
|
|
|
|
firmware@204f000 {
|
|
compatible = "samsung,secure-firmware";
|
|
reg = < 0x204f000 0x1000 >;
|
|
};
|
|
|
|
gpio_keys {
|
|
compatible = "gpio-keys";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = < 0x61 0x62 >;
|
|
|
|
power_key {
|
|
gpios = < 0x63 0x03 0x01 >;
|
|
linux,code = < 0x74 >;
|
|
label = "power key";
|
|
debounce-interval = < 0x0a >;
|
|
wakeup-source;
|
|
};
|
|
|
|
home_key {
|
|
gpios = < 0x64 0x02 0x00 >;
|
|
linux,code = < 0x66 >;
|
|
label = "home key";
|
|
debounce-interval = < 0x0a >;
|
|
wakeup-source;
|
|
};
|
|
};
|
|
|
|
sound {
|
|
compatible = "hardkernel,odroid-xu4-audio";
|
|
model = "Odroid-X";
|
|
samsung,audio-widgets = "Headphone\0Headphone Jack\0Microphone\0Mic Jack\0Microphone\0DMIC";
|
|
samsung,audio-routing = "Headphone Jack\0HPL\0Headphone Jack\0HPR\0IN1\0Mic Jack\0Mic Jack\0MICBIAS";
|
|
|
|
cpu {
|
|
sound-dai = < 0x06 0x00 >;
|
|
};
|
|
|
|
codec {
|
|
sound-dai = < 0x41 0x65 >;
|
|
};
|
|
};
|
|
|
|
pwrseq {
|
|
pinctrl-0 = < 0x66 >;
|
|
pinctrl-names = "default";
|
|
compatible = "mmc-pwrseq-emmc";
|
|
reset-gpios = < 0x67 0x02 0x01 >;
|
|
phandle = < 0x4b >;
|
|
};
|
|
|
|
fixed-rate-clocks {
|
|
|
|
xxti {
|
|
compatible = "samsung,clock-xxti";
|
|
clock-frequency = < 0x00 >;
|
|
};
|
|
|
|
xusbxti {
|
|
compatible = "samsung,clock-xusbxti";
|
|
clock-frequency = < 0x16e3600 >;
|
|
};
|
|
};
|
|
|
|
memory@40000000 {
|
|
device_type = "memory";
|
|
reg = < 0x40000000 0x3ff00000 >;
|
|
};
|
|
|
|
leds {
|
|
compatible = "gpio-leds";
|
|
|
|
led1 {
|
|
label = "led1:heart";
|
|
gpios = < 0x68 0x00 0x01 >;
|
|
default-state = "on";
|
|
linux,default-trigger = "heartbeat";
|
|
};
|
|
|
|
led2 {
|
|
label = "led2:mmc0";
|
|
gpios = < 0x68 0x02 0x01 >;
|
|
default-state = "on";
|
|
linux,default-trigger = "mmc0";
|
|
};
|
|
};
|
|
|
|
regulator_p3v3 {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "p3v3_en";
|
|
regulator-min-microvolt = < 0x325aa0 >;
|
|
regulator-max-microvolt = < 0x325aa0 >;
|
|
gpio = < 0x69 0x01 0x01 >;
|
|
enable-active-high;
|
|
regulator-always-on;
|
|
};
|
|
};
|