Commit Graph

4470 Commits

Author SHA1 Message Date
Kent McLeod
cbedb90bbb arm,smc: Follow decode-invoke design convention
The exec spec typically requires that invocations have a decode phase
that can fail followed by an invoke phase that can not fail.
A switch block is not required when there is only a single valid
invocation label.

Signed-off-by: Kent McLeod <kent@kry10.com>
2023-08-27 11:44:51 +10:00
Chris Guikema
271b298bab smc_cap: allow SMC calls for non-VMM threads
Drivers may need to use SMC calls to configure hardware resources

Signed-off-by: Robbie VanVossen <robert.vanvossen@dornerworks.com>
2023-08-27 11:44:51 +10:00
Alex Pavey
7d029e56e2 smc_cap: Add badge handling to smc cap
Signed-off-by: Alex Pavey <Alex.Pavey@dornerworks.com>
2023-08-27 11:44:51 +10:00
Alex Pavey
e62bc9bba3 smc_cap: Add SMC Capability with Call method
See PR at https://github.com/seL4/seL4/pull/701

Signed-off-by: Robbie VanVossen <robert.vanvossen@dornerworks.com>
2023-08-27 11:44:51 +10:00
Axel Heider
a58b9437a2 manual: improve thread affinity description
Signed-off-by: Axel Heider <axelheider@gmx.de>
2023-08-24 15:58:18 +02:00
Axel Heider
998ed9a34f manual: change 'core' to 'node'
The term "node" is used in other parts of the manual also.

Signed-off-by: Axel Heider <axelheider@gmx.de>
2023-08-24 15:58:18 +02:00
Axel Heider
dac273a2f6 manual: replace 'master' by 'non-MCS'
MCS was a separate branch initially, it got merged into the master
branch for version 11.0.0.

Signed-off-by: Axel Heider <axelheider@gmx.de>
2023-08-24 15:58:18 +02:00
Axel Heider
4d77c7008f boot: Remove constant BI_FRAME_SIZE_BITS
Use seL4_BootInfoFrameSizeBits directly.

Signed-off-by: Axel Heider <axelheider@gmx.de>
2023-08-23 15:10:32 +02:00
Axel Heider
b8c0b1cb02 boot: introduce seL4_BootInfoFrameSize
Provide seL4_BootInfoFrameSize (and seL4_BootInfoFrameBits) for
userland, to there is no longer a need to hard-code the 4 KiByte
assumption.

Signed-off-by: Axel Heider <axelheider@gmx.de>
2023-08-23 15:10:32 +02:00
Rafal Kolanski
8153bc569e aarch64: avoid void-return statements
C parser has issues with `return f(...)` when f's return type is void.
Rephrase `vcpu_hw_write_reg` to look like its AArch32 equivalent, using
`break` in the switch statement.

Signed-off-by: Rafal Kolanski <rafal.kolanski@proofcraft.systems>
2023-08-22 18:36:05 +10:00
Rafal Kolanski
d06eb0a81a aarch64: DONT_TRANSLATE 32-bit __asm__
Verification infrastructure can only handle word-sized variable access
in __asm__ statements. The following functions use 32-bit access on a
64-bit arch and are now marked DONT_TRANSLATE:
* readCIDR
* writeCIDR
* readAFSR0
* writeAFSR0
* readAFSR1
* writeAFSR1
* readESR
* writeESR
* readISR
* vcpu_init_vtcr

Signed-off-by: Rafal Kolanski <rafal.kolanski@proofcraft.systems>
2023-08-22 18:36:05 +10:00
Rafal Kolanski
3364849784 aarch64: don't take address of local vars
C parser and verification don't handle taking addresses of local
variables. Use direct `_cap_set_*` and pass by value instead of
pointer-based `_cap_ptr_set_*`.

Signed-off-by: Rafal Kolanski <rafal.kolanski@proofcraft.systems>
2023-08-22 18:36:05 +10:00
Rafal Kolanski
d5d614d8c2 arm: pde_C type is only available on aarch32
Latest AArch64 only uses pte_C which is already declared in common
setup, so pde_C only needs to be declared on AArch32.
Affects bitfield generator and verification.

Signed-off-by: Rafal Kolanski <rafal.kolanski@proofcraft.systems>
2023-08-22 18:36:05 +10:00
Axel Heider
8dd8d52241 print period and budget with units
- print period and budget with units
- print tick value also
- use proper format specifiers and avoid casting

Signed-off-by: Axel Heider <axel.heider@hensoldt.net>
2023-08-14 15:41:57 +10:00
Axel Heider
aa118c25b8 use types time_t and tickts_t properly
Signed-off-by: Axel Heider <axel.heider@hensoldt.net>
2023-08-14 15:41:57 +10:00
Axel Heider
cbad541120 doc: improve comments
Signed-off-by: Axel Heider <axel.heider@hensoldt.net>
2023-08-14 15:41:57 +10:00
Ivan-Velickovic
0792eebc0a Fix enabling of AArch64 user-level cache ops
These operations should be possible on seL4 with and without hypervisor
mode.

Signed-off-by: Ivan-Velickovic <i.velickovic@unsw.edu.au>
2023-08-13 11:20:12 +10:00
Axel Heider
1ca227a1b5 boot: simplify boot code recycling
Add helper functions to get kernel image location. This removes any
dependencies from the rest of the code on symbols and defines. It
also avoid passing a parameter though various functions.

Signed-off-by: Axel Heider <axelheider@gmx.de>
2023-08-13 09:04:26 +10:00
Mathieu Mirmont
f2428d2b29 x86: include apic.h instead of xapic.h
Incuding apic.h also gets x2apic.h included.

Signed-off-by: Mathieu Mirmont <mat@parad0x.org>
2023-08-13 09:02:57 +10:00
Ivan-Velickovic
6904039608 Read time directly on RISC-V platforms
Currently getting the timestamp for RISC-V platforms uses the
`rdtime` pseudo-instruction which ends up invoking OpenSBI
and then accessing the CLINT memory-mapped `mtime` register.
This patch eliminates the use of `rdtime` in favour of
directly getting the timestamp for performance.

Signed-off-by: Ivan-Velickovic <i.velickovic@unsw.edu.au>
2023-08-13 09:01:48 +10:00
Ivan-Velickovic
e1bdd809b6 Output JSON for hardware configuration
Signed-off-by: Ivan-Velickovic <i.velickovic@unsw.edu.au>
2023-08-13 08:59:55 +10:00
Kent McLeod
2317b402a8 libsel4: Add __ASSEMBLER__ guards in .h files
Additional header files may now be included in non-C contexts and so we
need to guard some C definitions with the __ASSEMBLER__ guards
convention.

Signed-off-by: Kent McLeod <kent@kry10.com>
2023-08-12 08:32:20 +02:00
Hesham Almatary
fc0d257ba2 riscv: Use jumps instead of branches jumping to C
Using branch instructions only allows -+4 KiB offseting range
from the current PC. If the C code is placed (depending on
linkers and address layout) far more than -+4 KiB, linking
will fail (e.g., R_RISCV_BRANCH out of range: 4735 is not in
[-2048, 2047]; references c_handle_fastpath_call.

This commit accounts for this case and uses jumps when jumping
to C code that should give enough offset range (-+ 1 MiB) and
make the assembly code more portable.

Signed-off-by: Hesham Almatary <hesham.almatary@cl.cam.ac.uk>
2023-08-12 14:56:01 +10:00
Robbie VanVossen
e25d9c90e1 libsel4: Make bootinfo consistent
Some slot positions in the rootnode would depend on configuration.
However that makes it difficult to add new root caps, especially if
multiple caps only exist based on configuration. Make all caps always
there, but null if not configured.

Signed-off-by: Robbie VanVossen <robert.vanvossen@dornerworks.com>
2023-08-12 14:41:52 +10:00
Kent McLeod
c5ab3d8c15 aarch64,vspace: Update error num reporting (#1075)
vaddr argument is 0th argument, not 2nd.

Signed-off-by: Kent McLeod <kent@kry10.com>
2023-08-10 08:20:22 +10:00
Kent McLeod
86e2508056 trivial: Update CHANGES for [RFC-10]
Signed-off-by: Kent McLeod <kent@kry10.com>
2023-08-10 08:20:22 +10:00
Kent McLeod
cb8ee83f0c aarch64,vspace: Remove pud cap type
Now the vspace_cap is used for all vspace roots and all other page
tables are referred to by page table caps.

Signed-off-by: Kent McLeod <kent@kry10.com>
2023-08-10 08:20:22 +10:00
Kent McLeod
dc808b3d76 aarch64,vspace: Rename pgd cap to vspace cap
This is already what's presented at userlevel. Now the underlying kernel
cap reflects the same name.

Signed-off-by: Kent McLeod <kent@kry10.com>
2023-08-10 08:20:22 +10:00
Kent McLeod
b3cc852425 aarch64,vspace: Remove page_directory captype
The page_table cap is used in it's place.

Signed-off-by: Kent McLeod <kent@kry10.com>
2023-08-10 08:20:22 +10:00
Kent McLeod
5b00dff656 aarch64,vspace: Merge pgde_t type into pte_t type
Finish combining different page table types into a single type.

Signed-off-by: Kent McLeod <kent@kry10.com>
2023-08-10 08:20:22 +10:00
Kent McLeod
fc4ee3f931 aarch64,vspace: Merge pude_t type into pte_t
Next step is to merge pude_t type.

Signed-off-by: Kent McLeod <kent@kry10.com>
2023-08-10 08:20:22 +10:00
Kent McLeod
dad370959f aarch64,vspace: Merge pde_t into pte_t
Remove the pde_t type and replace all usages with pte_t.
This doesn't remove the page directory cap type yet. Now the page
directory cap refers to a table of pte_t entries and is treated the same
as the object that a page table cap refers to.

Signed-off-by: Kent McLeod <kent@kry10.com>
2023-08-10 08:20:22 +10:00
Kent McLeod
629c60d0a0 aarch64,vspace: Setup single pte_t type
This first commit only handles 4k pages.
4k pages are mapped using level 3 descriptor formats which annoyingly
have an opposite type definition (bit[1]) from all other levels. At all
other levels, a bit value of 0 is page and 1 is table. At level 3, a bit
value of 1 is page (and there is no bit value for a table).

This prevents us from using a single tagged-union type definition for
all page table descriptor definitions. For now we treat 4k pages as
special and try and push on ahead with the single type definition
anyway.

Signed-off-by: Kent McLeod <kent@kry10.com>
2023-08-10 08:20:22 +10:00
Ivan Velickovic
6dbfeccd7c manual: fix typos in x86 virtualisation section
Signed-off-by: Ivan Velickovic <i.velickovic@unsw.edu.au>
2023-08-08 09:26:43 +02:00
Ivan Velickovic
5d72742377 Fix typo in comment for KernelDomainSchedule
Signed-off-by: Ivan Velickovic <i.velickovic@unsw.edu.au>
2023-08-07 14:06:48 +02:00
Kent McLeod
49f4ddfc8c SMP: Fixup compilation error
#1065 introduces a compilation error from refactoring.
Also apply some missed feedback from #1065 

Signed-off-by: Kent McLeod <kent-mcleod@users.noreply.github.com>
2023-06-21 10:58:48 +10:00
Axel Heider
3c180701ee remove Arch_migrateTCB()
It does the same on all architectures, so the contents can be moved
into the generic code.

Signed-off-by: Axel Heider <axelheider@gmx.de>
2023-06-21 08:58:28 +10:00
Axel Heider
7354779dde remove obsolete assert()
Commit f4c41f39 removed a check that dereferenced tcbSchedContext. It
should have removed this assert() also then.

Signed-off-by: Axel Heider <axelheider@gmx.de>
2023-06-21 08:58:28 +10:00
Axel Heider
147e291fe2 trivial: fix typos
Signed-off-by: Axel Heider <axelheider@gmx.de>
2023-06-20 09:10:18 +10:00
Ivan-Velickovic
2730e65796 Mark CLINT as reserved device on RISC-V platforms
Without this patch, user-level programs have the ability to
map in the core-local interrupt controller on RISC-V platforms
which contains the memory-mapped registers for the core-local
timer the kernel uses. This is a level of privilege that
user-level programs should not have. Writing to the `mtime`
register is possible which can then affect the timer interrupts
are delivered to the kernel.

Signed-off-by: Ivan-Velickovic <i.velickovic@unsw.edu.au>
2023-06-19 11:05:02 +10:00
Ivan-Velickovic
625fb14e9b Add missing ifdefs around printing functions
These are only called when CONFIG_DEBUG_BUILD is on, which *usually*
means that CONIFG_PRINTING is also enabled, but, it's not necessarily
the case.

Signed-off-by: Ivan-Velickovic <i.velickovic@unsw.edu.au>
2023-06-19 09:59:39 +10:00
Ivan-Velickovic
4dc40c3807 cmake: detect 32-bit x86 cross-compilers
Signed-off-by: Ivan-Velickovic <i.velickovic@unsw.edu.au>
2023-06-14 18:50:09 +10:00
Axel Heider
5091e5313d doc: fix typos
Co-authored-by: Ivan-Velickovic <i.velickovic@unsw.edu.au>
Signed-off-by: Axel Heider <axelheider@gmx.de>
2023-06-08 12:47:14 +10:00
Jingyao Zhou
2c5c3b1abe 64-bit-vms: removes duplication
Removes duplication of the vmlaunch/vmresume code.

Signed-off-by: Jingyao Zhou <jingyao.zhou@unsw.edu.au>
2023-06-06 13:29:34 +10:00
Kent McLeod
7fec9bc9e9 Add CONFIG_X86_64_VTX_64BIT_GUESTS guards
Guard the new implementation of 64-bit x86 guests behind a config
option. This is done so that existing projects that use x86_64 hosts
with ia32-bit guests can continue to be supported until either the old
feature is preferred to be deprecated, or support can be added to
support both simmultaneously.

Signed-off-by: Kent McLeod <kent@kry10.com>
2023-06-06 13:29:34 +10:00
Chris Guikema
6ed4986a9c 64-bit-vms: always save/restore FS+GS registers
Signed-off-by: Chris Guikema <chris.guikema@dornerworks.com>
2023-06-06 13:29:34 +10:00
Chris Guikema
2dbd1b818a 64-bit-vms: Add kernel support for 64-bit VMs
This commit combines a number of smaller commits which do the following:

    * Enter IA-32e mode when running a 64-bit host
    * Handle additional general purpose registers in 64-bit mode
    * Handle 64-bit specific MSR events
    * Properly save and restore FS, GS, and Shadow GS registers

CCDC-GVSC DISTRIBUTION A.  Approved for public release; distribution
unlimited. OPSEC#4481.

Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
2023-06-06 13:29:34 +10:00
Chris Guikema
0e53715320 trivial: Fix logical ID typo
CCDC-GVSC DISTRIBUTION A.  Approved for public release; distribution
unlimited. OPSEC#4481.

Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
2023-06-06 13:29:34 +10:00
Gerwin Klein
1b7da3627e gic_v3: mark gicv3_do_wait_for_rwp dont-translate
The verification C parser is failing to translate this function, but it
does not actually need to since this is behind the machine interface
anyway. Mark the function as dont-translate to avoid the problem.

Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
2023-06-05 12:01:58 +10:00
Gerwin Klein
18fef090ac configs: pick exynos5 config from exynos5-ver
Use `ARM_HYP_verified.cmake` from branch exynos5-ver as
`ARM_HYP_exynos5_verified.cmake` on master, so both can be used by
verification CI without switching branches.

Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
2023-06-05 10:57:20 +10:00