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83 lines
3.4 KiB
Perl
83 lines
3.4 KiB
Perl
@c
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@c COPYRIGHT (c) 1988-1999.
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@c On-Line Applications Research Corporation (OAR).
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@c All rights reserved.
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@c
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@c $Id$
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@c
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@chapter CPU Model Dependent Features
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@section Introduction
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Microprocessors are generally classified into
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families with a variety of CPU models or implementations within
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that family. Within a processor family, there is a high level
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of binary compatibility. This family may be based on either an
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architectural specification or on maintaining compatibility with
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a popular processor. Recent microprocessor families such as the
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SPARC or PA-RISC are based on an architectural specification
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which is independent or any particular CPU model or
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implementation. Older families such as the M68xxx and the iX86
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evolved as the manufacturer strived to produce higher
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performance processor models which maintained binary
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compatibility with older models.
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RTEMS takes advantage of the similarity of the
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various models within a CPU family. Although the models do vary
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in significant ways, the high level of compatibility makes it
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possible to share the bulk of the CPU dependent executive code
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across the entire family. Each processor family supported by
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RTEMS has a list of features which vary between CPU models
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within a family. For example, the most common model dependent
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feature regardless of CPU family is the presence or absence of a
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floating point unit or coprocessor. When defining the list of
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features present on a particular CPU model, one simply notes
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that floating point hardware is or is not present and defines a
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single constant appropriately. Conditional compilation is
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utilized to include the appropriate source code for this CPU
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model's feature set. It is important to note that this means
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that RTEMS is thus compiled using the appropriate feature set
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and compilation flags optimal for this CPU model used. The
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alternative would be to generate a binary which would execute on
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all family members using only the features which were always
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present.
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This chapter presents the set of features which vary
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across the various implementations of the C3x/C4x architecture
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that are of importance to rtems.
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the set of cpu model feature macros are defined in the file
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cpukit/score/cpu/c4x/rtems/score/c4x.h and are based upon
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the particular cpu model defined in the bsp's custom configuration
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file as well as the compilation command line.
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@section CPU Model Name
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The macro @code{CPU_MODEL_NAME} is a string which designates
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the name of this cpu model. for example, for the c32
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processor, this macro is set to the string "c32".
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@section Floating Point Unit
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The Texas Instruments C3x/C4x family makes little distinction
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between the various cpu registers. Although floating point
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operations may only be performed on a subset of the cpu registers,
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these same registers may be used for normal integer operations.
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as a result of this, this port of rtems makes no distinction
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between integer and floating point contexts. The routine
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@code{_CPU_Context_switch} saves all of the registers that
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comprise a task's context. the routines that initialize,
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save, and restore floating point contexts are not present
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in this port.
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Moreover, there is no floating point context pointer and
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the code in @code{_Thread_Dispatch} that manages the
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floating point context switching process is disabled
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on this port.
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This not only simplifies the port, it also speeds up context
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switches by reducing the code involved and reduces the code
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space footprint of the executive on the Texas Instruments
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C3x/C4x.
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