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https://gitlab.rtems.org/rtems/rtos/rtems.git
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2f56b7375a
- Add support to the BSP to enable irq-generic management - Update the powerpc shared irq code to support irq-generic. This is an opt in option for existing powerpc bsps. This change should be simpler now - Fix a number of issues in ISA IRQ controller handling by porting fixes from the i386 (PC) BSP Closes #4247 Closes #4248
118 lines
3.6 KiB
C
118 lines
3.6 KiB
C
/* SPDX-License-Identifier: BSD-2-Clause */
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/**
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* @file
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*
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* @ingroup RTEMSBSPsPowerPC
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*
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* @brief Generic Interrupt suppoer
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*/
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/*
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* Copyright (C) 2021 Chris Johns. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <stdlib.h>
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#include <rtems.h>
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#include <stdlib.h>
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#include <rtems/bspIo.h> /* for printk */
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#include <libcpu/spr.h>
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#include <bsp/irq_supp.h>
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#include <bsp/irq-generic.h>
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#include <bsp/vectors.h>
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SPR_RW(BOOKE_TSR)
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SPR_RW(PPC405_TSR)
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/* legacy mode for bookE DEC exception;
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* to avoid the double layer of function calls
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* (dec_handler_bookE -> C_dispatch_irq_handler -> user handler)
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* it is preferrable for the user to hook the DEC
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* exception directly.
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* However, the legacy mode works with less modifications
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* of user code.
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*/
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static int C_dispatch_dec_handler_bookE (BSP_Exception_frame *frame, unsigned int excNum)
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{
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/* clear interrupt; we must do this
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* before C_dispatch_irq_handler()
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* re-enables MSR_EE.
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* Note that PPC405 uses a different SPR# for TSR
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*/
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if (ppc_cpu_is_bookE()==PPC_BOOKE_405)
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_write_PPC405_TSR( BOOKE_TSR_DIS );
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else
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_write_BOOKE_TSR( BOOKE_TSR_DIS );
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return C_dispatch_irq_handler(frame, ASM_DEC_VECTOR);
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}
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/*
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* RTEMS Global Interrupt Handler Management Routines
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*/
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int BSP_rtems_irq_generic_set(rtems_irq_global_settings* config)
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{
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int r;
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r = BSP_setup_the_pic(config);
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if (!r)
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return r;
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ppc_exc_set_handler(ASM_EXT_VECTOR, C_dispatch_irq_handler);
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if ( ppc_cpu_is_bookE() ) {
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/* bookE decrementer interrupt needs to be cleared BEFORE
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* dispatching the user ISR (because the user ISR is called
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* with EE enabled)
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* We do this so that existing DEC handlers can be used
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* with minor modifications.
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*/
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ppc_exc_set_handler(ASM_BOOKE_DEC_VECTOR, C_dispatch_dec_handler_bookE);
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} else {
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ppc_exc_set_handler(ASM_DEC_VECTOR, C_dispatch_irq_handler);
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}
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return 1;
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}
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void bsp_interrupt_vector_enable(rtems_vector_number vector)
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{
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bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
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BSP_enable_irq_at_pic(vector);
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}
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void bsp_interrupt_vector_disable(rtems_vector_number vector)
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{
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bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
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BSP_disable_irq_at_pic(vector);
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}
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rtems_status_code bsp_interrupt_facility_initialize(void)
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{
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/*
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* Initialize RTEMS IRQ system
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*/
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BSP_rtems_irq_mng_init(0);
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return RTEMS_SUCCESSFUL;
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}
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