Sebastian Huber bfdfc979fd bsps/riscv: Fix PLIC enable register count ...

Each PLIC enable register has 32 bits, so we have to divide by 32.

2022-11-10 15:17:07 +01:00

..

aarch64

bsps/aarch64: Ensure FPU trap state is consistent

2022-11-09 08:14:11 -06:00

arm

bsps/arm/beagle/dcan: Added DCAN support

2022-10-30 09:35:54 +01:00

bfin

bsps: Sort .noinit* sections

2022-07-15 10:46:02 +02:00

i386

Do not use RTEMS_INLINE_ROUTINE

2022-09-19 09:09:22 +02:00

include

bsps/riscv: bsp_interrupt_get/set_affinity()

2022-11-10 08:55:38 +01:00

lm32

bsps: Sort .noinit* sections

2022-07-15 10:46:02 +02:00

m68k

Do not use RTEMS_INLINE_ROUTINE

2022-09-19 09:09:22 +02:00

microblaze

microblaze: Add JFFS2 AXI QSPI driver

2022-03-15 10:46:19 -05:00

mips

bsps: Sort .noinit* sections

2022-07-15 10:46:02 +02:00

moxie

bsps: Sort .noinit* sections

2022-07-15 10:46:02 +02:00

nios2

bsps: Sort .noinit* sections

2022-07-15 10:46:02 +02:00

no_cpu

bsps/no_cpu/no_bsp: Change license to BSD-2

2022-07-12 08:15:41 -05:00

or1k

bsps: Fix .data.rel.ro placement

2022-08-12 10:10:17 +02:00

powerpc

score: Add CPU_THREAD_LOCAL_STORAGE_VARIANT

2022-10-14 10:48:22 +02:00

riscv

bsps/riscv: Fix PLIC enable register count

2022-11-10 15:17:07 +01:00

sh

config: Place init task storage area in .rtemsstack

2022-11-09 16:54:02 +01:00

shared

bsps: Add Cache Manager implementation group

2022-10-24 13:34:32 +02:00

sparc

Do not use RTEMS_INLINE_ROUTINE

2022-09-19 09:09:22 +02:00

sparc64

bsps: Sort .noinit* sections

2022-07-15 10:46:02 +02:00

v850

bsps: Sort .noinit* sections

2022-07-15 10:46:02 +02:00

x86_64

Do not use RTEMS_INLINE_ROUTINE

2022-09-19 09:09:22 +02:00