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41 lines
1.4 KiB
Perl
41 lines
1.4 KiB
Perl
@c
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@c COPYRIGHT (c) 1988-2002.
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@c On-Line Applications Research Corporation (OAR).
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@c All rights reserved.
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@c
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@c $Id$
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@c
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@chapter Memory Model
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@section Introduction
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A processor may support any combination of memory
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models ranging from pure physical addressing to complex demand
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paged virtual memory systems. RTEMS supports a flat memory
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model which ranges contiguously over the processor's allowable
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address space. RTEMS does not support segmentation or virtual
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memory of any kind. The appropriate memory model for RTEMS
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provided by the targeted processor and related characteristics
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of that model are described in this chapter.
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@section Flat Memory Model
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The i960CA supports a flat 32-bit address space with
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addresses ranging from 0x00000000 to 0xFFFFFFFF (4 gigabytes).
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Although the i960CA reserves portions of this address space,
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application code and data may be placed in any non-reserved
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areas. Each address is represented by a 32-bit value and is
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byte addressable. The address may be used to reference a single
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byte, half-word (2-bytes), word (4 bytes), double-word (8
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bytes), triple-word (12 bytes) or quad-word (16 bytes). The
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i960CA does not support virtual memory or segmentation.
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The i960CA allows the memory space to be partitioned
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into sixteen regions which may be configured individually as big
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or little endian. RTEMS assumes that the memory regions in
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which its code, data, and the RTEMS Workspace reside are
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configured as little endian.
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