Sebastian Huber 5cc075712e irq/arm-gicv3.h: Customize CPU Interface init ...

Use the existing WRITE_SR() abstraction to access the interrupt group 0 and 1
enable registers.  This fixes the build for the AArch32 target.

Add BSP options which define the initial values of CPU Interface registers.

2022-07-12 08:26:46 +02:00

..

bsps

irq/arm-gicv3.h: Customize CPU Interface init

2022-07-12 08:26:46 +02:00

cpukit

build: Add RTEMS_GCOV_COVERAGE option

2022-07-04 08:29:52 +02:00

testsuites

validation: Test thread idle bodies

2022-07-07 09:00:48 +02:00

grp.yml

build: Add cppflags, cflags, cxxflags to groups

2022-07-04 08:29:52 +02:00