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2a81b3e981
* console/uarts.c, include/bsp.h, start/start.S, startup/bspstart.c, startup/exit.c, startup/linkcmds: Correct license URL and/or fix mistake in copyright notice. Both of these mistakes appear to be from code submitted after these changes were made previously.
148 lines
4.2 KiB
ArmAsm
148 lines
4.2 KiB
ArmAsm
/*
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* Cogent CSB337 startup code
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*
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* Copyright (c) 2004 by Jay Monkman <jtm@lopingdog.com>
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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*
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* http://www.rtems.com/license/LICENSE.
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*
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*
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* $Id$
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*/
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/* Some standard definitions...*/
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.equ PSR_MODE_USR, 0x10
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.equ PSR_MODE_FIQ, 0x11
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.equ PSR_MODE_IRQ, 0x12
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.equ PSR_MODE_SVC, 0x13
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.equ PSR_MODE_ABT, 0x17
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.equ PSR_MODE_UNDEF, 0x1B
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.equ PSR_MODE_SYS, 0x1F
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.equ PSR_I, 0x80
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.equ PSR_F, 0x40
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.equ PSR_T, 0x20
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.text
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.globl _start
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_start:
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/*
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* Since I don't plan to return to the bootloader,
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* I don't have to save the registers.
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*
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* I'll just set the CPSR for SVC mode, interrupts
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* off, and ARM instructions.
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*/
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mov r0, #(PSR_MODE_SVC | PSR_I | PSR_F)
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msr cpsr, r0
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/* zero the bss */
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ldr r1, =_bss_end_
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ldr r0, =_bss_start_
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_bss_init:
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mov r2, #0
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cmp r0, r1
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strlot r2, [r0], #4
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blo _bss_init /* loop while r0 < r1 */
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/* --- Initialize stack pointer registers */
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/* Enter IRQ mode and set up the IRQ stack pointer */
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mov r0, #(PSR_MODE_IRQ | PSR_I | PSR_F) /* No interrupts */
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msr cpsr, r0
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ldr r1, =_irq_stack_size
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ldr sp, =_irq_stack
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add sp, sp, r1
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/* Enter FIQ mode and set up the FIQ stack pointer */
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mov r0, #(PSR_MODE_FIQ | PSR_I | PSR_F) /* No interrupts */
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msr cpsr, r0
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ldr r1, =_fiq_stack_size
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ldr sp, =_fiq_stack
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add sp, sp, r1
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/* Enter ABT mode and set up the ABT stack pointer */
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mov r0, #(PSR_MODE_ABT | PSR_I | PSR_F) /* No interrupts */
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msr cpsr, r0
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ldr r1, =_abt_stack_size
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ldr sp, =_abt_stack
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add sp, sp, r1
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/* Set up the SVC stack pointer last and stay in SVC mode */
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mov r0, #(PSR_MODE_SVC | PSR_I | PSR_F) /* No interrupts */
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msr cpsr, r0
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ldr r1, =_svc_stack_size
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ldr sp, =_svc_stack
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add sp, sp, r1
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sub sp, sp, #0x64
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/*
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* Initialize the MMU. After we return, the MMU is enabled,
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* and memory may be remapped. I hope we don't remap this
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* memory away.
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*/
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ldr r0, =mem_map
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bl mmu_init
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/*
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* Initialize the exception vectors. This includes the
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* exceptions vectors (0x00000000-0x0000001c), and the
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* pointers to the exception handlers (0x00000020-0x0000003c).
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*/
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mov r0, #0
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adr r1, vector_block
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ldmia r1!, {r2-r9}
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stmia r0!, {r2-r9}
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ldmia r1!, {r2-r9}
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stmia r0!, {r2-r9}
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/* Now we are prepared to start the BSP's C code */
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bl boot_card
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/*
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* Theoretically, we could return to what started us up,
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* but we'd have to have saved the registers and stacks.
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* Instead, we'll just reset.
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*/
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bl bsp_reset
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/* We shouldn't get here. If we do, hang */
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_hang: b _hang
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/*
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* This is the exception vector table and the pointers to
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* the functions that handle the exceptions. It's a total
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* of 16 words (64 bytes)
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*/
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vector_block:
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ldr pc, Reset_Handler
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ldr pc, Undefined_Handler
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ldr pc, SWI_Handler
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ldr pc, Prefetch_Handler
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ldr pc, Abort_Handler
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nop
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ldr pc, IRQ_Handler
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ldr pc, FIQ_Handler
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Reset_Handler: b bsp_reset
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Undefined_Handler: b Undefined_Handler
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SWI_Handler: b SWI_Handler
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Prefetch_Handler: b Prefetch_Handler
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Abort_Handler: b Abort_Handler
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nop
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IRQ_Handler: b IRQ_Handler
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FIQ_Handler: b FIQ_Handler
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.globl Reset_Handler
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.globl Undefined_Handler
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.globl SWI_Handler
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.globl Prefetch_Handler
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.globl Abort_Handler
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.globl IRQ_Handler
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.globl FIQ_Handler
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