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ZynqMP hardware appears to have an odd hard-wired SGI implementation in which the SGIs are permanently set as enabled or disabled. Allow the TM27 IRQs to be overridden as necessary.
106 lines
2.2 KiB
C
106 lines
2.2 KiB
C
/**
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* @file
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*
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* @ingroup arm_gic
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*
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* @brief ARM GIC TM27 Support
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*/
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/*
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* Copyright (c) 2013-2014 embedded brains GmbH. All rights reserved.
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*
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* embedded brains GmbH
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* Dornierstr. 4
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* 82178 Puchheim
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* Germany
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* <info@embedded-brains.de>
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*/
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#ifndef _RTEMS_TMTEST27
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#error "This is an RTEMS internal file you must not include directly."
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#endif
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#ifndef LIBBSP_ARM_SHARED_ARM_GIC_TM27_H
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#define LIBBSP_ARM_SHARED_ARM_GIC_TM27_H
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#include <assert.h>
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#include <bsp.h>
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#include <bsp/irq.h>
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#define MUST_WAIT_FOR_INTERRUPT 1
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#ifndef ARM_GIC_TM27_IRQ_LOW
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#define ARM_GIC_TM27_IRQ_LOW ARM_GIC_IRQ_SGI_12
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#endif
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#ifndef ARM_GIC_TM27_IRQ_HIGH
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#define ARM_GIC_TM27_IRQ_HIGH ARM_GIC_IRQ_SGI_13
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#endif
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#define ARM_GIC_TM27_PRIO_LOW 0x80
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#define ARM_GIC_TM27_PRIO_HIGH 0x00
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static inline void Install_tm27_vector(void (*handler)(rtems_vector_number))
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{
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rtems_status_code sc = rtems_interrupt_handler_install(
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ARM_GIC_TM27_IRQ_LOW,
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"tm27 low",
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RTEMS_INTERRUPT_UNIQUE,
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(rtems_interrupt_handler) handler,
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NULL
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);
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assert(sc == RTEMS_SUCCESSFUL);
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sc = arm_gic_irq_set_priority(
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ARM_GIC_TM27_IRQ_LOW,
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ARM_GIC_TM27_PRIO_LOW
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);
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assert(sc == RTEMS_SUCCESSFUL);
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sc = rtems_interrupt_handler_install(
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ARM_GIC_TM27_IRQ_HIGH,
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"tm27 high",
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RTEMS_INTERRUPT_UNIQUE,
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(rtems_interrupt_handler) handler,
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NULL
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);
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assert(sc == RTEMS_SUCCESSFUL);
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sc = arm_gic_irq_set_priority(
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ARM_GIC_TM27_IRQ_HIGH,
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ARM_GIC_TM27_PRIO_HIGH
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);
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assert(sc == RTEMS_SUCCESSFUL);
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}
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static inline void Cause_tm27_intr(void)
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{
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rtems_status_code sc = arm_gic_irq_generate_software_irq(
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ARM_GIC_TM27_IRQ_LOW,
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1U << _SMP_Get_current_processor()
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);
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assert(sc == RTEMS_SUCCESSFUL);
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}
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static inline void Clear_tm27_intr(void)
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{
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/* Nothing to do */
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}
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static inline void Lower_tm27_intr(void)
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{
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rtems_status_code sc = arm_gic_irq_generate_software_irq(
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ARM_GIC_TM27_IRQ_HIGH,
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1U << _SMP_Get_current_processor()
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);
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assert(sc == RTEMS_SUCCESSFUL);
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}
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#endif /* LIBBSP_ARM_SHARED_ARM_GIC_TM27_H */
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