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https://gitlab.rtems.org/rtems/rtos/rtems.git
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20faa90860
This adds a backend for flashdev that simulates a flash device with adjustable delays to simulate real flash devices and offers configurable flash parameters. This also migrates the JFFS2 filesystem tests to the flashdev framework and eliminates the purpose-built simulated flash in the testsuite in favor of a more generic and widely usable solution.
95 lines
3.3 KiB
C
95 lines
3.3 KiB
C
/* SPDX-License-Identifier: BSD-2-Clause */
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/**
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* @file
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*
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* @ingroup Flash
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*
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* @brief Flashdev backend simulating NAND in memory
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*/
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/*
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* Copyright (C) 2025 On-Line Applications Research (OAR) Corporation
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS AS IS
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef NAND_SIM_FLASHDEV_H
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#define NAND_SIM_FLASHDEV_H
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#include <dev/flash/flashdev.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** @brief Configuration options for NAND simulation */
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struct flash_sim_flashdev_attributes {
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/** @brief The minimum delay in nanoseconds for a read operation */
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uint64_t read_delay_ns;
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/** @brief The minimum delay in nanoseconds for a write operation */
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uint64_t write_delay_ns;
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/** @brief The minimum delay in nanoseconds for a erase operation */
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uint64_t erase_delay_ns;
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/** @brief The number of bytes in each page */
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uint64_t page_size_bytes;
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/** @brief The number of spare/out of band (OOB) bytes per page */
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uint64_t page_oob_bytes;
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/** @brief The number of pages in each sector */
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uint64_t pages_per_sector;
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/** @brief The total number of sectors in the simulated device */
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uint64_t total_sectors;
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/** @brief The type of flash that is being simulated */
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rtems_flashdev_flash_type type;
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/**
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* @brief Allocator for simulated flash, but not other allocations.
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* malloc() will be used if NULL
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*/
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void *(*alloc)(size_t size);
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/**
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* @brief Free function for simulated flash, but not other allocations.
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* free() will be used if NULL
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*/
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void (*free)(void *ptr);
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};
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/**
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* @brief Initializes a simulated flash device. The flash device is not
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* registered in this call. The returned object must be destroyed with
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* rtems_flashdev_destroy if it has not been registered.
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*
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* @param[in] attr A pointer to a flash_sim_flashdev_attributes describing
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* the features of the simulated flash. This parameter may be NULL.
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*
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* @retval A pointer to the rtems_flashdev.
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* @retval NULL on failure.
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*/
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rtems_flashdev *flash_sim_flashdev_init(
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struct flash_sim_flashdev_attributes *attr
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);
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#ifdef __cplusplus
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}
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#endif
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#endif /* NAND_SIM_FLASHDEV_H */
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