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88 lines
2.9 KiB
C
88 lines
2.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0+-with-RTEMS-exception */
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/*
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* bat.h
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*
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* This file contains declaration of C function to
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* Instantiate 60x/7xx ppc Block Address Translation (BAT) registers.
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* More detailed information can be found on motorola
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* site and more precisely in the following book :
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*
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* MPC750
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* Risc Microporcessor User's Manual
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* Motorola REF : MPC750UM/AD 8/97
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*
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* Copyright (C) 1999 Eric Valette (eric.valette@free.fr)
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* Canon Centre Recherche France.
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*/
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#ifndef _LIBCPU_BAT_H
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#define _LIBCPU_BAT_H
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#include <libcpu/mmu.h>
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#include <libcpu/pgtable.h>
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#define IO_PAGE (_PAGE_NO_CACHE | _PAGE_GUARDED | _PAGE_RW)
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#ifndef ASM
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/* Take no risks -- the essential parts of this routine run with
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* interrupts disabled!
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*
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* The routine does basic parameter checks:
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* - Index must be 0..3 (0..7 on 7455, 7457).
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* If an index > 3 is requested the 745x is
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* programmed to enable the higher BATs.
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* - Size must be a power of two and <= 1<<28
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* (<=1<<31 on 7455, 7457. Also, on these processors
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* the special value 0xffffffff is allowed which stands
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* for 1<<32).
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* If a size > 1<<28 is requested, the 745x is
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* programmed to enable the larger block sizes.
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* - Bat ranges must not overlap.
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* - Physical & virtual addresses must be aligned
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* to the size.
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*
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* RETURNS: zero on success, nonzero on failure.
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*/
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extern int setdbat(int bat_index, unsigned long virt, unsigned long phys,
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unsigned int size, int flags);
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/* Same as setdbat but sets IBAT */
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extern int setibat(int bat_index, unsigned long virt, unsigned long phys,
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unsigned int size, int flags);
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/* read DBAT # 'idx' into *pu / *pl. NULL pointers may be passed.
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* If pu and pl are NULL, the bat contents are dumped to the console (printk).
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*
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* RETURNS: upper BAT contents or (-1) if index is invalid
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*/
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extern int getdbat(int bat_index, unsigned long *pu, unsigned long *pl);
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/* Same as getdbat but reads IBAT */
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extern int getibat(int bat_index, unsigned long *pu, unsigned long *pl);
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/* Do not use the asm-routines; they are obsolete; use setdbat() instead */
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extern void asm_setdbat0(unsigned int uperPart, unsigned int lowerPart);
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extern void asm_setdbat1(unsigned int uperPart, unsigned int lowerPart);
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extern void asm_setdbat2(unsigned int uperPart, unsigned int lowerPart);
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extern void asm_setdbat3(unsigned int uperPart, unsigned int lowerPart);
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#else
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/* Initialize all bats (upper and lower) to zero. This routine should *only*
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* be called during early BSP initialization when no C-ABI is available
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* yet.
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* This routine clobbers r3 and r4.
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* NOTE: on 7450 CPUs all 8 dbat/ibat units are cleared. On 601 CPUs only
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* 4 ibats.
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*/
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.globl CPU_clear_bats_early
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.type CPU_clear_bats_early,@function
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#endif
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#endif /* _LIBCPU_BAT_H */
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