This adds a backend for flashdev that simulates a flash device with
adjustable delays to simulate real flash devices and offers
configurable flash parameters. This also migrates the JFFS2
filesystem tests to the flashdev framework and eliminates the
purpose-built simulated flash in the testsuite in favor of a more
generic and widely usable solution.
Closes#5403
This makes the number of active chipselects a BSP configuration
parameter. The name of the macro in upstream source is misleading and
suggests that the driver can support up to the selected value when in
actuality it requires that number of chips to be present. If this number
of chips is not present, the driver will hang on initialization waiting
for a chip to respond that does not exist.
Closes#5397
Return the actual out of bounds size per page instead of the ioctl
return status. JFFS2 will happily operate with an OOB size of 0 and
instead put cleanmarkers in the normal page space of the flash.
Closes#5379
Previously this RTC was using the file system-based i2c interface in
/dev. Since the RTC is initialized pretty early on during system init,
we call open() before stdin/stdout/stderr have been opened. RTEMS
assumes that stdin == 0, stdout == 1, etc., and fails when that isn't
the case. In particular, when stdin != 0, RTEMS assumes that it wasn't
configured with a console driver and skips opening stdout/stderr,
leading to confusing issues with the standard I/O streams.
Closes#5284
This is now used by multiple files and can cause a multiple definitions
error when linking. Make the structure static to avoid this problem.
Closes#5372
The maximum size of JFFS2 is 4GB minus the block size of the flash.
Enforce this limitation when setting up a filesystem on a flashdev
region that is larger than the maximum.
This also resolves some off-nominal memory leaks.
Closes#5347
This adds an API call allowing for unregistration to include destruction
of private data that is not managed by the flashdev framework. This also
updates the existing consumers of flashdev to use the new private data
destructor callback.
Closes#5346
Before, the console driver needed
`BSP_CONSOLE_USE_INTERRUPTS` to be defined or it
would not build. The intent was to use polled
mode if the macro was equal to zero.
This change makes it so interrupt mode is used if
the macro is defined and polled mode is used if
the macro is not defined.
(cherry picked from commit 5e0a68d3ab)
Close#5283
The old logic would lead to an error when
multiprocessing was enabled and
`LEON3_GPTIMER_BASE` was defined due to
`leon3_timer_core_index` being undefined.
The new logic fixes this and keeps the same
intent:
- If multiprocessing is not enabled, the timer
index is 0
- If multiprocessing is enabled and
`LEON3_GPTIMER_BASE` is defined, the timer
index is twice the CPU boot index
- If multiprocessing is enabled and
`LEON3_GPTIMER_BASE` is not defined, we
fallback to the old logic using the GPTIMER
core index.
Close#5281
For example, with edge triggered external interrupts we may see spurious
interrupts. Ignore them instead of issuing a fatal error.
Use eieio to synchronize access to the IACK and EOI registers.
Use a loop to immediately services the next pending interrupt without
having to go through the exception epiloge and prologue.
Close#5173.
This moves the management console implementation into its own file so
that BSPs which do not need it do not carry the code around with them.
Closes#5120
This adds generic JFFS2 interworking code that allows JFFS2 to be used
on top of any flashdev backend. It currently only supports NOR flashdev
backends.
Accesses to the L2C registers performed by the L2C driver are now
serialized with spin locks. This avoids concurrent access to the L2C
registers by multiple processors. Proposed by GRLIB-TN-0021.
Update #4925.
This updates the implementation of the LEON3 processor power-down
function.
It now contains the workaround for the GR712RC power-down errata
described in GR712RC-UM, version 2.16, section 1.7.8. The workaround is
compatible with other LEON3/LEON4 components.
Update #4875.
The two RTCs supported by that driver (MCP7940M and EOZ9) use slightly
different register order. Add support for a different order to the
i2c-rtc driver.
The devfg driver loads the PL with a bitfile image. The driver can also
support scrubbing.
These drivers are from Patrick Gauvin <pggauvin at gmail.com> and a thread
on the devel list: https://lists.rtems.org/pipermail/devel/2017-May/017705.html
When using QEMU configurations that support SMP for Zynq7000 systems,
the second core is started at the same time as the first core instead of
waiting for an event to trigger a check for the value at 0xfffffff0
before jumping into RTEMS code. This makes the erroneously started core
wait as expected and prevents prefetch and data aborts from occurring
before the MMU has been properly configured. This was recently exposed
by cleanup done to the ARM GICv2 driver that removed some delays which
were allowing this to operate normally.
The RT_TSW_OK field is set to 1 if there was no error. The Message Error
(ME) field indicates an error and must be set to 0 if there was no error
so the result of tsw&RT_TSW_OK must be negated. It is then left-shifted
to the Messsage Error (ME) bit field of the message information word.
Fix issue CID 1399772
This removes the headers imported from the embeddedsw repository in
favor of a much thinner shim. This also removes the complicated build
system configuration necessary to support use of these headers. The
primary reason for removal is that certain external Xilinx libraries
also require use of these headers and this causes version mismatches and
header conflicts that can be avoided.
- Add support for four new ports, UART2-UART5.
- Add build options to allow console device configuration.
- Segregate device-specific definitions from the device family files. X macros
are used to maintain a single source of truth and have the configuration
done at compile-time
- Add raspberrypi_uart_init() to make it convenient for users to install uart
devices
Close#5130
Co-authored-by: Ning Yang <yangn0@qq.com>
