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updated for 68302 and so gen68360 bsp would compile

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This commit is contained in:
Joel Sherrill
1996-03-21 20:19:33 +00:00
parent d08b1c758f
commit f398452a64
4 changed files with 19 additions and 3 deletions
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4
c/src/exec/score/cpu/m68k/asm.h
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@@ -81,7 +81,9 @@
#define msp REG (msp) #define msp REG (msp)
#define usp REG (usp) #define usp REG (usp)
#define isp REG (isp) #define isp REG (isp)
#define sr REG (sr) #define sr REG (sr)
#define vbr REG (vbr)
#define dfc REG (dfc)
#define fp0 REG (fp0) #define fp0 REG (fp0)
#define fp1 REG (fp1) #define fp1 REG (fp1)

10
c/src/exec/score/cpu/m68k/m68k.h
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@@ -58,6 +58,7 @@ extern "C" {
* m68040 (implies FP) * m68040 (implies FP)
* m68lc040 (no FP) * m68lc040 (no FP)
* m68ec040 (no FP) * m68ec040 (no FP)
* m68302 (no FP)
* m68360 (no FP) * m68360 (no FP)
* *
* Primary difference (for RTEMS) between m68040, m680lc040, and * Primary difference (for RTEMS) between m68040, m680lc040, and
@@ -140,6 +141,15 @@ extern "C" {
#define M68K_HAS_BFFFO 1 #define M68K_HAS_BFFFO 1
#define M68K_HAS_PREINDEXING 1 #define M68K_HAS_PREINDEXING 1
#elif defined(m68302)
/* essentially a m68000 with onboard peripherals */
#define CPU_MODEL_NAME "m68302"
#define M68K_HAS_VBR 0
#define M68K_HAS_SEPARATE_STACKS 0
#define M68K_HAS_FPU 0
#define M68K_HAS_BFFFO 0
#define M68K_HAS_PREINDEXING 0
#elif defined(m68332) #elif defined(m68332)
#define CPU_MODEL_NAME "m68332" #define CPU_MODEL_NAME "m68332"

4
cpukit/score/cpu/m68k/asm.h
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@@ -81,7 +81,9 @@
#define msp REG (msp) #define msp REG (msp)
#define usp REG (usp) #define usp REG (usp)
#define isp REG (isp) #define isp REG (isp)
#define sr REG (sr) #define sr REG (sr)
#define vbr REG (vbr)
#define dfc REG (dfc)
#define fp0 REG (fp0) #define fp0 REG (fp0)
#define fp1 REG (fp1) #define fp1 REG (fp1)

4
cpukit/score/cpu/m68k/rtems/asm.h
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@@ -81,7 +81,9 @@
#define msp REG (msp) #define msp REG (msp)
#define usp REG (usp) #define usp REG (usp)
#define isp REG (isp) #define isp REG (isp)
#define sr REG (sr) #define sr REG (sr)
#define vbr REG (vbr)
#define dfc REG (dfc)
#define fp0 REG (fp0) #define fp0 REG (fp0)
#define fp1 REG (fp1) #define fp1 REG (fp1)