build: Use enabled by for defaults

Merge the "default" and "default-by-variant" attributes. Use an "enabled-by" expression to select the default value based on the enabled set. This makes it possible to select default values depending on other options. For example you could choose memory settings based on whether RTEMS_SMP is enabled or disabled. The change was tested by comparing the output of ./waf bspdefaults before and after the change.
2025-11-16 12:34:45 +00:00 · 2022-09-12 10:35:21 +02:00
parent d2664faa39
commit f20078acea
819 changed files with 3003 additions and 2780 deletions
--- a/spec/build/bsps/aarch64/a53/abi.yml
+++ b/spec/build/bsps/aarch64/a53/abi.yml
@@ -7,13 +7,13 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 On-Line Applications Research (OAR)
 default:
- -mcpu=cortex-a53
-default-by-variant:
- value:
+- enabled-by: aarch64/a53_ilp32_qemu
+  value:
  - -mcpu=cortex-a53
  - -mabi=ilp32
-  variants:
-  - aarch64/a53_ilp32_qemu
+- enabled-by: true
+  value:
+  - -mcpu=cortex-a53
 description: |
  ABI flags
 enabled-by: true
--- a/spec/build/bsps/aarch64/a53/optloadoff.yml
+++ b/spec/build/bsps/aarch64/a53/optloadoff.yml
@@ -7,8 +7,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 On-Line Applications Research (OAR)
-default: 0x00008000
-default-by-variant: []
+default:
+- enabled-by: true
+  value: 0x00008000
 description: |
  offset of RAM region from memory area base
 enabled-by: true
--- a/spec/build/bsps/aarch64/a53/optnocachelen.yml
+++ b/spec/build/bsps/aarch64/a53/optnocachelen.yml
@@ -7,8 +7,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 On-Line Applications Research (OAR)
-default: 0x00100000
-default-by-variant: []
+default:
+- enabled-by: true
+  value: 0x00100000
 description: |
  length of nocache RAM region
 enabled-by: true
--- a/spec/build/bsps/aarch64/a53/optramlen.yml
+++ b/spec/build/bsps/aarch64/a53/optramlen.yml
@@ -7,8 +7,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 On-Line Applications Research (OAR)
-default: 0x08000000
-default-by-variant: []
+default:
+- enabled-by: true
+  value: 0x08000000
 description: |
  length of memory area available to the BSP
 enabled-by: true
--- a/spec/build/bsps/aarch64/a53/optramori.yml
+++ b/spec/build/bsps/aarch64/a53/optramori.yml
@@ -7,8 +7,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 On-Line Applications Research (OAR)
-default: 0x40000000
-default-by-variant: []
+default:
+- enabled-by: true
+  value: 0x40000000
 description: |
  base address of memory area available to the BSP
 enabled-by: true
--- a/spec/build/bsps/aarch64/a53/tsta53.yml
+++ b/spec/build/bsps/aarch64/a53/tsta53.yml
@@ -38,8 +38,7 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 On-Line Applications Research (OAR)
-default: null
-default-by-variant: []
+default: []
 description: ''
 enabled-by: true
 links: []
--- a/spec/build/bsps/aarch64/a72/abi.yml
+++ b/spec/build/bsps/aarch64/a72/abi.yml
@@ -7,13 +7,13 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 On-Line Applications Research (OAR)
 default:
- -mcpu=cortex-a72
-default-by-variant:
- value:
+- enabled-by: aarch64/a72_ilp32_qemu
+  value:
  - -mcpu=cortex-a72
  - -mabi=ilp32
-  variants:
-  - aarch64/a72_ilp32_qemu
+- enabled-by: true
+  value:
+  - -mcpu=cortex-a72
 description: |
  ABI flags
 enabled-by: true
--- a/spec/build/bsps/aarch64/a72/optloadoff.yml
+++ b/spec/build/bsps/aarch64/a72/optloadoff.yml
@@ -7,8 +7,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 On-Line Applications Research (OAR)
-default: 0x00008000
-default-by-variant: []
+default:
+- enabled-by: true
+  value: 0x00008000
 description: |
  offset of RAM region from memory area base
 enabled-by: true
--- a/spec/build/bsps/aarch64/a72/optnocachelen.yml
+++ b/spec/build/bsps/aarch64/a72/optnocachelen.yml
@@ -7,8 +7,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 On-Line Applications Research (OAR)
-default: 0x00100000
-default-by-variant: []
+default:
+- enabled-by: true
+  value: 0x00100000
 description: |
  length of nocache RAM region
 enabled-by: true
--- a/spec/build/bsps/aarch64/a72/optramlen.yml
+++ b/spec/build/bsps/aarch64/a72/optramlen.yml
@@ -7,8 +7,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 On-Line Applications Research (OAR)
-default: 0x08000000
-default-by-variant: []
+default:
+- enabled-by: true
+  value: 0x08000000
 description: |
  length of memory area available to the BSP
 enabled-by: true
--- a/spec/build/bsps/aarch64/a72/optramori.yml
+++ b/spec/build/bsps/aarch64/a72/optramori.yml
@@ -7,8 +7,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 On-Line Applications Research (OAR)
-default: 0x40000000
-default-by-variant: []
+default:
+- enabled-by: true
+  value: 0x40000000
 description: |
  base address of memory area available to the BSP
 enabled-by: true
--- a/spec/build/bsps/aarch64/a72/tsta72.yml
+++ b/spec/build/bsps/aarch64/a72/tsta72.yml
@@ -38,8 +38,7 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 On-Line Applications Research (OAR)
-default: null
-default-by-variant: []
+default: []
 description: ''
 enabled-by: true
 links: []
--- a/spec/build/bsps/aarch64/optgtuseps.yml
+++ b/spec/build/bsps/aarch64/optgtuseps.yml
@@ -5,8 +5,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
-default: false
-default-by-variant: []
+default:
+- enabled-by: true
+  value: false
 description: |
  If set to true, and AARCH64_GENERIC_TIMER_USE_VIRTUAL is false, then
  the clock driver uses the Physical Secure Timer of the AARCH64
--- a/spec/build/bsps/aarch64/optgtusevirt.yml
+++ b/spec/build/bsps/aarch64/optgtusevirt.yml
@@ -5,8 +5,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
-default: false
-default-by-variant: []
+default:
+- enabled-by: true
+  value: false
 description: |
  If set to true, then the clock driver uses the Virtual Timer of the AARCH64
  Generic Timer, otherwise it uses the Physical Non-Secure Timer (EL1).
--- a/spec/build/bsps/aarch64/optmmupages.yml
+++ b/spec/build/bsps/aarch64/optmmupages.yml
@@ -8,8 +8,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2021 On-Line Applications Research (OAR)
-default: 0x00000040
-default-by-variant: []
+default:
+- enabled-by: true
+  value: 0x00000040
 description: |
  Defines the number of MMU translation table pages to provide.
 enabled-by: true
--- a/spec/build/bsps/aarch64/raspberrypi/abi.yml
+++ b/spec/build/bsps/aarch64/raspberrypi/abi.yml
@@ -7,9 +7,10 @@ build-type: option
 copyrights:
 - Copyright (C) 2022 Mohd Noor Aman
 default:
- -mcpu=cortex-a72
- -march=armv8-a
-default-by-variant: []
+- enabled-by: true
+  value:
+  - -mcpu=cortex-a72
+  - -march=armv8-a
 description: |
  ABI flags
 enabled-by: true
--- a/spec/build/bsps/aarch64/xilinx-versal/abi.yml
+++ b/spec/build/bsps/aarch64/xilinx-versal/abi.yml
@@ -7,8 +7,9 @@ build-type: option
 copyrights:
 - Copyright (C) 2021 Gedare Bloom
 default:
- -mcpu=cortex-a72
-default-by-variant: []
+- enabled-by: true
+  value:
+  - -mcpu=cortex-a72
 description: |
  ABI flags
 enabled-by: true
--- a/spec/build/bsps/aarch64/xilinx-versal/optclki2c0.yml
+++ b/spec/build/bsps/aarch64/xilinx-versal/optclki2c0.yml
@@ -5,8 +5,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2022 Chris Johns <chris@contemporary.software>
-default: 99999001
-default-by-variant: []
+default:
+- enabled-by: true
+  value: 99999001
 description: |
  Versal i2c0 clock frequency in Hz. This is the frequency after the signal
  has been processed using the values passed to the I2C0_REF_CTRL register.
--- a/spec/build/bsps/aarch64/xilinx-versal/optclki2c1.yml
+++ b/spec/build/bsps/aarch64/xilinx-versal/optclki2c1.yml
@@ -5,8 +5,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2022 Chris Johns <chris@contemporary.software>
-default: 99999001
-default-by-variant: []
+default:
+- enabled-by: true
+  value: 99999001
 description: |
  Versal i2c1 clock frequency in Hz. This is the frequency after the signal
  has been processed using the values passed to the I2C1_REF_CTRL register.
--- a/spec/build/bsps/aarch64/xilinx-versal/optclkuart.yml
+++ b/spec/build/bsps/aarch64/xilinx-versal/optclkuart.yml
@@ -5,11 +5,11 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
-default: 100000000
-default-by-variant:
- value: 24000000
-  variants:
-  - aarch64/xilinx_versal_qemu
+default:
+- enabled-by: aarch64/xilinx_versal_qemu
+  value: 24000000
+- enabled-by: true
+  value: 100000000
 description: |
  Versal UART clock frequency in Hz
 enabled-by: true
--- a/spec/build/bsps/aarch64/xilinx-versal/optconirq.yml
+++ b/spec/build/bsps/aarch64/xilinx-versal/optconirq.yml
@@ -5,8 +5,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2022 Chris Johns (chris@contemporary.software)
-default: true
-default-by-variant: []
+default:
+- enabled-by: true
+  value: true
 description: |
  use interrupt driven mode for console devices (used by default)
 enabled-by: true
--- a/spec/build/bsps/aarch64/xilinx-versal/optconminor.yml
+++ b/spec/build/bsps/aarch64/xilinx-versal/optconminor.yml
@@ -5,8 +5,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: 0
-default-by-variant: []
+default:
+- enabled-by: true
+  value: 0
 description: |
  minor number of console device
 enabled-by: true
--- a/spec/build/bsps/aarch64/xilinx-versal/optloadoff.yml
+++ b/spec/build/bsps/aarch64/xilinx-versal/optloadoff.yml
@@ -7,11 +7,11 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
-default: 0x00000000
-default-by-variant:
- value: 0x00008000
-  variants:
-  - aarch64/xilinx_versal_qemu
+default:
+- enabled-by: aarch64/xilinx_versal_qemu
+  value: 0x00008000
+- enabled-by: true
+  value: 0x00000000
 description: |
  offset of RAM region from memory area base
 enabled-by: true
--- a/spec/build/bsps/aarch64/xilinx-versal/optnocachelen.yml
+++ b/spec/build/bsps/aarch64/xilinx-versal/optnocachelen.yml
@@ -7,8 +7,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
-default: 0x00100000
-default-by-variant: []
+default:
+- enabled-by: true
+  value: 0x00100000
 description: |
  length of nocache RAM region
 enabled-by: true
--- a/spec/build/bsps/aarch64/xilinx-versal/optramlen.yml
+++ b/spec/build/bsps/aarch64/xilinx-versal/optramlen.yml
@@ -7,8 +7,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
-default: 0x10000000
-default-by-variant: []
+default:
+- enabled-by: true
+  value: 0x10000000
 description: |
  length of memory area available to the BSP
 enabled-by: true
--- a/spec/build/bsps/aarch64/xilinx-versal/optramori.yml
+++ b/spec/build/bsps/aarch64/xilinx-versal/optramori.yml
@@ -7,11 +7,11 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
-default: 0x10000000
-default-by-variant:
- value: 0x20000000
-  variants:
-  - aarch64/xilinx_versal_qemu
+default:
+- enabled-by: aarch64/xilinx_versal_qemu
+  value: 0x20000000
+- enabled-by: true
+  value: 0x10000000
 description: |
  base address of memory area available to the BSP
 enabled-by: true
--- a/spec/build/bsps/aarch64/xilinx-versal/tstaiedge.yml
+++ b/spec/build/bsps/aarch64/xilinx-versal/tstaiedge.yml
@@ -9,8 +9,7 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
-default: null
-default-by-variant: []
+default: []
 description: ''
 enabled-by: true
 links: []
--- a/spec/build/bsps/aarch64/xilinx-versal/tstqemu.yml
+++ b/spec/build/bsps/aarch64/xilinx-versal/tstqemu.yml
@@ -9,8 +9,7 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
-default: null
-default-by-variant: []
+default: []
 description: ''
 enabled-by: true
 links: []
--- a/spec/build/bsps/aarch64/xilinx-versal/tstvck190.yml
+++ b/spec/build/bsps/aarch64/xilinx-versal/tstvck190.yml
@@ -9,8 +9,7 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
-default: null
-default-by-variant: []
+default: []
 description: ''
 enabled-by: true
 links: []
--- a/spec/build/bsps/aarch64/xilinx-zynqmp/abi.yml
+++ b/spec/build/bsps/aarch64/xilinx-zynqmp/abi.yml
@@ -7,16 +7,17 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 On-Line Applications Research (OAR)
 default:
- -mcpu=cortex-a53
- -mno-outline-atomics
-default-by-variant:
- value:
+- enabled-by:
+  - aarch64/xilinx_zynqmp_ilp32_qemu
+  - aarch64/xilinx_zynqmp_ilp32_zu3eg
+  value:
  - -mcpu=cortex-a53
  - -mno-outline-atomics
  - -mabi=ilp32
-  variants:
-  - aarch64/xilinx_zynqmp_ilp32_qemu
-  - aarch64/xilinx_zynqmp_ilp32_zu3eg
+- enabled-by: true
+  value:
+  - -mcpu=cortex-a53
+  - -mno-outline-atomics
 description: |
  ABI flags
 enabled-by: true
--- a/spec/build/bsps/aarch64/xilinx-zynqmp/optclki2c0.yml
+++ b/spec/build/bsps/aarch64/xilinx-zynqmp/optclki2c0.yml
@@ -6,20 +6,9 @@ build-type: option
 copyrights:
 - Copyright (C) 2021 On-Line Applications Research (OAR)
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: 111111111
-default-by-variant:
- value: 111111111
-  variants:
-  - aarch64/xilinx_zynqmp_ilp32_qemu
- value: 111111111
-  variants:
-  - aarch64/xilinx_zynqmp_ilp32_zu3eg
- value: 111111111
-  variants:
-  - aarch64/xilinx_zynqmp_lp64_qemu
- value: 111111111
-  variants:
-  - aarch64/xilinx_zynqmp_lp64_zu3eg
+default:
+- enabled-by: true
+  value: 111111111
 description: |
  ZynqMP i2c0 clock frequency in Hz. This is the frequency after the signal
  has been processed using the values passed to the I2C0_REF_CTRL register.
--- a/spec/build/bsps/aarch64/xilinx-zynqmp/optclki2c1.yml
+++ b/spec/build/bsps/aarch64/xilinx-zynqmp/optclki2c1.yml
@@ -6,20 +6,9 @@ build-type: option
 copyrights:
 - Copyright (C) 2021 On-Line Applications Research (OAR)
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: 111111111
-default-by-variant:
- value: 111111111
-  variants:
-  - aarch64/xilinx_zynqmp_ilp32_qemu
- value: 111111111
-  variants:
-  - aarch64/xilinx_zynqmp_ilp32_zu3eg
- value: 111111111
-  variants:
-  - aarch64/xilinx_zynqmp_lp64_qemu
- value: 111111111
-  variants:
-  - aarch64/xilinx_zynqmp_lp64_zu3eg
+default:
+- enabled-by: true
+  value: 111111111
 description: |
  ZynqMP i2c1 clock frequency in Hz. This is the frequency after the signal
  has been processed using the values passed to the I2C1_REF_CTRL register.
--- a/spec/build/bsps/aarch64/xilinx-zynqmp/optclkuart.yml
+++ b/spec/build/bsps/aarch64/xilinx-zynqmp/optclkuart.yml
@@ -5,15 +5,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 On-Line Applications Research (OAR)
-default: 100000000
-default-by-variant:
- value: 100000000
-  variants:
-  - aarch64/xilinx_zynqmp_ilp32_qemu
-  - aarch64/xilinx_zynqmp_ilp32_zu3eg
-  - aarch64/xilinx_zynqmp_lp64_cfc400x
-  - aarch64/xilinx_zynqmp_lp64_qemu
-  - aarch64/xilinx_zynqmp_lp64_zu3eg
+default:
+- enabled-by: true
+  value: 100000000
 description: |
  Zynq UART clock frequency in Hz
 enabled-by: true
--- a/spec/build/bsps/aarch64/xilinx-zynqmp/optloadoff.yml
+++ b/spec/build/bsps/aarch64/xilinx-zynqmp/optloadoff.yml
@@ -7,13 +7,14 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 On-Line Applications Research (OAR)
-default: 0x00008000
-default-by-variant:
- value: 0x00000000
-  variants:
+default:
+- enabled-by:
  - aarch64/xilinx_zynqmp_ilp32_zu3eg
  - aarch64/xilinx_zynqmp_lp64_cfc400x
  - aarch64/xilinx_zynqmp_lp64_zu3eg
+  value: 0x00000000
+- enabled-by: true
+  value: 0x00008000
 description: |
  offset of RAM region from memory area base
 enabled-by: true
--- a/spec/build/bsps/aarch64/xilinx-zynqmp/optnocachelen.yml
+++ b/spec/build/bsps/aarch64/xilinx-zynqmp/optnocachelen.yml
@@ -7,8 +7,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 On-Line Applications Research (OAR)
-default: 0x00100000
-default-by-variant: []
+default:
+- enabled-by: true
+  value: 0x00100000
 description: |
  length of nocache RAM region
 enabled-by: true
--- a/spec/build/bsps/aarch64/xilinx-zynqmp/optramlen.yml
+++ b/spec/build/bsps/aarch64/xilinx-zynqmp/optramlen.yml
@@ -7,8 +7,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 On-Line Applications Research (OAR)
-default: 0x10000000
-default-by-variant: []
+default:
+- enabled-by: true
+  value: 0x10000000
 description: |
  length of memory area available to the BSP
 enabled-by: true
--- a/spec/build/bsps/aarch64/xilinx-zynqmp/optramori.yml
+++ b/spec/build/bsps/aarch64/xilinx-zynqmp/optramori.yml
@@ -7,13 +7,14 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 On-Line Applications Research (OAR)
-default: 0x40018000
-default-by-variant:
- value: 0x10000000
-  variants:
+default:
+- enabled-by:
  - aarch64/xilinx_zynqmp_ilp32_zu3eg
  - aarch64/xilinx_zynqmp_lp64_cfc400x
  - aarch64/xilinx_zynqmp_lp64_zu3eg
+  value: 0x10000000
+- enabled-by: true
+  value: 0x40018000
 description: |
  base address of memory area available to the BSP
 enabled-by: true
--- a/spec/build/bsps/aarch64/xilinx-zynqmp/tstqemu.yml
+++ b/spec/build/bsps/aarch64/xilinx-zynqmp/tstqemu.yml
@@ -38,8 +38,7 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 On-Line Applications Research (OAR)
-default: null
-default-by-variant: []
+default: []
 description: ''
 enabled-by: true
 links: []
--- a/spec/build/bsps/aarch64/xilinx-zynqmp/tstzu3eg.yml
+++ b/spec/build/bsps/aarch64/xilinx-zynqmp/tstzu3eg.yml
@@ -9,8 +9,7 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 On-Line Applications Research (OAR)
-default: null
-default-by-variant: []
+default: []
 description: ''
 enabled-by: true
 links: []
--- a/spec/build/bsps/arm/altera-cyclone-v/abi.yml
+++ b/spec/build/bsps/arm/altera-cyclone-v/abi.yml
@@ -7,12 +7,13 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default:
- -march=armv7-a
- -mthumb
- -mfpu=neon
- -mfloat-abi=hard
- -mtune=cortex-a9
-default-by-variant: []
+- enabled-by: true
+  value:
+  - -march=armv7-a
+  - -mthumb
+  - -mfpu=neon
+  - -mfloat-abi=hard
+  - -mtune=cortex-a9
 description: |
  ABI flags
 enabled-by: true
--- a/spec/build/bsps/arm/altera-cyclone-v/opta9periphclk.yml
+++ b/spec/build/bsps/arm/altera-cyclone-v/opta9periphclk.yml
@@ -5,8 +5,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: false
-default-by-variant: []
+default:
+- enabled-by: true
+  value: false
 description: |
  define to set ARM Cortex-A9 MPCore PERIPHCLK clock frequency in Hz, otherwise alt_clk_freq_get() is used
 enabled-by: true
--- a/spec/build/bsps/arm/altera-cyclone-v/optcachedata.yml
+++ b/spec/build/bsps/arm/altera-cyclone-v/optcachedata.yml
@@ -5,8 +5,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: true
-default-by-variant: []
+default:
+- enabled-by: true
+  value: true
 description: |
  enable data cache
 enabled-by: true
--- a/spec/build/bsps/arm/altera-cyclone-v/optcacheinst.yml
+++ b/spec/build/bsps/arm/altera-cyclone-v/optcacheinst.yml
@@ -5,8 +5,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: true
-default-by-variant: []
+default:
+- enabled-by: true
+  value: true
 description: |
  enable instruction cache
 enabled-by: true
--- a/spec/build/bsps/arm/altera-cyclone-v/optclkfastidle.yml
+++ b/spec/build/bsps/arm/altera-cyclone-v/optclkfastidle.yml
@@ -5,13 +5,14 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: false
-default-by-variant:
- value: true
-  variants:
+default:
+- enabled-by:
  - arm/lm3s6965_qemu
  - arm/realview_pbx_a9_qemu
  - arm/xilinx_zynq_a9_qemu
+  value: true
+- enabled-by: true
+  value: false
 description: |
  This sets a mode where the time runs as fast as possible when a clock ISR occurs while the IDLE thread is executing.  This can significantly reduce simulation times.
 enabled-by: true
--- a/spec/build/bsps/arm/altera-cyclone-v/optconcfg.yml
+++ b/spec/build/bsps/arm/altera-cyclone-v/optconcfg.yml
@@ -5,8 +5,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: true
-default-by-variant: []
+default:
+- enabled-by: true
+  value: true
 description: |
  configuration for console (UART 0)
 enabled-by: true
--- a/spec/build/bsps/arm/altera-cyclone-v/optconuart1.yml
+++ b/spec/build/bsps/arm/altera-cyclone-v/optconuart1.yml
@@ -5,8 +5,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: true
-default-by-variant: []
+default:
+- enabled-by: true
+  value: true
 description: |
  configuration for UART 1
 enabled-by: true
--- a/spec/build/bsps/arm/altera-cyclone-v/optfdten.yml
+++ b/spec/build/bsps/arm/altera-cyclone-v/optfdten.yml
@@ -5,8 +5,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: true
-default-by-variant: []
+default:
+- enabled-by: true
+  value: true
 description: |
  define if FDT is supported
 enabled-by: true
--- a/spec/build/bsps/arm/altera-cyclone-v/opti2cspeed.yml
+++ b/spec/build/bsps/arm/altera-cyclone-v/opti2cspeed.yml
@@ -5,8 +5,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: 100000
-default-by-variant: []
+default:
+- enabled-by: true
+  value: 100000
 description: |
  speed for I2C0 in HZ
 enabled-by: true
--- a/spec/build/bsps/arm/altera-cyclone-v/optnoi2c.yml
+++ b/spec/build/bsps/arm/altera-cyclone-v/optnoi2c.yml
@@ -5,8 +5,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: true
-default-by-variant: []
+default:
+- enabled-by: true
+  value: true
 description: |
  Number of configured I2C buses. Note that each bus has to be configured in an apropriate i2cdrv_config array.
 enabled-by: true
--- a/spec/build/bsps/arm/altera-cyclone-v/optresetvec.yml
+++ b/spec/build/bsps/arm/altera-cyclone-v/optresetvec.yml
@@ -5,8 +5,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: false
-default-by-variant: []
+default:
+- enabled-by: true
+  value: false
 description: |
  reset vector address for BSP start
 enabled-by: true
--- a/spec/build/bsps/arm/altera-cyclone-v/optuartbaud.yml
+++ b/spec/build/bsps/arm/altera-cyclone-v/optuartbaud.yml
@@ -5,8 +5,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: 115200
-default-by-variant: []
+default:
+- enabled-by: true
+  value: 115200
 description: |
  baud for UARTs
 enabled-by: true
--- a/spec/build/bsps/arm/altera-cyclone-v/optuartirq.yml
+++ b/spec/build/bsps/arm/altera-cyclone-v/optuartirq.yml
@@ -5,8 +5,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: true
-default-by-variant: []
+default:
+- enabled-by: true
+  value: true
 description: |
  enable usage of interrupts for the UART modules
 enabled-by: true
--- a/spec/build/bsps/arm/atsam/abi.yml
+++ b/spec/build/bsps/arm/atsam/abi.yml
@@ -7,11 +7,12 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default:
- -mthumb
- -mcpu=cortex-m7
- -mfpu=fpv5-d16
- -mfloat-abi=hard
-default-by-variant: []
+- enabled-by: true
+  value:
+  - -mthumb
+  - -mcpu=cortex-m7
+  - -mfpu=fpv5-d16
+  - -mfloat-abi=hard
 description: |
  ABI flags
 enabled-by: true
--- a/spec/build/bsps/arm/atsam/optchgclksram.yml
+++ b/spec/build/bsps/arm/atsam/optchgclksram.yml
@@ -5,8 +5,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: false
-default-by-variant: []
+default:
+- enabled-by: true
+  value: false
 description: |
  Move the functions that set up the clock into the SRAM.  This allows to change the clock frequency even if the application is started from SDRAM.  Requires a TCM_SIZE > 0.
 enabled-by: true
--- a/spec/build/bsps/arm/atsam/optchip.yml
+++ b/spec/build/bsps/arm/atsam/optchip.yml
@@ -43,8 +43,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: samv71q21
-default-by-variant: []
+default:
+- enabled-by: true
+  value: samv71q21
 description: |
  Chip variant
 enabled-by: true
--- a/spec/build/bsps/arm/atsam/optconbaud.yml
+++ b/spec/build/bsps/arm/atsam/optconbaud.yml
@@ -5,8 +5,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: 115200
-default-by-variant: []
+default:
+- enabled-by: true
+  value: 115200
 description: |
  initial baud for console devices (default 115200)
 enabled-by: true
--- a/spec/build/bsps/arm/atsam/optconidx.yml
+++ b/spec/build/bsps/arm/atsam/optconidx.yml
@@ -5,8 +5,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: 1
-default-by-variant: []
+default:
+- enabled-by: true
+  value: 1
 description: |
  device index for /dev/console (default 1, e.g. USART1)
 enabled-by: true
--- a/spec/build/bsps/arm/atsam/optconirq.yml
+++ b/spec/build/bsps/arm/atsam/optconirq.yml
@@ -5,8 +5,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: true
-default-by-variant: []
+default:
+- enabled-by: true
+  value: true
 description: |
  use interrupt driven mode for console devices (used by default)
 enabled-by: true
--- a/spec/build/bsps/arm/atsam/optcontype.yml
+++ b/spec/build/bsps/arm/atsam/optcontype.yml
@@ -5,8 +5,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: 0
-default-by-variant: []
+default:
+- enabled-by: true
+  value: 0
 description: |
  device type for /dev/console, use 0 for USART and 1 for UART (default USART)
 enabled-by: true
--- a/spec/build/bsps/arm/atsam/optmck.yml
+++ b/spec/build/bsps/arm/atsam/optmck.yml
@@ -5,8 +5,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: 123000000
-default-by-variant: []
+default:
+- enabled-by: true
+  value: 123000000
 description: |
  Frequency of the MCK in Hz. Set to 0 to force application defined speed.  See start/pmc-config.c for available clock configurations.
 enabled-by: true
--- a/spec/build/bsps/arm/atsam/optnocachesz.yml
+++ b/spec/build/bsps/arm/atsam/optnocachesz.yml
@@ -6,8 +6,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: 0x00001000
-default-by-variant: []
+default:
+- enabled-by: true
+  value: 0x00001000
 description: |
  size of NOCACHE section in bytes
 enabled-by: true
--- a/spec/build/bsps/arm/atsam/optnullsz.yml
+++ b/spec/build/bsps/arm/atsam/optnullsz.yml
@@ -5,8 +5,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: 0x00000000
-default-by-variant: []
+default:
+- enabled-by: true
+  value: 0x00000000
 description: |
  Size of the NULL pointer protection area in bytes.  This memory area reduces
  the size of the ITCM available to the application.
--- a/spec/build/bsps/arm/atsam/optoscmain.yml
+++ b/spec/build/bsps/arm/atsam/optoscmain.yml
@@ -5,8 +5,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: 12000000
-default-by-variant: []
+default:
+- enabled-by: true
+  value: 12000000
 description: |
  Main oscillator frequency in Hz (default 12MHz)
 enabled-by: true
--- a/spec/build/bsps/arm/atsam/optqspiflashsz.yml
+++ b/spec/build/bsps/arm/atsam/optqspiflashsz.yml
@@ -6,8 +6,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: 0x00200000
-default-by-variant: []
+default:
+- enabled-by: true
+  value: 0x00200000
 description: |
  size of QSPI flash in bytes
 enabled-by: true
--- a/spec/build/bsps/arm/atsam/optsdram.yml
+++ b/spec/build/bsps/arm/atsam/optsdram.yml
@@ -26,8 +26,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: is42s16100e-7bli
-default-by-variant: []
+default:
+- enabled-by: true
+  value: is42s16100e-7bli
 description: |
  SDRAM variant. Known chips are "is42s16100e-7bli", "is42s16320f-7bl",
  "mt48lc16m16a2p-6a". You can also set this to "custom-<RAM_SIZE>" (for example
--- a/spec/build/bsps/arm/atsam/opttcmsz.yml
+++ b/spec/build/bsps/arm/atsam/opttcmsz.yml
@@ -6,8 +6,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: 0x00000000
-default-by-variant: []
+default:
+- enabled-by: true
+  value: 0x00000000
 description: |
  Size of tightly coupled memories (TCM) in bytes.  Note that the ITCM is
  reduced by the ATSAM_MEMORY_NULL_SIZE option.  DTCM is unaffected.
--- a/spec/build/bsps/arm/atsam/optusextal.yml
+++ b/spec/build/bsps/arm/atsam/optusextal.yml
@@ -5,8 +5,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: true
-default-by-variant: []
+default:
+- enabled-by: true
+  value: true
 description: |
  Use the external crystal as source for the slow clock instead of the internal RC oscillator. Note that on the ATSAM the NRST pin seems to depend on the slow clock as well as all watchdogs. If ATSAM_SLOWCLOCK_USE_XTAL is set to 1 without a external crystal connected, the controller might hang in the switching process without a working NRST pin.
 enabled-by: true
--- a/spec/build/bsps/arm/atsam/tstatsamv.yml
+++ b/spec/build/bsps/arm/atsam/tstatsamv.yml
@@ -27,8 +27,7 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: null
-default-by-variant: []
+default: []
 description: ''
 enabled-by: true
 links: []
--- a/spec/build/bsps/arm/beagle/abi.yml
+++ b/spec/build/bsps/arm/beagle/abi.yml
@@ -7,8 +7,9 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default:
- -mcpu=cortex-a8
-default-by-variant: []
+- enabled-by: true
+  value:
+  - -mcpu=cortex-a8
 description: |
  ABI flags
 enabled-by: true
--- a/spec/build/bsps/arm/beagle/optam335x.yml
+++ b/spec/build/bsps/arm/beagle/optam335x.yml
@@ -5,12 +5,13 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: false
-default-by-variant:
- value: true
-  variants:
+default:
+- enabled-by:
  - arm/beagleboneblack
  - arm/beaglebonewhite
+  value: true
+- enabled-by: true
+  value: false
 description: |
  true if SOC is AM335X
 enabled-by: true
--- a/spec/build/bsps/arm/beagle/optconbaud.yml
+++ b/spec/build/bsps/arm/beagle/optconbaud.yml
@@ -5,8 +5,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: 115200
-default-by-variant: []
+default:
+- enabled-by: true
+  value: 115200
 description: |
  initial baud for console UART
 enabled-by: true
--- a/spec/build/bsps/arm/beagle/optconpoll.yml
+++ b/spec/build/bsps/arm/beagle/optconpoll.yml
@@ -5,8 +5,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: false
-default-by-variant: []
+default:
+- enabled-by: true
+  value: false
 description: |
  polled console i/o (e.g. to run testsuite)
 enabled-by: true
--- a/spec/build/bsps/arm/beagle/optdebug.yml
+++ b/spec/build/bsps/arm/beagle/optdebug.yml
@@ -5,12 +5,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: false
-default-by-variant:
- value: false
-  variants:
-  - arm/beagleboneblack
-  - arm/beaglebonewhite
+default:
+- enabled-by: true
+  value: false
 description: |
  Enable BBB debug
 enabled-by: true
--- a/spec/build/bsps/arm/beagle/optdm3730.yml
+++ b/spec/build/bsps/arm/beagle/optdm3730.yml
@@ -5,12 +5,13 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: false
-default-by-variant:
- value: true
-  variants:
+default:
+- enabled-by:
  - arm/beagleboardorig
  - arm/beagleboardxm
+  value: true
+- enabled-by: true
+  value: false
 description: |
  true if SOC is DM3730
 enabled-by: true
--- a/spec/build/bsps/arm/csb336/abi.yml
+++ b/spec/build/bsps/arm/csb336/abi.yml
@@ -7,8 +7,9 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default:
- -mcpu=arm920
-default-by-variant: []
+- enabled-by: true
+  value:
+  - -mcpu=arm920
 description: |
  ABI flags
 enabled-by: true
--- a/spec/build/bsps/arm/csb337/abi.yml
+++ b/spec/build/bsps/arm/csb337/abi.yml
@@ -7,8 +7,9 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default:
- -mcpu=arm920
-default-by-variant: []
+- enabled-by: true
+  value:
+  - -mcpu=arm920
 description: |
  ABI flags
 enabled-by: true
--- a/spec/build/bsps/arm/csb337/optcsb637.yml
+++ b/spec/build/bsps/arm/csb337/optcsb637.yml
@@ -5,14 +5,13 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: false
-default-by-variant:
- value: true
-  variants:
+default:
+- enabled-by:
  - arm/kit637_v6
- value: true
-  variants:
  - arm/csb637
+  value: true
+- enabled-by: true
+  value: false
 description: |
  If defined, this indicates that the BSP is being built for the csb637 variant.
 enabled-by: true
--- a/spec/build/bsps/arm/csb337/optenlcd.yml
+++ b/spec/build/bsps/arm/csb337/optenlcd.yml
@@ -6,11 +6,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: false
-default-by-variant:
- value: false
-  variants:
-  - arm/kit637_v6
+default:
+- enabled-by: true
+  value: false
 description: |
  If defined, enable use of the SED1356 controller and LCD.
 enabled-by: true
--- a/spec/build/bsps/arm/csb337/optenumon.yml
+++ b/spec/build/bsps/arm/csb337/optenumon.yml
@@ -6,8 +6,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: true
-default-by-variant: []
+default:
+- enabled-by: true
+  value: true
 description: |
  If defined, enable use of the uMon console.
 enabled-by: true
--- a/spec/build/bsps/arm/csb337/optenumoncon.yml
+++ b/spec/build/bsps/arm/csb337/optenumoncon.yml
@@ -6,8 +6,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: true
-default-by-variant: []
+default:
+- enabled-by: true
+  value: true
 description: |
  If defined, enable use of the MicroMonitor console device.
 enabled-by: true
--- a/spec/build/bsps/arm/csb337/optenusart0.yml
+++ b/spec/build/bsps/arm/csb337/optenusart0.yml
@@ -5,8 +5,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: true
-default-by-variant: []
+default:
+- enabled-by: true
+  value: true
 description: |
  If defined, enable use of the USART 0.
 enabled-by: true
--- a/spec/build/bsps/arm/csb337/optenusart1.yml
+++ b/spec/build/bsps/arm/csb337/optenusart1.yml
@@ -5,8 +5,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: true
-default-by-variant: []
+default:
+- enabled-by: true
+  value: true
 description: |
  If defined, enable use of the USART 1.
 enabled-by: true
--- a/spec/build/bsps/arm/csb337/optenusart2.yml
+++ b/spec/build/bsps/arm/csb337/optenusart2.yml
@@ -5,8 +5,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: true
-default-by-variant: []
+default:
+- enabled-by: true
+  value: true
 description: |
  If defined, enable use of the USART 2.
 enabled-by: true
--- a/spec/build/bsps/arm/csb337/optenusart3.yml
+++ b/spec/build/bsps/arm/csb337/optenusart3.yml
@@ -5,8 +5,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: true
-default-by-variant: []
+default:
+- enabled-by: true
+  value: true
 description: |
  If defined, enable use of the USART 3.
 enabled-by: true
--- a/spec/build/bsps/arm/edb7312/abi.yml
+++ b/spec/build/bsps/arm/edb7312/abi.yml
@@ -7,8 +7,9 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default:
- -mcpu=arm7tdmi
-default-by-variant: []
+- enabled-by: true
+  value:
+  - -mcpu=arm7tdmi
 description: |
  ABI flags
 enabled-by: true
--- a/spec/build/bsps/arm/edb7312/optskyeye.yml
+++ b/spec/build/bsps/arm/edb7312/optskyeye.yml
@@ -5,8 +5,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: false
-default-by-variant: []
+default:
+- enabled-by: true
+  value: false
 description: |
  If defined, enable options which optimize executingon the Skyeye simulator.  Speed up the clock ticks while the idle task is running so time spent in the idle task is minimized.  This significantly reduces the wall time required to execute the RTEMS test suites.
 enabled-by: true
--- a/spec/build/bsps/arm/fvp/abi.yml
+++ b/spec/build/bsps/arm/fvp/abi.yml
@@ -7,11 +7,12 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default:
- -mcpu=cortex-r52
- -mthumb
- -mfloat-abi=hard
- -mfpu=auto
-default-by-variant: []
+- enabled-by: true
+  value:
+  - -mcpu=cortex-r52
+  - -mthumb
+  - -mfloat-abi=hard
+  - -mfpu=auto
 description: |
  ABI flags
 enabled-by: true
--- a/spec/build/bsps/arm/fvp/optdevbegin.yml
+++ b/spec/build/bsps/arm/fvp/optdevbegin.yml
@@ -8,11 +8,11 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: 0x1a000000
-default-by-variant:
- value: 0x9a000000
-  variants:
-  - arm/fvp_cortex_r52
+default:
+- enabled-by: arm/fvp_cortex_r52
+  value: 0x9a000000
+- enabled-by: true
+  value: 0x1a000000
 description: |
  Defines the begin address of the device area.
 enabled-by: true
--- a/spec/build/bsps/arm/fvp/optdevsize.yml
+++ b/spec/build/bsps/arm/fvp/optdevsize.yml
@@ -7,8 +7,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: 0x15200000
-default-by-variant: []
+default:
+- enabled-by: true
+  value: 0x15200000
 description: |
  Defines the size in bytes of the device area.
 enabled-by: true
--- a/spec/build/bsps/arm/fvp/optdrambegin.yml
+++ b/spec/build/bsps/arm/fvp/optdrambegin.yml
@@ -7,11 +7,11 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: 0x80000000
-default-by-variant:
- value: 0x00000400
-  variants:
-  - arm/fvp_cortex_r52
+default:
+- enabled-by: arm/fvp_cortex_r52
+  value: 0x00000400
+- enabled-by: true
+  value: 0x80000000
 description: |
  Defines the begin address of the DRAM.  The begin address must take the size
  of the NULL pointer protection area into account (ARM_FVP_MEMORY_NULL_SIZE).
--- a/spec/build/bsps/arm/fvp/optdramsize.yml
+++ b/spec/build/bsps/arm/fvp/optdramsize.yml
@@ -7,11 +7,11 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: 0x02000000
-default-by-variant:
- value: 0x01fffc00
-  variants:
-  - arm/fvp_cortex_r52
+default:
+- enabled-by: arm/fvp_cortex_r52
+  value: 0x01fffc00
+- enabled-by: true
+  value: 0x02000000
 description: |
  Defines the size in bytes of the DRAM.  Increasing the size may increase the
  startup time of the FVP.  The size must take the size of the NULL pointer
--- a/spec/build/bsps/arm/fvp/optnullsize.yml
+++ b/spec/build/bsps/arm/fvp/optnullsize.yml
@@ -7,11 +7,11 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: 0x00100000
-default-by-variant:
- value: 0x00000400
-  variants:
-  - arm/fvp_cortex_r52
+default:
+- enabled-by: arm/fvp_cortex_r52
+  value: 0x00000400
+- enabled-by: true
+  value: 0x00100000
 description: |
  Defines the size in bytes of the NULL pointer protection area.
 enabled-by: true
--- a/spec/build/bsps/arm/gumstix/abi.yml
+++ b/spec/build/bsps/arm/gumstix/abi.yml
@@ -7,8 +7,9 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default:
- -mcpu=xscale
-default-by-variant: []
+- enabled-by: true
+  value:
+  - -mcpu=xscale
 description: |
  ABI flags
 enabled-by: true
--- a/spec/build/bsps/arm/gumstix/optskyeye.yml
+++ b/spec/build/bsps/arm/gumstix/optskyeye.yml
@@ -5,8 +5,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: false
-default-by-variant: []
+default:
+- enabled-by: true
+  value: false
 description: |
  If defined, enable options which optimize executingon the Skyeye simulator.  Speed up the clock ticks while the idle task is running so time spent in the idle task is minimized.  This significantly reduces the wall time required to execute the RTEMS test suites.
 enabled-by: true
--- a/spec/build/bsps/arm/imx/abi.yml
+++ b/spec/build/bsps/arm/imx/abi.yml
@@ -7,12 +7,13 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default:
- -march=armv7-a
- -mthumb
- -mfpu=neon
- -mfloat-abi=hard
- -mtune=cortex-a7
-default-by-variant: []
+- enabled-by: true
+  value:
+  - -march=armv7-a
+  - -mthumb
+  - -mfpu=neon
+  - -mfloat-abi=hard
+  - -mtune=cortex-a7
 description: |
  ABI flags
 enabled-by: true
--- a/spec/build/bsps/arm/imx/optcachedata.yml
+++ b/spec/build/bsps/arm/imx/optcachedata.yml
@@ -5,13 +5,14 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: true
-default-by-variant:
- value: false
-  variants:
+default:
+- enabled-by:
  - arm/lm3s6965_qemu
  - arm/realview_pbx_a9_qemu
  - arm/xilinx_zynq_a9_qemu
+  value: false
+- enabled-by: true
+  value: true
 description: |
  enable data cache
 enabled-by: true
--- a/spec/build/bsps/arm/imx/optcacheinst.yml
+++ b/spec/build/bsps/arm/imx/optcacheinst.yml
@@ -5,13 +5,14 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: true
-default-by-variant:
- value: false
-  variants:
+default:
+- enabled-by:
  - arm/lm3s6965_qemu
  - arm/realview_pbx_a9_qemu
  - arm/xilinx_zynq_a9_qemu
+  value: false
+- enabled-by: true
+  value: true
 description: |
  enable instruction cache
 enabled-by: true
--- a/spec/build/bsps/arm/imx/optccmahb.yml
+++ b/spec/build/bsps/arm/imx/optccmahb.yml
@@ -5,8 +5,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: 135000000
-default-by-variant: []
+default:
+- enabled-by: true
+  value: 135000000
 description: |
  AHB clock frequency in Hz
 enabled-by: true
--- a/spec/build/bsps/arm/imx/optcmmecspi.yml
+++ b/spec/build/bsps/arm/imx/optcmmecspi.yml
@@ -5,8 +5,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: 67500000
-default-by-variant: []
+default:
+- enabled-by: true
+  value: 67500000
 description: |
  ECSPI clock frequency in Hz
 enabled-by: true
--- a/spec/build/bsps/arm/imx/optcmmipg.yml
+++ b/spec/build/bsps/arm/imx/optcmmipg.yml
@@ -5,8 +5,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: 67500000
-default-by-variant: []
+default:
+- enabled-by: true
+  value: 67500000
 description: |
  IPG clock frequency in Hz
 enabled-by: true
--- a/Show More
+++ b/Show More