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bsps/aarch64: refactor register init and hooks

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This commit is contained in:
Gedare Bloom
2022-01-06 12:03:04 -07:00
parent 37377b0f9d
commit ea7b1b79f8
2 changed files with 48 additions and 45 deletions
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81
bsps/aarch64/shared/start/start.S
View File

@@ -55,6 +55,11 @@ _start:
mov x5, x1 /* machine type number or ~0 for DT boot */ mov x5, x1 /* machine type number or ~0 for DT boot */
mov x6, x2 /* physical address of ATAGs or DTB */ mov x6, x2 /* physical address of ATAGs or DTB */
#else /* BSP_START_NEEDS_REGISTER_INITIALIZATION */ #else /* BSP_START_NEEDS_REGISTER_INITIALIZATION */
/*
* This block is dead code. No aarch64 targets require this. It might be
* needed for hardware simulations or in future processor variants with
* lock-step cores.
*/
mov x0, XZR mov x0, XZR
mov x1, XZR mov x1, XZR
mov x2, XZR mov x2, XZR
@@ -87,8 +92,42 @@ _start:
mov x29, XZR mov x29, XZR
mov x30, XZR mov x30, XZR
#ifdef AARCH64_MULTILIB_VFP #ifdef AARCH64_MULTILIB_VFP
#endif mov CPTR_EL3, XZR
#endif mov CPTR_EL2, XZR
mov d0, XZR
mov d1, XZR
mov d2, XZR
mov d3, XZR
mov d4, XZR
mov d5, XZR
mov d6, XZR
mov d7, XZR
mov d8, XZR
mov d9, XZR
mov d10, XZR
mov d11, XZR
mov d12, XZR
mov d13, XZR
mov d14, XZR
mov d15, XZR
mov d16, XZR
mov d17, XZR
mov d18, XZR
mov d19, XZR
mov d20, XZR
mov d21, XZR
mov d22, XZR
mov d23, XZR
mov d24, XZR
mov d25, XZR
mov d26, XZR
mov d27, XZR
mov d28, XZR
mov d29, XZR
mov d30, XZR
mov d31, XZR
#endif /* AARCH64_MULTILIB_VFP */
#endif /* BSP_START_NEEDS_REGISTER_INITIALIZATION */
/* Initialize SCTLR_EL1 */ /* Initialize SCTLR_EL1 */
mov x0, XZR mov x0, XZR
@@ -252,44 +291,6 @@ _el1_start:
/* FPU does not need to be enabled on AArch64 */ /* FPU does not need to be enabled on AArch64 */
#ifdef BSP_START_NEEDS_REGISTER_INITIALIZATION
mov x0, #0
mov CPTR_EL3, XZR
mov CPTR_EL2, XZR
mov d0, XZR
mov d1, XZR
mov d2, XZR
mov d3, XZR
mov d4, XZR
mov d5, XZR
mov d6, XZR
mov d7, XZR
mov d8, XZR
mov d9, XZR
mov d10, XZR
mov d11, XZR
mov d12, XZR
mov d13, XZR
mov d14, XZR
mov d15, XZR
mov d16, XZR
mov d17, XZR
mov d18, XZR
mov d19, XZR
mov d20, XZR
mov d21, XZR
mov d22, XZR
mov d23, XZR
mov d24, XZR
mov d25, XZR
mov d26, XZR
mov d27, XZR
mov d28, XZR
mov d29, XZR
mov d30, XZR
mov d31, XZR
#endif /* BSP_START_NEEDS_REGISTER_INITIALIZATION */
#endif /* AARCH64_MULTILIB_VFP */ #endif /* AARCH64_MULTILIB_VFP */
/* /*

12
bsps/aarch64/xilinx-zynqmp/start/bspstarthooks.c
View File

@@ -46,6 +46,11 @@
#endif #endif
BSP_START_TEXT_SECTION void bsp_start_hook_0( void ) BSP_START_TEXT_SECTION void bsp_start_hook_0( void )
{
/* do nothing */
}
BSP_START_TEXT_SECTION void bsp_start_hook_1( void )
{ {
#ifdef RTEMS_SMP #ifdef RTEMS_SMP
uint32_t cpu_index_self; uint32_t cpu_index_self;
@@ -72,13 +77,10 @@ BSP_START_TEXT_SECTION void bsp_start_hook_0( void )
_SMP_Start_multitasking_on_secondary_processor( _SMP_Start_multitasking_on_secondary_processor(
_Per_CPU_Get_by_index( cpu_index_self ) _Per_CPU_Get_by_index( cpu_index_self )
); );
/* Unreached */
} }
#endif /* RTEMS_SMP */
#endif
}
BSP_START_TEXT_SECTION void bsp_start_hook_1( void )
{
AArch64_start_set_vector_base(); AArch64_start_set_vector_base();
bsp_start_copy_sections(); bsp_start_copy_sections();
zynqmp_setup_mmu_and_cache(); zynqmp_setup_mmu_and_cache();