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2003-07-18 Till Straumann <strauman@slac.stanford.edu>

Browse Source 
PR 288/rtems
	* support/new_exception_processing/cpu.c: _ISR_Nest_level is now
	properly maintained and does not reside in SPRG0.
This commit is contained in:
Joel Sherrill
2003-07-23 18:07:04 +00:00
parent 36e95a8703
commit d5fa273e0e
2 changed files with 14 additions and 24 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
c/src/lib/libbsp/powerpc/ChangeLog
View File

@@ -1,3 +1,9 @@
2003-07-18 Till Straumann <strauman@slac.stanford.edu>
PR 288/rtems
* support/new_exception_processing/cpu.c: _ISR_Nest_level is now
properly maintained and does not reside in SPRG0.
2003-03-06 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* configure.ac: Remove AC_CONFIG_AUX_DIR.

32
c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu.c
View File

@@ -50,6 +50,14 @@ void _CPU_Initialize(
)
{
_CPU_Table = *cpu_table;
{ unsigned hasFixed = 0;
/* assert that our BSP has fixed PR288 */
__asm__ __volatile__ ("mfspr %0, %2":"=r"(hasFixed):"0"(hasFixed),"i"(SPRG0));
if ( PPC_BSP_HAS_FIXED_PR288 != hasFixed ) {
BSP_panic("This BSP needs to fix PR#288");
}
}
}
/*PAGE
@@ -143,27 +151,3 @@ void _CPU_Install_interrupt_stack( void )
{
}
/*PAGE
*
* This is the PowerPC specific implementation of the routine which
* returns TRUE if an interrupt is in progress.
*/
boolean _ISR_Is_in_progress( void )
{
/*
* Until the patch on PR288 is in all new exception BSPs, this is
* the safest thing to do.
*/
#ifdef mpc8260
return (_ISR_Nest_level != 0);
#else
register unsigned int isr_nesting_level;
/*
* Move from special purpose register 0 (mfspr SPRG0, r3)
*/
asm volatile ("mfspr %0, 272" : "=r" (isr_nesting_level));
return isr_nesting_level;
#endif
}