mirror of
https://gitlab.rtems.org/rtems/rtos/rtems.git
synced 2025-12-05 15:15:44 +00:00
bsp/aarch64/raspberrypi4: Add PWM peripheral support
This commit adds support for the PWM peripheral on the aarch64/raspberrypi BSP.
This commit is contained in:
Shaunak Datar
110
bsps/aarch64/raspberrypi/include/bsp/raspberrypi-pwm.h
Normal file
110
bsps/aarch64/raspberrypi/include/bsp/raspberrypi-pwm.h
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@@ -0,0 +1,110 @@
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/* SPDX-License-Identifier: BSD-2-Clause */
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/**
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* @file
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*
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* @ingroup RTEMSBSPsAArch64Raspberrypi4
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*
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* @brief Raspberry Pi specific PWM definitions.
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*/
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/*
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* Copyright (C) 2025 Shaunak Datar
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef LIBBSP_AARCH64_RASPBERRYPI_4_PWM_H
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#define LIBBSP_AARCH64_RASPBERRYPI_4_PWM_H
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#include "bsp/raspberrypi.h"
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#include "bsp/rpi-gpio.h"
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#include "bsp/utility.h"
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typedef enum { raspberrypi_pwm0, raspberrypi_pwm1 } raspberrypi_pwm_channel;
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typedef enum {
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raspberrypi_pwm_master0,
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raspberrypi_pwm_master1
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} raspberrypi_pwm_master;
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/**
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* @name PWM_CONTROL register bits
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* @{
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*/
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#define C_MSEN2 BSP_BIT32( 15 ) /**< Channel 2 Mark-Space enable */
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#define C_USEF2 BSP_BIT32( 13 ) /**< Channel 2 use FIFO */
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#define C_POLA2 BSP_BIT32( 12 ) /**< Channel 2 invert polarity */
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#define C_SBIT2 BSP_BIT32( 11 ) /**< Channel 2 silence bit high */
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#define C_RPTL2 BSP_BIT32( 10 ) /**< Channel 2 repeat on underrun */
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#define C_MODE2 BSP_BIT32( 9 ) /**< Channel 2 serializer mode */
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#define C_PWEN2 BSP_BIT32( 8 ) /**< Channel 2 enable output */
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#define C_MSEN1 BSP_BIT32( 7 ) /**< Channel 1 Mark-Space enable */
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#define C_CLRF BSP_BIT32( 6 ) /**< Clear FIFO */
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#define C_USEF1 BSP_BIT32( 5 ) /**< Channel 1 use FIFO */
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#define C_POLA1 BSP_BIT32( 4 ) /**< Channel 1 invert polarity */
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#define C_SBIT1 BSP_BIT32( 3 ) /**< Channel 1 silence bit high */
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#define C_RPTL1 BSP_BIT32( 2 ) /**< Channel 1 repeat underrun */
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#define C_MODE1 BSP_BIT32( 1 ) /**< Channel 1 serializer mode */
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#define C_PWEN1 BSP_BIT32( 0 ) /**< Channel 1 enable output */
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/** @} */
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/**
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* @brief Set PWM clock divider.
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* @param divisor 1 – 4095; PWMCLK = 19.2 MHz / @p divisor.
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* @retval RTEMS_SUCCESSFUL OK
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* @retval RTEMS_INVALID_NUMBER 0 or >4095
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*/
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rtems_status_code rpi_pwm_set_clock( uint32_t divisor );
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/**
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* @brief Update duty-cycle register.
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* @param master Selects the hardware instance to be used
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* (raspberrypi_pwm_master0 = PWM0, raspberrypi_pwm_master1 = PWM1)
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* @param channel Selects the channel for @p master (raspberrypi_pwm0 = PWMx_0,
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* raspberrypi_pwm1 = PWMx_1)
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* @param data Initial duty count, 1 – current range value.(0 rejected)
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*/
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rtems_status_code rpi_pwm_set_data(
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raspberrypi_pwm_master master,
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raspberrypi_pwm_channel channel,
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uint32_t data
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);
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/**
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* @brief Main PWM initialization function. This functions sets up the PWM
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* master, channel, duty cycle and GPIO pin.
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* @param master Selects the hardware instance to be used
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* (raspberrypi_pwm_master0 = PWM0, raspberrypi_pwm_master1 = PWM1)
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* @param channel Selects the channel for @p master (raspberrypi_pwm0 = PWMx_0,
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* raspberrypi_pwm1 = PWMx_1)
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* @param range Period register value (> 0)
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* @param data Initial duty count, 1 – @p range (0 rejected)
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*/
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rtems_status_code rpi_pwm_init(
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raspberrypi_pwm_master master,
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raspberrypi_pwm_channel channel,
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uint32_t range,
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uint32_t data
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);
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#endif /* LIBBSP_AARCH64_RASPBERRYPI_4_PWM_H */
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@@ -11,6 +11,7 @@
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/*
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* Copyright (c) 2022 Mohd Noor Aman
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* Copyright (c) 2024 Ning Yang
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* Copyright (c) 2025 Shaunak Datar
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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@@ -284,6 +285,42 @@
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/** @} */
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/**
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* @name PWM Clock Manager Register and Offsets
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*
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* @{
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*/
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#define BCM2711_CM_PWM_BASE ( RPI_PERIPHERAL_BASE + 0x00101000 )
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#define BCM2711_CM_PWM_CTL 0xA0
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#define BCM2711_CM_PWM_DIV 0xA4
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#define CM_PWM_PASSWD ( 0x5A << 24 )
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#define CM_PWM_CTL_SRC_OSC BSP_BIT32( 0 )
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#define CM_PWM_CTL_BUSY BSP_BIT32( 7 )
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#define CM_PWM_CTL_ENAB BSP_BIT32( 4 )
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#define CM_PWM_DIV_MASK 0xFFF
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/** @} */
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/**
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* @name PWM Registers and offsets
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*
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* @{
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*/
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#define BCM2711_PWM0_BASE ( RPI_PERIPHERAL_BASE + 0x0020C000 )
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#define BCM2711_PWM1_BASE ( RPI_PERIPHERAL_BASE + 0x0020C800 )
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#define BCM2711_PWM_CONTROL 0x00
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#define BCM2711_PWM_STATUS 0x04
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#define BCM2711_PWM_DMAC 0x08
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#define BCM2711_PWM_RNG1 0x10
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#define BCM2711_PWM_DAT1 0x14
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#define BCM2711_PWM_FIFO 0x18
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#define BCM2711_PWM_RNG2 0x20
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#define BCM2711_PWM_DAT2 0x24
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/** @} */
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/**
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* @name Mailbox Registers
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*
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198
bsps/aarch64/raspberrypi/pwm/raspberrypi-pwm.c
Normal file
198
bsps/aarch64/raspberrypi/pwm/raspberrypi-pwm.c
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@@ -0,0 +1,198 @@
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/* SPDX-License-Identifier: BSD-2-Clause */
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/**
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* @file
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*
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* @ingroup RTEMSBSPsAArch64Raspberrypi4
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*
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* @brief PWM Support
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*/
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/*
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* Copyright (C) 2025 Shaunak Datar
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "bsp/raspberrypi-pwm.h"
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// Clock manager macros
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#define BCM2711_CM_PWM( x ) BCM2835_REG( BCM2711_CM_PWM_BASE + ( x ) )
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#define CM_PWM_CTL_ENABLE_OSC \
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( CM_PWM_PASSWD | CM_PWM_CTL_ENAB | CM_PWM_CTL_SRC_OSC )
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#define CM_PWM_CTL_DISABLE ( CM_PWM_PASSWD | CM_PWM_CTL_SRC_OSC )
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static inline bool rpi_pwm_validate(
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raspberrypi_pwm_master master,
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raspberrypi_pwm_channel channel
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)
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{
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return ( ( master == raspberrypi_pwm_master0 ) ||
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( master == raspberrypi_pwm_master1 ) ) &&
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( ( channel == raspberrypi_pwm0 ) || ( channel == raspberrypi_pwm1 ) );
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}
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rtems_status_code rpi_pwm_set_clock( uint32_t divisor )
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{
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if ( !( divisor > 0 && divisor < 4096 ) ) {
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return RTEMS_INVALID_NUMBER;
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}
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/* Stop Clock */
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BCM2711_CM_PWM( BCM2711_CM_PWM_CTL ) = CM_PWM_CTL_DISABLE;
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while ( BCM2711_CM_PWM( BCM2711_CM_PWM_CTL ) & CM_PWM_CTL_BUSY );
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/* Set divisor */
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divisor &= CM_PWM_DIV_MASK;
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BCM2711_CM_PWM( BCM2711_CM_PWM_DIV ) = CM_PWM_PASSWD | ( divisor << 12 );
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/* Select src = osc(1) and enable */
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BCM2711_CM_PWM( BCM2711_CM_PWM_CTL ) = CM_PWM_CTL_ENABLE_OSC;
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while ( !( BCM2711_CM_PWM( BCM2711_CM_PWM_CTL ) & CM_PWM_CTL_BUSY ) );
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return RTEMS_SUCCESSFUL;
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}
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static rtems_status_code rpi_pwm_set_control(
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raspberrypi_pwm_master master,
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raspberrypi_pwm_channel channel
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)
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{
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uint32_t pwm_base = ( master == raspberrypi_pwm_master0 ) ?
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BCM2711_PWM0_BASE :
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BCM2711_PWM1_BASE;
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uint32_t control_reg = pwm_base + BCM2711_PWM_CONTROL;
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uint32_t control = BCM2835_REG( control_reg );
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if ( channel == raspberrypi_pwm0 ) {
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control &= ~( C_MODE1 | C_POLA1 | C_SBIT1 | C_RPTL1 | C_USEF1 );
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control |= ( C_PWEN1 | C_CLRF | C_MSEN1 );
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} else {
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control &= ~( C_MODE2 | C_POLA2 | C_SBIT2 | C_RPTL2 | C_USEF2 );
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control |= ( C_PWEN2 | C_CLRF | C_MSEN2 );
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}
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BCM2835_REG( control_reg ) = control;
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return RTEMS_SUCCESSFUL;
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}
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static rtems_status_code rpi_pwm_set_range(
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raspberrypi_pwm_master master,
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raspberrypi_pwm_channel channel,
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uint32_t range
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)
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{
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uint32_t pwm_base = ( master == raspberrypi_pwm_master0 ) ?
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BCM2711_PWM0_BASE :
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BCM2711_PWM1_BASE;
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uint32_t range_offset = ( channel == raspberrypi_pwm0 ) ? BCM2711_PWM_RNG1 :
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BCM2711_PWM_RNG2;
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BCM2835_REG( pwm_base + range_offset ) = range;
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return RTEMS_SUCCESSFUL;
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}
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rtems_status_code rpi_pwm_set_data(
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raspberrypi_pwm_master master,
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raspberrypi_pwm_channel channel,
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uint32_t data
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)
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{
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if ( !( rpi_pwm_validate( master, channel ) ) || data == 0 ) {
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return RTEMS_INVALID_NUMBER;
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}
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uint32_t pwm_base = ( master == raspberrypi_pwm_master0 ) ?
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BCM2711_PWM0_BASE :
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BCM2711_PWM1_BASE;
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uint32_t range_offset = ( channel == raspberrypi_pwm0 ) ? BCM2711_PWM_RNG1 :
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BCM2711_PWM_RNG2;
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if ( data > BCM2835_REG( pwm_base + range_offset ) ) {
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return RTEMS_INVALID_NUMBER;
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}
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uint32_t data_offset = ( channel == raspberrypi_pwm0 ) ? BCM2711_PWM_DAT1 :
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BCM2711_PWM_DAT2;
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BCM2835_REG( pwm_base + data_offset ) = data;
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return RTEMS_SUCCESSFUL;
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}
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static rtems_status_code rpi_pwm_set_gpio(
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raspberrypi_pwm_master master,
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raspberrypi_pwm_channel channel
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)
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{
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rtems_status_code sc;
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if ( master == raspberrypi_pwm_master0 ) {
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if ( channel == raspberrypi_pwm0 ) {
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sc = raspberrypi_gpio_set_function( 18, GPIO_AF5 );
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} else {
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sc = raspberrypi_gpio_set_function( 19, GPIO_AF5 );
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}
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} else {
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if ( channel == raspberrypi_pwm0 ) {
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sc = raspberrypi_gpio_set_function( 40, GPIO_AF0 );
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} else {
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sc = raspberrypi_gpio_set_function( 41, GPIO_AF0 );
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}
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}
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return sc;
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}
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rtems_status_code rpi_pwm_init(
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raspberrypi_pwm_master master,
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raspberrypi_pwm_channel channel,
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uint32_t range,
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uint32_t data
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)
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{
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rtems_status_code sc;
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if ( !( rpi_pwm_validate( master, channel ) ) || range == 0 ) {
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return RTEMS_INVALID_NUMBER;
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}
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sc = rpi_pwm_set_gpio( master, channel );
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if ( sc != RTEMS_SUCCESSFUL ) {
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return sc;
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}
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sc = rpi_pwm_set_range( master, channel, range );
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if ( sc != RTEMS_SUCCESSFUL ) {
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return sc;
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}
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sc = rpi_pwm_set_data( master, channel, data );
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if ( sc != RTEMS_SUCCESSFUL ) {
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return sc;
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}
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sc = rpi_pwm_set_control( master, channel );
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if ( sc != RTEMS_SUCCESSFUL ) {
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return sc;
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}
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return RTEMS_SUCCESSFUL;
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}
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@@ -65,6 +65,8 @@ links:
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uid: objspi
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- role: build-dependency
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uid: objwatchdog
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- role: build-dependency
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uid: objpwm
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source:
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- bsps/aarch64/raspberrypi/fdt/bsp_fdt.c
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- bsps/aarch64/raspberrypi/fdt/rpi4b_dtb.c
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17
spec/build/bsps/aarch64/raspberrypi/objpwm.yml
Normal file
17
spec/build/bsps/aarch64/raspberrypi/objpwm.yml
Normal file
@@ -0,0 +1,17 @@
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SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
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build-type: objects
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cflags: []
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copyrights:
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- Copyright (C) 2025 Shaunak Datar
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cppflags: []
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cxxflags: []
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enabled-by: true
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includes: []
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install:
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- destination: ${BSP_INCLUDEDIR}/bsp
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source:
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- bsps/aarch64/raspberrypi/include/bsp/raspberrypi-pwm.h
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links: []
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source:
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- bsps/aarch64/raspberrypi/pwm/raspberrypi-pwm.c
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type: build
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